CN110445377A - A kind of turn-on time generation circuit with zero quiescent dissipation - Google Patents
A kind of turn-on time generation circuit with zero quiescent dissipation Download PDFInfo
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- CN110445377A CN110445377A CN201910742208.3A CN201910742208A CN110445377A CN 110445377 A CN110445377 A CN 110445377A CN 201910742208 A CN201910742208 A CN 201910742208A CN 110445377 A CN110445377 A CN 110445377A
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- buck converter
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Dc-Dc Converters (AREA)
Abstract
A kind of turn-on time generation circuit with zero quiescent dissipation, suitable for BUCK converter, including comparator anode input end signal generation module, comparator negative terminal input end signal generation module and comparator, comparator negative terminal input end signal generation module obtains second comparison voltage directly proportional to BUCK converter output voltage using the adaptive equalization mechanism without amplifier, comparator anode input end signal generation module obtains first comparison voltage directly proportional to BUCK converter input voltage using resistance-capacitance filter, the first comparison voltage is compared by comparator again and the second comparison voltage obtains the voltage signal of upper on time of power tube in control BUCK converter.The present invention has zero quiescent dissipation, not only ensure that the precision of turn-on time, but also effectively improve the performance of BUCK converter chip.
Description
Technical field
The invention belongs to Analogous Integrated Electronic Circuits technical fields, and in particular to a kind of turn-on time production with zero quiescent dissipation
Raw circuit, is suitable for BUCK converter.
Background technique
The control strategy of adaptive turn-on time makes at continuous current mode CCM, the turn-on time of BUCK converter
TONWith the output voltage of BUCK converter and the ratio V of input voltageO/VINIt is directly proportional, to make BUCK changer system not
Under same input/output condition, the influence of EMI is effectively reduced in the switching frequency kept constant.
Traditional adaptive turn-on time module carries out Voltage-current conversion by amplifier, obtains converting with BUCK respectively
Device input voltage VIN, BUCK converter output voltage VODirectly proportional electric current, reconvert input at respectively with BUCK converter electric
Press VIN, BUCK converter output voltage VODirectly proportional voltage, to obtain and BUCK converter output voltage and input voltage
Ratio VO/VINDirectly proportional turn-on time TON, big quiescent dissipation is inevitably introduced, low power dissipation design is unfavorable for.
Summary of the invention
For the big shortcoming of quiescent dissipation existing for traditional adaptive turn-on time module, the present invention proposes a kind of tool
There is the turn-on time generation circuit of zero quiescent dissipation, comparator negative terminal input end signal generation module is used without the adaptive of amplifier
Compensation mechanism obtains second comparison voltage directly proportional to BUCK converter output voltage, and comparator anode input end signal generates
Module obtained using resistance-capacitance filter with BUCK converter input voltage i.e. supply voltage it is directly proportional first compared with it is electric
Pressure compares the first comparison voltage by comparator and the second comparison voltage obtains the conducting of upper power tube in control BUCK converter
The voltage signal of time；Using turn-on time generation circuit of the invention, the quiet of traditional adaptive turn-on time module is reduced
State power consumption both ensure that turn-on time TONPrecision, and effectively improve the performance of BUCK converter chip.
The technical solution of the present invention is as follows:
A kind of turn-on time generation circuit with zero quiescent dissipation, is suitable for BUCK converter, and the turn-on time produces
Raw circuit includes comparator anode input end signal generation module, comparator negative terminal input end signal generation module and comparator,
The comparator anode input end signal generation module be used for generate with supply voltage it is directly proportional first compared with it is electric
Pressure, the supply voltage are the input voltage of the BUCK converter；The comparator anode input end signal generation module packet
Phase inverter, buffer, the first NMOS tube, the second NMOS tube, first resistor and first capacitor are included,
The input terminal of phase inverter connects the grid and enable signal of the first NMOS tube, and output end connects after passing through buffer
The grid of second NMOS tube；
The source electrode of drain electrode the first NMOS tube of connection of second NMOS tube and one end of first capacitor simultaneously export first ratio
Compared with voltage, source electrode connects the other end of first capacitor and ground connection；
One end of first resistor connects the supply voltage, and the other end connects the drain electrode of the first NMOS tube；
The comparator negative terminal input end signal generation module for generates and the output voltage of the BUCK converter at
Second comparison voltage of direct ratio, the comparator negative terminal input end signal generation module includes second resistance, 3rd resistor, the 4th
Resistance, the 5th resistance, the 6th resistance, the second capacitor, third NMOS tube, the 4th NMOS tube, the 5th NMOS tube and the 6th NMOS tube,
Wherein second resistance and the 6th resistance are equal, and third NMOS tube and the 4th NMOS tube are with identity unit type and size
Negative threshold value depletion mode transistor；
The grid of third NMOS tube connects the output voltage of the BUCK converter, and drain electrode after 3rd resistor by connecting
The supply voltage, source electrode pass through the drain electrode of the 5th NMOS tube and the 6th NMOS tube of connection after second resistance；
The grid of 5th NMOS tube connects the grid of the 6th NMOS tube and connects the enable signal, source electrode connection the 4th
The drain electrode of NMOS tube；
The grounded-grid of 4th NMOS tube, source electrode are grounded after passing through the 6th resistance；
4th resistance and the series connection of the 5th resistance are attempted by between the source electrode and ground of the 6th NMOS tube, described in series connection point output
Second comparison voltage and by being grounded after the second capacitor；
Second comparison voltage that the comparator negative terminal input end signal generation module generates when enabled is kVO, and
Second comparison voltage meets kVO<<VIN, VOFor the output voltage of the BUCK converter, VINFor the supply voltage, k is
Constant and k=Rn4/(Rn1+Rn3+Rn4), Rn1、Rn3And Rn4Respectively second resistance, the resistance value of the 4th resistance and the 5th resistance；
Third NMOS tube and the 4th NMOS tube is in sub-threshold region and drain-source voltage is all larger than 4VT, VTFor thermal voltage；
The positive input of the comparator connects first comparison voltage, negative input connection second ratio
Compared with voltage, output end generates the output signal of the turn-on time generation circuit for controlling upper function in the BUCK converter
The turn-on time of rate pipe.
The operation principle of the present invention is that:
Comparator negative terminal input end signal generation module realizes that voltage-to-current turns using the adaptive equalization mechanism without amplifier
It changes, obtains and BUCK converter output voltage VODirectly proportional electric current, for obtaining and output voltage VODirectly proportional second is compared
Voltage V-.In addition, comparator anode input end signal generation module realizes ramp signal using resistance-capacitance filter, tiltedly
The slope and BUCK converter input voltage, that is, supply voltage V of slope signalINIt is directly proportional, to obtain and supply voltage VINCheng Zheng
First comparison voltage V+ of ratio.The first comparison voltage V+ and the second comparison voltage V- is compared by comparator again and obtains control BUCK
The turn-on time T of upper power tube in converterONVoltage signal VONAs the output signal of turn-on time generation circuit, pass through
This method, realization and VO/VINDirectly proportional turn-on time TON.Comparator negative terminal input end signal generation module, comparator are just
End input end signal generation module and comparator are all controlled by enable signal EN, by enabling pipe in the upper power of BUCK converter
Pipe closed stage shields comparator negative terminal input end signal generation module, comparator anode input end signal generation module and compares
Device turns off turn-on time generation circuit, realizes zero quiescent dissipation.
The invention has the benefit that the present invention is defeated with BUCK converter using the adaptive equalization mechanism acquisition without amplifier
The second directly proportional comparison voltage of voltage out is obtained with BUCK converter input voltage using resistance-capacitance filter at just
First comparison voltage of ratio, then the first comparison voltage and the second comparison voltage acquisition control BUCK converter are compared by comparator
In upper on time of power tube voltage signal, the present invention has zero quiescent dissipation, not only ensure that the precision of turn-on time, but also have
Improve to effect the performance of BUCK converter chip.
Detailed description of the invention
Fig. 1 is a kind of structural block diagram of the turn-on time generation circuit with zero quiescent dissipation proposed by the present invention.
Fig. 2 is comparator anode input in a kind of turn-on time generation circuit with zero quiescent dissipation proposed by the present invention
The circuit diagram of end signal generation module.
Fig. 3 is comparator negative terminal input in a kind of turn-on time generation circuit with zero quiescent dissipation proposed by the present invention
The circuit diagram of end signal generation module.
Specific embodiment
The invention will be further elaborated with specific embodiment with reference to the accompanying drawing:
The present invention proposes a kind of turn-on time generation circuit suitable for BUCK converter, as shown in Figure 1, including comparator
Anode input end signal generation module, comparator negative terminal input end signal generation module and comparator, wherein comparator anode is defeated
Enter end signal generation module for generate and supply voltage VINThe first directly proportional comparison voltage V+, supply voltage VINFor BUCK
The input voltage of converter；Comparator negative terminal input end signal generation module is for generating and the output voltage V of BUCK converterO
The second directly proportional comparison voltage V-；When comparator generates conducting for comparing the first comparison voltage V+ and the second comparison voltage V-
Between generation circuit output signal VONFor controlling the turn-on time T of upper power tube in BUCK converterON。
Comparator anode input end signal generation module, comparator negative terminal input end signal generation module and comparator all by
Enable signal EN is enabled, and when enable signal EN is low level, the first comparison voltage V+ and the second comparison voltage V- are 0, and
By the switching transistor inside comparator by the output signal V of turn-on time generation circuitONIt is set as 0.As enable signal EN
When for high level, the second comparison voltage V- is arranged to kVO, the first comparison voltage V+ with supply voltage VINDirectly proportional slope
aVINRise, wherein k, a are constant.KV is risen in the second comparison voltage V-OBefore, the output letter of turn-on time generation circuit
Number VONIt is maintained at low level.When the first comparison voltage V+ rises to equal to the second comparison voltage V-, comparator overturning, when conducting
Between generation circuit output signal VONBecome high level.Periodically enable signal EN is reset at the beginning of each cycle low
The output signal V of level, enable signal EN and turn-on time generation circuitONAdjacent rising edges between interval be turn-on time
TON, may be expressed as:
Comparator negative terminal input end signal generation module proposed by the present invention is obtained using the adaptive equalization mechanism without amplifier
It obtains and BUCK converter output voltage VOThe second directly proportional comparison voltage V-, comparator anode input end signal generation module benefit
It is obtained with resistance-capacitive filter and BUCK converter input voltage i.e. supply voltage VINThe first directly proportional comparison voltage V
+, the work of comparator anode input end signal generation module and comparator negative terminal input end signal generation module is made a concrete analysis of below
Make principle and the course of work.
It is the circuit structure diagram of comparator anode input end signal generation module, including phase inverter, buffering as shown in Figure 2
Device, the first NMOS tube Mp1, the second NMOS tube Mp2, first resistor RpWith first capacitor Cp, the input terminal connection first of phase inverter
NMOS tube Mp1Grid and enable signal EN, output end pass through buffer after connect the second NMOS tube Mp2Grid；Second
NMOS tube Mp2Drain electrode connect the first NMOS tube Mp1Source electrode and first capacitor CpOne end and export the first comparison voltage, source
Pole connects first capacitor CpThe other end and ground connection；First resistor RpOne end connect supply voltage, the other end connect the first NMOS
Pipe Mp1Drain electrode.
First NMOS tube Mp1, the second NMOS tube Mp2For enabled pipe, grid is all connected with enable signal EN.As enable signal EN
When for low level, the first NMOS tube Mp1Shutdown, the second NMOS tube Mp2Conducting, the first comparison voltage V+ are pulled down to 0.When enabled
When signal EN is high level, the first NMOS tube Mp1Conducting, the second NMOS tube Mp2Shutdown, supply voltage VIN, first resistor Rp,
One NMOS tube Mp1, first capacitor CpCharge circuit is constituted, the first NMOS tube M is ignoredp1On pressure drop, charge circuit can be reduced to one
Rank RC network can obtain the expression formula of the first comparison voltage V+:
When comparator overturning, V+=V-=kVO, can be obtained by formula (2), turn-on time TONAnd VIN、VORelationship are as follows:
Meet kVO<<VINWhen, formula (3) can be reduced to formula (4) by Taylor's formula:
Therefore, the rate of rise of the first comparison voltage V+ is equal to aV at this timeIN, wherein normal parameter a is writeable are as follows:
In the first NMOS tube Mp1Turn-on transients during, the first NMOS tube Mp1The variation of gate source voltage passes through the first NMOS
Pipe Mp1Gate-source parasitic capacitance CGS1It is coupled to first capacitor CpOn, may cause cause on the first comparison voltage V+ it is slight
Overshoot, which can be by the second NMOS tube Mp2Inhibit.In the first NMOS tube Mp1Turn-on transients during, buffering shown in Fig. 2
The delay that device introduces makes the second NMOS tube Mp2It is held on, is generated so as to avoid overshoot.By this method, it is ensured that ratio
Compared with the precision of device anode input end signal generation module.
It is the structural schematic diagram of comparator negative terminal input end signal generation module proposed by the present invention as shown in Figure 3, including
Second resistance Rn1, 3rd resistor Rn2, the 4th resistance Rn3, the 5th resistance Rn4, the 6th resistance Rn5, the second capacitor Cn1, the 3rd NMOS
Pipe Mn1, the 4th NMOS tube Mn2, the 5th NMOS tube Mn3With the 6th NMOS tube Mn4, wherein second resistance Rn1With the 6th resistance Rn5Resistance value
It is equal；Third NMOS tube Mn1Grid connection BUCK converter output voltage, drain electrode pass through 3rd resistor Rn2Connection electricity afterwards
Source voltage, source electrode pass through second resistance Rn1The 5th NMOS tube M is connected afterwardsn3With the 6th NMOS tube Mn4Drain electrode；5th NMOS tube
Mn3Grid connect the 6th NMOS tube Mn4Grid and connect enable signal EN, source electrode connect the 4th NMOS tube Mn2Drain electrode；
4th NMOS tube Mn2Grounded-grid, source electrode pass through the 6th resistance Rn5After be grounded；4th resistance Rn3With the 5th resistance Rn4Series connection
It is attempted by the 6th NMOS tube Mn4Source electrode and ground between, series connection point export the second comparison voltage simultaneously pass through the second capacitor Cn1Afterwards
Ground connection.
The second comparison voltage that comparator negative terminal input end signal generation module generates when enabled is kVO, and second compares
Voltage meets kVO<<VIN, VOFor the output voltage of BUCK converter, VINFor supply voltage, k is constant and k=Rn4/(Rn1+Rn3+
Rn4), Rn1、Rn3And Rn4Respectively second resistance Rn1, the 4th resistance Rn3With the 5th resistance Rn4Resistance value.
Comparator negative terminal input end signal generation module realizes that voltage-to-current turns using the adaptive equalization mechanism without amplifier
It changes, realizes the output voltage V with BUCK converterODirectly proportional electric current, for obtaining and the output voltage V of BUCK converterOAt
Second comparison voltage V- of direct ratio.Third NMOS tube Mn1With the 4th NMOS tube Mn2It is there is identity unit type and size negative
Threshold value depletion mode transistor.As the 4th NMOS tube Mn2Grid voltage be 0 when, the 4th NMOS tube Mn2It can also be connected.
5th NMOS tube Mn3With the 6th NMOS tube Mn4It is enabled pipe, they control the 4th NMOS tube M respectivelyn2The branch at place
The state on road and the second comparison signal V-.When enable signal EN is low level, the 5th NMOS tube Mn3With the 6th NMOS tube Mn4It closes
Disconnected, the second comparison signal V- is set as 0.When enable signal EN is high level, the 5th NMOS tube Mn3With the 6th NMOS tube Mn4It leads
Logical, the second comparison signal V- is arranged to kVOAnd pass through filter capacitor i.e. the second capacitor Cn1It is filtered.Therefore, comparator
Negative terminal input end signal generation module has zero quiescent dissipation.When enable signal EN is high level and circuit is in stable state
When, if ignoring the 5th NMOS tube Mn3With the 6th NMOS tube Mn4The voltage drop at both ends can then be obtained by Kirchhoff's law
Following equation:
VX=I (Rn3+Rn4) (7)
Wherein I is to flow through the 6th NMOS tube Mn4Electric current, IMn1And IMn2It is third NMOS tube M respectivelyn1With the 4th NMOS tube
Mn2Drain-source current, VGS1And VGS2It is third NMOS tube M respectivelyn1With the 4th NMOS tube Mn2Gate source voltage, VXFor the 5th NMOS
Pipe Mn3With the 6th NMOS tube Mn4Drain terminal current potential.The second comparison voltage V- can be acquired by formula (6), (7):
When meeting VGS1=VGS2When, the second comparison voltage V- and BUCK converter output voltage VOIt is directly proportional.But in fact,
If VGS1=VGS2Establishment and third NMOS tube Mn1With the 4th NMOS tube Mn2In saturation region or sub-threshold region, ignore drain-source
Voltage VDSInfluence, then IMn1=IMn2, i.e. I=0.It can be obtained by formula (6), VX=VO.It can be obtained by formula (7), (Rn3+Rn4) need to be nothing
Poor big, thus required resistor area is excessive.The I in actual designMn1≠IMn2In the case where, VGS1And VGS2It can only connect as far as possible
Closely.
As third NMOS tube Mn1With the 4th NMOS tube Mn2In sub-threshold region and meet drain-source voltage VDS>4VTWhen, it is sub-
Threshold current IMIt can ignore wherein comprising VDSItem, and third NMOS tube Mn1With the 4th NMOS tube Mn2Gate source voltage it is poor
(VGS1-VGS2) can be provided by following formula (9):
Wherein m is the sub-threshold slope factor, VTFor thermal voltage, about 26mV under room temperature.
It can be obtained by formula (9), (VGS1-VGS2) and logarithmic term ln (IMn1/IMn2) directly proportional.Therefore, in IMn1≠IMn2The case where
Under, even if IMn1With IMn2Value be very different, VGS1And VGS2Still it is relatively close to.Second comparison voltage V- may be considered that with
The output voltage V of BUCK converterOIt is directly proportional, as shown in following formula (10):
V-≈kVO (10)
Wherein k=Rn4/(Rn1+Rn3+Rn4).By this adaptive equalization strategy, additional pressure drop VGS1Fig. 3 can be passed through
In left side branch in the 4th NMOS tube Mn2Gate source voltage VGS2Compensation ensure that comparator negative terminal input end signal generates
The precision of module.
Those skilled in the art disclosed the technical disclosures can make various do not depart from originally according to the present invention
Various other specific variations and combinations of essence are invented, these variations and combinations are still within the scope of the present invention.
Claims (1)
1. a kind of turn-on time generation circuit with zero quiescent dissipation is suitable for BUCK converter, which is characterized in that described to lead
Logical time generation circuit include comparator anode input end signal generation module, comparator negative terminal input end signal generation module and
Comparator,
The comparator anode input end signal generation module is for generating first comparison voltage directly proportional to supply voltage, institute
State the input voltage that supply voltage is the BUCK converter；The comparator anode input end signal generation module includes reverse phase
Device, buffer, the first NMOS tube, the second NMOS tube, first resistor and first capacitor,
The input terminal of phase inverter connects the grid and enable signal of the first NMOS tube, and output end connects second after passing through buffer
The grid of NMOS tube；
The source electrode of drain electrode the first NMOS tube of connection of second NMOS tube and one end of first capacitor and to export first comparison electric
Pressure, source electrode connect the other end of first capacitor and ground connection；
One end of first resistor connects the supply voltage, and the other end connects the drain electrode of the first NMOS tube；
The comparator negative terminal input end signal generation module is directly proportional to the output voltage of the BUCK converter for generating
The second comparison voltage, the comparator negative terminal input end signal generation module include second resistance, 3rd resistor, the 4th electricity
Resistance, the 5th resistance, the 6th resistance, the second capacitor, third NMOS tube, the 4th NMOS tube, the 5th NMOS tube and the 6th NMOS tube,
Middle second resistance and the 6th resistance are equal, and third NMOS tube and the 4th NMOS tube have identity unit type and size
Negative threshold value depletion mode transistor；
The grid of third NMOS tube connects the output voltage of the BUCK converter, and drain electrode passes through described in connection after 3rd resistor
Supply voltage, source electrode pass through the drain electrode of the 5th NMOS tube and the 6th NMOS tube of connection after second resistance；
The grid of 5th NMOS tube connects the grid of the 6th NMOS tube and connects the enable signal, and source electrode connects the 4th NMOS
The drain electrode of pipe；
The grounded-grid of 4th NMOS tube, source electrode are grounded after passing through the 6th resistance；
4th resistance and the series connection of the 5th resistance are attempted by between the source electrode and ground of the 6th NMOS tube, series connection point output described second
Comparison voltage and by being grounded after the second capacitor；
Second comparison voltage that the comparator negative terminal input end signal generation module generates when enabled is kVO, and described
Two comparison voltages meet kVO<<VIN, VOFor the output voltage of the BUCK converter, VINFor the supply voltage, k be constant and
K=Rn4/(Rn1+Rn3+Rn4), Rn1、Rn3And Rn4Respectively second resistance, the resistance value of the 4th resistance and the 5th resistance；
Third NMOS tube and the 4th NMOS tube is in sub-threshold region and drain-source voltage is all larger than 4VT, VTFor thermal voltage；
The positive input of the comparator connects first comparison voltage, and it is electric that negative input connects second comparison
Pressure, output end generate the output signal of the turn-on time generation circuit for controlling upper power tube in the BUCK converter
Turn-on time.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910742208.3A CN110445377B (en) | 2019-08-13 | 2019-08-13 | Conduction time generating circuit with zero static power consumption |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910742208.3A CN110445377B (en) | 2019-08-13 | 2019-08-13 | Conduction time generating circuit with zero static power consumption |
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| CN110445377B CN110445377B (en) | 2021-01-22 |
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| CN201910742208.3A Active CN110445377B (en) | 2019-08-13 | 2019-08-13 | Conduction time generating circuit with zero static power consumption |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113037253A (en) * | 2021-02-25 | 2021-06-25 | 中国电子科技集团公司第五十八研究所 | Open drain output circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100052629A1 (en) * | 2007-04-04 | 2010-03-04 | Kwan-Jen Chu | Adaptive zero current sense apparatus and method for a switching regulator |
| CN104300788A (en) * | 2014-10-24 | 2015-01-21 | 电子科技大学 | Self-adaptation voltage regulator circuit |
| US20170163150A1 (en) * | 2015-12-07 | 2017-06-08 | M3 Technology Inc. | Synchronous buck dc-dc converter and method thereof |
| CN107707103A (en) * | 2017-10-30 | 2018-02-16 | 电子科技大学 | A kind of sectional slope compensation circuit suitable for BUCK converters |
| CN109921639A (en) * | 2019-03-18 | 2019-06-21 | 电子科技大学 | A kind of Buck converter based on the control of variable turn-on time |
-
2019
- 2019-08-13 CN CN201910742208.3A patent/CN110445377B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100052629A1 (en) * | 2007-04-04 | 2010-03-04 | Kwan-Jen Chu | Adaptive zero current sense apparatus and method for a switching regulator |
| CN104300788A (en) * | 2014-10-24 | 2015-01-21 | 电子科技大学 | Self-adaptation voltage regulator circuit |
| US20170163150A1 (en) * | 2015-12-07 | 2017-06-08 | M3 Technology Inc. | Synchronous buck dc-dc converter and method thereof |
| CN107707103A (en) * | 2017-10-30 | 2018-02-16 | 电子科技大学 | A kind of sectional slope compensation circuit suitable for BUCK converters |
| CN109921639A (en) * | 2019-03-18 | 2019-06-21 | 电子科技大学 | A kind of Buck converter based on the control of variable turn-on time |
Non-Patent Citations (1)
| Title |
|---|
| 邱实等: "一种用于Buck变换器的带隙基准电压源", 《中国集成电路》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113037253A (en) * | 2021-02-25 | 2021-06-25 | 中国电子科技集团公司第五十八研究所 | Open drain output circuit |
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| CN110445377B (en) | 2021-01-22 |
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