CN111433905B - 在同一个衬底上制造逻辑器件和功率器件 - Google Patents

在同一个衬底上制造逻辑器件和功率器件 Download PDF

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Publication number
CN111433905B
CN111433905B CN201880077926.7A CN201880077926A CN111433905B CN 111433905 B CN111433905 B CN 111433905B CN 201880077926 A CN201880077926 A CN 201880077926A CN 111433905 B CN111433905 B CN 111433905B
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vertical fin
layer
doped well
substrate
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CN111433905A (zh
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李俊涛
程慷果
姜丽颖
J·G·高迪埃罗
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International Business Machines Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/016Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/025Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/63Vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6728Vertical TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6735Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0195Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
CN201880077926.7A 2017-12-15 2018-12-03 在同一个衬底上制造逻辑器件和功率器件 Active CN111433905B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/843,786 US10685886B2 (en) 2017-12-15 2017-12-15 Fabrication of logic devices and power devices on the same substrate
US15/843,786 2017-12-15
PCT/IB2018/059558 WO2019116152A1 (en) 2017-12-15 2018-12-03 Fabrication of logic devices and power devices on the same substrate

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CN111433905A CN111433905A (zh) 2020-07-17
CN111433905B true CN111433905B (zh) 2023-12-22

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US (2) US10685886B2 (https=)
JP (1) JP7271054B2 (https=)
CN (1) CN111433905B (https=)
DE (1) DE112018005623T5 (https=)
GB (1) GB2582087B (https=)
WO (1) WO2019116152A1 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8895327B1 (en) * 2011-12-09 2014-11-25 Suvolta, Inc. Tipless transistors, short-tip transistors, and methods and circuits therefor
US10832975B2 (en) * 2018-06-12 2020-11-10 International Business Machines Corporation Reduced static random access memory (SRAM) device foot print through controlled bottom source/drain placement
US10916638B2 (en) * 2018-09-18 2021-02-09 International Business Machines Corporation Vertical fin field effect transistor devices with reduced top source/drain variability and lower resistance
US12009266B2 (en) * 2019-12-18 2024-06-11 Taiwan Semiconductor Manufacturing Co., Ltd. Structure for fringing capacitance control
DE102020202038A1 (de) * 2020-02-18 2021-08-19 Robert Bosch Gesellschaft mit beschränkter Haftung Vertikaler Fin-Feldeffekttransistor, vertikaler Fin-Feldeffekttransistor-Anordnung und Verfahren zum Bilden eines vertikalen Fin-Feldeffekttransistors
US11908907B2 (en) * 2020-12-11 2024-02-20 International Business Machines Corporation VFET contact formation
US11404581B2 (en) * 2020-12-21 2022-08-02 International Business Machines Corporation Wimpy vertical transport field effect transistor with dipole liners
JP7844983B2 (ja) * 2022-03-29 2026-04-14 セイコーエプソン株式会社 半導体装置およびパワーデバイス
US20240071811A1 (en) * 2022-08-25 2024-02-29 International Business Machines Corporation Stacked fet substrate contact
DE102024201914A1 (de) * 2024-03-01 2025-09-04 Robert Bosch Gesellschaft mit beschränkter Haftung Transistorchip und Verfahren zur Herstellung

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5241203A (en) * 1991-07-10 1993-08-31 International Business Machines Corporation Inverse T-gate FET transistor with lightly doped source and drain region
US5654218A (en) * 1995-05-12 1997-08-05 Lg Semicon Co., Ltd. Method of manufacturing inverse t-shaped transistor
US6218224B1 (en) * 1999-03-26 2001-04-17 Advanced Micro Devices, Inc. Nitride disposable spacer to reduce mask count in CMOS transistor formation
CN101452892A (zh) * 2007-12-06 2009-06-10 国际商业机器公司 鳍场效应晶体管器件结构的制造方法
CN103367141A (zh) * 2012-04-09 2013-10-23 中芯国际集成电路制造(上海)有限公司 Mos电容器的制作方法以及mos电容器
US9368572B1 (en) * 2015-11-21 2016-06-14 International Business Machines Corporation Vertical transistor with air-gap spacer
CN107316837A (zh) * 2017-07-12 2017-11-03 中国科学院微电子研究所 一种cmos器件及其制造方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5182619A (en) * 1991-09-03 1993-01-26 Motorola, Inc. Semiconductor device having an MOS transistor with overlapped and elevated source and drain
US5637898A (en) 1995-12-22 1997-06-10 North Carolina State University Vertical field effect transistors having improved breakdown voltage capability and low on-state resistance
US5960289A (en) * 1998-06-22 1999-09-28 Motorola, Inc. Method for making a dual-thickness gate oxide layer using a nitride/oxide composite region
US7638841B2 (en) 2003-05-20 2009-12-29 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US20050067630A1 (en) 2003-09-25 2005-03-31 Zhao Jian H. Vertical junction field effect power transistor
JP2009088134A (ja) * 2007-09-28 2009-04-23 Elpida Memory Inc 半導体装置、半導体装置の製造方法並びにデータ処理システム
CN101337141A (zh) * 2008-07-25 2009-01-07 易继新 多分割过滤器及制作过滤纸芯的方法
US8664718B2 (en) 2011-11-30 2014-03-04 Taiwan Semiconductor Manufacturing Company, Ltd. Power MOSFETs and methods for forming the same
CN103371410A (zh) * 2012-04-23 2013-10-30 南通天行健工程复合材料有限公司 一种蔓荆子降糖饮料及制作方法
US8823096B2 (en) 2012-06-01 2014-09-02 Taiwan Semiconductor Manufacturing Company, Ltd. Vertical power MOSFET and methods for forming the same
US8981481B2 (en) * 2012-06-28 2015-03-17 Intel Corporation High voltage three-dimensional devices having dielectric liners
US9362386B2 (en) * 2013-02-27 2016-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. FETs and methods for forming the same
US9331197B2 (en) 2013-08-08 2016-05-03 Cree, Inc. Vertical power transistor device
US9590096B2 (en) 2014-12-15 2017-03-07 Infineon Technologies Americas Corp. Vertical FET having reduced on-resistance
KR102424963B1 (ko) * 2015-07-30 2022-07-25 삼성전자주식회사 집적회로 소자 및 그 제조 방법
US9859392B2 (en) * 2015-09-21 2018-01-02 Samsung Electronics Co., Ltd. Integrated circuit device and method of manufacturing the same
US9620645B1 (en) * 2015-09-30 2017-04-11 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (FinFET) device structure with ultra-thin body and method for forming the same
US9825128B2 (en) 2015-10-20 2017-11-21 Maxpower Semiconductor, Inc. Vertical power transistor with thin bottom emitter layer and dopants implanted in trenches in shield area and termination rings
US9741716B1 (en) 2016-09-23 2017-08-22 International Business Machines Corporation Forming vertical and horizontal field effect transistors on the same substrate
JP2018073971A (ja) * 2016-10-28 2018-05-10 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5241203A (en) * 1991-07-10 1993-08-31 International Business Machines Corporation Inverse T-gate FET transistor with lightly doped source and drain region
US5654218A (en) * 1995-05-12 1997-08-05 Lg Semicon Co., Ltd. Method of manufacturing inverse t-shaped transistor
US6218224B1 (en) * 1999-03-26 2001-04-17 Advanced Micro Devices, Inc. Nitride disposable spacer to reduce mask count in CMOS transistor formation
CN101452892A (zh) * 2007-12-06 2009-06-10 国际商业机器公司 鳍场效应晶体管器件结构的制造方法
CN103367141A (zh) * 2012-04-09 2013-10-23 中芯国际集成电路制造(上海)有限公司 Mos电容器的制作方法以及mos电容器
US9368572B1 (en) * 2015-11-21 2016-06-14 International Business Machines Corporation Vertical transistor with air-gap spacer
CN107316837A (zh) * 2017-07-12 2017-11-03 中国科学院微电子研究所 一种cmos器件及其制造方法

Also Published As

Publication number Publication date
GB2582087B (en) 2022-03-30
JP2021507507A (ja) 2021-02-22
US20190189521A1 (en) 2019-06-20
US10685886B2 (en) 2020-06-16
CN111433905A (zh) 2020-07-17
GB202007421D0 (en) 2020-07-01
DE112018005623T5 (de) 2020-07-23
WO2019116152A1 (en) 2019-06-20
JP7271054B2 (ja) 2023-05-11
GB2582087A (en) 2020-09-09
US20200258790A1 (en) 2020-08-13
US11244869B2 (en) 2022-02-08

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