CN111426941B - Optimized chip temperature resistance testing device - Google Patents
Optimized chip temperature resistance testing device Download PDFInfo
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- CN111426941B CN111426941B CN202010354771.6A CN202010354771A CN111426941B CN 111426941 B CN111426941 B CN 111426941B CN 202010354771 A CN202010354771 A CN 202010354771A CN 111426941 B CN111426941 B CN 111426941B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
- G01R31/2875—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature related to heating
Abstract
The invention relates to the technical field of chip testing, and particularly discloses an optimized chip temperature resistance testing device, which comprises: the test fixture is provided with a positioning groove for fixing a chip to be tested; the thermoelectric refrigerating piece is positioned above the positioning groove and comprises a first semiconductor piece positioned on one side close to the positioning groove and a second semiconductor piece positioned on one side far away from the positioning groove; the bottom of the heat exchange box body is in contact with the second semiconductor wafer for heat transfer, and a containing cavity for flowing of working media is formed in the heat exchange box body; and the heat exchange system is communicated with the containing cavity and is used for cooling or heating the working medium flowing out of the containing cavity. The invention provides an optimized chip temperature resistance testing device which can solve the problem that a thermoelectric refrigerating sheet of a traditional testing device cannot provide constant testing temperature.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to an optimized chip temperature resistance testing device.
Background
Chips are indispensable components of many electronic devices, and bear a large amount of arithmetic work. In order to ensure higher stability during working, the chip needs to be subjected to temperature resistance test before leaving the factory. Taking the low temperature test as an example, the current low temperature test method is as follows:
placing a chip to be tested on a thermoelectric cooling chip;
after the thermoelectric refrigerating piece is electrified, the temperature of a first semiconductor piece attached to the chip to be tested is reduced, and the temperature of a second semiconductor piece is increased;
when the temperature of the first semiconductor sheet is reduced to the testing temperature, keeping the temperature of the first semiconductor sheet unchanged;
and testing the chip to be tested, and verifying the performance stability of the chip to be tested in a low-temperature environment.
The above process has the following problems: the temperature of the first semiconductor wafer is decreased to inevitably cause the temperature of the second semiconductor wafer to rise, and after the temperature of the second semiconductor wafer is increased, the heat of the second semiconductor wafer cannot be dissipated quickly, and the temperature of the first semiconductor wafer is affected, so that the stability of the temperature of the first semiconductor wafer is poor, and even when the test temperature is low, the situation that the first semiconductor wafer cannot reach the test temperature may occur. This greatly affects the accuracy of the temperature resistance test results.
Therefore, there is a need for an improved testing device to solve the problem that the thermoelectric cooling plate can not provide a constant testing temperature.
Disclosure of Invention
The invention aims to provide an optimized chip temperature resistance testing device, which can solve the problem that a thermoelectric cooling plate of a traditional testing device cannot provide constant testing temperature.
In order to achieve the above object, the present invention provides an optimized chip temperature resistance testing device, comprising:
the testing jig is provided with a positioning groove for fixing a chip to be tested;
the thermoelectric refrigerating piece is positioned above the positioning groove and comprises a first semiconductor piece positioned on one side close to the positioning groove and a second semiconductor piece positioned on one side far away from the positioning groove;
the bottom of the heat exchange box body is in contact with the second semiconductor wafers for heat transfer, and a containing cavity for flowing of working media is formed in the heat exchange box body;
and the heat exchange system is communicated with the containing cavity and is used for cooling or heating the working medium flowing out of the containing cavity.
Preferably, the heat exchange system comprises:
and the inlet of the finned heat exchanger is communicated with the outlet of the heat exchange box body, and the outlet of the finned heat exchanger is communicated with the inlet of the heat exchange box body.
Preferably, a plurality of first fans are fixedly arranged on the fin type heat exchanger.
Preferably, a circulating pump is arranged between the outlet of the heat exchange box body and the fin type heat exchanger.
Preferably, a buffer bottle is arranged between the circulating pump and the heat exchange box body.
Preferably, the heat exchange box body comprises:
the top of the lower box body is provided with a liquid storage tank which is sunken downwards, and the bottom of the lower box body is attached to the upper surface of the second semiconductor wafer;
the sealing cover plate is fixed at the top of the lower box body and used for sealing the liquid storage tank;
the liquid inlet pipe is communicated with the liquid storage tank;
and the liquid outlet pipe is communicated with the liquid storage tank.
Preferably, the method further comprises the following steps:
the bottom box is provided with a containing groove with an opening at the upper end, and the heat exchange system is positioned in the containing groove;
the working table plate is fixed at the top of the bottom box and used for sealing the accommodating groove.
Preferably, a plurality of second fans are arranged on the side surface of the bottom box.
Preferably, the thermoelectric refrigerating sheet and the heat exchange box body are fixedly arranged relative to the working table plate; the optimized chip temperature-resistant testing device is also provided with a transverse moving assembly, and the transverse moving assembly comprises:
the bottom plate is fixed on the workbench plate;
the transverse guide rail is fixedly arranged on the bottom plate;
the test fixture is fixedly arranged relative to the transverse sliding plate;
and the shell of the transverse moving cylinder is fixed on the bottom plate, and the driving end of the transverse moving cylinder is used for driving the transverse sliding plate to slide along the transverse guide rail in a reciprocating manner.
Preferably, the method further comprises the following steps:
the shielding cover is of a structure with an opening at the lower end and is positioned above the workbench plate;
and the shell of the cover cylinder is fixed on the bottom box, and the driving end of the cover cylinder is used for driving the shielding cover to move up and down relative to the working table plate.
The invention has the beneficial effects that: the utility model provides an optimization type chip temperature resistant testing arrangement adds working medium earlier to heat transfer system, when carrying out the temperature resistant test, the heat transfer with the second semiconductor piece is realized through the heat transfer box when working medium flows in the heat transfer box for the temperature of second semiconductor piece keeps invariable, and then makes the temperature of first semiconductor piece keep invariable, provides invariable test temperature for the chip that awaits measuring in the holding chamber in order to do benefit to first semiconductor piece. Furthermore, the temperature of the working medium leaving the cavity can change, the heat exchange system cools or heats the working medium leaving the cavity to restore the initial temperature of the working medium, and the working medium with the restored initial temperature enters the cavity again to exchange heat, so that the circulation is completed.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
FIG. 1 is a schematic front view of an optimized chip temperature-resistant testing device according to an embodiment;
FIG. 2 is a schematic diagram of a back side structure of the optimized chip temperature-resistant testing apparatus provided in the embodiment;
FIG. 3 is a schematic structural diagram of a thermoelectric cooling plate provided in the embodiment;
FIG. 4 is a schematic structural view of a traversing assembly and a lifting assembly according to an embodiment;
FIG. 5 is a schematic structural diagram of a lower case provided in the embodiment;
FIG. 6 is a schematic structural diagram of a stepped slot provided in an embodiment;
FIG. 7 is a schematic structural diagram of a test fixture according to an embodiment;
fig. 8 is a bottom schematic view of a fixing frame provided in the embodiment;
fig. 9 is a schematic diagram illustrating positions of a thermoelectric cooling plate and a chip to be tested according to an embodiment;
FIG. 10 is a schematic structural diagram of a heat exchange system provided in an embodiment;
FIG. 11 is a schematic structural diagram of a lifting assembly according to an embodiment;
fig. 12 is a schematic side view of a pressure sensor according to an embodiment.
In the figure:
1. testing the jig; 101. positioning a groove;
2. a thermoelectric refrigeration chip; 201. a first semiconductor chip; 202. a second semiconductor wafer;
3. a heat exchange box body; 301. a lower box body; 3011. a liquid storage tank; 302. sealing the cover plate; 303. a liquid inlet pipe; 304. a liquid outlet pipe;
401. a finned heat exchanger; 402. a first fan; 403. a circulation pump; 404. a buffer bottle; 405. a second fan;
501. a bottom box; 502. a work table; 503. a shield case; 504. a cover cylinder;
601. a base plate; 602. a transverse guide rail; 603. a transverse slide plate; 604. a transverse moving cylinder;
701. a fixing plate; 702. a vertical slide plate; 703. a screw rod; 704. a lifting motor;
801. a lifting plate; 802. a limiting plate; 803. a column; 804. a base plate; 805. a guide post; 806. a buffer spring; 807. a pressure sensor;
9. a display screen;
10. a fixing frame;
11. and (5) testing the chip to be tested.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the embodiments described below are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present.
Furthermore, the terms "long", "short", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of describing the present invention, but do not indicate or imply that the referred devices or elements must have the specific orientations, be configured to operate in the specific orientations, and thus are not to be construed as limitations of the present invention.
The technical scheme of the invention is further explained by the specific implementation mode in combination with the attached drawings.
The embodiment provides an optimized chip temperature resistant testing device, which can solve the problem that a thermoelectric refrigerating sheet 2 of a traditional testing device cannot provide constant testing temperature.
Referring to fig. 1 to 10, the optimized chip temperature resistance testing device includes a testing fixture 1, a thermoelectric cooling plate 2, a heat exchange box 3 and a heat exchange system.
The testing jig 1 is provided with a positioning groove 101 for fixing the chip 11 to be tested. The thermoelectric cooling plate 2 is located above the positioning groove 101 and includes a first semiconductor plate 201 located on a side close to the positioning groove 101 and a second semiconductor plate 202 located on a side far from the positioning groove 101. The bottom of the heat exchange box body 3 is in contact with the second semiconductor wafer 202 for heat transfer, and a cavity for flowing of working medium is arranged in the heat exchange box body. The heat exchange system is communicated with the cavity and used for cooling or heating the working medium flowing out of the cavity.
Optionally, the working medium may be water, cooling oil or other refrigerants.
The optimized chip temperature-resistant testing device that this embodiment provided adds working medium earlier to heat transfer system, when carrying out the temperature-resistant test, the working medium realizes through heat transfer box 3 when flowing in heat transfer box 3 with second semiconductor wafer 202 for second semiconductor wafer 202's temperature keeps invariable, and then makes the temperature of first semiconductor wafer 201 keep invariable, provides invariable test temperature for the chip 11 that awaits measuring in the holding chamber in order to do benefit to first semiconductor wafer 201. Furthermore, the temperature of the working medium leaving the cavity can change, the heat exchange system cools or heats the working medium leaving the cavity to restore the initial temperature of the working medium, and the working medium with the restored initial temperature enters the cavity again to exchange heat, so that the circulation is completed.
Specifically, if a low-temperature-resistant test is required, the temperature of the first semiconductor wafer 201 is reduced, the temperature of the second semiconductor wafer 202 is increased, the heat on the second semiconductor wafer 202 is transferred to the heat exchange box body 3, and the heat is transferred to the working medium in the cavity by the heat exchange box body 3, so that the working medium can increase the temperature of the working medium to take away the redundant heat of the second semiconductor wafer 202, so that the temperature of the second semiconductor wafer 202 can be kept constant and not too high, correspondingly, the temperature of the first semiconductor wafer 201 can be kept constant because the temperature of the second semiconductor wafer 202 can be kept constant, and thus, a constant low-temperature test temperature is provided for the chip 11 to be tested. Furthermore, the temperature of the working medium leaving the accommodating cavity rises, the heat exchange system cools the working medium, and the working medium with the recovered initial temperature can enter the accommodating cavity again for heat exchange, so that the continuous proceeding of heat exchange circulation is ensured.
If a high-temperature-resistant test is required, the temperature of the first semiconductor wafer 201 rises, the temperature of the second semiconductor wafer 202 falls, the cold energy on the second semiconductor wafer 202 is transmitted to the heat exchange box body 3, and the heat exchange box body 3 transmits the cold energy to the working medium in the box, so that the working medium can lower the temperature of the working medium to take away the redundant cold energy of the second semiconductor wafer 202, the temperature of the second semiconductor wafer 202 can be kept constant and cannot be too low, correspondingly, the temperature of the first semiconductor wafer 201 can be kept constant as the temperature of the second semiconductor wafer 202 can be kept constant, and therefore, the constant high-temperature test temperature is provided for the chip 11 to be tested. Furthermore, the temperature of the working medium leaving the accommodating cavity is reduced, the heat exchange system heats the working medium, and the working medium with the recovered initial temperature can enter the accommodating cavity again for heat exchange, so that the continuous heat exchange circulation is ensured.
In this embodiment, the heat exchange system includes a finned heat exchanger 401. The inlet of the finned heat exchanger 401 is communicated with the outlet of the heat exchange box body 3, and the outlet of the finned heat exchanger 401 is communicated with the inlet of the heat exchange box body 3.
Specifically, the finned heat exchanger 401 may cool or heat the working medium in the heat exchange box 3 to facilitate the cyclic heat exchange of the working medium. For example, if a low-temperature-resistant test is performed (the test temperature is lower than the room temperature), the temperature of the working medium is raised after flowing through the heat exchange box 3, the working medium with the raised temperature enters the fin-type heat exchanger 401, the temperature of the working medium leaving the fin-type heat exchanger 401 is lowered (approaching to the room temperature), and then the working medium enters the heat exchange box 3 again to exchange heat with the second semiconductor fin 202 again. Similarly, if a high-temperature resistance test is performed (the test temperature is higher than the room temperature), the temperature of the working medium decreases after flowing through the heat exchange box 3, the working medium with the decreased temperature enters the fin type heat exchanger 401, the temperature of the working medium leaving the fin type heat exchanger 401 increases (approaches to the room temperature), and then the working medium enters the heat exchange box 3 again to exchange heat with the second semiconductor fin 202 again.
Further, a plurality of first fans 402 are fixedly arranged on the finned heat exchanger 401. Specifically, the first fan 402 can accelerate the surface flow velocity of air in the fin heat exchanger 401, thereby increasing the cooling or heating speed of the working medium.
Optionally, a circulation pump 403 is arranged between the outlet of the heat exchange box 3 and the finned heat exchanger 401. It will be appreciated that the circulation pump 403 provides the motive force for the flow of the working fluid.
Preferably, a buffer bottle 404 is arranged between the circulating pump 403 and the heat exchange box 3.
It can be understood that the buffer bottle 404 can prevent the circulating pump 403 from directly pumping the working medium in the containing cavity, and prevent the circulating pump 403 from causing turbulence in the containing cavity, thereby ensuring a stable heat exchange effect.
In this embodiment, the heat exchange box 3 includes a lower box 301, a cover plate 302, a liquid inlet pipe 303, and a liquid outlet pipe 304. A liquid storage tank 3011 recessed downward is disposed on the top of the lower box 301, and the bottom of the lower box is attached to the upper surface of the second semiconductor wafer 202. The cover plate 302 is fixed on the top of the lower box body 301, and is used for covering the liquid storage tank 3011, and the liquid storage tank 3011 is covered by the cover plate 302 to form the containing cavity. The liquid inlet pipe 303 and the liquid outlet pipe 304 are both communicated with the liquid storage tank 3011.
Optionally, the optimized chip temperature-resistant testing device further includes a bottom box 501 and a working platen 502. The bottom case 501 is provided with a containing groove with an opening at the upper end, and the heat exchange system is located in the containing groove. The work table plate 502 is fixed on the top of the bottom box 501 and is used for covering the containing groove.
Particularly, the structure design has the advantages of compact structure, attractive appearance, neatness, small overall volume and convenience in carrying and transportation.
Further, a plurality of second fans 405 are disposed on the side of the bottom case 501.
It can be understood that the second fan 405 can rapidly blow out the air in the accommodating chamber, so as to ensure that the temperature of the air in the accommodating chamber is close to the temperature of the air in the external environment.
In this embodiment, the thermoelectric refrigerating fins 2 and the heat exchange box 3 are fixedly arranged relative to the working platen 502; the optimized chip temperature resistance testing device is also provided with a transverse moving assembly.
The traverse assembly includes a base plate 601, a cross rail 602, a cross slide plate 603, and a traverse cylinder 604. The base plate 601 is fixed to the work table plate 502. The transverse guide 602 is fixedly disposed on the bottom plate 601. The test fixture 1 is fixed relative to the cross slide 603. The housing of the traverse cylinder 604 is fixed on the bottom plate 601, and the driving end is used for driving the transverse sliding plate 603 to slide back and forth along the transverse guide rail 602.
It can be understood that, at the beginning, the driving end of the traverse cylinder 604 retracts, and the test fixture 1 slides from right below the thermoelectric cooling plate 2 to the left side of the thermoelectric cooling plate 2, so that the tester can place the chip 11 to be tested into the positioning groove 101; after the chip 11 to be tested is placed in the test fixture, the driving end of the transverse moving cylinder 604 extends out, and the test fixture 1 slides rightwards to the position right below the thermoelectric refrigerating piece 2, so that the chip 11 to be tested can be attached to the thermoelectric refrigerating piece 2.
The optimized chip temperature resistance testing device further comprises a shielding cover 503 and a cover cylinder 504. The shield 503 is an open-ended structure located above the work table 502. The housing of the cover cylinder 504 is fixed on the bottom case 501, and the driving end is used for driving the shielding cover 503 to move up and down relative to the working table plate 502.
Specifically, before the test, the driving end of the cover cylinder 504 is retracted, the shield cover 503 is lowered to be attached to the workbench plate 502, the test environment is shielded, after the test is completed, the driving end of the cover cylinder 504 is extended, the shield cover 503 is raised, the traverse cylinder 604 is extended, and the tester takes out the chip 11 to be tested in the positioning groove 101.
Preferably, a fixing frame 10 for fixing the thermoelectric cooling fins 2 may be further provided at the bottom of the heat exchange case 3.
The above content of this embodiment has emphatically introduced optimization type chip temperature resistant testing arrangement's heat transfer system, and the following content of this embodiment will emphatically introduce optimization type chip temperature resistant testing arrangement's lifting unit and pressure sensor 807, and it can solve traditional testing arrangement's thermoelectric refrigeration piece 2 and the great problem of test result deviation that leads to of the inseparable laminating of chip 11 that awaits measuring.
Referring to fig. 1 to 12, the optimized chip temperature resistance testing device includes a lifting assembly and a pressure sensor 807, in addition to the testing jig 1, the transverse moving assembly and the thermoelectric cooling plate 2. The lifting assembly is connected with the thermoelectric refrigerating sheet 2 and used for driving the thermoelectric refrigerating sheet 2 to reciprocate up and down. The pressure sensor 807 is located above the thermoelectric refrigeration chip 2 and is used for sensing a reaction force applied by the chip 11 to be tested to the thermoelectric refrigeration chip 2 when the thermoelectric refrigeration chip 2 is tightly pressed against the chip 11 to be tested.
It can be understood that the pressure value measured by the pressure sensor 807 is equal to the value of the downward pressure applied by the thermoelectric cooling plate 2 to the chip 11 to be tested.
The optimized chip temperature resistance testing device provided by the embodiment, lifting unit makes thermoelectric refrigeration piece 2 rise, sideslip subassembly transversely pulls out test fixture 1 from thermoelectric refrigeration piece 2 under, tester puts into chip 11 that awaits measuring in to constant head tank 101 after, sideslip subassembly transversely pushes test fixture 1 back to thermoelectric refrigeration piece 2 under, then lifting unit makes thermoelectric refrigeration piece 2 descend, after thermoelectric refrigeration piece 2 and the chip 11 that awaits measuring in the constant head tank 101 contact, pressure sensor 807 will produce the reading, it has been closely connected with chip 11 that awaits measuring to explain thermoelectric refrigeration piece 2 when the registration of pressure sensor 807 reaches the default, can carry out subsequent processes such as the test of being that thermoelectric refrigeration piece 2 switches on and the chip 11 that awaits measuring.
In this embodiment, the optimized chip temperature resistance testing apparatus further includes a lifting plate 801, a limiting plate 802, a column 803, a pad 804, a guide pillar 805, and a buffer spring 806. The lifting plate 801 is driven by the lifting assembly to reciprocate up and down, a step groove which is communicated up and down is formed above the positioning groove 101, and the heat exchange box body 3 is located in the step groove. The limiting plate 802 is located above the stepped groove, and the pressure sensor 807 is fixed at the bottom of the limiting plate 802. The lower end of the upright 803 is fixedly connected with the stepped groove, and the upper end of the upright 803 is fixedly connected with the limiting plate 802; the heat exchange box body 3 is positioned in the stepped groove and can slide up and down along the upright 803. The bottom of the base plate 804 is attached to the top of the heat exchange box 3. The lower end of the guide post 805 is fixedly connected with the backing plate 804, and the upper end is connected with the limiting plate 802 in a vertical sliding manner. The buffer spring 806 is located between the limiting plate 802 and the backing plate 804, and is configured to drive the backing plate 804 to slide downward relative to the limiting plate 802.
Wherein, the lifting assembly comprises a fixing plate 701, a vertical sliding plate 702, a screw rod 703 and a lifting motor 704. The fixed plate 701 is fixedly provided with a vertical guide rail. The vertical sliding plate 702 is fixedly connected with the lifting plate 801, and one side of the vertical sliding plate, which is close to the fixed plate 701, is connected with the fixed plate 701 in a vertical sliding mode along the vertical guide rail. The screw rod 703 is vertically arranged, the lower end of the screw rod is rotatably connected with the fixing plate 701, and the middle part of the screw rod is in threaded connection with the vertical sliding plate 702. The lifting motor 704 is used for driving the screw rod 703 to rotate around the axis of the screw rod.
It can be understood that when the lifting motor 704 drives the screw rod 703 to rotate forward, the vertical sliding plate 702 slides upward, and further drives the heat exchange box 3 and the thermoelectric cooling fins 2 to move upward; when the lifting motor 704 drives the screw rod 703 to rotate reversely, the vertical sliding plate 702 slides downwards, and then the heat exchange box 3, the thermoelectric refrigerating sheet 2 and the like are driven to move downwards. After thermoelectric refrigeration piece 2 contacts with chip 11 to be measured, thermoelectric refrigeration piece 2 and water tank etc. stop to continue to slide down, lifter plate 801, limiting plate 802 and pressure sensor 807 etc. continue to descend a bit distance under the drive of vertical slide 702, then the distance between backing plate 804 and pressure sensor 807 reduces, backing plate 804 and pressure sensor 807 laminating back, pressure sensor 807 produces certain pressure registration, when the registration reaches the default, show that thermoelectric refrigeration piece 2 has closely laminated with chip 11 to be measured, elevator motor 704 stops rotating. In the process, the flatness of the lifting plate 801 is poor, and the backing plate 804 mainly provides a flat contact plane for the pressure sensor 807, so that the situation that the local stress of the pressure sensor 807 is uneven is avoided. The buffer spring 806 can play a buffering role, so that the pad 804 is prevented from directly colliding with the pressure sensor 807, the pressure sensor 807 is protected, and the service life of the pressure sensor 807 is prolonged.
In this embodiment, the optimized chip temperature-resistant testing device further includes a display screen 9, where the display screen 9 is electrically connected to the pressure sensor 807 and is used for displaying the pressure value sensed by the pressure sensor 807.
Specifically, the tester can carry out the straight tube through display screen 9 to pressure information and acquire, is favorable to improving the convenience of tester when testing.
Optionally, the display screen 9 is fixed to a side surface of the bottom case 501, so that a tester can conveniently check the pressure readings.
It should be noted that the working process of the optimized chip temperature resistance testing device provided by the embodiment of the invention is as follows:
firstly, the lifting motor 704 drives the lifting plate 801 to move upwards, and the thermoelectric refrigerating sheet 2 is separated from the positioning groove 101;
the transverse moving cylinder 604 drives the transverse sliding plate 603 to slide in the forward direction, and the test fixture 1 is pulled out;
thirdly, a tester puts the chip 11 to be tested into the positioning groove 101;
fourthly, the transverse moving cylinder 604 drives the transverse sliding plate 603 to slide reversely, and the test fixture 1 is pushed back to the position right below the thermoelectric refrigerating piece 2;
the lifting motor 704 drives the lifting plate 801 to move downwards, and the thermoelectric refrigerating sheet 2 compresses the chip 11 to be tested;
when the number of the pressure sensor 807 reaches a set value, the lifting motor 704 stops moving;
the thermoelectric cooling plate 2 is electrified, and the temperatures of the first semiconductor plate 201 and the second semiconductor plate 202 are changed;
turning on the first fan 402, the second fan 405 and the circulating pump 403 to keep the temperature of the first semiconductor wafer 201 and the second semiconductor wafer 202 constant;
ninthly, performing temperature resistance test on the chip 11 to be tested;
after the test on the red, blue (R) is finished, the lifting motor 704 drives the lifting plate 801 to move upwards, and the thermoelectric refrigerating piece 2 is separated from the chip 11 to be tested; the transverse moving cylinder 604 drives the transverse sliding plate 603 to slide in the forward direction, and the test fixture 1 is pulled out; the tester takes out the chip 11 to be tested from the positioning groove 101, and the test is completed.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (7)
1. An optimized chip temperature resistant testing device is characterized by comprising:
the testing jig is provided with a positioning groove for fixing a chip to be tested;
the thermoelectric refrigerating piece is positioned above the positioning groove and comprises a first semiconductor piece positioned on one side close to the positioning groove and a second semiconductor piece positioned on one side far away from the positioning groove;
the bottom of the heat exchange box body is in contact with the second semiconductor wafer for heat transfer, and a containing cavity for flowing of working media is formed in the heat exchange box body;
the heat exchange system is communicated with the cavity and is used for cooling or heating the working medium flowing out of the cavity; the heat exchange system comprises a finned heat exchanger, an inlet of the finned heat exchanger is communicated with an outlet of the heat exchange box body, and an outlet of the finned heat exchanger is communicated with an inlet of the heat exchange box body; a circulating pump is arranged between the outlet of the heat exchange box body and the fin type heat exchanger; a buffer bottle is arranged between the circulating pump and the heat exchange box body;
wherein the content of the first and second substances,
the buffer bottle is used for avoiding the direct working medium of taking out the appearance intracavity of circulating pump, prevents that the circulating pump from causing the turbulent flow of appearance intracavity, and then guarantees stable heat transfer effect.
2. The optimized chip temperature resistance testing device according to claim 1, wherein a plurality of first fans are fixedly arranged on the finned heat exchanger.
3. The optimized chip temperature resistance testing device of claim 1, wherein the heat exchange box comprises:
the top of the lower box body is provided with a liquid storage tank which is sunken downwards, and the bottom of the lower box body is attached to the upper surface of the second semiconductor wafer;
the sealing cover plate is fixed at the top of the lower box body and used for sealing the liquid storage tank;
the liquid inlet pipe is communicated with the liquid storage tank;
and the liquid outlet pipe is communicated with the liquid storage tank.
4. The optimized chip temperature resistance testing device according to claim 1, further comprising:
the bottom box is provided with a containing groove with an opening at the upper end, and the heat exchange system is positioned in the containing groove;
the working table plate is fixed at the top of the bottom box and used for sealing the accommodating groove.
5. The optimized chip temperature resistance testing device according to claim 4, wherein a plurality of second fans are arranged on the side surface of the bottom case.
6. The optimized chip temperature resistance testing device according to claim 4, wherein the thermoelectric cooling fins and the heat exchange box body are fixedly arranged relative to the working table plate; the optimized chip temperature-resistant testing device is also provided with a transverse moving assembly, and the transverse moving assembly comprises:
the bottom plate is fixed on the workbench plate;
the transverse guide rail is fixedly arranged on the bottom plate;
the test fixture is fixedly arranged relative to the transverse sliding plate;
and the shell of the transverse moving cylinder is fixed on the bottom plate, and the driving end of the transverse moving cylinder is used for driving the transverse sliding plate to slide along the transverse guide rail in a reciprocating manner.
7. The optimized chip temperature resistance testing device according to claim 4, further comprising:
the shielding cover is of a structure with an opening at the lower end and is positioned above the workbench plate;
and the shell of the cover cylinder is fixed on the bottom box, and the driving end of the cover cylinder is used for driving the shielding case to move up and down relative to the working table plate.
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| CN112345582A (en) * | 2020-11-05 | 2021-02-09 | 福州大学至诚学院 | Semiconductor refrigerating sheet performance parameter testing method |
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| CN111426941A (en) | 2020-07-17 |
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