CN111384031B - 封装元件及其制备方法 - Google Patents

封装元件及其制备方法 Download PDF

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CN111384031B
CN111384031B CN201910936284.8A CN201910936284A CN111384031B CN 111384031 B CN111384031 B CN 111384031B CN 201910936284 A CN201910936284 A CN 201910936284A CN 111384031 B CN111384031 B CN 111384031B
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ground contacts
front surface
package
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conductive
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CN111384031A (zh
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裴汉宁
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Nanya Technology Corp
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Abstract

本公开提供一种封装元件及其制备方法。该封装元件包括一支撑组件、一主元件、一密封件以及一导电封装件。该支撑组件具有复数个接地接点。该主元件安装在该支撑组件上。该密封件覆盖该主元件。该导电封装件包围该密封件以及穿经该密封件而暴露的该等接地接点,以屏蔽电磁干扰。

Description

封装元件及其制备方法
本公开主张2018/12/27申请的美国临时申请案第62/785,412号及2019/03/21申请的美国正式申请案第16/360,662号的优先权及益处,该美国临时申请案及该美国正式申请案的内容以全文引用的方式并入本文中。
技术领域
本公开涉及一种封装元件及其制备方法。特别涉及一种具有电磁干扰屏蔽的封装元件及其制备方法。
背景技术
通过提升工艺速度及较小尺寸需求的驱动,半导体装置已逐渐变得复杂。在提升工艺速度及较小尺寸的优势是明确的同时,半导体装置的特性亦产生问题。特别是,较高的时序速度(clock speed)会使信号电平(signal level)转换的频率增加,以致于频率较高或波长较短的电磁辐射(electromagnetic radiation)强度增加。电磁辐射可从一源半导体元件(source semiconductor device)发射而出并传播至邻近的半导体元件上。若是对邻近的半导体元件的电磁辐射强度够高的话,则电磁辐射会对(邻近的)半导体元件的操作有不利的影响。此现象有时被称为电磁干扰(electromagnetic interference,EMI)。尺寸较小的半导体元件会使电磁干扰的问题更加严重,因为这些(尺寸较小的)半导体元件会以较高的密度配置于一电子系统中,以致于邻近的半导体元件接收到较强且非预期的电磁辐射。
上文的“现有技术”说明仅是提供背景技术,并未承认上文的“现有技术”说明公开本公开的标的,不构成本公开的现有技术,且上文的“现有技术”的任何说明均不应作为本公开的任一部分。
发明内容
本公开的一实施例提供一种封装元件。该封装元件包括一支撑组件(supportingmember)、一主元件(main component)、一密封件(sealant)以及一导电封装件(conductiveencapsulant)。该支撑组件具有复数个接地接点。该主元件安装在该支撑组件上。该密封件覆盖该主元件。该导电封装件包围该密封件以及穿经该密封件而暴露的该等接地接点。
依据本公开的一些实施例,该支撑组件包括:一基底,其中该等接地接点设置在该基底的一前表面上与设置在该基底的一后表面(back surface)上,该后表面相对该前表面设置;复数个接地通孔(grounding vias),穿透该基底,并将在该前表面上的该等接地接点电性连接到在该后表面上的该等接地接点;以及复数个焊料凸块(solder bumps),连接到在该后表面上的该等接地接点。
依据本公开的一些实施例,还包括至少一线路(wire),从该主元件结合到在该支撑元件上的复数个电路图案,其中该等电路图案设置在该前表面与该后表面上,且在该前表面上的该等电路图案使用复数个直通穿孔电性连接在该后表面上的该等电路图案,而该等直通穿孔延伸穿经该前表面与该后表面。
依据本公开的一些实施例,当提供一接地电压(grounding voltage)给该等焊料凸块时,用于将非预期电磁辐射接地的一电性通道(electrical pathway)引入到该等焊道凸块、该等接地接点、该等接地通孔以及该导电封装件中。
依据本公开的一些实施例,该导电封装件具有一侧表面(lateral surface),与该基底的一侧壁共面(coplanar)。
依据本公开的一些实施例,该等电封装胶体包括:一树脂结合剂(resin binder);以及复数个导电粒子,分布在该树脂结合剂中。
依据本公开的一些实施例,该树脂结合剂具有一熔点,低于该密封件的一熔点。
依据本公开的一些实施例,该封装元件还包括复数个调色粒子(tonerparticles),分布在该密封件中。
依据本公开的一些实施例,该导电封装件具有一大致平坦上表面。
本公开的另一实施例提供一种封装元件的制备方法。该制备方法包括下列步骤:提供一主元件(main device),包括一支撑组件以及一主元件,其中该主元件配置在该支撑组件上并电性连接该支撑组件,且该支撑组件包括包围该主元件的复数个接地接点;执行一模封工艺(molding process),以形成一密封件,进而覆盖该主元件;以及执行一封装工艺(encapsulation process),以形成一导电封装件,进而包围该密封件与该等接地接点。
依据本公开的一些实施例,该制备方法还包括将复数个焊料凸块安装在该等接地接点上,而该等接地接点位在该支撑组件的一基底的一后表面上,其中该基底具有相对该后表面设置的一前表面,该等接地接点设置在该前表面与该后表面上,且该支撑组件还包括复数个接地通孔,穿透该基底,并将在该前表面上的该等接地接点电性连接到在该后表面上的该等接地接点。
依据本公开的一些实施例,该封装胶体工艺包括:将覆盖有该密封件的该主元件放置在一第一模封腔室(first molding cavity)中;将该导电封装件放置在一第二模封腔室(second molding cavity)中;提供一压力以迫使覆盖有该密封件的该主元件接触到该导电封装件;以及固化(curing)该导电封装件。
依据本公开的一些实施例,该制备方法还包括在该压力提供之前,熔化该导电封装件。
依据本公开的一些实施例,该制备方法还包括在一树脂结合剂中布设复数个导电粒子,以形成该导电封装件。
依据本公开的一些实施例,该制备方法还包括在该主元件与该支撑组件之间沉积一粘着剂,以将该主元件固定在该支撑组件。
依据本公开的一些实施例,该制备方法还包括在该密封件中提供复数个调色粒子。
由于上述的封装元件的架构,覆盖该主元件的该导电封装件包含复数个导电粒子,借此当提供一接地电压给该封装胶体时,产生用于非预期电磁辐射接地的一电性通道,以致于提供一电磁辐射屏蔽功能。
上文已相当广泛地概述本公开的技术特征及优点,从而使下文的本公开详细描述得以获得较佳了解。构成本公开的权利要求标的的其它技术特征及优点将描述于下文。本公开所属技术领域中技术人员应了解,可相当容易地利用下文公开的概念与特定实施例可作为修改或设计其它结构或工艺而实现与本公开相同的目的。本公开所属技术领域中技术人员亦应了解,这类等效建构无法脱离权利要求所界定的本公开的构思和范围。
附图说明
参阅实施方式与权利要求合并考量附图时,可得以更全面了解本公开的公开内容,附图中相同的元件符号指相同的元件。
图1为依据本公开一些实施例的一种封装元件的剖视示意图。
图2为依据本公开一些实施例的一种封装元件的剖视示意图。
图3为依据本公开一些实施例的一种封装元件的剖视示意图。
图4为依据本公开一些实施例的一种封装元件的制备方法的流程示意图。
图5至图11为依据本公开一些实施例该封装元件于制备的各中间阶段的剖视示意图。
附图标记说明:
10封装元件
10A封装元件
10B封装元件
110支撑组件
111周围
112基底
1120侧壁
1122前表面
1124后表面
1128开口
114电路图案
116直通穿孔
120主元件
122功能表面
124结合垫
126下表面
130密封件
132顶表面
134调色粒子
136填充材料
140导电封装件
1402侧向表面
142平坦上表面
144树脂结合剂
146导电粒子
148顶壁
149周壁
150焊料凸块
160线路
162电性接口
170粘着剂
180接地接点
182接地通孔
184穿孔
186导体
190底充填材料
200主元件
210第一模封腔室
212第二模封腔室
30制备方法
302步骤
304步骤
306步骤
308步骤
310步骤
312步骤
314步骤
T1厚度
T2厚度
具体实施方式
本公开的以下说明伴随并入且组成说明书的一部分的附图,说明本公开的实施例,然而本公开并不受限于该实施例。此外,以下的实施例可适当整合以下实施例以完成另一实施例。
“一实施例”、“实施例”、“例示实施例”、“其他实施例”、“另一实施例”等是指本公开所描述的实施例可包含特定特征、结构或是特性,然而并非每一实施例必须包含该特定特征、结构或是特性。再者,重复使用“在实施例中”一语并非必须指相同实施例,然而可为相同实施例。
为了使得本公开可被完全理解,以下说明提供详细的步骤与结构。显然,本公开的实施不会限制该技艺中的技术人士已知的特定细节。此外,已知的结构与步骤不再详述,以免不必要地限制本公开。本公开的优选实施例详述如下。然而,除了详细说明之外,本公开亦可广泛实施于其他实施例中。本公开的范围不限于详细说明的内容,而是由权利要求定义。
本文中使用的术语仅是为了实现描述特定实施例的目的,而非意欲限制本发明。如本文中所使用,单数形式“一(a)”、“一(an)”,及“该(the)”意欲亦包括复数形式,除非上下文中另作明确指示。将进一步理解,当术语“包括(comprises)”及/或“包括(comprising)”用于本说明书中时,该等术语规定所陈述的特征、整数、步骤、操作、元件,及/或组件的存在,但不排除存在或增添一或更多个其他特征、整数、步骤、操作、元件、组件,及/或上述各者的群组。
图1为依据本公开一些实施例的一种封装元件10的剖视示意图。请参考图1,在一些实施例中,封装元件10包括一支撑组件110、一主元件120、一密封件130以及一导电封装件140,主元件120配置在支撑组件110上,密封件130覆盖主元件120,导电封装件140包围密封件130。
在一些实施例中,支撑组件110具有一基底112、复数个电路图案114以及复数个直通穿孔(through vias)116,基底112具有一前表面1122以及一后表面(back surface)1124,后表面1124相对前表面1122设置,复数个电路图案114分别配置在前表面1122与后表面1124上,复数个直通穿孔116穿透基底112并电性连接到各电路图案114。在一些实施例中,基底112可由介电材料所制,例如双马来酰亚胺-三氮杂苯树脂(BT resin)、由带有环氧树脂粘结剂且具有耐火性的编织玻璃纤维布所制成的一种复合材料(FR4epoxy/glass)。在一些实施例中,各电路图案114可为镀金导体(gold-plated conductors)、镀铜导体(copper-plated conductors)、或是镀铝导体(aluminum-plated conductors)。在一些实施例中,直通穿孔116可为铜导体(copper conductors)。在一些实施例中,支撑组件110可为一印刷电路板(printed circuit board,PCB)。在一些实施例中,支撑组件110可为一硬质印刷电路板或者是一柔性印刷电路板。在一些实施例中,支撑组件110可为一单层印刷电路板。在一些实施例中,支撑组件110可为一多层印刷变路板,其具有在基底112中的布线(routing)(图未示),并电性连接各电路图案114及/或各直通穿孔116。
在一些实施例中,封装元件10可还包括复数个焊料凸块150,连接到设置在后表面1124上的各电路图案114。在一些实施例中,各焊料凸块150当作输入/输出(I/O)连接,以将主元件120电性连接到外部印刷电路板(图未示)。
在一些实施例中,主元件120安装在前表面1122上。在一些实施例中,主元件120包括一功能表面(functional surface)122以及一或多个结合垫(bonding pads)124,功能表面122面对远离支撑组件110的方向,结合垫124设置在功能表面122上。在一些实施例中,结合垫124可为铝结合垫。在一些实施例中,主元件120以线路结合技术(wire bondingtechnique)电性连接支撑组件110;亦即,结合垫124通过一或多个线路(wires)160电性连接电路图案114。换言之,线路160从在主元件120上的结合垫124延伸到在前表面1122上的电路图案114。
在一些实施例中,例如环氧树脂(epoxy)的一粘着剂(adhesive)170可使用来将相对功能表面122设置的一下表面126连接到基底112的前表面1122,以便增加在主元件120与支撑组件110之间的粘着(adhesion)以得到更佳的可靠度(greater reliability)。
在一些实施例中,密封胶层(sealant)130完全地覆盖主元件120与线路160,以得到机械上及环境上的保护。在一些实施例中,支撑组件110的一周围(periphery)111穿经密封胶层130而暴露。在一些实施例中,密封胶层130可具有一平坦顶表面132。在一些实施例中,密封胶层130可包含环氧基树脂(epoxy-based resin)、聚亚酰胺基树脂(polyimide-based resin)、聚酯基树脂(polyester-based resin),或是聚丙烯酸酯基聚合物树脂(polyacrylate-based polymer resin)。
在一些实施例中,密封件130可为透明(transparent)或不透明(opaque)。当密封件130为不透明时,较佳者为黑色。黑色辐射最多热(heat),且在从主元件120散热到线路160与电路图案114是最有效率的。在一些实施例中,黑色可以增加调色粒子(tonerparticles)134来形成。在一些实施例中,例如包含碳(carbon)的调色粒子134可额外地提供在密封件130中,以持续地将从主元件120所产生的热转移到支撑组件110,也因此改善封装元件10的散热特性(thermal dissipating property)。通过在密封件130中设置调色粒子134,可缩短密封件130的固化时间(curing time)。在一些实施例中,密封件130可包含一填充材料(filler material)136,用以加强一机械特性(filler material)。详而言之,当结合主元件120时,填充材料136所起的作用是避免密封件130的机械特性恶化。在一些实施例中,填充材料136可包含氧化硅(silicon oxide)、二氧化硅(silicon dioxide)、二氧化钛(titanium dioxide)或是氧化铝(aluminum oxide)。
在一些实施例中,导电封装件140完全地包围密封件130与支撑组件110的周围111。在一些实施例中,导电封装件140可具有一平坦上表面142。在一些实施例中,导电封装件140包括一树脂结合剂(resin binder)144以及复数个导电粒子(conductiveparticles)146,导电粒子146布设载树脂结合剂144中,举例来说,导电粒子146可为金属粒子,例如钛、铝、铜、金、锌(zinc),或是银。在一些实施例中,导电封装件140包含具有一预设浓度(designated concentration)的导电粒子146,其允许用于一电性连接(electricalconnection)。在一些实施例中,导电封装件140可为一压缩模塑(compression molding)封装胶体或是一转移模塑(transfer molding)封装胶体。在一些实施例中,导电封装件140具有一顶壁148以及一周壁(peripheral wall)149,顶壁148连接上表面142,周壁149从顶壁148延伸,其中周壁149具有一厚度T1,大于顶壁148的一厚度T2。
在一些实施例中,封装元件10还包括复数个接地接点(grounding contacts)180以及复数个接地通孔(grounding vias)182,接地接点180设置在支撑组件110上的前表面1122与后表面1124上,接地通孔182穿透支撑组件110并电性连接接地接点180。在一些实施例中,导电封装件140包围在前表面1122上的接地接点180。在一些实施例中,当提供一接地电压给焊料凸块150时,用于将非预期电磁辐射接地的一电性通道(electrical pathway)引入到连接到接地接点180的焊道凸块150、接地通孔182以及导电封装件140中。在一些实施例中,取决于导电封装件140的电磁辐射入射(electromagnetic radiation incident)的接地,可通过一电性通道发生,而所述电性通道包含接地接点180、接地通孔182以及连接到接地接点180的焊料凸块150。在一些实施例中,封装元件10可为一微间距球栅阵列(fine-pitchball grid array,FBGA)封装元件。
封装元件10A、10B的一些实施例示出在图2与图3中说明。应理解的是,如图2及图3所示的封装元件10A、10B包括许多特征,其特征相同于或是类似于对应图1所公开的封装元件10的特征。为了明确与简易,可省略其相同或类似的详细说明,且相同或类似的参考(元件)编号表示相同或类似的元件。如图2及图3所示的封装元件10A、10B与如图1所示的封装元件10之间的主要差异,叙述如下。
请参考图2,封装元件10A为一开窗型球栅阵列(window ball grid array,WBGA)封装元件。在一些实施例中,封装元件10A的基底112包括一开口(opening)1128,延伸穿经前表面1122与后表面1124。在一些实施例中,开口1128大致地形成在基底112的中心处。在一些实施例中,功能表面122以面朝下的手段(face-down manner)安装,以允许功能表面122配置在前表面1122上以及配置在开口1128的一端上,以便主元件120的各结合垫124可经由开口1128而暴露,并通过穿经开口1128的各线路160,电性连接在后表面1124上的相对应的各电路图案114。在一些实施例中,封装元件10A还包括一底充填材料(under-filler)190,形成在支撑组件110的后表面1124上,并填入开口1128以包围各线路160。在一些实施例中,底充填材料190可为透明或是不透明。在一些实施例中,底充填材料190与密封胶层130可具有相同材料。在一些实施例中,各调色粒子可额外地提供在底充填材料190中,以使从主元件110所产生的热可持续地转移到支撑组件110,并可改善封装元件10A的散热特性。在一些实施例中,导电封装件140大致地为一共形封装体(conformal encapsulant)。
请参考图3,封装元件10B为一覆晶尺度(flip-chip scale)封装元件。在一些实施例中,主元件120的功能表面122面对基底112,且主元件120的各结合垫124以电性接口(electrical interface)162的方法电性连接设置在前表面1122上的各电路图案114,而电性接口162包含一可焊性合金(solderable alloy),例如锡银铜(SnAgCu)合金、锡铅(tin-lead,SnPb)合金,或是锡锑(tin-antimony,SnSb)合金。较佳者,电性接口162具有一熔点(melting point),其高于焊料凸块150的熔点,以当各焊料凸块150须经过一回焊工艺(reflow process)时,至少大致地避免电性接口162的回焊(reflow)。
图4为依据本公开一些实施例的一种封装元件10的制备方法30的流程示意图。图5至图11为依据本公开一些实施例该封装元件于封装元件10的制备方法30中的各中间阶段的剖视示意图。图5至图11所示的各阶段亦示出图4的流程图中。在接下来的讨论中,如图5至图11所示的各制备阶段参考如图4中的工艺步骤进行讨论。理应理解的是,制备方法30与一单一主元件120的封装一同讨论。然而,方法论提供相同地多个体主元件120的封装,其可实现不同的多样功能。
请参考图5,在一些实施例中,依据如图4中的一步骤302,提供一支撑组件110。在一些实施例中,支撑组件110包括一基底112,具有一接近平坦前表面1122与一接近平坦后表面1124,后表面1124与前表面1122相对设置。在一些实施例中,复数个电路图案114与复数个接地接点180分别地设置在前表面1122与后表面1124上,其中各接地接点180配置在支撑组件110的一周围111。在一些实施例中,复数个直通穿孔116穿透基底112,并电性连接各电路图案114,且复数个接地通孔(grounding vias)182穿透基底112并电性连接各接地接点180。在一些实施例中,各直通穿孔116与各接地通孔182通过执行一钻孔步骤(drillingstep)以及一电路步骤(platingstep)的步骤所形成,钻孔步骤形成延伸经过前表面1122与后表面1124的复数个穿孔(through holes)184,而电镀步骤在各穿孔184中形成多个导体(conductors)186。
接着,依据在图4中的一步骤304,一主元件120安装在支撑组件110上。在一些实施例中,主元件120具有一下表面126,其面对支撑组件110的前表面1122。在一些实施例中,主元件120可为一存储器晶粒(memory die)、一逻辑晶粒(logic die),或是一应用专用集成电路(application-specific integrated circuit,ASIC)晶粒。在一些实施例中,主元件120可连接前表面1122,举例来说,可使用配置在下表面126上的一粘着剂170。在一些实施例中,粘着剂170可为一晶粒贴合膜(die attach film,DAF)或是其他适合的粘着剂,例如胶粘剂(glue)或是环氧树脂(epoxy)。
接下来,依据在图4中的一步骤306,形成一或多个线路160,以允许主元件120与支撑组件110的电性连接。据此,形成一主元件200。在一些实施例中,主元件120具有一功能表面122以及一或多个结合垫124,功能表面122相对下表面126设置,结合垫124设置在功能表面122上;每一线路160的一端连接其中一结合垫124,每一线路160的另一端连接在前表面1122上的其中一电路图案116。在一些实施例中,各线路160可为金、铜、铝,或是其类似物。
请参考图6A及图6B,在一些实施例中,依据在图4中的一步骤308,执行一模封工艺(molding process)以在主元件120与各线路160上形成一密封件130。在一些实施例中,密封件130完全地覆盖主元件120、各线路160,以及前表面1122的一部分。在一些实施例中,支撑组件110的周围111穿经密封件130而暴露。在一些实施例中,各接地接点180穿经密封件130而暴露。在一些实施例中,密封件130可为一聚合物复合物(polymer composite)材料,例如环氧树脂(epoxy resin)、聚丙烯酸酯(acrylate)、或是具有适当填充材料136的聚合物。在一些实施例中,密封件130可包含一热固性聚合物(thermoset polymer)材料。在一些实施例中,密封件130为非导电性(non-conductive),并保护主元件200周围环境避免遭受外部元件的影响。在一些实施例中,复数个调色粒子134可额外地加入到密封件130中。在一些实施例中,为黑色的各调色粒子134可持续地将主元件120所产生的热转移到支撑组件110。在一些实施例中,用于形成密封件130的适合的方法可包括一点胶工艺(dispensingprocess)、一移转成型(transfer molding)工艺、一压模成型(compressive molding)工艺、一液体封装成型(liquid encapsulent molding)工艺,或是其类似工艺。在一些实施例中,密封件130可以液体形态点胶(dispensed),以覆盖主元件120与各线路160。接着,执行一固化工艺(curing process),以凝固密封件130。在一些实施例中,密封件130可以一自由基固化工艺(radical curing process)、一紫外线(ultraviolet,UV)固化工艺及/或一热固化工艺进行固化。在图6A中,密封件130具有一大致平坦顶表面132。在图6B中,密封件130的顶表面132为一大致圆表面(rounded surface)。
请参考图7,在一些实施例中,依据图4中的一步骤310,执行一封装工艺(encapsulation process),以形成包含复数个导电粒子146的一导电封装件140,进而覆盖密封件130。在一些实施例中,导电封装件140以液体形态点胶在第一模封腔室(firstmolding cavity)210中,且覆盖有密封件130的主元件200设置在一第二模封腔室212(second molding cavity)中,而第二模封腔室212与主元件120向下朝向导电封装件140的功能表面122一同设置。在一些实施例中,导电封装件140包括一树脂结合剂(resinbinder)144以及复数个导电粒子146,举例来说,树脂结合剂144为环氧树脂(epoxy),各导电粒子146提供穿经导电封装件140的多个导电路径(conductive paths),并布设在树脂结合剂144中。在一些实施例中,例如超声波处理(ultrasonication)、球磨(ball milling)、高速剪切(high-speed shearing)、化学重组(chemical reforming)等方法,可被用来均匀地将导电粒子146布设在树脂结合剂144中。在一些实施例中,可加热导电封装件140至一升高温度,其足够熔化树脂结合剂144。较佳者,树脂结合剂144具有一熔点,其小于密封件130的一熔点,当树脂结合剂144经过加热时,以避免密封件130熔化。在一些实施例中,树脂结合剂144具有一熔化温度(melting temperature),接近175度C。
请参考图8,施加以箭头A所表示的一适当压力,以迫使覆盖有密封件130的主元件200接触导电封装件140,其中维持热及压力,直到导电封装件140固化为止。
请参考图9,在经历过封装工艺之后的导电封装件140为一固体的、均匀的导电封装件140。在一些实施例中,导电封装件140包围密封件130与穿经密封件130而暴露的各接地接点180。在一些实施例中,支撑组件110的周围111没有设置接地接点180的一部分,穿经导电封装件140而暴露。
请参考图10,在一些实施例中,依据图4中的一步骤312,复数个焊料凸块150安装在支撑组件110上。在一些实施例中,焊料凸块150配置在位在后表面1124上的电路图案114上。在一些实施例中,焊料凸块150以初始地将焊接熔剂(solder flux)(图未示)设置在电路图案114上进行安装。焊接熔剂可以刷(brushing)、喷(spraying)、模版印刷(Stenciling)或其他方法提供。焊接熔剂一般具有一酸性元件(acidic component)以及一粘着特性(adhesive quality),酸性元件移除氧化阻障层(oxide barriers),而粘着特性在工艺期间帮助避免移动。一旦焊接熔剂在适当位置,焊料凸块150可完全地与焊接熔剂接触,虽然可应用任何适当的放置方法,可以使用例如一取放操作(pick and placeoperation)的方式实现。一旦焊料凸块150接触焊接熔剂,可执行一回焊工艺,以回焊焊料凸块150与焊接熔剂的材料,以完全地将焊料凸块150结合到电路图案114。
请参考图11,依据图4中的一步骤314,选择地执行一切割工艺(dicing process),以移除支撑组件110经过导电封装件14而暴露的周围111。据此,完整地形成封装元件10。在一些实施例中,基底112具有一侧壁1120,与导电封装件140的一侧向表面(lateralsurface)1402共面(planar)。在一些实施例中,可执行切割工艺,举例来说,可以使用一切割刀片(dicing saw)、激光,或是其他适合的裁切技术来实现。
综上所述,具有封装元件10、10A、10B的架构,用于将非预期电磁辐射接地的一电性通道引入到焊道凸块150中,并连接到接地接点180、接地通孔182以及包含具有高导电性的导电粒子的导电封装件140。因此,当焊料凸块180电性连接接地电压时,可提供电磁干扰屏蔽。
本公开的一实施例提供一种封装元件。该封装元件包括一支撑组件(supportingmember)、一主元件(main component)、一密封件(sealant)以及一导电封装件(conductiveencapsulant)。该支撑组件具有复数个接地接点。该主元件安装在该支撑组件上。该密封件覆盖该主元件。该导电封装件包围该密封件以及穿经该密封件而暴露的该等接地接点。
本公开的另一实施例提供一种封装元件的制备方法。该制备方法包括下列步骤:提供一主元件(main device),包括一支撑组件以及一主元件,其中该主元件配置在该支撑组件上并电性连接该支撑组件,且该支撑组件包括包围该主元件的复数个接地接点;执行一模封工艺(molding process),以形成一密封件,进而覆盖该主元件;以及执行一封装工艺(encapsulation process),以形成一导电封装件,进而包围该密封件与该等接地接点。
虽然已详述本公开及其优点,然而应理解可进行各种变化、取代与替代而不脱离权利要求所定义的本公开的构思与范围。例如,可用不同的方法实施上述的许多工艺,并且以其他工艺或其组合替代上述的许多工艺。
再者,本公开的范围并不受限于说明书中所述的工艺、机械、制造、物质组成物、手段、方法与步骤的特定实施例。该技艺的技术人士可自本公开的公开内容理解可根据本公开而使用与本文所述的对应实施例具有相同功能或是达到实质上相同结果的现存或是未来发展的工艺、机械、制造、物质组成物、手段、方法、或步骤。据此,这些工艺、机械、制造、物质组成物、手段、方法、或步骤包含于本公开的权利要求内。

Claims (9)

1.一种封装元件,包括:
一支撑组件,该支撑组件包括:一基底,该基底具有一前表面和一后表面,该后表面相对该前表面设置;复数个接地接点,该复数个接地接点设置在该基底的该前表面和该后表面上;复数个接地通孔,穿透该基底,并将在该前表面上的复数个接地接点电性连接到在该后表面上的复数个接地接点;以及复数个焊料凸块,连接到在该后表面上的该复数个接地接点;
一主元件,安装在该支撑组件的该基底的该前表面上;
一密封件,覆盖该主元件;
复数个不透明调色粒子,分布在该密封件中,以形成不透明密封件并将该主元件所产生的热转移到该支撑组件;以及
一导电封装件,包围该密封件以及穿经该密封件而暴露的、该前表面上的复数个接地接点,其中,该导电封装件包括:复数个导电粒子,分布在该导电封装件中;以及一树脂结合剂,用于分布该复数个导电粒子,其中,该复数个导电粒子穿经该导电封装件被彼此连接且与设置在该基底的该前表面上的复数个接地接点连接,且该复数个导电粒子、设置在该前表面上的复数个接地接点、设置在该后表面上且电连接至一接地电压的复数个接地接点、将在该前表面上的复数个接地接点电性连接到在该后表面上的复数个接地接点的该复数个接地通孔被彼此电连接,以形成用于将非预期电磁辐射接地的连续电性通道,其中当提供一接地电压给该复数个焊料凸块时,用于将非预期电磁辐射接地的该连续电性通道引入到该复数个焊料凸块、该复数个接地接点、该复数个接地通孔以及该导电封装件中。
2.如权利要求1所述的封装元件,还包括至少一线路,从该主元件结合到在该支撑组件上的复数个电路图案,其中该复数个电路图案设置在该前表面与该后表面上,且在该前表面上的该复数个电路图案使用复数个直通穿孔电性连接在该后表面上的该复数个电路图案,而该复数个直通穿孔延伸穿经该前表面与该后表面。
3.如权利要求1所述的封装元件,其中该导电封装件具有一侧表面,与该基底的一侧壁共面。
4.如权利要求1所述的封装元件,其中该树脂结合剂具有一熔点,低于该密封件的一熔点。
5.如权利要求1所述的封装元件,其中该导电封装件具有一大致平坦上表面。
6.一种封装元件的制备方法,包括:
提供一主装置,包括一支撑组件以及一主元件,其中该主元件配置在该支撑组件上并电性连接该支撑组件,且该支撑组件包括一基底,该基底具有一前表面和一后表面,该后表面相对该前表面设置,该支撑组件具有包围该主元件的复数个接地接点,该复数个接地接点设置在该基底的该前表面和该后表面上;以及复数个接地通孔,穿透该基底,并将在该前表面上的复数个接地接点电性连接到在该后表面上的复数个接地接点;
将复数个焊料凸块安装到在该支撑组件的该基底的该后表面上的复数个接地接点上;
执行一模封工艺,以形成一密封件,进而覆盖该主元件;
将复数个不透明调色粒子添加并分布在该密封件中,以形成不透明密封件,该复数个不透明调色粒子将该主元件所产生的热转移到该支撑组件;
将复数个导电粒子分布在树脂结合剂中以形成一导电封装件;以及
通过该导电封装件执行一封装工艺,进而包围该密封件与该复数个接地接点;
其中,该封装工艺包括:
将覆盖有该密封件的该主元件放置在一第一模封腔室中;
将该导电封装件放置在一第二模封腔室中;
提供一压力以迫使覆盖有该密封件的该主元件接触到该导电封装件;以及
固化该导电封装件;
其中,经由该导电封装件固化,该复数个导电粒子被彼此连接且与设置在该基底的该前表面上的复数个接地接点连接,且该复数个导电粒子、设置在该前表面上的该复数个接地接点、设置在该后表面上且电连接至一接地电压的复数个接地接点、将在该前表面上的复数个接地接点电性连接到在该后表面上的复数个接地接点的该复数个接地通孔被彼此电连接,以形成用于将非预期电磁辐射接地的连续电性通道,其中当提供一接地电压给该复数个焊料凸块时,用于将非预期电磁辐射接地的该连续电性通道引入到该复数个焊料凸块、该复数个接地接点、该复数个接地通孔以及该导电封装件中。
7.如权利要求6所述的制备方法,其中该基底具有相对该后表面设置的一前表面,该复数个接地接点设置在该前表面与该后表面上,且该支撑组件还包括复数个接地通孔,穿透该基底,并将在该前表面上的复数个接地接点电性连接到在该后表面上的复数个接地接点。
8.如权利要求6所述的制备方法,还包括在该压力提供之前,熔化该导电封装件。
9.如权利要求6所述的制备方法,还包括在该主元件与该支撑组件之间沉积一粘着剂,以将该主元件固定在该支撑组件。
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