CN111370491A - 开关ldmos器件及制造方法 - Google Patents

开关ldmos器件及制造方法 Download PDF

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CN111370491A
CN111370491A CN202010321166.9A CN202010321166A CN111370491A CN 111370491 A CN111370491 A CN 111370491A CN 202010321166 A CN202010321166 A CN 202010321166A CN 111370491 A CN111370491 A CN 111370491A
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ldmos device
heavily doped
body doping
doped region
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CN111370491B (zh
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杨新杰
金锋
乐薇
张晗
宋亮
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

本发明公开了一种开关LDMOS器件，在半导体衬底中具有第一阱中，包含有所述开关LDMOS器件的LDD区及第二导电类型的第一体掺杂区；在所述的LDD区中，具有作为源区的第一重掺杂区，在第一体掺杂区中，具有作为漏区的第二重掺杂区；在栅极结构之下、LDD区与体掺杂区之间的半导体衬底表层形成所述开关LDMOS器件的沟道，在栅极施加电压超过所述LDMOS器件的阈值电压时，沟道反型使得源区与漏区之间导通；所述LDD区及体掺杂区远离栅极结构的一侧均具有场氧或者STI，所述场氧或者STI的一侧是与LDD中的第一重掺杂区或第一体掺杂区的第二重掺杂区相接。本发明体掺杂区以更高的离子注入的能量和离子注入的剂量实现提高器件的击穿电压BV且缩小器件尺寸的目的。

Description

开关LDMOS器件及制造方法
技术领域
本发明涉及半导体器件设计及制造领域，特别是指一种开关LDMOS器件，本发明还涉及所述开关LDMOS器件的制造方法。
背景技术
目前5V开关LDMOS器件采用CMOS的常规结构，如图1所示，以最为常见的N型LDMOS器件结构为例，图1中仅示出了一些关键性的结构，在P阱中具有LDD区，所述开关LDMOS器件的源区及漏区分别位于LDD区中，两个LDD区之间为沟道区，且两个LDD区之间的衬底表面具有由栅氧化层和多晶硅栅极构成的所述开关LDMOS器件的栅极结构，所述栅极结构沿沟道长度方向的两侧还具有栅极侧墙。
所述衬底表面还具有场氧（或者是STI），所述的场氧将重掺杂的P型区与LDD区隔离，重掺杂的P型区作为引出区将P阱进行引出。
上述5V NMOS的一般的击穿电压BV为11.5V，沟道长度Lch为0.6um，方块电阻Rsp为2MΩ/mm2,5V PMOS一般击穿电压BV为10.5V，沟道长度Lch为0.5um，方块电阻Rsp为7MΩ/mm2。
目前5V MOS器件的常规制造工艺流程如下：
首先，在半导体衬底上，比如硅衬底上规划出有源区，然后在有源区中形成阱区（针对PMOS，在有源区中形成N阱，针对NMOS，在有源区中形成P阱），再衬底表面通过热氧化法形成一层氧化层作为栅介质层，然后淀积一层多晶硅，通过刻蚀形成栅极结构，通过离子注入在有源区中形成LDD区（针对PMOS，形成N型LDD，针对NMOS，形成P型LDD），再在栅极结构两侧通过淀积氧化物或者氮化物并进行刻蚀形成栅极侧墙；通过自对准注入，形成重掺杂的N型区以及重掺杂的P型区。对于NMOS来说，重掺杂的N型区作为LDMOS器件的源区以及漏区，而重掺杂的P型区作为阱区的引出区。
现有的CMOS工艺目前遇到的技术问题主要在于：
1.BV 不能做高（≥15V)，无法满足新的应用场景；
2.Rsp 不能继续大比例缩小 ，降低芯片面积难度高。
造成上述问题的原因是：
1.由于LDD区域的形成工艺是隔着多晶硅注入的，为了防止离子注入打穿多晶硅,所以LDD的离子注入能量不能很高，因此形成的结深度较浅，不能满足高BV的要求。
2.阱区的形成工艺是和其他的基础器件共用的，阱区表面浓度达不到较高的数值，因此需要长的沟道长度Lch来保证击穿电压BV，因此限制了器件尺寸的小型化。
发明内容
本发明所要解决的技术问题是提供一种开关LDMOS器件，改善其击穿电压难以提高且器件尺寸过大的问题。
本发明还要解决的技术问题是提供所述开关LDMOS器件的制造方法。
为解决上述问题，本发明所述的开关LDMOS器件，形成于半导体衬底中的一具有第一导电类型的第一阱中，在所述的第一阱中，包含有所述开关LDMOS器件的LDD区及第二导电类型的第一体掺杂区；在LDD区与第二导电类型的体掺杂区之间的衬底表面，形成有所述开关LDMOS器件的栅极结构；
所述栅极结构包含有覆盖于衬底表面的栅介质层，以及覆盖于栅介质层之上的多晶硅栅极；在栅极结构的两侧还具有栅极侧墙；
在所述的LDD区中，具有第二导电类型的第一重掺杂区，所述第一重掺杂区的一侧与栅极侧墙的边沿相接，第一重掺杂区作为所述开关LDMOS器件的源区；
在第一体掺杂区中，具有第二导电类型的第二重掺杂区，所述第二重掺杂区的一侧与栅极侧墙的边沿相接，第二重掺杂区作为所述开关LDMOS器件的漏区；
在栅极结构之下、LDD区与体掺杂区之间的半导体衬底表层形成所述开关LDMOS器件的沟道，在栅极施加电压超过所述LDMOS器件的阈值电压时，沟道反型使得源区与漏区之间导通；
所述LDD区及体掺杂区远离栅极结构的一侧均具有场氧或者STI，所述场氧或者STI的一侧是与LDD中的第一重掺杂区或第一体掺杂区的第二重掺杂区相接。
进一步的改进是，所述的第一阱中，在靠第一体掺杂区的场氧或者STI的远离栅极结构的外侧还具有第一导电类型的第三重掺杂区，所述第三重掺杂区形成引出区将第一阱引出电极。
进一步的改进是，在所述的场氧或者STI上，还包含有第二栅极结构，所述第二栅极结构与所述开关LDMOS器件的栅极结构同步刻蚀形成，所述第二栅极结构作为第一重掺杂区和/或第二重掺杂区的自对准注入的掩膜使用，在完成自对准注入后，所述第二栅极结构可选择性地被去除或者保留。
进一步的改进是，所述的第二导电类型的第一体掺杂区为自对准注入形成。
进一步的改进是，所述的第一导电类型为P型，第二导电类型为N型；或者是，所述第一导电类型为N型，第二导电类型为P型。
本发明所述的一种开关LDMOS器件，形成于半导体衬底中的一具有第一导电类型的第一阱中：
在所述的第一阱中，包含有第二导电类型的第一体掺杂区及第一导电类型的第二体掺杂区；在第一体掺杂区与第二体掺杂区之间的衬底表面，形成有所述开关LDMOS器件的栅极结构；
所述栅极结构包含有覆盖于衬底表面的栅介质层，以及覆盖于栅介质层之上的多晶硅栅极；在栅极结构的两侧还具有栅极侧墙；
在所述的第二体掺杂区中，具有第二导电类型的第一重掺杂区，所述第一重掺杂区的一侧与栅极侧墙的边沿相接，第一重掺杂区作为所述开关LDMOS器件的源区；
在第一体掺杂区中，具有第二导电类型的第二重掺杂区，所述第二重掺杂区的一侧与栅极侧墙的边沿相接，第二重掺杂区作为所述开关LDMOS器件的漏区；
在栅极结构之下、第二体掺杂区与第一体掺杂区之间的半导体衬底表层形成所述开关LDMOS器件的沟道，在栅极施加电压超过所述LDMOS器件的阈值电压时，沟道反型使得源区与漏区之间导通；
所述第二体掺杂区及第一体掺杂区远离栅极结构的一侧均具有场氧或者STI，所述场氧或者STI的一侧是与第二体掺杂区中的第一重掺杂区或第一体掺杂区的第二重掺杂区相接。
进一步的改进是，所述的第一阱中，在靠第一体掺杂区的场氧或者STI的远离栅极结构的外侧还具有第一导电类型的第三重掺杂区，所述第三重掺杂区形成引出区将第一阱引出电极。
进一步的改进是，在所述的场氧或者STI上，还包含有第二栅极结构，所述第二栅极结构与所述开关LDMOS器件的栅极结构同步刻蚀形成，所述第二栅极结构作为第一重掺杂区和/或第二重掺杂区的自对准注入的掩膜使用，在完成自对准注入后，所述第二栅极结构可选择性地被去除或者保留。
进一步的改进是，所述的第一体掺杂区及第二体掺杂区为自对准注入形成。
本发明所述的一种开关LDMOS器件的制造方法，包含如下的工艺步骤：
步骤一，提供一半导体衬底，在所述半导体衬底上形成有源区，所述有源区用于形成开关LDMOS器件；然后在所述有源区中进行离子注入制作开关LDMOS器件的阱区；在所述半导体衬底表面淀积一层氧化层，然后在所述氧化层上淀积一层多晶硅层；
步骤二，通过光刻胶定义，对所述的多晶硅层及氧化层进行刻蚀，形成开关LDMOS器件的栅极结构，所述氧化层作为栅介质层，所述多晶硅层刻蚀成型构成开关LDMOS器件的多晶硅栅极；
步骤三，涂覆光刻胶，以光刻胶定义出体掺杂区的注入区域，刻蚀打开体掺杂区的注入窗口，进行体掺杂区的离子注入，形成所述开关LDMOS器件的体掺杂区；
步骤四，在阱中进行离子注入，形成所述开关LDMOS器件的LDD区；
步骤五，淀积氧化层或者氮化层，再进行刻蚀在所述开关LDMOS器件的栅极结构两侧形成栅极的侧墙；
步骤六，进行离子注入，形成重掺杂区，以制作开关LDMOS器件的源区、漏区。
进一步的改进是，所述步骤三中，体掺杂区的形成是形成第二导电类型的第一体掺杂区；或者是分先后两个步骤既形成第二导电类型的第一体掺杂区又形成第一导电类型的第二体掺杂区；所述第一或者第二体掺杂区的离子注入为在光刻胶的定义下的自对准注入，注入能量无需考虑是否会打穿多晶硅层，以实现更高的注入结深，能根据击穿电压的需求进行调整；第一或者第二体掺杂区的自对准注入形成沟道区的工艺无需与其他器件结构的形成共享工艺，能提高注入剂量以提高沟道区表面杂质浓度，降低器件尺寸。
进一步的改进是，所述的第一导电类型为P型，第二导电类型为N型；或者是，所述第一导电类型为N型，第二导电类型为P型。
本发明所述的开关LDMOS器件，在漏区，或者是漏区和源区，均放置于体掺杂区中，且体掺杂区是通过光刻胶定义然后进行针对性的离子注入，作为带光刻胶的自对准离子注入形成沟道区，能不受其他工艺的限制或者结构的影响，实现了传统工艺中难以实施的增加离子注入的能量和离子注入的剂量的目的。更高的离子注入能量能增加结深，充分利用LDD区的纵向深度，优化漏端电场分布，提高器件的击穿电压BV。更高的离子注入剂量能增加沟道区表面浓度，因此在保证击穿电压BV达到设计要求的同时降低沟道长度Lch,从而实现了缩小器件尺寸的目的。
附图说明
图1 是现有的开关LDMOS的结构示意图。
图2～8 是本发明实施例一开关LDMOS器件的制造工艺步骤图。
图9～14 是本发明实施例二开关LDMOS器件的制造工艺步骤图。
图15 是本发明开关LDMOS器件的制造工艺流程图。
附图标记说明
1是第一阱，2是第一体掺杂区(Nbody)，3是多晶硅栅极，4是LDD，5a是第一重掺杂区，5b是第二重掺杂区，6是第三重掺杂区，7是场氧，8是栅极侧墙，9是第二体掺杂区（Pbody），10是光刻胶。
具体实施方式
由于开关LDMOS器件在实际应用中以N型LDMOS器件为主，本发明实施例中也均以N型LDMOS器件举例来说明，即定义第一导电类型为P型，定义第二导电类型为N型。如果需要制作P型，则将相关的导电类型取为相反即可。
本发明所述的开关LDMOS器件，如图8所示，是本发明提供的开关LDMOS器件的实施例一：所述的LDMOS形成于半导体衬底中的一具有第一导电类型的第一阱中，即P阱1。在所述的P阱1中，包含有所述开关LDMOS器件的LDD4区及第二导电类型的第一体掺杂区2；在LDD区与第二导电类型的体掺杂区2之间的衬底表面，形成有所述开关LDMOS器件的栅极结构。
所述栅极结构包含有覆盖于衬底表面的栅介质层，以及覆盖于栅介质层之上的多晶硅栅极3；在栅极结构的两侧还具有栅极侧墙8。
在所述的LDD区4中，具有N型的第一重掺杂区5a，所述第一重掺杂区5a的一侧与栅极侧墙8的边沿相接，N型第一重掺杂区5a作为所述开关LDMOS器件的源区。
在第一体掺杂区2中，具有N型的第二重掺杂区5b，所述第二重掺杂区5b的一侧与栅极侧墙8的边沿相接，第二重掺杂区5b作为所述开关LDMOS器件的漏区。
在栅极结构之下、LDD区与体掺杂区之间的半导体衬底表层形成所述开关LDMOS器件的沟道，沟道的长度为Lch,在栅极施加电压超过所述LDMOS器件的阈值电压时，沟道反型使得源区5a与漏区5b之间导通。
所述LDD区4及体掺杂区2远离栅极结构的一侧均具有场氧7（或者是STI），所述场氧7的一侧是与LDD4中的第一重掺杂区5a或第一体掺杂区2的第二重掺杂区5b相接。
所述的第一阱1中，在靠第一体掺杂区的场氧或者STI的远离栅极结构的外侧还具有P型的第三重掺杂区6，所述第三重掺杂区6形成引出区将第一阱1引出电极。
继续参考图8，在所述的场氧7上，还包含有第二栅极结构，如5b与6之间的场氧上，所述第二栅极结构与所述开关LDMOS器件的栅极结构同步刻蚀形成，所述第二栅极结构作为第一重掺杂区和/或第二重掺杂区的自对准注入的掩膜使用，并不具有电学性能。在完成自对准注入后，所述第二栅极结构可选择性地被去除或者保留。
参考图14所示的实施例二，是本发明所述的另一种开关LDMOS器件，形成于半导体衬底中的一P型的第一阱1中：
在所述的第一阱1中，包含有N型的第一体掺杂区2及P的第二体掺杂区9；在第一体掺杂区2与第二体掺杂区9之间的衬底表面，形成有所述开关LDMOS器件的栅极结构。
所述栅极结构包含有覆盖于衬底表面的栅介质层，以及覆盖于栅介质层之上的多晶硅栅极3；在栅极结构的两侧还具有栅极侧墙8。
在所述的第二体掺杂区9中，具有N型的第一重掺杂区5a，所述第一重掺杂区5a的一侧与栅极侧墙8的边沿相接，第一重掺杂区5a作为所述开关LDMOS器件的源区。
在第一体掺杂区2中，具有N型的第二重掺杂区5b，所述第二重掺杂区5b的一侧与栅极侧墙8的边沿相接，第二重掺杂区5b作为所述开关LDMOS器件的漏区。
在栅极结构之下、第二体掺杂区9与第一体掺杂区2之间的半导体衬底表层形成所述开关LDMOS器件的沟道，在栅极施加电压超过所述LDMOS器件的阈值电压时，沟道反型使得源区与漏区之间导通。
所述第二体掺杂区9及第一体掺杂区2远离栅极结构的一侧均具有场氧7，所述场氧7的一侧是与第二体掺杂区中的第一重掺杂区或第一体掺杂区的第二重掺杂区相接。
所述的第一阱1中，在靠第一体掺杂区2的场氧7的远离栅极结构的外侧还具有P型的第三重掺杂区6，所述第三重掺杂区6形成引出区将第一阱1引出电极。
同实施例一一样，在所述的场氧上，还包含有第二栅极结构，所述第二栅极结构与所述开关LDMOS器件的栅极结构同步刻蚀形成，所述第二栅极结构作为第一重掺杂区和/或第二重掺杂区的自对准注入的掩膜使用，在完成自对准注入后，所述第二栅极结构可选择性地被去除或者保留。
实施例二在源端也通过离子注入形成P型体区，因此，整个器件在源区及漏区的外围各具有一个体区。上面所述的两个实施例中，所述的第一体掺杂区2及第二体掺杂区9均为自对准注入形成。
本发明所述的一种开关LDMOS器件的制造方法，针对实施例一的结构，参考图2～8，包含如下的工艺步骤：
步骤一，提供一半导体衬底，如图2所示，在所述半导体衬底上形成有源区，所述有源区用于形成开关LDMOS器件；然后在所述有源区中进行离子注入制作开关LDMOS器件的阱区；形成场氧；在所述半导体衬底表面淀积一层氧化层，然后在所述氧化层上淀积一层多晶硅层。
步骤二，通过光刻胶定义，如图3所示。对所述的多晶硅层及氧化层进行刻蚀，形成开关LDMOS器件的栅极结构，所述氧化层作为栅介质层，所述多晶硅层刻蚀成型初步构成开关LDMOS器件的多晶硅栅极。
步骤三，涂覆光刻胶，以光刻胶定义出体掺杂区的注入区域，刻蚀打开体掺杂区的注入窗口，进行体掺杂区的离子注入，形成所述开关LDMOS器件的体掺杂区。在实际的工艺应用或者设计场景中，实施例一的结构和实施例二的结构可以各自单独存在，也可以同时存在，本实施例一中取两者同时存在的情况，在进行实施例二结构的P阱注入时，而实施例一的结构由于没有P阱注入，因此如图4～5所示的实施例一的结构中出现了第一次P型注入，但光刻胶并未打开窗口。而在进行N型体区注入时，由光刻胶打开N型体区的注入窗口，进行离子注入形成N型体区2，如图6～7所示。
步骤四，在阱1中进行离子注入，形成所述开关LDMOS器件的LDD区。本步骤为可选步骤，可以根据需要选择是否进行LDD注入。
步骤五，淀积氧化层或者氮化层，再进行刻蚀在所述开关LDMOS器件的栅极结构两侧形成栅极的侧墙。
步骤六，进行离子注入，形成重掺杂区，以制作开关LDMOS器件的源区、漏区，完成器件的制作，最终形成器件如图8。
本发明所述的一种开关LDMOS器件的制造方法，针对实施例二的结构，参考图9～14，包含如下的工艺步骤：
步骤一，提供一半导体衬底，如图2所示，在所述半导体衬底上形成有源区，所述有源区用于形成开关LDMOS器件；然后在所述有源区中进行离子注入制作开关LDMOS器件的阱区；形成场氧；在所述半导体衬底表面淀积一层氧化层，然后在所述氧化层上淀积一层多晶硅层。
步骤二，通过光刻胶定义，如图9所示。对所述的多晶硅层及氧化层进行刻蚀，形成开关LDMOS器件的栅极结构，所述氧化层作为栅介质层，所述多晶硅层刻蚀成型初步构成开关LDMOS器件的多晶硅栅极。
步骤三，涂覆光刻胶，以光刻胶定义出体掺杂区的注入区域，刻蚀打开体掺杂区的注入窗口，进行体掺杂区的离子注入，形成所述开关LDMOS器件的体掺杂区。如图10～13所示，本实施例中进行了P型体区9和N型体区2的离子注入，首先使用光刻胶定义，以光刻胶打开P型体区的离子注入窗口，如图10所示，进行P型体区9的离子注入工艺；然后再重新以光刻胶10定义出N型体区2的离子注入窗口，如图12所示，进行N型体区的离子注入工艺，形成N型体区2。
本发明所述的P型体区及N型体区的离子注入工艺均是在光刻胶的遮挡下进行离子注入，因此，无需考虑过高的离子注入能量打穿多晶硅层，而是可以根据需要提高离子注入能量来提高注入结深，通过还能调整离子注入剂量来提高沟道区表面的离子浓度，降低方块电阻Rsp，在达到目的击穿电压性能的同时缩小沟道长度以降低器件尺寸，提高集成度降低成本。
步骤四，在阱1中进行离子注入，形成所述开关LDMOS器件的LDD区。本步骤为可选步骤，可以根据需要选择是否进行LDD注入。
步骤五，淀积氧化层或者氮化层，再进行刻蚀在所述开关LDMOS器件的栅极结构两侧形成栅极的侧墙。
步骤六，进行离子注入，形成重掺杂区，以制作开关LDMOS器件的源区、漏区，完成器件的制作，最终形成器件如图14。
以上仅为本发明的优选实施例，并不用于限定本发明。对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (14)

1.一种开关LDMOS器件，形成于半导体衬底中的一具有第一导电类型的第一阱中，其特征在于：在所述的第一阱中，包含有所述开关LDMOS器件的LDD区及第二导电类型的第一体掺杂区；在LDD区与第二导电类型的体掺杂区之间的衬底表面，形成有所述开关LDMOS器件的栅极结构；
所述栅极结构包含有覆盖于衬底表面的栅介质层，以及覆盖于栅介质层之上的多晶硅栅极；在栅极结构的两侧还具有栅极侧墙；
在所述的LDD区中，具有第二导电类型的第一重掺杂区，所述第一重掺杂区的一侧与栅极侧墙的边沿相接，第一重掺杂区作为所述开关LDMOS器件的源区；
在第一体掺杂区中，具有第二导电类型的第二重掺杂区，所述第二重掺杂区的一侧与栅极侧墙的边沿相接，第二重掺杂区作为所述开关LDMOS器件的漏区；
在栅极结构之下、LDD区与体掺杂区之间的半导体衬底表层形成所述开关LDMOS器件的沟道，在栅极施加电压超过所述LDMOS器件的阈值电压时，沟道反型使得源区与漏区之间导通；
所述LDD区及体掺杂区远离栅极结构的一侧均具有场氧或者STI，所述场氧或者STI的一侧是与LDD中的第一重掺杂区或第一体掺杂区的第二重掺杂区相接。
2.如权利要求1所述的开关LDMOS器件，其特征在于：所述的第一阱中，在靠第一体掺杂区的场氧或者STI的远离栅极结构的外侧还具有第一导电类型的第三重掺杂区，所述第三重掺杂区形成引出区将第一阱引出电极。
3.如权利要求1所述的开关LDMOS器件，其特征在于：在所述的场氧或者STI上，还包含有第二栅极结构，所述第二栅极结构与所述开关LDMOS器件的栅极结构同步刻蚀形成，所述第二栅极结构作为第一重掺杂区和/或第二重掺杂区的自对准注入的掩膜使用，在完成自对准注入后，所述第二栅极结构可选择性地被去除或者保留。
4.如权利要求1所述的开关LDMOS器件，其特征在于：所述的第二导电类型的第一体掺杂区为自对准注入形成。
5.如权利要求1或2所述的开关LDMOS器件，其特征在于：所述的第一导电类型为P型，第二导电类型为N型；或者是，所述第一导电类型为N型，第二导电类型为P型。
6.一种开关LDMOS器件，形成于半导体衬底中的一具有第一导电类型的第一阱中，其特征在于：
在所述的第一阱中，包含有第二导电类型的第一体掺杂区及第一导电类型的第二体掺杂区；在第一体掺杂区与第二体掺杂区之间的衬底表面，形成有所述开关LDMOS器件的栅极结构；
所述栅极结构包含有覆盖于衬底表面的栅介质层，以及覆盖于栅介质层之上的多晶硅栅极；在栅极结构的两侧还具有栅极侧墙；
在所述的第二体掺杂区中，具有第二导电类型的第一重掺杂区，所述第一重掺杂区的一侧与栅极侧墙的边沿相接，第一重掺杂区作为所述开关LDMOS器件的源区；
在第一体掺杂区中，具有第二导电类型的第二重掺杂区，所述第二重掺杂区的一侧与栅极侧墙的边沿相接，第二重掺杂区作为所述开关LDMOS器件的漏区；
在栅极结构之下、第二体掺杂区与第一体掺杂区之间的半导体衬底表层形成所述开关LDMOS器件的沟道，在栅极施加电压超过所述LDMOS器件的阈值电压时，沟道反型使得源区与漏区之间导通；
所述第二体掺杂区及第一体掺杂区远离栅极结构的一侧均具有场氧或者STI，所述场氧或者STI的一侧是与第二体掺杂区中的第一重掺杂区或第一体掺杂区的第二重掺杂区相接。
7.如权利要求6所述的开关LDMOS器件，其特征在于：所述的第一阱中，在靠第一体掺杂区的场氧或者STI的远离栅极结构的外侧还具有第一导电类型的第三重掺杂区，所述第三重掺杂区形成引出区将第一阱引出电极。
8.如权利要求6所述的开关LDMOS器件，其特征在于：在所述的场氧或者STI上，还包含有第二栅极结构，所述第二栅极结构与所述开关LDMOS器件的栅极结构同步刻蚀形成，所述第二栅极结构作为第一重掺杂区和/或第二重掺杂区的自对准注入的掩膜使用，在完成自对准注入后，所述第二栅极结构可选择性地被去除或者保留。
9.如权利要求6所述的开关LDMOS器件，其特征在于：所述的第一体掺杂区及第二体掺杂区为自对准注入形成。
10.一种开关LDMOS器件的制造方法，其特征在于：包含如下的工艺步骤：
步骤一，提供一半导体衬底，在所述半导体衬底上形成有源区，所述有源区用于形成开关LDMOS器件；然后在所述有源区中进行离子注入制作开关LDMOS器件的阱区；在所述半导体衬底表面淀积一层氧化层，然后在所述氧化层上淀积一层多晶硅层；
步骤二，通过光刻胶定义，对所述的多晶硅层及氧化层进行刻蚀，形成开关LDMOS器件的栅极结构，所述氧化层作为栅介质层，所述多晶硅层刻蚀成型构成开关LDMOS器件的多晶硅栅极；
步骤三，涂覆光刻胶，以光刻胶定义出体掺杂区的注入区域，刻蚀打开体掺杂区的注入窗口，进行体掺杂区的离子注入，形成所述开关LDMOS器件的体掺杂区；
步骤四，淀积氧化层或者氮化层，再进行刻蚀在所述开关LDMOS器件的栅极结构两侧形成栅极的侧墙；
步骤五，进行离子注入，形成重掺杂区，以制作开关LDMOS器件的源区、漏区。
11.如权利要求10所述的开关LDMOS器件，其特征在于：所述步骤三中，体掺杂区的形成是形成第二导电类型的第一体掺杂区；或者是分先后两个步骤既形成第二导电类型的第一体掺杂区又形成第一导电类型的第二体掺杂区；所述第一或者第二体掺杂区的离子注入为在光刻胶的定义下的自对准注入，注入能量无需考虑是否会打穿多晶硅层，以实现更高的注入结深，能根据击穿电压的需求进行调整；第一或者第二体掺杂区的自对准注入形成沟道区的工艺无需与其他器件结构的形成共享工艺，能提高注入剂量以提高沟道区表面杂质浓度，降低器件尺寸。
12.如权利要求10所述的开关LDMOS器件，其特征在于：所述步骤三及步骤六之后，在完成离子注入之后，还包括热退火激活步骤。
13.如权利要求10或11所述的开关LDMOS器件，其特征在于：所述的第一导电类型为P型，第二导电类型为N型；或者是，所述第一导电类型为N型，第二导电类型为P型。
14.如权利要求10所述的开关LDMOS器件，其特征在于：在所述步骤三之后，还可选地进行LDD注入步骤，根据实际应用需要，选择是否进行LDD注入工艺。
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