CN111312680B - Bearing plate of coreless packaging substrate and preparation method - Google Patents
Bearing plate of coreless packaging substrate and preparation method Download PDFInfo
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- CN111312680B CN111312680B CN201811519257.2A CN201811519257A CN111312680B CN 111312680 B CN111312680 B CN 111312680B CN 201811519257 A CN201811519257 A CN 201811519257A CN 111312680 B CN111312680 B CN 111312680B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
- H01L23/4924—Bases or plates or solder therefor characterised by the materials
Abstract
The application discloses bearing board and preparation method of coreless package substrate, the bearing board includes: a core layer; a peelable layer laminated on at least one surface of the core layer; the bearing plate is divided into a circuit area and a non-circuit area, the non-circuit area is provided with a containing part which penetrates through the peelable layer and extends to the core layer, and the containing part is used for containing a filling material so as to fix the peelable layer on the core layer through the filling material. Through the mode, the problem of unusual separation of loading board can be improved in this application.
Description
Technical Field
The present disclosure relates to the field of electronic packaging technologies, and in particular, to a carrier board with a coreless package substrate and a manufacturing method thereof.
Background
In the field of electronic packaging, in order to meet the requirements of miniaturization, thinning and high transmission of electronic packaging, package substrate enterprises are developing research, development and industrialization of products such as semi-additive technology, stack packaging technology, coreless technology, embedded circuit technology and the like. Of these, the coreless technology is a new technology route that is particularly attractive, and has the following advantages: 1) The manufacturing method can manufacture ultrathin products, the technical products do not contain a core plate layer, the thickness of the total plate thickness can be reduced by 40-60%, the bearing plate is used for protection in the manufacturing process, the mechanical damage of the plate in the manufacturing process of the products can be reduced, and the yield is obviously improved. 2) The technology can be used for manufacturing products with any layers (particularly odd layers), the technical products are not limited by the layer number design, and the structures with any layers such as even layers, odd layers and the like can be manufactured. 3) The manufacturing equipment can be combined with the traditional process production line, and expensive large-scale production equipment does not need to be purchased again. 4) The raw materials are mainly materials such as copper foil, dry films, prepregs and the like which are mature and produced in mass at present, and can be rapidly popularized and applied on the premise of ensuring cost control. Based on the advantages, the technology is widely applied to the fields of electronic packaging such as storage, radio frequency and the like.
In the coreless technology, since the substrate manufactured by the coreless process has no core layer, a carrier board is used for processing during the processing, and then the carrier board is removed after the main laminated structure and the circuit board pattern are completed. Referring to fig. 1, fig. 1 is a schematic structural diagram of a coreless circuit board in the prior art. The carrier board mainly includes a core layer 201, a first copper layer 101 disposed on two side surfaces of the core layer 201, a separation layer 301 disposed on a surface of the first copper layer 101, and a second copper layer 102 disposed on a surface of the separation layer 301. When the circuit board is manufactured, the bearing plate is laminated on the basis of the bearing plate to obtain the laminated layer 401 and the third copper layer 103, then the circuit layer is manufactured on the third copper layer 103, patterning processing is carried out on the circuit layer, or a laminated structure is manufactured on the third copper layer 103, and after the circuit board is manufactured, the bearing plate is removed by peeling the separation layer 301. In the long-term research and development process, the inventor of the application finds that the carrier has the characteristic of being separable, so that the circuit board is subjected to various physical or chemical actions such as conveying, cutting, drilling, etching, oxidizing, baking and the like in the processing process, the separation of the carrier plate cannot be effectively controlled, and the coreless product is scrapped due to the abnormal separation condition before the specific main laminated structure and the circuit board pattern are not completed.
In view of the above technical problems, some technical solutions have been proposed to solve the above technical problems, but other new problems may be brought about. For example, in one embodiment, a peelable adhesive product that loses its adhesion properties after being cured by heat is selected to achieve adhesion and separation between layers of the product. However, the scheme needs to introduce new materials with high cost and needs a special process to match the process scheme, and is limited in designing a heat treatment process and low in compatibility with common circuit board processes. In another embodiment, the first copper layer 101, the second copper layer 102, and the edge portion of the adhesion layer 301 are removed by chemical etching, so that the first copper layer 401 and the second copper layer 201 are connected to each other to enclose the area inside the fixed board. However, the scheme needs to introduce a set of complete technologies and matching materials for circuit board film pasting, exposure, etching and the like, and has the defects of long flow and high cost. Therefore, it is necessary to develop a new technology to solve the above technical problems.
Disclosure of Invention
The present application provides a carrier board with a coreless package substrate and a method for manufacturing the same, which can improve the problem of abnormal separation of the carrier board.
In order to solve the technical problem, the application adopts a technical scheme that: a carrier board for a coreless package substrate is provided, the carrier board comprising: a core layer; a peelable layer laminated on at least one surface of the core layer; the bearing plate is divided into a circuit area and a non-circuit area, the non-circuit area is provided with a containing part which penetrates through the peelable layer and extends to the core layer, and the containing part is used for containing a filling material so as to fix the peelable layer on the core layer through the filling material.
Wherein, the holding portion is a plurality of, and a plurality of holding portions are arranged around circuit district array in non-circuit district.
Wherein, the holding part is a through hole or a blind hole.
Wherein the strippable layer comprises a first copper layer, an adhesive layer and a second copper layer which are sequentially laminated and arranged on the surface of the core layer, wherein the adhesive layer is arranged to allow the second copper layer to be stripped from the first copper layer.
Wherein the carrier plate further comprises a filling material, which at least partially covers the side walls of the receiving portion.
In order to solve the above technical problem, another technical solution adopted by the present application is: a method of preparing a coreless package substrate is provided, the method comprising: providing a bearing plate, wherein the bearing plate comprises a core layer and a strippable layer which is arranged on at least one surface of the core layer in a laminating way; the bearing plate is divided into a circuit area and a non-circuit area, and the non-circuit area is provided with a containing part which penetrates through the peelable layer and extends to the core layer; filling a filling material in the accommodating part so as to fix the strippable layer on the core layer through the filling material; forming a circuit structure in the circuit area; separating the line area and the non-line area; and separating the peelable layer and the core layer in the line area to obtain the coreless packaging substrate containing the circuit structure.
Wherein the step of filling the filling material in the receptacle comprises: a pressure bonding layer is formed on the peelable layer, and is filled to the receiving portion using the pressure bonding layer as a filling material.
Wherein, holding portion is through-hole or blind hole, and holding portion is a plurality of, and a plurality of holding portions are arranged around circuit district array in non-circuit district, and it includes to provide the loading board step: providing a bearing plate with a peelable layer; and punching the non-circuit area of the bearing plate by utilizing a drilling machine processing mode to form a through hole/blind hole.
Wherein, the step of dividing the line area and the non-line area comprises: and performing edge milling on one side of the accommodating part close to the line area to divide the line area and the non-line area, and cutting off the non-line area containing the accommodating part.
Wherein the step of separating the peelable layer and the core layer in the line region comprises: and separating the peelable layer and the core layer by means of mechanical external force or chemical attack.
The beneficial effect of this application is: being different from the condition of prior art, this application provides a loading board, and the loading board is provided with holding portion, utilizes this holding portion and inside filler material can make the product in the course of working, and strippable layer is effectively fixed in sealed area, does not receive various physics or chemical action such as transport, cutting, impact drilling, etching, oxidation, toast, realizes the control of product adhesion and separation. Meanwhile, the product area in the board can be protected, physical or chemical damage caused by failure of the adhesion layer is avoided, and the yield and reliability of the product are improved. When the bearing plate provided by the application is used for protecting and supporting the process processing of the related product of the coreless circuit board, the structural strength of the finished product or semi-finished product of the product is obviously improved, and then the manufacturing of the ultrathin packaging substrate or circuit board is realized.
Drawings
FIG. 1 is a schematic diagram of a prior art coreless wiring board;
FIG. 2 is a schematic cross-sectional view illustrating a carrier plate of a coreless package substrate according to a first embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view illustrating a carrier plate of a coreless package substrate according to a second embodiment of the present invention;
FIG. 4 is a schematic plan view illustrating a carrier plate of a coreless package substrate according to a second embodiment of the present invention
Figure 5 is a schematic flow chart diagram illustrating a first embodiment of a method for fabricating a coreless package substrate according to the present application;
FIG. 6 is a schematic view illustrating a carrier plate formed in the coreless package substrate fabrication method of the present application;
FIG. 7 is a schematic view of a lamination layer formed in the coreless package substrate fabrication method of the present application;
figure 8 is a schematic plan view of a circuit region and a non-circuit region separated in a coreless package substrate fabrication method of the present application;
figure 9 is a schematic cross-sectional view of a circuit region and a non-circuit region separated in a coreless package substrate fabrication method of the present application;
figure 10 is a schematic cross-sectional view illustrating a circuit region and a non-circuit region separated therefrom according to a method for fabricating a coreless package substrate of the present application;
figure 11 is a schematic cross-sectional view of a peelable layer and a core layer separated in a coreless package substrate fabrication method of the present application.
Detailed Description
In order to make the purpose, technical solution and effect of the present application clearer and clearer, the present application is further described in detail below with reference to the accompanying drawings and examples.
The application provides a bearing plate of a coreless packaging substrate, which is used in a coreless technology packaging process to bear a main laminated structure for manufacturing the substrate or manufacture a circuit board pattern, and after the manufacture is finished, the bearing plate is removed.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a carrier board of a coreless package substrate according to a first embodiment of the present invention. In this embodiment, the carrier plate includes: a core layer 20 in which peelable layers 10 provided on at least one surface of the core layer 20 are laminated; the carrier board is divided into a circuit area and a non-circuit area, the non-circuit area is provided with a receiving portion 50 penetrating through the peelable layer 10 and extending to the core layer 20, and the receiving portion 50 is used for receiving a filling material so as to fix the peelable layer 10 on the core layer 20 through the filling material.
Specifically, in the coreless technology, since the substrate manufactured by the coreless process has no core layer, a carrier board is used for processing during the processing, and then the carrier board is removed after the main laminated structure or the circuit board pattern is completed. Therefore, the carrier plate needs to be provided with the peelable layer so as to be convenient for removing the carrier plate at the later stage, but due to the existence of the peelable layer, the circuit board is subjected to various physical or chemical actions such as conveying, cutting, drilling, etching, oxidation, baking and the like in the processing process, the separation of the carrier plate cannot be effectively controlled, and the coreless product is rejected due to the abnormal separation condition before the specific main laminated structure or circuit board pattern is not completed. This application is through setting up holding portion 50 on the loading board, and holding portion 50 is used for holding filler material, and filler material through holding portion 50 in will peel off layer 10 and be fixed in on the core layer 20 to reinforcing can peel off the firm of layer 10 with core layer 20, prevent the separation of anomaly.
The loading board comprises a circuit area and a non-circuit area, wherein the circuit area is used for manufacturing circuit board patterns in the area, namely a product area, the non-circuit area is an edge area outside the circuit area, and the non-circuit area cannot be used in the process of manufacturing a circuit structure or packaging and can be removed when a product is cut. The accommodating part 50 is arranged in the non-circuit area, and in the subsequent processing process, the stability of the peelable layer and the core layer is enhanced by using the filling material in the accommodating part 50, so that abnormal separation in the manufacturing process is prevented. After the manufacturing is completed, when the bearing plate needs to be removed, the area with the accommodating part 50 is cut off, the remaining product area is restored to the structure of the bearing plate which is easy to separate, the peelable layer is peeled off through external force, and the bearing plate can be removed to obtain a related product.
In this embodiment, by providing the accommodating portion, the strength of the product or semi-finished product structure can be enhanced by utilizing the fixing effect of the filling material in the accommodating portion on the peelable layer and the core layer; particularly, in the processing process of products, the strippable layer is effectively fixed in a closed area and is not subjected to various physical or chemical actions such as conveying, cutting, drilling, etching, oxidation, baking and the like, so that the control of adhesion and separation of the products is realized; meanwhile, the product area in the plate can be protected, physical or chemical damage caused by the failure of the strippable layer is avoided, and the yield and reliability of the product are improved.
Referring to fig. 3 and 4, fig. 3 is a schematic structural view of a carrier board of a coreless package substrate according to a second embodiment of the present invention; fig. 4 is a schematic plan view illustrating a carrier board of a coreless package substrate according to a second embodiment of the present invention. In this embodiment, the carrier plate comprises a core layer 201, peelable layers disposed on both side surfaces of the core layer 201, the peelable layers comprising a first copper layer 101, an adhesive layer 301 and a second copper layer 102 sequentially stacked disposed on a surface of the core layer 201, wherein the adhesive layer 301 is disposed to allow peeling of the second copper layer 102 from the first copper layer 101. The carrier board is divided into a circuit area and a non-circuit area, the non-circuit area is provided with a containing part 500 which penetrates through the peelable layer and extends to the core layer 201, and the containing part 500 is used for containing a filling material so as to fix the peelable layer on the core layer 201 through the filling material. The accommodating parts 500 are through holes, blind holes or other structures capable of realizing layer-to-layer communication, the accommodating parts 500 are multiple, and the accommodating parts 500 are arranged in a non-circuit area in a surrounding manner of a circuit area array.
The bonding layer 301 is an organic adhesive or an alloy material, so that it can bond the first copper layer 101 and the second copper layer 102 and also allow the second copper layer 102 to be separated from the first copper layer 101 by an external force.
The accommodating part 500 is a through hole penetrating through the peelable layers and the core layer 201 on two sides, and is provided with a plurality of accommodating parts 500, the accommodating parts 500 are arranged around the circuit area in an edge array of the bearing plate, so that the overall structural performance can be enhanced, and the subsequent removal process is easy to operate.
Wherein the carrier plate further comprises a filling material at least partially covering the side walls of the receiving portion 500. That is, the filling material in the accommodating portion 500 may be pre-filled, or the accommodating portion 500 may be filled with a layer-adding material in a subsequent layer-adding process. The filling material may be an adhesive with high viscosity, and the filling material should at least partially cover the sidewall of the accommodating portion 500, i.e. can effectively adhere the peelable layer and the core layer, so as to fixedly connect the two layers.
Based on the above-mentioned structure of the carrier board, the present application further provides a method for manufacturing a coreless package substrate, in which the carrier board with the accommodating portion is used, thereby improving the yield and reliability of the product.
Referring to fig. 5, fig. 5 is a schematic flow chart illustrating a method for fabricating a coreless package substrate according to a first embodiment of the present application. In this embodiment, the method of manufacturing a coreless package substrate includes the steps of:
s501: providing a bearing plate; the bearing plate comprises a core layer and a strippable layer which is arranged on at least one surface of the core layer in a laminating way; the bearing plate is divided into a circuit area and a non-circuit area, and the non-circuit area is provided with a containing part which penetrates through the peelable layer and extends to the core layer.
For the specific structure of the carrier plate, please refer to the description of the above embodiments, which is not repeated herein. The bearing plate can be purchased and used directly; or purchasing a conventional bearing plate with a peelable layer, and then processing the bearing plate to form a containing part; it is also possible to prepare the carrier plate stepwise starting from the initial starting material.
S502: and filling a filling material in the accommodating part so as to fix the strippable layer on the core layer through the filling material.
Wherein, in the subsequent layer-increasing process, the accommodating part can be filled with the layer-increasing material. Of course, the receiving portion may be directly filled after the receiving portion is formed, and the filling material may be a highly adhesive agent or the like, and when filling, the filling material may cover at least a part of the side wall of the receiving portion, that is, may contact at least the peelable layer and the core layer at the same time, so as to fix the two layers.
S503: and forming a circuit structure in the circuit area.
The processing of electronic products such as circuit boards, package substrates and the like can be carried out.
S504: separating the line area and the non-line area.
The line area and the non-line area are separated by using an edge milling operation mode or other processing modes capable of realizing material segmentation. The accommodating part with the reinforcing and fixing function is removed, so that the circuit area can recover a separable structure, and the bearing plate can be conveniently removed in the subsequent process.
S505: and separating the peelable layer and the core layer in the line area to obtain the coreless packaging substrate containing the circuit structure.
Wherein, physical action modes such as external force and the like or other processing modes for realizing the separation between layers are utilized to separate the peelable layer and the core layer in the circuit area. Namely, the bearing plate is separated and removed, and a product without the core layer is obtained.
In this embodiment, by using a carrier plate having a receiving portion, the strength of the product or semi-finished product structure can be enhanced by the fixing effect of the filling material in the receiving portion on the peelable layer and the core layer; particularly, in the processing process of products, the strippable layer is effectively fixed in a closed area and is not subjected to various physical or chemical actions such as conveying, cutting, drilling, etching, oxidation, baking and the like, so that the control of adhesion and separation of the products is realized; meanwhile, the product area in the plate can be protected, physical or chemical damage caused by the failure of the strippable layer is avoided, and the yield and reliability of the product are improved. Compared with the prior art, the method only needs to add one more process for separating the circuit area from the non-circuit area, and has the advantages of simplicity, short flow and low cost.
Referring to fig. 6-11, the method for fabricating the coreless package substrate will be described in detail.
A carrier plate 700 is prepared.
Referring to fig. 6, fig. 6 is a schematic view illustrating a carrier board formed in the coreless package substrate manufacturing method of the present application. The carrier plate 700 includes a core layer 201, peelable layers disposed on both side surfaces of the core layer 201, the peelable layers including a first copper layer 101, an adhesive layer 301, and a second copper layer 102 sequentially stacked on a surface of the core layer 201.
In one embodiment, the core layer 201 is a resin material containing glass fibers, the first copper layer 101 and the second copper layer 102 are aluminum foil layers, and the adhesive layer 301 is an organic adhesive, such as an epoxy resin or polyimide based adhesive; the bearing plate 700 can be prepared by a compression method, specifically: preparing a core layer material, a first aluminum foil, an organic binder and a second aluminum foil, sequentially placing the material layers, and then laminating to form the bearing plate 700. The laminating method can be a hot laminating method, the thickness of the first copper layer 101 and the second copper layer 102 is 1-15 micrometers, and the thickness of the bonding layer 301 is 5-15 micrometers.
In another embodiment, the core layer 201 is a resin material containing glass fiber, the first copper layer 101 and the second copper layer 102 are copper-plated layers, and the adhesive layer 301 is a metal or alloy material; the carrier plate 700 can be prepared by electroplating, specifically: electroplating copper on the surface of the core layer material to form a first copper layer 101, electroplating alloy on the first copper layer 101 to form an adhesive layer 301, and electroplating copper on the alloy layer 301 to form a second copper layer 102; the first copper layer 101 and the second copper layer 102 are bonded and fixed by using the bonding force between the alloy layer 301 and the copper plating layer, and the first copper layer 101 and the second copper layer 102 can be separated under the action of an external force. In other embodiments, the carrier board may also be a copper-clad board, a steel plate, or a copper plate, or other sheet materials with strength, rigidity, and expansion coefficient matching with a circuit board (PCB), or sheet materials with expansion coefficient and strength enough to support the processing of the circuit board may be used as the carrier board.
The accommodating part is formed on the carrier plate 700.
The receiving portion 500 is formed in a non-circuit area (e.g., an edge of the board) of the carrier board 700 by a drilling machine or other processing method capable of communicating between layers. The accommodating portion 500 is a through hole penetrating through the peelable layers on both sides of the core layer 201, or a blind hole penetrating through the peelable layers on only one side and extending to the core layer.
Specifically, the processing positions of the accommodating portions 500 are marked on the non-circuit area of the carrier board 700, where the accommodating portions 500 are multiple, and the accommodating portions 500 are arranged in an array around the circuit area at the edge of the carrier board to form a set of hole chain structure around the circuit area (as shown in fig. 4). Starting from the first copper layer, a through-hole is machined at the machining site through the carrier plate (as shown in fig. 3) or only through the peelable layer to the core layer (as shown in fig. 2) using laser drilling techniques. The first copper layer may be etched and windowed at the processing position, and laser drilling may be performed after the bonding layer is exposed.
A pressure layer is formed on the peelable layer, and the receiving portion is filled with the pressure layer as a filling material.
Referring to fig. 7, fig. 7 is a schematic view illustrating a lamination layer formed in the coreless package substrate manufacturing method of the present application. The bearing plate 700 is laminated and laminated by a press to obtain a laminated layer 401, wherein the laminated layer is a prepreg and the material is a resin material containing glass fibers. At the time of press-fitting, the accommodating part 500 is filled or covered with a press-fitting material to close an area inside the fixing plate, and the thickness of the press-fitting layer 401 is 25 to 30 μm.
In another embodiment, the accommodating portion may be filled before the lamination, the filling material may be a highly adhesive, and the filling material at least partially covers the sidewall of the accommodating portion during filling, that is, the peelable layer and the core layer can be contacted at least at the same time to fix the two layers. The stability of the bearing plate can be further enhanced by filling the filling material with stronger cohesiveness.
Wherein, in the lamination process, the third copper layer 103 is formed at the same time for disposing a circuit layer or a laminated structure on the third copper layer 103. The third copper layer is a single-layer copper foil, the thickness of the third copper layer is 5-15 microns, the accommodating part can be seen through, and the follow-up tracking cutting of the accommodating part is facilitated.
And forming a circuit structure in the circuit area.
Wherein a wiring layer is provided on the third copper layer 103, patterned, or a laminate structure is made on the third copper layer. The method is not limited herein, and may be used for manufacturing electronic products such as circuit boards, package substrates, and the like.
Separating the line area and the non-line area.
When the arrangement of the main circuit structure is completed and the bearing plate needs to be removed, the circuit area and the non-circuit area are separated. Referring to fig. 8-10, fig. 8 is a schematic plan view illustrating a circuit area and a non-circuit area in the coreless package substrate manufacturing method of the present application, fig. 9 is a schematic cross-sectional view illustrating the circuit area and the non-circuit area in the coreless package substrate manufacturing method of the present application, and fig. 10 is a schematic cross-sectional view illustrating the circuit area after the circuit area and the non-circuit area are separated in the coreless package substrate manufacturing method of the present application. The bonding layer in the circuit area is exposed by separating the circuit area 600 from the non-circuit area by edge milling or other processing methods that can achieve material separation.
Specifically, a marking cutting line 501 (as shown in fig. 8) is designed between the circuit region 600 and the accommodating portion 500, and the carrier board is cut along the cutting line 501 by a laser cutting method or a mechanical cutting method to remove the non-circuit region with the accommodating portion, so that the adhesive layer of the circuit region 600 is exposed (as shown in fig. 9-10).
And separating the peelable layer and the core layer in the line area to obtain the coreless packaging substrate containing the circuit structure.
Referring to fig. 11, fig. 11 is a schematic cross-sectional view illustrating separation of a peelable layer and a core layer in a coreless package substrate fabrication method according to the present application. The second copper layer 102 and the adhesion layer 301 are separated by mechanical force, chemical attack, or other processing that can effect layer-to-layer separation.
Specifically, after the non-circuit area is separated and removed, the reinforcing and fixing effect of the filling material in the accommodating part on the bearing plate is removed, so that the bonding layer is exposed, the bonding layer 301 can be disabled through external acting force, and the product is separated from the upper part and the lower part of the bearing plate to obtain a finished product or a semi-finished product.
Above scheme, the loading board that this application provided is provided with the holding portion, utilizes this holding portion and inside filler material can make the product in the course of working, and the adhesion layer is effectively fixed in closed region, does not receive various physics or chemical action such as transport, cutting, impact drilling, etching, oxidation, toast, realizes the control of product adhesion and separation. Meanwhile, the product area in the board can be protected, physical or chemical damage caused by failure of the adhesion layer is avoided, and the yield and reliability of the product are improved. When the bearing plate provided by the application is used for protecting and supporting the process processing of related products of the coreless circuit board, the structural strength of finished products or semi-finished products of the products is obviously improved, and further the manufacturing of ultrathin packaging substrates or circuit boards is realized.
The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.
Claims (9)
1. A carrier board for a coreless package substrate, the carrier board comprising:
a core layer;
a peelable layer laminated on at least one surface of the core layer;
the bearing plate is divided into a circuit area and a non-circuit area, and the non-circuit area is provided with a containing part which penetrates through the peelable layer and extends to the core layer;
and the filling material is accommodated in the accommodating part and at least partially covers the side wall of the accommodating part so as to fix the peelable layer on the core layer through the filling material.
2. The carrier plate according to claim 1, wherein the accommodating portion is a plurality of accommodating portions arranged around the circuit region array in the non-circuit region.
3. The carrier plate according to claim 1, wherein the accommodation portion is a through hole or a blind hole.
4. The carrier board according to claim 1, wherein the peelable layer comprises a first copper layer, an adhesive layer and a second copper layer, which are arranged in sequence on a surface of the core layer, wherein the adhesive layer is arranged to allow peeling of the second copper layer from the first copper layer.
5. A method for preparing a coreless package substrate, the method comprising:
providing a bearing plate, wherein the bearing plate comprises a core layer and a strippable layer which is arranged on at least one surface of the core layer in a laminating way; the bearing plate is divided into a circuit area and a non-circuit area, and the non-circuit area is provided with a containing part which penetrates through the peelable layer and extends to the core layer;
filling a filling material in the accommodating part, so that the filling material is accommodated in the accommodating part and at least partially covers the side wall of the accommodating part, and the strippable layer is fixed on the core layer through the filling material;
forming a circuit structure in the circuit area;
separating the line area and the non-line area;
and separating the peelable layer and the core layer in the circuit area to obtain the coreless packaging substrate containing the circuit structure.
6. The method of claim 5, wherein the step of filling the filling material in the receiving portion comprises:
forming a lamination layer on the peelable layer, and filling the receiving portion with the lamination layer as the filling material.
7. The method as claimed in claim 5, wherein the receiving portion is a plurality of receiving portions arranged around the circuit region array in the non-circuit region, the providing the carrier plate comprises:
providing a bearing plate with a peelable layer;
and punching the non-circuit area of the bearing plate by utilizing a drilling machine processing mode to form the through hole/blind hole.
8. The method of manufacturing the coreless package substrate of claim 5, wherein the separating the circuit area and the non-circuit area includes:
and performing edge milling on one side of the accommodating part close to the circuit area to separate the circuit area from the non-circuit area, and cutting off the non-circuit area containing the accommodating part.
9. The method of manufacturing the coreless package substrate of claim 5, wherein the peelable layer and the core layer in the separation line region include:
and separating the strippable layer from the core layer by means of mechanical external force or chemical erosion.
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| CN1075338C (en) * | 1993-09-21 | 2001-11-21 | 松下电器产业株式会社 | Connecting member of a circuit substrate and method of manufacturing multilayer circuit substrates by using the same |
| KR101013992B1 (en) * | 2008-12-02 | 2011-02-14 | 삼성전기주식회사 | Manufacturing method of Printed Circuit Board |
| CN102194703A (en) * | 2010-03-16 | 2011-09-21 | 旭德科技股份有限公司 | Circuit substrate and manufacturing method thereof |
| CN103871996A (en) * | 2012-12-11 | 2014-06-18 | 宏启胜精密电子(秦皇岛)有限公司 | Package structure and manufacturing method thereof |
| CN107241876B (en) * | 2016-03-28 | 2019-05-07 | 上海美维科技有限公司 | A kind of no core plate single side is sunken cord the processing method of printed circuit board |
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