CN111277251B - Self-triggering power supply control low-power consumption front end reading circuit - Google Patents
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Abstract
The invention provides a self-triggering power supply control low-power consumption front-end reading circuit which is suitable for a portable electronic personal dosimeter. The comparator and the self-triggering power supply control module are added to monitor the triggering event generated by the radiation event, and automatic power supply management of part of the modules is realized by setting different working modes, so that the static power consumption generated when the front-end reading circuit does not detect an effective input signal is effectively reduced, and the working time of the electronic personal dosimeter is prolonged. The invention can also be used in front-end sensing circuit designs for other applications.
Description
Technical Field
The invention belongs to the field of radiation detection front-end reading, and particularly relates to a self-triggering power supply control low-power consumption front-end reading circuit which is suitable for a front-end reading special integrated circuit of a radiation detector in an electronic personal dosimeter and is also suitable for other nuclear radiation detection applications.
Background
The electronic system of the electronic personal dosimeter for detecting X-ray and gamma-ray radiation mainly comprises a front-end electronic system and a Liquid Crystal Display (LCD), as shown in figure 1. The front-end electronic system mainly comprises a battery, a low dropout regulator (LDO), a radiation detector, a front-end reading Application Specific Integrated Circuit (ASIC) and a Microcontroller (MCU). The front-end readout ASIC is a core electronic component of a front-end electronic system, has the function of reading and processing a weak current signal generated by a radiation detector, and is very important for improving the overall performance of a personal dosimeter. The working principle of the electronic personal dosimeter is as follows: firstly, X or gamma rays in the environment enter a detector, interact with detector materials to generate electron hole pairs, directionally move under the action of an electric field to form weak current pulse signals, the electric signals are read out, amplified, shaped, filtered and digitized through a front end reading ASIC, the output digital signals are collected and analyzed and processed by a microprocessor MCU (microprogrammed control Unit), useful information such as the energy loss of radiation rays and event counting rate is obtained, then the useful information is converted into radiation dose through a special algorithm, and the information is displayed on a liquid crystal display screen.
As a portable device, a personal dosimeter is required to operate continuously for more than 100 hours by using a battery, and the power consumption of the whole system is required to be as low as possible. In personal dosimeter electronics systems, the power consumption of the front-end readout circuitry ASIC is a major contributor. Documents "y.duan, y.yao, z.li, j.zhou, p.huang, and w.gao," SENSROC12: a Four-Channel Binary-Output Front-End read ASIC for Si-PIN-based Personal instruments, "IEEE Transactions on Nuclear Science, vol.66, no.4, pp.1976-1983.2019", describes a conventional Front-End read ASIC structure, as shown in fig. 2, which comprises a preamplifier for amplifying a signal Output by a detector, a shaper for filtering and shaping an Output signal of the preamplifier, a discriminator for generating a trigger signal, and an internal bandgap reference circuit for providing dc operating points for respective modules of a read path to ensure that the circuit operates normally. During normal operation, the static power consumption of the read-out path can be controlled by P channel ＝VDDA·I channel Is given in which channel Total quiescent current for a single sense path, according to I channel ＝I CSA +I Shaper +I DISCR Is calculated to obtain CSA 、I Shaper And I DISCR Respectively, the quiescent currents of the preamplifier, shaper and discriminator circuit modules, VDDA is the analog supply voltage. In practical application, the front-end readout ASIC in the literature is subjected to dynamic power management by the MCU, and power is down in a sleep mode without generating power consumption. However, when the personal dosimeter is operating normally, the MCU control signal turns on the power supply voltage switch to power the front end readout ASIC. Since the X-or gamma-rays emitted by the radiation source are discrete, the time interval between the two events is random, and the front-end readout ASIC is in a standby state during this time interval, which results in unnecessary static power consumption, resulting in reduced standby time for the battery-powered personal dosimeter. Therefore, a new low power consumption technology is required to solve the above problems.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a self-triggering power supply control low-power consumption front-end reading circuit which is suitable for a portable electronic personal dosimeter. The comparator and the self-triggering power supply control module are added to monitor the triggering event generated by the radiation event, and the automatic power supply management of part of the modules is realized by setting different working modes, so that the static power consumption generated when the front-end reading circuit does not detect an effective input signal is effectively reduced, and the working time of the electronic personal dosimeter is prolonged. The invention can also be used in front-end sensing circuit designs for other applications.
A self-triggering power supply control low-power consumption front-end reading circuit comprises a preamplifier, a shaper, a discriminator and an internal band-gap reference circuit, wherein the preamplifier is used for amplifying a signal output by a detector, the shaper is used for filtering and shaping an output signal of the preamplifier, the discriminator is used for generating a triggering signal, and the internal band-gap reference circuit provides a direct current working point for each module of the reading circuit, and is characterized in that: the reading circuit also comprises a comparator and a self-triggering power supply control module, wherein the comparator compares the output signal of the preamplifier with the triggering threshold voltage and outputs a result signal to the self-triggering power supply control module, and the self-triggering power supply control module detects and controls the switch S according to the output signal of the comparator and the output signal of the discriminator 1 、S 2 And S 3 To realize the switching of the working mode of the reading circuit, wherein the switch S 1 Controlling make or break of former, switch S 2 Controlling the connection or disconnection of the discriminator, switch S 3 And controlling the connection or disconnection of the comparator.
The front-end reading circuit comprises two working modes of a detection mode and a normal working mode, wherein in the detection mode, the self-triggering power supply control module controls the switch S 3 Closed, switch S 1 And S 2 Opening; under normal working mode, self-triggering power supply control module switch S 3 Open, switch S 1 And S 2 And (5) closing.
The operation process of the front-end readout circuit as described above is as follows: after power-on initialization, an output signal D of the self-triggering power supply control module mode To 1, make switch S 3 Closed, output signal two N mode To 0, make switch S 1 、S 2 In the open state, the readout circuit is in the detection mode;
the output signal of the preamplifier CSA is less than the trigger threshold voltage V TH When the output signal Trig _ D of the comparator is at a low level, the shaper and the discriminator are turned off, only the preamplifier CSA, the comparator and the self-triggering power supply control module work, and the reading circuit continues to work in a detection mode;
the output signal of the preamplifier CSA is greater than the trigger threshold voltage V TH When the output signal Trig _ D of the comparator is in high level, the self-triggering power supply control module detects the rising edge of the Trig _ D and outputs a second output signal N mode Set to 1, make switch S 1 And S 2 Closed, outputting a signal one D mode Set to 0, make switch S 3 When the circuit is turned on, the comparator does not work, all other modules work normally, and the reading circuit enters a normal working mode;
under a normal working mode, the self-triggering power supply control module simultaneously detects the output signal Trig _ N of the discriminator, when the signal Trig _ N is detected to generate a falling edge, N clock cycles are delayed, and whether the next waveform of the signal Trig _ N is generated or not is detected in the periodRising edge, if the signal Trig _ N is still low level, the self-triggering power supply control module outputs a signal two N mode Set to 0, make switch S 1 And S 2 On, output a signal Dmode 1 Make the switch S 3 And closing the circuit, and enabling the reading circuit to enter a detection mode, otherwise, enabling the reading circuit to be in a normal working mode continuously.
The invention has the beneficial effects that: due to the self-triggering power supply control module, automatic power supply management of part of analog circuits can be realized, and the total power consumption of the front-end reading circuit ASIC is further reduced, so that the personal dosimeter is ensured to work at ultralow power consumption in the time interval of a radiation-free event, and the working time is prolonged.
Drawings
Fig. 1 is a block diagram of the front-end electronics system of an electronic personal dosimeter;
FIG. 2 is a conventional front-end readout ASIC architecture for an electronic personal dosimeter;
in the figure, vref-threshold comparison voltage at the input of the discriminator;
FIG. 3 is a low power front end readout ASIC architecture for self-triggered power supply control of the present invention;
in the figure, VDD is the power supply voltage of the digital circuit, and CLK is the clock signal of the self-triggering power supply control module;
FIG. 4 is a timing diagram of a self-triggering power supply control module;
FIG. 5 is a specific implementation topology of the bias module of the internal reference circuit and the sensing circuit;
in the figure, AMP is an amplifier in an internal reference generation circuit, and R is a resistor in an internal reference generation circuit;
FIG. 6 is a circuit topology of a front-end sense path;
in the figure, R f -feedback resistance of the preamplifier circuit, R 1 Resistance of the differentiating circuit in the shaper, R 2 Resistance in the integrator circuit of the shaper, C f -feedback capacitance of the preamplifier circuit, C 1 Capacitance in the differentiating circuit in the shaper, C 2 -a capacitance in an integrating circuit in the shaper;
FIG. 7 is a core amplifier topology of a preamplifier and shaper;
in the figure, the GNDA-input tube M 0 Source voltage and fold M 1 Gate voltage of M 0 -M 5 -MOS transistors in the core amplifier circuit topology of the preamplifier and shaper;
FIG. 8 is a topology of a discriminator circuit;
in the figure, VINP-discriminator positive input terminal, VINN-discriminator negative input terminal, VSSA-analog power supply voltage, VBP-bias voltage of first-stage tail current tube, VBN 1-bias voltage of first-stage current mirror, VBN 2-bias voltage of second-stage tail current tube, M0-M6-MOS transistor in first-stage circuit topology of discriminator, M7-M15-MOS transistor in second-stage circuit topology of discriminator, md1-Md 4-MOS transistor in third-stage circuit topology of discriminator;
FIG. 9 is a circuit topology of a self-biased comparator;
in the figure, the positive input of the VINP self-biased amplifier, the negative input of the VINN self-biased amplifier, M 30 -M 32 -a MOS transistor in a self-biased comparator circuit topology;
FIG. 10 is a state machine of the self-triggering power supply control module of the present invention;
in the figure, REST-reset signal, IDLE-initial state of the state machine, detection Mode-detection Mode, normal Mode-Normal operation Mode;
FIG. 11 is a flow chart of a Verilog code implementation of the self-triggering power supply control module of the present invention;
FIG. 12 is a simulation diagram of the read channel power consumption of the low power front end read ASIC of the present invention.
Detailed Description
The present invention will be further described with reference to the following drawings and examples, which include, but are not limited to, the following examples.
As shown in fig. 3, the low power consumption front-end readout circuit of the self-triggered power supply control of the present invention adds a comparator and a self-triggered power supply control module on the basis of the conventional front-end readout circuit shown in fig. 2. The comparator willThe output signal of the preamplifier is compared with the trigger threshold voltage and the result signal is output to the self-trigger power supply control module, the self-trigger power supply control module detects the output signals of the comparator and the discriminator, and outputs control signals according to the detected signals to respectively control the switch S 1 、S 2 And S 3 The switching on and off of the front-end reading circuit is carried out, the conversion of the working mode is carried out, and the dynamic power management of partial modules in the front-end reading circuit is realized. The front-end readout circuit of the present invention includes two modes of operation: a detection mode and a normal working mode. In the detection mode, switch S 3 Is closed and switch S 1 And S 2 Opening; in normal operating mode, switch S 3 Is opened and switch S 1 And S 2 And (5) closing. Output signal D of self-triggering power supply control module mode Controls the opening and closing of the switch S3 and outputs a signal two N mode Control switch S 1 And S 2 Opening and closing.
(1) Detection mode
After power-on initialization, an output signal D of the self-triggering power supply control module mode To 1, make switch S 3 Closed and output signal two N mode To 0, make switch S 1 、S 2 In the on state when the sensing circuit is in the sense mode. The output signal of the preamplifier CSA is less than the trigger threshold voltage V TH And when the output end of the comparator does not generate an effective output signal, the Trig _ D is at a low level, and the comparator continues to work in the detection mode. At this time, the shaper and the discriminator are turned off, only the preamplifier CSA, the comparator and the self-triggering power supply control module work, and the static power consumption of the front-end readout circuit in the detection mode can be represented by the following formula:
P′ total ＝P′ channel +P′ control (1)
P′ channel ＝VDDA·I′ channel (2)
I′ channel ＝I CSA +I CMP (3)
wherein, I' channel For reading in detection modeTotal quiescent current of output circuit, P' channel To read out the static power consumption, P ', of the circuit in detection mode' control Is the total power consumption, P 'of the self-triggering power supply control module' total Is the total power consumption in the detection mode.
Compared with the circuit structure shown in fig. 2, the above formula shows that the static power consumption of the front-end readout ASIC of the present invention is reduced in the detection mode.
(2) Normal mode of operation
The output value of the current amplifier CSA is greater than the threshold voltage V TH When the comparator outputs an effective signal Trig _ D, and after the self-triggering power supply control module detects the rising edge of the Trig _ D, the output signal two N of the self-triggering power supply control circuit mode Becomes 1, making switch S 1 And S 2 Closed to output a signal D mode To 0, make switch S 3 And (4) opening. At the moment, the comparator does not work, all other modules work normally, and the front end reads out the ASIC to enter a normal working mode. In the normal operation mode, the total power consumption P ″' of the front-end readout circuit total Can be expressed as:
P″ total ＝P channel +P′ control (4)
in the normal operation mode, the self-triggered power supply control circuit simultaneously monitors the discriminator output signal Trig _ N. Delaying N clock cycles after the output signal Trig _ N of the discriminator generates a falling edge to ensure the output signal of the discriminator to be stable, simultaneously detecting the rising edge of the next Trig _ N waveform in the N clock cycles, if no effective Trig _ N signal exists, the Trig _ N is a low level, and the self-triggering power supply control circuit outputs two N output signals mode Set to 0, make switch S 1 And S 2 Open, output signal one D mode To 1, make switch S 3 Closed and the sensing circuit enters a sensing mode. Otherwise, the sensing circuit continues to operate in the normal mode.
The overall timing of the self-triggering power supply control module is shown in fig. 4. When the output signal Trig _ D of the comparator jumps from 0 to 1, the switch S is controlled at the rising edge of the next clock 3 D of (A) mode Signal becomes 0, controlling switch S 1 And S 2 N of (A) mode The signal becomes 1 and the read circuit enters the normal operating mode. Delaying N clock cycles after the falling edge of the output signal Trig _ N of the discriminator, when the output end of the discriminator does not generate effective output signals in the N clock cycles, namely the output signal Trig _ N is in low level, changing the Flag signal from 0 to 1, and D is at the rising edge of the next clock mode Signal becomes 1,N mode The signal changes to 0 and the flag signal changes from 1 to 0 and the read circuit enters the detection mode. When the rising edge jump of the output signal Trig _ D of the comparator is detected again, the reading circuit enters a normal working mode. After the read-out circuit is powered on and initialized, D mode Signal is changed into 1,N mode The signal becomes 0 and the flag signal is 0.
Specific implementations of the bias blocks of the internal reference circuit and the sensing circuit are shown in fig. 5, and the internal bandgap reference circuit can be implemented using a conventional bipolar transistor bandgap structure. Internal bandgap reference circuit generating reference current I vref Then, the reference current generates bias voltages Vp _ bias and Vn _ bias for normal operation of the readout circuit module through the bias circuit of each module of the readout circuit. The bias circuit of each module of the readout circuit and each module of the readout circuit jointly form the readout circuit.
The overall implementation of the readout circuit is shown in fig. 6, and the core amplifiers OTA1 and OTA2 of the preamplifier and shaper can realize low power consumption and large gain-bandwidth product by using the folded cascode structure shown in fig. 7. The discriminator is implemented by using a three-stage high-resolution comparator with a hysteresis function as shown in fig. 8, and can suppress noise. The comparator is realized by adopting the comparator with the self-bias structure shown in fig. 9, so that low power consumption can be ensured, and meanwhile, the occupied area of the layout is small. Input tube M of preamplifier 0 The width-to-length ratio of (a) is determined by the detector capacitance of the personal dosimeter, and the values of the resistance and capacitance in the shaper are determined by the shaping time.
A state machine that may be derived from triggering the power control module in conjunction with the timing diagram of fig. 4 is shown in fig. 10.
When the system is powered on and reset, the system enters an IDLE state and then enters a detection Mode state, when a valid Trig _ D signal is detected, the system enters a Normal Mode state, when a Trig _ N signal is not detected in N clock cycles, the system enters the detctingmode state again, and if an unknown state occurs, the system enters the IDLE state.
And (3) combining the timing diagram of fig. 4 and the state machine of fig. 10 to realize Verilog, then using RC to synthesize and generate a gate-level netlist, and finally using ENCOUNTER to generate a specific layout. A flow chart of Verilog code implementation of the self-triggering power supply control module is shown in fig. 11.
The simulation result of the single-channel power consumption of the self-triggering power supply controlled low-power consumption front end readout circuit ASIC of the present invention is shown in fig. 12. When no effective trigger signal is generated, the static power consumption of the front-end reading circuit in the detection mode is 1.73mW; when a valid trigger signal is generated, the static power consumption of the front-end readout circuit in the normal operation mode is 3.18mW. Under the two working modes, when the clock frequency is 2MHz, the total power consumption introduced by the self-triggering power supply control module is 0.2mW. In the radiation event process of 0-12 ms, through SPICE simulation, the energy consumed by the invention is 7.6 multiplied by 10 -9 And nJ. While the Front-End Readout circuit in the document "Y.Duan, Y.Yao, Z.Li, J.Zhou, P.Huang, and W.Gao," SENSOR 12: a Four-Channel Binary-Output Front-End Readout ASIC for Si-PIN-based Personal instruments, "IEEE Transactions on Nuclear Science, vol.66, no.4, pp.1976-1983.2019" has a total power consumption of 3.18mW and an energy consumption of 10.5 × 10 -9 And nJ. That is, the invention reduces the energy consumed in the radiation events set under simulation conditions by 27.6%.
Claims (1)
1. A self-triggering power supply control low-power consumption front-end reading circuit comprises a preamplifier, a former, a discriminator and an internal band-gap reference circuit, wherein the preamplifier is used for amplifying a signal output by a detector, the former is used for filtering and forming an output signal of the preamplifier, the discriminator is used for generating a triggering signal, and the internal band-gap reference circuit provides a direct current working point for each module of the reading circuit: the reading circuit also comprises a comparator and a self-triggering power supply control module, wherein the comparator compares the output signal of the preamplifier with the triggering threshold voltage and outputs a result signal to the self-triggering power supply control module, and the self-triggering power supply control module detects and controls the switch S according to the output signal of the comparator and the output signal of the discriminator 1 、S 2 And S 3 To effect switching of the operating mode of the read-out circuit, wherein the switch S 1 Controlling make or break of former, switch S 2 Controlling the connection or disconnection of the discriminator, switch S 3 Controlling the connection or disconnection of the comparator;
the reading circuit comprises two working modes of a detection mode and a normal working mode, wherein in the detection mode, the self-triggering power supply control module controls the switch S 3 Closed, switch S 1 And S 2 Opening; under normal working mode, self-triggering power supply control module switch S 3 Open, switch S 1 And S 2 Closing;
the working process of the reading circuit is as follows: after power-on initialization, output signal D of self-triggering power supply control module mode To 1, make switch S 3 Closed, output signal two N mode To 0, make switch S 1 、S 2 In the open state, the readout circuit is in the detection mode;
the output signal of the preamplifier CSA is less than the trigger threshold voltage V TH When the output signal Trig _ D of the comparator is at a low level, the shaper and the discriminator are turned off, only the preamplifier CSA, the comparator and the self-triggering power supply control module work, and the reading circuit continues to work in a detection mode;
the output signal of the preamplifier CSA is greater than the trigger threshold voltage V TH When the output signal Trig _ D of the comparator is in high level, the self-triggering power supply control module detects the rising edge of the Trig _ D and outputs a second output signal N mode Set to 1, make switch S 1 And S 2 Closed, outputting a signal one D mode Set to 0, make switch S 3 When the circuit is turned on, the comparator does not work, all other modules work normally,the reading circuit enters a normal working mode;
under a normal working mode, the self-triggering power supply control module simultaneously detects the output signal Trig _ N of the discriminator, when the signal Trig _ N is detected to generate a falling edge, N clock cycles are delayed, whether the next waveform of the signal Trig _ N generates a rising edge or not is detected in the period, and if the signal Trig _ N is still low level, the self-triggering power supply control module outputs a signal two N mode Set to 0, make switch S 1 And S 2 On, output a signal Dmode 1 Make the switch S 3 And closing the circuit, and enabling the reading circuit to enter a detection mode, otherwise, enabling the reading circuit to be continuously in a normal working mode.
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| Advances in front-end readout ASIC design for PET imaging;Wu Gao;《2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology》;20130221;1-4 * |
| Peak hold monolithic integrated circuit with built-in shaping amplifier for hard X-ray detector;K. Tsukada;《IEEE Transactions on Nuclear Science》;19930831;724-728 * |
| 低功耗硅探测器前端读出电路设计与性能分析;刘珍超;《中国优秀硕士学位论文全文数据库信息科技辑》;20110815;I135-79 * |
| 制冷型红外焦平面前端读出电路设计;廖峻;《中国优秀硕士学位论文全文数据库信息科技辑》;20120815;I135-15 * |
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