CN111262537A - Transconductance amplifier - Google Patents
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- CN111262537A CN111262537A CN202010215016.XA CN202010215016A CN111262537A CN 111262537 A CN111262537 A CN 111262537A CN 202010215016 A CN202010215016 A CN 202010215016A CN 111262537 A CN111262537 A CN 111262537A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/4508—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using bipolar transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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Abstract
The invention discloses a transconductance amplifier, comprising: the amplifier comprises a first-stage amplifying circuit A1, a second-stage amplifying circuit A2, an error amplifying circuit EA and a negative transconductance circuit FB, wherein the first-stage amplifying circuit A1 is used for amplifying an input signal; the second-stage amplifying circuit A2 is used for buffering the output signal of the first-stage amplifying circuit A1; the error amplifying circuit EA is used for adjusting the first-stage amplifying circuit A1; the negative transconductance circuit FB is configured to suppress a differential error of the first-stage amplifying circuit a1 in a negative feedback manner. In the amplifier, the negative transconductance circuit FB cancels the differential error generated by the first-stage amplifying circuit a1 through negative feedback, so that noise and offset voltage caused by the differential error of the first-stage amplifying circuit a1 are suppressed, the noise and the offset voltage in the input signal are reduced, and the sampling precision is improved in the later stage.
Description
Technical Field
The invention relates to the technical field of microelectronics, in particular to a transconductance amplifier.
Background
In the field of microelectronics, there are a large number of weak signals, for example, hall voltage, because the hall voltage signal is very weak and has a large range, generally from several hundred microvolts to several millivolts, the front-end amplifier is required to have very high performance, such as high linearity, low noise, low offset voltage, etc., to ensure that no distortion occurs after the signal is sampled and amplified.
The conventional source degeneration circuit is a commonly used amplifier for effectively improving linearity, and utilizes a resistor connected to the source of two input pair transistors to reduce the third harmonic distortion (1+ N)2Wherein N (═ G)mR) is a source electrode degradation factor, thereby achieving the aim of improving the linearity. However, due to the defects of the circuit structure, differential errors are introduced by the two tail current sources, so that the later sampling precision is low.
Disclosure of Invention
In view of this, the present invention provides a transconductance amplifier, which is used to solve the problem that due to the defects of the circuit structure, a difference error is introduced into two tail current sources, so that the circuit has higher noise and offset voltage, and the generated noise and offset voltage can cover the hall voltage signal required by us, so that the later sampling is not ideal, and the specific scheme is as follows:
a transconductance amplifier, comprising: a first stage amplifying circuit A1, a second stage amplifying circuit A2, an error amplifying circuit EA and a negative transconductance circuit FB, wherein,
the first-stage amplifying circuit A1 is used for amplifying an input signal;
the second-stage amplifying circuit A2 is used for buffering the output signal of the first-stage amplifying circuit A1;
the error amplifying circuit EA is used for adjusting the first-stage amplifying circuit A1;
the negative transconductance circuit FB is configured to suppress a differential error of the first-stage amplifying circuit a1 in a negative feedback manner.
In the amplifier, the first-stage amplifying circuit a1 is optionally a transistor degeneration circuit.
In the amplifier, the second-stage amplifying circuit a2 is an emitter follower.
Optionally, in the amplifier, the negative transconductance circuit FB is a cascode differential circuit.
In the amplifier, optionally, the pair of input terminals of the first-stage amplifying circuit a1, the second-stage amplifying circuit a2, the error amplifying circuit EA and the negative transconductance circuit FB are bipolar transistors.
In the amplifier, optionally, the first stage amplifying circuit a1 includes: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a first capacitor C1, and a second capacitor C2, wherein:
the first transistor M1 and the second transistor M2 are equivalent to current sources;
collectors of the third transistor M3 and the fourth transistor M4 are used as an output signal of the first-stage amplification circuit a1, and the output signal is connected with an input end of the second-stage amplification circuit a 2;
the gates of the fifth transistor M5 and the sixth transistor M6 are connected with the output end of the error amplifying circuit;
the first capacitor C1 and the second capacitor C2 are Miller compensation capacitors.
The amplifier described above, optionally, further includes: resistance R1Wherein, in the step (A),
the resistor R1Is connected between the emitters of the third transistor M3 and the fourth transistor M4.
Optionally, the inputs of the error amplifying circuit EA are a common mode level CM and a reference voltage VREF.
In the amplifier, optionally, the negative transconductance circuit FB comprises a seventh transistor M7 and an eighth transistor M8, wherein,
the base stages of the seventh transistor M7 and the eighth transistor M8 are input ends of the negative transconductance circuit FB, and receive an output signal of the second-stage amplifying circuit a 2;
the collectors of the seventh transistor M7 and the eighth transistor M8 are respectively connected to the resistor R as the output end of the negative transconductance circuit1At both ends of the same.
In the amplifier, optionally, the seventh transistor M7 and the eighth transistor M8 are triodes.
Compared with the prior art, the invention has the following advantages:
the invention discloses a transconductance amplifier, comprising: the amplifier comprises a first-stage amplifying circuit A1, a second-stage amplifying circuit A2, an error amplifying circuit EA and a negative transconductance circuit FB, wherein the first-stage amplifying circuit A1 is used for amplifying an input signal; the second-stage amplifying circuit A2 is used for buffering the output signal of the first-stage amplifying circuit A1; the error amplifying circuit EA is used for adjusting the first-stage amplifying circuit A1; the negative transconductance circuit FB is configured to suppress a differential error of the first-stage amplifying circuit a1 in a negative feedback manner. In the amplifier, the negative transconductance circuit FB cancels the differential error generated by the first-stage amplifying circuit a1 through negative feedback, so that noise and offset voltage caused by the differential error of the first-stage amplifying circuit a1 are suppressed, the noise and the offset voltage in the input signal are reduced, and the sampling precision is improved in the later stage.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a simplified circuit diagram of a transconductance amplifier of the prior art;
fig. 2 is a simplified circuit diagram of a transconductance amplifier according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The invention discloses a transconductance amplifier, which is applied to the amplification process of weak signals in the field of microelectronics, and the embodiment of the invention takes Hall voltage as an example for explanation, wherein the Hall voltage is based on Hall effect, namely when current flows through a semiconductor in a direction vertical to a magnetic field, the semiconductor generates potential difference in the direction vertical to the magnetic field and the current, and the potential difference is the Hall voltage. In recent decades, the hall effect has been widely used due to the development of permanent magnet materials and voltage regulator sources. The sensor made by utilizing the Hall effect has the advantages of low cost, high sensitivity, wide working temperature range and the like, and is widely applied to the fields of automobiles, household appliances and the like.
Since the hall voltage signal is very weak and has a large range, generally between several hundred microvolts and several millivolts, the front-end amplifier is required to have very high performance, such as high linearity, low noise, low offset voltage, etc., to ensure that no distortion occurs after the signal is sampled and amplified.
The conventional source degeneration circuit is a commonly used circuit for effectively improving linearity, and utilizes a resistor connected to the source of two input pair transistors to reduce the third harmonic distortion (1+ N)2Wherein N (═ G)mR) is a source electrode degradation factor, thereby achieving the aim of improving the linearity. However, due to the defects of the circuit structure, the two tail current sources introduce differential errors, so that the circuit has the defects ofThe generated noise and offset voltage can cover the Hall voltage signal required by people due to higher noise and offset voltage, so that the later sampling precision is low.
In the prior art, a transconductance amplifier with a source degeneration circuit is simplified as shown in fig. 1, and the first transistor M1The second transistor M2An initial third transistor M3', initial fourth transistor M4', the fifth transistor M5The sixth transistor M6The resistor R1The first capacitor C1And said second capacitance C2Constituting a first-stage amplification circuit a 1. Wherein the first transistor M1The second transistor M2An initial third transistor M3', initial fourth transistor M4', the fifth transistor M5And the sixth transistor M6Are all MOS tubes. Reference voltage Vb1Is the first transistor M1And the second transistor M2Providing a bias to make the first transistor M1And the second transistor M2And the device works in a saturation region and is equivalent to a current source. The initial third transistor M3' and the initial fourth transistor M4'the gates are the input terminals Vin + and Vin-of the initial first-stage amplifying circuit a 1', and are also the input terminals of the transconductance amplifier, and the initial third transistor M3' and the initial fourth transistor M4' the inter-source connection resistor R1. The initial third transistor M3' and the initial fourth transistor M4'the drain is the output terminal of the initial first stage amplifying circuit A1' and is connected with the input terminal of the second stage amplifying circuit A2. The output terminals Vout-and Vout + of the second stage amplification circuit A2 are the output terminals of the whole transconductance amplifier. The input end of the error amplifying circuit EA is a common mode level CM and a reference voltage VREF output by the transconductance amplifier, and the output end is connected with the fifth transistor M5And the sixth transistor M6The first capacitor C1 and the second capacitor C2 are miller compensation capacitors.
Wherein the source electrode is withdrawnStructured i.e. at the initial third transistor M3' and a fourth transistor M4' the inter-source connection resistor R1And negative feedback is realized, and the signal swing applied between the gate and the source of the transistor is reduced, so that the input-output characteristic has better linearity. However, the first transistor M is equivalent to a current source transistor1And the second transistor M2The generated noise appears as differential current noise, i.e. noise and offset voltage are introduced.
In order to suppress the influence of noise and offset voltage, the present invention proposes a transconductance amplifier, and the schematic diagram of the transconductance amplifier is shown in fig. 2. The method comprises the following steps: a first stage amplifying circuit A1, a second stage amplifying circuit A2, an error amplifying circuit EA and a negative transconductance circuit FB, wherein,
the first-stage amplifying circuit A1 is used for amplifying an input signal;
the second-stage amplifying circuit A2 is used for buffering the output signal of the first-stage amplifying circuit A1;
the error amplifying circuit EA is used for adjusting the first-stage amplifying circuit A1;
the negative transconductance circuit FB is configured to suppress a differential error of the first-stage amplifying circuit a1 in a negative feedback manner.
Wherein the first stage amplifying circuit is an emitter degeneration circuit, comprising: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a first capacitor C1, and a second capacitor C2, wherein:
the first transistor M1 and the second transistor M2 are equivalent to current sources;
collectors of the third transistor M3 and the fourth transistor M4 are used as output signals of the first-stage amplification circuit a1, and bases of the third transistor M3 and the fourth transistor M4 are used as input terminals Vin + and Vin "of the first-stage amplification circuit a1, and the output signals are connected with an input terminal of the second-stage amplification circuit a 2;
the gates of the fifth transistor M5 and the sixth transistor M6 are connected with the output end of the error amplifying circuit;
the first capacitor C1 and the second capacitor C2 are Miller compensation capacitors.
Preferably, the first-stage amplifier circuit a1 is an emitter degeneration circuit, the third transistor M3 and the fourth transistor M4 are bipolar transistors, and the first transistor M1, the second transistor M2, the fifth transistor M5, and the sixth transistor M6 are MOS transistors. By means of a resistor R1The emitter negative feedback function of (2) reduces the swing of the signal applied between the third transistor M3 and the fourth transistor M4, so that the input-output characteristic has better linearity. However, due to the defects of the circuit structure itself, the first transistor M1And the second transistor M2Equivalent current sources introduce some differential error, causing the circuit to generate higher noise and offset voltages. Wherein, the capacitor C1And C2For the Miller compensation capacitor, the dominant pole is obviously moved to the origin of the complex frequency surface, and the phase margin is increased, so that the stability of the circuit is improved. The invention utilizes the Spectre tool of Cadence to carry out alternating current simulation, the input power supply voltage is 3V, and reasonable bias is set to ensure that all MOS (metal oxide semiconductor) transistors work in a saturation region and all bipolar transistors work in an amplification region, so that no first capacitor C is detected respectively1And a second capacitor C2Phase margin of time and presence of first capacitance C1And a second capacitor C2Phase margin of time. Simulating to obtain a first capacitor C1And a second C2The phase margin before compensation is 31.86 deg., and the phase margin after compensation is 86.26 deg., so the first capacitor C1And a second capacitor C2The phase margin is significantly improved. In addition, the first capacitor C1And a second capacitor C2The larger the capacitance value of (c), the larger the phase margin of compensation.
The second stage amplifier circuit A2 is a fully differential emitter follower structure, the signal amplified by the first stage amplifier A1 is input to the base of the bipolar transistor, and the emitter voltage is changed along with the base voltage by using an emitter drive load, in addition, the emitter follower can reduce the output impedance by (1+ β) times, thereby improving the load carrying capacity of the transconductance amplifier.
The error amplifier circuit EA compares the detected output common mode level CM of the transconductance amplifier with a reference voltage VREF, and adds the difference to a fifth transistor M equivalent to a current source in a negative feedback manner5And a sixth transistor M6In the above, the unstable circuit phenomenon due to the current mismatch effect is adjusted. Wherein the fifth transistor M5And the sixth transistor M6The MOS transistors are connected in parallel by two transistors, one is biased at a fixed current, and the other is driven by an error amplifier.
The simplified structure of the negative transconductance circuit FB is shown as a dashed-line box in fig. 2, and is a cascode differential circuit. The input terminal is a seventh transistor M7And an eighth transistor M8Wherein the seventh transistor M7 and the eighth transistor M8 are bipolar transistors. Receive signals Vout-and Vout + from the first stage a1 and second stage a2 amplification. The output end is the seventh transistor M7And the eighth transistor M8To the connecting resistor R1On the two branches. A tail current generating a current I to couple said seventh transistor M7And the eighth transistor M8Are connected together. When two branches of the first stage amplifying circuit A1 generate a differential error due to two current sources, the output terminal of the first stage amplifying circuit A1 generates a differential error voltage Δ V. After the voltage Δ V is amplified by the second stage amplifier circuit a2, the value is still Δ V. After the voltage delta V is input into the negative transconductance circuit, the voltage delta V' is output. The voltage Δ V' is input back to the first stage amplifier circuit a1 to cancel out the differential error generated by mismatch, so that the differential error introduced by the current source of the first stage amplifier circuit a1 is suppressed, and the offset voltage and noise of the circuit are reduced.
Further, CMOS devices are widely used in digital circuits, analog circuits, and digital-analog hybrid circuits due to their advantages of high input impedance, low power consumption, and high integration. However, for some circuits with high performance requirements, CMOS devices have higher offset voltage and equivalent input noise, which is a drawback limiting the optimization of circuit performance. On the other hand, bipolar devices have advantages such as excellent high-frequency performance, large-current driving capability, low noise, and low offset voltage, unlike CMOS devices. Thus, the BiCMOS process, which can use both CMOS and bipolar devices, has great advantages in high performance circuit applications. In order to further inhibit the influence of noise and offset voltage, input geminate transistors of the second-stage amplifying circuit A2 and the error amplifying circuit EA are improved to be bipolar transistors, and an emitter degeneration structure under a BiCMOS process is adopted.
The invention discloses a transconductance amplifier, comprising: the amplifier comprises a first-stage amplifying circuit A1, a second-stage amplifying circuit A2, an error amplifying circuit EA and a negative transconductance circuit FB, wherein the first-stage amplifying circuit A1 is used for amplifying an input signal; the second-stage amplifying circuit A2 is used for buffering the output signal of the first-stage amplifying circuit A1; the error amplifying circuit EA is used for adjusting the first-stage amplifying circuit A1; the negative transconductance circuit FB is configured to suppress a differential error of the first-stage amplifying circuit a1 in a negative feedback manner. In the amplifier, the negative transconductance circuit FB cancels the differential error generated by the first-stage amplifying circuit a1 through negative feedback, so that noise and offset voltage caused by the differential error of the first-stage amplifying circuit a1 are suppressed, the noise and the offset voltage in the input signal are reduced, and the sampling precision is improved in the later stage.
It should be noted that the important points of the embodiments are different from those of the other embodiments, and the same and similar parts between the embodiments may be referred to each other. For the device-like embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functions of the units may be implemented in the same software and/or hardware or in a plurality of software and/or hardware when implementing the invention.
From the above description of the embodiments, it is clear to those skilled in the art that the present invention can be implemented by software plus necessary general hardware platform. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which may be stored in a storage medium, such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments or some parts of the embodiments.
The transconductance amplifier provided by the present invention is described in detail above, and the principle and the implementation of the present invention are explained in the present document by applying specific examples, and the descriptions of the above examples are only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A transconductance amplifier, comprising: a first stage amplifying circuit A1, a second stage amplifying circuit A2, an error amplifying circuit EA and a negative transconductance circuit FB, wherein,
the first-stage amplifying circuit A1 is used for amplifying an input signal;
the second-stage amplifying circuit A2 is used for buffering the output signal of the first-stage amplifying circuit A1;
the error amplifying circuit EA is used for adjusting the first-stage amplifying circuit A1;
the negative transconductance circuit FB is configured to suppress a differential error of the first-stage amplifying circuit a1 in a negative feedback manner.
2. The amplifier of claim 1, wherein the first stage amplification circuit a1 is a emitter degeneration circuit.
3. The amplifier according to claim 1, wherein the second-stage amplification circuit a2 is an emitter follower.
4. The amplifier of claim 1, wherein the negative transconductance circuit FB is a cascode differential circuit.
5. The amplifier of claim 1, wherein the pair of input terminals of the first stage amplifying circuit a1, the second stage amplifying circuit a2, the error amplifying circuit EA and the negative transconductance circuit FB are bipolar transistors.
6. The amplifier of claim 1, wherein the first stage amplification circuit a1 comprises: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a first capacitor C1, and a second capacitor C2, wherein:
the first transistor M1 and the second transistor M2 are equivalent to current sources;
collectors of the third transistor M3 and the fourth transistor M4 are used as an output signal of the first-stage amplification circuit a1, and the output signal is connected with an input end of the second-stage amplification circuit a 2;
the gates of the fifth transistor M5 and the sixth transistor M6 are connected with the output end of the error amplifying circuit;
the first capacitor C1 and the second capacitor C2 are Miller compensation capacitors.
7. The amplifier of claim 6, further comprising: resistance R1Wherein, in the step (A),
the resistor R1Is connected between the emitters of the third transistor M3 and the fourth transistor M4.
8. The amplifier of claim 1, wherein the inputs to the error amplifier circuit EA are a common mode level CM and a reference voltage VREF.
9. The amplifier according to claim 7, wherein the negative transconductance circuit FB comprises a seventh transistor M7 and an eighth transistor M8, wherein,
the base stages of the seventh transistor M7 and the eighth transistor M8 are input ends of the negative transconductance circuit FB, and receive an output signal of the second-stage amplifying circuit a 2;
the collectors of the seventh transistor M7 and the eighth transistor M8 are respectively connected to the resistor R as the output end of the negative transconductance circuit1At both ends of the same.
10. The amplifier of claim 9, wherein the seventh transistor M7 and the eighth transistor M8 are bipolar transistors.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112039492A (en) * | 2020-08-06 | 2020-12-04 | 浙江大学 | High-linearity transconductance amplifier applied to physiological signal filter |
| CN114285385A (en) * | 2022-02-21 | 2022-04-05 | 成都芯翼科技有限公司 | Offset circuit of operational amplifier input current |
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