CN112039492A - High-linearity transconductance amplifier applied to physiological signal filter - Google Patents
High-linearity transconductance amplifier applied to physiological signal filter Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/04—Frequency selective two-port networks
- H03H11/0422—Frequency selective two-port networks using transconductance amplifiers, e.g. gmC filters
- H03H11/0466—Filters combining transconductance amplifiers with other active elements, e.g. operational amplifiers, transistors, voltage conveyors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
- H03F3/45932—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by using feedback means
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Abstract
The invention discloses a high-linearity transconductance amplifier applied to a physiological signal filter, which comprises a differential input stage, a differential output load, a current offset transistor, a local negative feedback equivalent linear resistor and a bias current transistor. The PMOS devices M1 and M2 form a differential output stage, and signals are input from a body terminal; the NMOS devices M3 and M4 are used as output load stages of the transconductance amplifier in a current source mode, the current counteracting transistor and the output geminate transistor are consistent in length and have a certain proportional relation with each other in width, and drain currents of the output geminate transistors are counteracted, so that transconductance is reduced; the PMOS devices M12 and M13 form local negative feedback equivalent linear resistors, and the PMOS devices M9 and M10 are used to provide bias for the equivalent resistors. The invention adopts the body driving and current counteracting mode, on one hand, the linearity of the transconductance amplifier is improved, and on the other hand, the transconductance value of the transconductance amplifier is reduced, so that the transconductance amplifier is more suitable for being applied to a physiological signal filter.
Description
Technical Field
The invention relates to the field of transconductance amplifiers in integrated circuit design, in particular to a transconductance amplifier with high linearity applied to a physiological signal filter.
Background
With the continuous development of biological and medical technologies, it is necessary to amplify and filter the acquired electroencephalogram, electrocardiograph, and other physiological signals, and then convert the signals into digital signals through an analog-to-digital conversion circuit for analysis and processing.
The OTA-C architecture is widely applied to low-frequency applications such as physiological signal filtering due to the characteristics of low power consumption and small area, and compared with a switched capacitor filter, the OTA-C architecture avoids switching noise caused by continuous charging and discharging of a load capacitor and avoids unnecessary switching power consumption.
For a filter with an OTA-C architecture, the performance of the filter is mainly limited by non-ideal characteristics of a transconductance amplifier, such as nonlinearity, noise, mismatch, process dispersion, and the like, wherein the nonlinearity of the transconductance amplifier has the greatest influence on the performance of the filter, so that it is necessary to design a transconductance amplifier with high linearity, and currently, commonly used methods for improving the linearity of the transconductance amplifier, such as source negative feedback, adaptive bias, and the like, have insurmountable disadvantages and influence the application range of the transconductance amplifier, for example, the source negative feedback can increase power consumption and area due to the need of a large linear equivalent resistor; adaptive biasing increases circuit complexity due to the presence of feedback. In addition, in order to reduce on-chip capacitance, the transconductance of the transconductance amplifier needs to be as small as possible, and therefore the transconductance amplifier needs to operate in a weak inversion region, so that power consumption is reduced, but performance is greatly influenced by device mismatch and process dispersion.
Disclosure of Invention
To overcome the deficiencies of the prior art, the present invention provides a high linearity transconductance for use in a physiological signal filter
An amplifier.
A high-linearity transconductance amplifier circuit applied to a physiological signal filter comprises a differential input stage, a differential output load, a current cancellation transistor, a local negative feedback equivalent linear resistor and a bias current transistor.
The differential input stage comprises PMOS devices M1, M2. The gates of M1 and M2 are connected to a bias voltage VBIAS2, the source of M1 is connected to the drain of an equivalent linear resistance transistor M12 and the drain of a bias current transistor M7, the source of M2 is connected to the drain of an equivalent linear resistance transistor M13 and the drain of a bias current transistor M8, the drain of M1 is connected to the drain of a differential output load transistor M3 and the drain of a current cancellation transistor M6 together to a negative phase output VOUTN, the drain of M2 is connected to the drain of a differential output load transistor M4 and the drain of a current cancellation transistor M5 together to an output VOUTP, the body terminal of M1 is connected to a positive phase input signal VINP, and the body terminal of M2 is connected to a negative phase input signal VINN.
The differential output load comprises NMOS devices M3, M4. The gates of M3 and M4 are both connected to the common mode feedback voltage VCMFB, the sources of M3 and M4 are both connected to ground GND, the drain of M3 is connected to the negative phase output VOUTN, and the drain of M4 is connected to the positive phase output VOUTP.
The current cancellation tube includes PMOS devices M5, M6. The gates of M5 and M6 are both connected to a bias voltage VBIAS2, the source of M5 is connected to the source of M1, the source of M6 is connected to the source of M2, the drain of M5 is connected to the negative phase output VOUTN, and the drain of M6 is connected to the positive phase output VOUTP.
The local negative feedback equivalent linear resistor comprises PMOS devices M9, M10, M12 and M13. The grid electrode of M9 is connected with the drain electrode of M10, the source electrode of M9 is connected with a power supply VDD, the drain electrode of M10 is connected with the source electrode of M10, the grid electrodes of M10, M12 and M13 are connected with a common-mode voltage VCM, the source electrode of M12 is connected with the source electrode of M13, the drain electrode of M12 is connected with the source electrode of a differential input tube M1, and the drain electrode of M13 is connected with the source electrode of a differential input tube M2.
The bias current tube comprises PMOS devices M7, M8 and NMOS devices M11, wherein the gates of M7 and M8 are connected to bias voltage VBIAS1, the sources are connected to power supply VDD, the drain of M7 is connected with the drain of differential input tube M1, and the drain of M8 is connected with the drain of differential input tube M2. The gate of M11 is connected to bias voltage VBIAS3, the source is connected to GND, and the drain is connected to the drain of M10.
The PMOS devices M1, M2, M5, M6, M7, M8, M9, M10, M12 and M13 and the NMOS devices M3, M4 and M11 are all four-port structures with a source, a drain, a gate and a body end. The body terminals of M5, M6, M7, M8, M9, M10, M12 and M13 are all connected with a power supply VDD; the body terminals of M3, M4 and M11 are all connected to GND.
The invention has the beneficial effects that: the input device adopts a body driving mode, so that the transconductance of the transconductance amplifier can be reduced, the linearity of the output of the transconductance amplifier can be obviously improved, and the current offset technology is applied to further reduce the transconductance and improve the linearity by source negative feedback. When the transconductance amplifier is applied to the physiological signal OTA-C filter, the on-chip capacitance used can be greatly reduced, and simultaneously, the dynamic range of the filter can be greatly improved due to the improvement of the linearity of the transconductance amplifier.
Drawings
Fig. 1 is a schematic diagram of a basic transconductance amplifier circuit.
Fig. 2 is a schematic circuit diagram of a high linearity transconductance amplifier applied to physiological signals in the present invention.
Fig. 3 is a simulated spectrum diagram of the output signal of the transconductance amplifier of the present invention.
Fig. 4 is a simulation diagram of the transconductance amplifier varying with the input according to the present invention.
Detailed Description
The invention is further illustrated below with reference to the figures and examples.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Fig. 1 shows a basic transconductance amplifier structure, which includes PMOS input pair transistors M1 and M2, current source loads M3 and M4, and a tail current transistor M5. The transconductance which can be realized by the most basic transconductance amplifier is generally in the order of mu S, the cut-off frequency set by the physiological signal OTA-C filter is generally below 10 kHz, and if the basic transconductance amplifier structure is adopted, a capacitor of hundreds of nano-meters is needed and cannot be integrated into a chip. On the other hand, the output linearity of the transconductance amplifier is general, and the THD value is about 3%, so that the signal filtered by the filter generates great distortion, and the analysis and the processing of a post-stage circuit are influenced.
The present invention improves upon the basic transconductance amplifier by using bulk drive techniques and current cancellation techniques, as shown in fig. 2. The bulk drive has higher linearity than the gate drive, while the bulk transconductance is typically 1/5 to 1/3 of the gate transconductance, which is a disadvantage of the bulk drive for high gain amplifiers, but is a feature that can be exploited for physiological signal OTA-C filters. Meanwhile, a pair of transistors connected in parallel with the input pair of the transconductance amplifier is used for cross-coupling drain terminals of the transistors to output terminals opposite to the parallel input pair, so that a part of output current is offset, and transconductance is further reduced.
A high-linearity transconductance amplifier circuit applied to a physiological signal filter comprises a differential input stage, a differential output load, a current cancellation transistor, a local negative feedback equivalent linear resistor and a bias current transistor.
The differential input stage comprises PMOS devices M1, M2. The reason why the input is made of the PMOS device is that the 1/f noise of the PMOS device is smaller than that of the NMOS device, and the proportion of the 1/f noise in the frequency band of the physiological signal is very large. The gates of M1 and M2 are connected to a bias voltage VBIAS2, the source of M1 is connected to the drain of an equivalent linear resistance transistor M12 and the drain of a bias current transistor M7, the source of M2 is connected to the drain of an equivalent linear resistance transistor M13 and the drain of a bias current transistor M8, the drain of M1 is connected to the drain of a differential output load transistor M3 and the drain of a current cancellation transistor M6 together to a negative phase output VOUTN, the drain of M2 is connected to the drain of a differential output load transistor M4 and the drain of a current cancellation transistor M5 together to an output VOUTP, the body terminal of M1 is connected to a positive phase input signal VINP, and the body terminal of M2 is connected to a negative phase input signal VINN. Due to application requirements, transconductance is required to be as small as possible and power consumption is required to be as low as possible, for this reason, an input tube is required to work in a weak inversion region, and a current formula of a PMOS transistor working in the weak inversion region is as follows:
The relationship between the threshold voltage and the body end voltage is as follows:
The input signal being exactly by varying
To change
And thus the transistor output current, has higher linearity and lower transconductance compared to a gate-driven transistor.
The differential output load comprises NMOS devices M3, M4. The gates of M3 and M4 are both connected to the common mode feedback voltage VCMFB, the sources of M3 and M4 are both connected to ground GND, the drain of M3 is connected to the negative phase output VOUTN, and the drain of M4 is connected to the positive phase output VOUTP.
The current cancellation tube includes PMOS devices M5, M6. The gates of M5 and M6 are both connected to a bias voltage VBIAS2, the source of M5 is connected to the source of M1, the source of M6 is connected to the source of M2, the drain of M5 is connected to the negative phase output VOUTN, and the drain of M6 is connected to the positive phase output VOUTP. Wherein M5, M6, M1 and M2 have the same channel length, and the ratio of their channel widths is set as n, so that the transconductance reduction factor is
In theory we can make n approach infinityThe transconductance as small as possible is realized at 1, but due to the existence of transistor mismatch, the value of n which is too close to 1 is easy to cause the transconductance amplifier not to work normally, and the value of n is 0.9 in the invention.
The local negative feedback equivalent linear resistor comprises PMOS devices M9, M10, M12 and M13. The grid electrode of M9 is connected with the drain electrode of M10, the source electrode of M9 is connected with a power supply VDD, the drain electrode of M10 is connected with the source electrode of M10, the grid electrodes of M10, M12 and M13 are connected with a common-mode voltage VCM, the source electrode of M12 is connected with the source electrode of M13, the drain electrode of M12 is connected with the source electrode of a differential input tube M1, and the drain electrode of M13 is connected with the source electrode of a differential input tube M2. Where M12 and M13 operate in the linear region equivalent to a resistor, its linearity also has a large effect on the linearity of the whole transconductance amplifier.
The bias current tube comprises PMOS devices M7, M8 and NMOS devices M11, wherein the gates of M7 and M8 are connected to bias voltage VBIAS1, the sources are connected to power supply VDD, the drain of M7 is connected with the drain of differential input tube M1, and the drain of M8 is connected with the drain of differential input tube M2. The gate of M11 is connected to bias voltage VBIAS3, the source is connected to GND, and the drain is connected to the drain of M10.
The PMOS devices M1, M2, M5, M6, M7, M8, M9, M10, M12 and M13 and the NMOS devices M3, M4 and M11 are all four-port structures with a source, a drain, a gate and a body end. The body terminals of M5, M6, M7, M8, M9, M10, M12 and M13 are all connected with a power supply VDD; the body terminals of M3, M4 and M11 are all connected to GND.
Fig. 3 is a simulation diagram of an output spectrum of the transconductance amplifier of the present invention under a sine wave input condition of 500 Hz and 100 mVpp, wherein the abscissa represents each frequency component of an output signal, and the ordinate represents the corresponding amplitude of each frequency component, and the unit is dB. From this the THD of the output signal can be calculated to be 0.37%.
Fig. 4 is a simulation curve of the transconductance value of the transconductance amplifier of the present invention varying with the input, where the abscissa represents the magnitude of the voltage of the input signal and the ordinate represents the transconductance value of the transconductance amplifier. It can be seen that the transconductance value is only 7.6 nS when the input differential signal is 0V.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures made by using the contents of the present specification and the drawings can be directly or indirectly applied to other related technical fields, and are within the scope of the present invention.
Claims (4)
1. A high linearity transconductance amplifier for use in a physiological signal filter, comprising: the circuit comprises a differential input stage, a differential output load, a current offset transistor, a local negative feedback equivalent linear resistor and a bias current transistor;
the differential input stage comprises PMOS devices M1 and M2;
the differential output load comprises NMOS devices M3 and M4;
the current cancellation transistor comprises PMOS devices M5 and M6;
the local negative feedback equivalent linear resistor comprises PMOS devices M9, M10, M12 and M13;
the bias current transistor comprises PMOS devices M7, M8 and NMOS devices M11;
the gates of M1 and M2 are connected to a bias voltage VBIAS2, the source of M1 is connected to the drain of an equivalent linear resistance transistor M12, the source of M2 is connected to the drain of an equivalent linear resistance transistor M13, the drain of M1 is connected to the negative phase output VOUTN together with the drain of a current cancellation transistor M6, the drain of M2 is connected to the positive phase output VOUTP together with the drain of a current cancellation transistor M5, the body end of M1 is connected to a positive phase input signal VINP, and the body end of M2 is connected to a negative phase input signal VINN;
the gates of M3 and M4 are both connected to the common mode feedback voltage VCMFB, the sources of M3 and M4 are both connected to ground GND, the drain of M3 is connected to the negative phase output VOUTN, and the drain of M4 is connected to the positive phase output VOUTP;
the gates of M5 and M6 are both connected to a bias voltage VBIAS2, the source of M5 is connected to the source of M1, the source of M6 is connected to the source of M2, the drain of M5 is connected to the negative phase output VOUTN, and the drain of M6 is connected to the positive phase output VOUTP;
the grid electrode of M9 is connected with the drain electrode of M10, the source electrode is connected with a power supply VDD, the drain electrode is connected with the source electrode of M10, the grid electrodes of M10, M12 and M13 are all connected with a common-mode voltage VCM, the source electrode of M12 is connected with the source electrode of M13, the drain electrode of M12 is connected with the source electrode of a differential input tube M1, and the drain electrode of M13 is connected with the source electrode of a differential input tube M2;
m7, M8 and M11 are used to provide bias current to the entire transconductance amplifier.
2. The high linearity transconductance amplifier of claim 1, wherein: the differential input stage works in a weak inversion region and is driven by a body end.
3. The high linearity transconductance amplifier of claim 1, wherein: the PMOS devices M1, M2, M5, M6, M7, M8, M9, M10, M12 and M13 and the NMOS devices M3, M4 and M11 are all four-port structures with a source electrode, a drain electrode, a grid electrode and a body end;
the body terminals of M5, M6, M7, M8, M9, M10, M12 and M13 are all connected with a power supply VDD; the body terminals of M3, M4 and M11 are all connected to GND.
4. The high linearity transconductance amplifier of claim 1, wherein: the PMOS devices M1, M2, M5, M6, M7, M8, M9, M10, M12 and M13 devices M2, M4, M6 and M8 are all metal oxide field effect transistors.
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| CN113641206A (en) * | 2021-10-15 | 2021-11-12 | 成都时识科技有限公司 | Integrated circuit with filtering function |
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