CN111261588A - Thin film transistor array panel and manufacturing method thereof - Google Patents
Thin film transistor array panel and manufacturing method thereof Download PDFInfo
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- CN111261588A CN111261588A CN202010079688.2A CN202010079688A CN111261588A CN 111261588 A CN111261588 A CN 111261588A CN 202010079688 A CN202010079688 A CN 202010079688A CN 111261588 A CN111261588 A CN 111261588A
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Images
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention discloses a thin film transistor array panel and a manufacturing method thereof, wherein the method comprises the following steps: forming a device board, wherein the device board is sequentially laminated with a substrate, a grid electrode insulating layer, an active layer and a metal layer; forming a photoresist layer on the metal layer, the photoresist layer including a first portion of the photoresist layer and a second portion of the photoresist layer; processing the first portion of the photoresist layer with a combination of a mask plate and a laser beam to remove the first portion of the photoresist layer; processing the metal layer to form a source electrode pattern, a drain electrode pattern and a channel region; and stripping the second part of the photoresist layer. The thin film transistor array panel and the manufacturing method thereof can improve the stability of the thin film transistor in the display panel.
Description
Technical Field
The invention relates to the technical field of display, in particular to a thin film transistor array panel and a manufacturing method thereof.
Background
Display panels are classified into two major categories, namely Liquid Crystal Displays (LCDs) and Active Matrix Light Emitting diodes (AMOLEDs).
Thin Film Transistors (TFTs) in organic light emitting diodes and Liquid Crystal Displays (LCDs) are classified into bottom gate TFTs and top gate TFTs according to the manufacturing process of the gate electrode; among them, the bottom gate type thin film transistor is divided into a back channel etch type thin film transistor and a channel protective film type thin film transistor. At present, four masks (masks) are commonly used to form a manufacturing process of a back Channel type thin film transistor, in the process, an etching process is adopted to process a photoresist of a Channel region so as to facilitate the formation of a subsequent Channel (Channel), however, when the etching process is used to process the photoresist of the Channel region, the thickness of the photoresist outside the Channel region is often reduced, and the photoresist cannot effectively block etching liquid during subsequent etching, so that the stability of the thin film transistor in a display panel is affected.
Therefore, a new technical solution is needed to solve the above technical problems.
Disclosure of Invention
The embodiment of the invention provides a thin film transistor array panel and a manufacturing method thereof, which are used for improving the stability of a thin film transistor in a display panel.
The embodiment of the invention provides a manufacturing method of a thin film transistor array panel, which comprises the following steps:
step A: forming a device board, wherein the device board is sequentially laminated with a substrate, a grid electrode insulating layer, an active layer and a metal layer;
and B: forming a photoresist layer on the metal layer, the photoresist layer including a first portion of the photoresist layer and a second portion of the photoresist layer;
and C: processing the first portion of the photoresist layer with a combination of a mask plate and a laser beam to remove the first portion of the photoresist layer;
step D: processing the metal layer to form a source electrode pattern, a drain electrode pattern and a channel region;
step E: and stripping the second part of the photoresist layer.
In the method for manufacturing a thin film transistor array panel according to the embodiment of the present invention, the step C includes:
step c 1: erecting the mask plate on the photoresist layer;
step c 2: and irradiating laser to the mask plate, so that the laser penetrating through the mask plate performs laser etching on the first part of the photoresist layer to remove the first part of the photoresist layer.
In the method for manufacturing a thin film transistor array panel according to the embodiment of the present invention, the step c2 includes:
and translating the mask plate to a preset distance along the horizontal direction of the device plate so that the first part of the photoresist layer is etched.
In the method for manufacturing a thin film transistor array panel according to the embodiment of the present invention, the step D includes:
step d 1: and carrying out laser etching on the position of the metal layer corresponding to the first part of the photoresist layer by utilizing the combination of the mask plate and the laser beam so as to form the source electrode pattern, the drain electrode pattern and the channel region.
In the method for manufacturing a thin film transistor array panel according to the embodiment of the present invention, the step d1 includes:
step d 11: erecting the mask plate on the photoresist layer;
step d 12: and irradiating the laser to the mask plate, so that the laser penetrating through the mask plate performs laser etching on the position of the metal layer corresponding to the first part of the photoresist layer, and the source electrode pattern, the drain electrode pattern and the channel region are formed.
In the method for manufacturing the thin film transistor array panel according to the embodiment of the invention, the mask plate comprises a light transmitting area and a light shielding area, wherein the light transmitting area of the mask plate is erected at a position corresponding to the first part of the photoresist layer, and the light shielding area of the mask plate is erected at a position corresponding to the second part of the photoresist layer.
In the method for manufacturing a thin film transistor array panel according to the embodiment of the present invention, the light transmission region of the mask plate includes a first light transmission portion and a second light transmission portion, the second light transmission portion is located on both sides of the first light transmission portion, and the light transmittance of the first light transmission portion is smaller than the light transmittance of the second light transmission portion.
In the method for manufacturing a thin film transistor array panel according to the embodiment of the present invention, the step D further includes:
step d 2: and etching the position of the metal layer corresponding to the first part of the photoresist layer by adopting an etching process to form the source electrode pattern, the drain electrode pattern and the channel region.
In the method for manufacturing a thin film transistor array panel according to the embodiment of the present invention, the method includes:
and forming the channel region protection layer.
The embodiment of the invention also comprises a thin film transistor array panel, and the thin film transistor array panel is manufactured by the manufacturing method of the thin film transistor array panel.
Compared with the prior art, in the thin film transistor and the manufacturing method thereof in the embodiment of the invention, the photoresist of the channel region is etched by utilizing the combination of the mask plate and the laser beam, so that the thickness of the photoresist outside the channel region is prevented from being reduced, the photoresist can effectively block etching liquid during subsequent etching, and a metal layer is protected from being etched, thereby improving the stability of the thin film transistor in the display panel.
In addition, the combination of the mask plate and the laser beam is utilized to etch the photoresist, so that the production time can be greatly shortened, and the productivity can be improved.
Meanwhile, the light transmittance of different areas of the mask plate is set to be different, so that the exposed photoresist and the flatness of a subsequently formed channel region can be effectively improved, and the charging characteristic of a thin film transistor channel is improved.
In order to make the aforementioned and other objects of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a flowchart of a method for manufacturing a thin film transistor array panel according to an embodiment of the present invention;
fig. 2 to 6 are schematic views illustrating a method for manufacturing a thin film transistor array panel according to an embodiment of the present invention;
fig. 7 is a schematic view of a tft array panel according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a mask plate in the manufacturing method of the thin film transistor array panel according to the embodiment of the present invention.
Detailed Description
For purposes of clarity, technical solutions and advantages of the present invention, the present invention will be described in further detail with reference to the accompanying drawings, wherein like reference numerals represent like elements, and the following description is based on the illustrated embodiments of the present invention and should not be construed as limiting the other embodiments of the present invention which are not described in detail herein. The word "embodiment" as used herein means an example, instance, or illustration. In addition, the articles "a" and "an" as used in this specification and the appended claims may generally be construed to mean "one or more" unless specified otherwise or clear from context to be directed to a singular form.
It should be noted that, in the embodiments of the present invention, the manufacturing method of the thin film transistor array panel includes a manufacturing method of a thin film transistor array panel in an active matrix organic light emitting diode and a manufacturing method of a thin film transistor array panel in a liquid crystal display, where the thin film transistor array panel includes a thin film transistor array panel in an active matrix organic light emitting diode and a thin film transistor array panel in a liquid crystal display.
As shown in fig. 1, an embodiment of the present invention provides a method for manufacturing a thin film transistor array panel, including:
step S1: forming a device board having a substrate 100, a gate electrode 110, a gate insulating layer 120, an active layer 130, and a metal layer 140 stacked in this order;
specifically, as shown in fig. 2, first, after cleaning the substrate 100, a metal film layer is deposited on the surface of the substrate 100 by a sputter coating method, and the gate 110 is formed by a photolithography technique, wherein the material of the gate 110 includes one or a combination of two or more of tantalum (Ta), molybdenum (Mo), tungsten (W), and aluminum (Al), wherein the substrate 100 includes a glass substrate and a flexible substrate; then, a gate insulating layer 120 and an active layer 130 are sequentially formed on the gate electrode 110 using a Chemical Vapor Deposition (CVD) technique, the gate insulating layer 120 including a silicon oxide compound (SiO) as a material of the gate insulating layer 120x) And silicon nitrideCompound (SiN)x) Alumina (Al)2O3) Tantalum pentoxide (Ta)2O5) When the active layer 130 is a polysilicon material, for example, a semiconductor active layer is first formed on the gate insulating layer 120 by using a chemical vapor deposition (cvd) technique, and the amorphous silicon material is converted into the polysilicon material by using an Excimer Laser Anneal (ELA) process to form the polysilicon active layer 130 in order to reduce the contact resistance between the metal electrode and the amorphous silicon; next, a metal layer 140 is formed on the active layer 130 by using a Chemical vapor deposition (cvd) technique, a physical vapor deposition (pvd) technique, or a Plasma Enhanced Chemical Vapor Deposition (PECVD) technique, wherein the metal layer material includes a metal simple substance such as aluminum, copper, molybdenum, or titanium, or an alloy material mainly including the metal simple substance such as aluminum, copper, molybdenum, or titanium, and the thickness of the metal layer 140 is 100 nm to 3000 nm.
Step S2: forming a photoresist layer 150 on the metal layer 140, the photoresist layer 150 comprising a first portion 1501 of the photoresist layer and a second portion 1502 of the photoresist layer;
specifically, as shown in fig. 3, a photoresist material is coated on the surface of the metal layer 140, and is irradiated or radiated by a light source such as ultraviolet light, excimer laser, electron beam, ion beam, X-ray, etc., so as to form a photoresist layer 150, wherein the photoresist layer 150 includes a first portion 1501 of the photoresist layer and a second portion 1502 of the photoresist layer, the photoresist material includes a photosensitive resin compound, etc., the thickness of the photoresist layer 150 is 0.5 to 5 micrometers, and the width of the first portion 1501 of the photoresist layer is 5 to 500 nanometers.
Step S3: processing the first portion 1501 of the photoresist layer with a combination of a mask 20 and a laser beam to remove the photoresist of the first portion 1501 of the photoresist layer;
further, as shown in fig. 4, step S3 includes:
step S31: erecting the mask plate 20 on the photoresist layer 150;
step S32: the mask plate 20 is irradiated with laser light so that the first portion 1501 of the photoresist layer is laser-etched by the laser light transmitted through the mask plate 20 to remove the photoresist 1501 of the first portion of the photoresist layer.
Specifically, a mask plate 20 is erected on the photoresist layer 150, the distance between the mask plate 20 and the photoresist layer 150 is greater than zero, a laser beam is erected on the mask plate 20 in parallel, a light spot of the laser beam is aligned to the first portion 1501 of the photoresist layer to remove the photoresist on the first portion 1501 of the photoresist layer, wherein the etching precision of the laser beam is 0.5-5 micrometers, the etching width is 5-500 nanometers, the etching speed is 0-3000 mm/s, the etching time is 1-30 seconds, and the wavelength of the laser beam comprises the laser wavelength of a fiber laser, the laser wavelength of a green laser, the laser wavelength of an ultraviolet laser and the like.
Further, the step S32 further includes: translating the mask plate 20 to a predetermined distance along the horizontal direction of the device board so that the first portion 1501 of the photoresist layer is etched; specifically, the mask plate 20 is moved at a predetermined speed, for example, the mask plate 20 is moved at a speed of 1nm/s (nanometers/second), so that the photoresist at the angle between the horizontal direction and the vertical direction of the device board is completely etched to secure the flatness of the exposed photoresist. It should be noted that the mask plate 20 may move back and forth, that is, the number of times of movement is greater than or equal to 1, the predetermined moving speed is 0.1nm/s to 10nm/s, and the predetermined distance is 1nm to 1000 nm.
Further, the mask plate 20 includes a transparent area 201 and a light-shielding area 202, wherein the transparent area 201 of the mask plate 20 is erected at a position corresponding to the first portion 1501 of the photoresist layer, and the light-shielding area 202 of the mask plate 20 is erected at a position corresponding to the second portion 1052 of the photoresist layer, wherein the width of the transparent area 201 is 5 nm to 500 nm.
Optionally, as shown in fig. 8, the light-transmitting area 201 of the mask 20 includes a first light-transmitting portion 2011 and a second light-transmitting portion 2012, the second light-transmitting portion 2012 is located at two sides of the first light-transmitting portion 2011, and the light transmittance of the first light-transmitting portion 2011 is smaller than the light transmittance of the second light-transmitting portion 2012. Specifically, the light transmittance of the first light-transmitting portion 2011 of the light-transmitting region 201 of the mask plate 20 includes 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, and 100%, and the light transmittance of the second light-transmitting portion 2012 of the light-transmitting region 201 of the mask plate 20 includes 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, and 100%.
In the embodiment of the invention, the combination of the mask plate 20 and the laser beam is used for carrying out laser etching on the first part 201 of the photoresist layer, so that the second part 202 of the photoresist layer is protected from being etched, the generation of broken lines is avoided, the yield of products is improved, in addition, the time for processing the photoresist layer by adopting the laser etching process is only 20 percent of the time spent in oxygen ashing treatment, and the productivity can be greatly improved.
Step S4: processing the metal layer 140 to form a source pattern 160, a drain pattern 170, and a channel region;
further, an etching process is used to etch a position of the metal layer 140 corresponding to the first portion 1501 of the photoresist layer, so as to form the source pattern 160, the drain pattern 170, and the channel region. For example, in the embodiment of the present invention, the second portion 1502 of the photoresist layer is used as a mask, and one or a combination of two or more of hydrofluoric acid (HF), nitric acid, acetic acid, hydrochloric acid, and phosphoric acid with a specific concentration is used to react with a position, corresponding to the first portion 1501 of the photoresist layer, in the metal layer 140.
Optionally, as shown in fig. 5, in the embodiment of the present invention, step S4 further includes:
the mask plate 20 and the laser beam are combined to perform laser etching on the metal layer 140 at a position corresponding to the first portion 1501 of the photoresist layer, so as to form the source pattern 160, the drain pattern 170, and the channel region. Specifically, the laser is irradiated to the mask plate 20, so that the laser passing through the mask plate 20 performs laser etching on the position of the metal layer 140 corresponding to the first portion 1501 of the photoresist layer to form the source pattern 160, the drain pattern 170, and the channel region.
Specifically, a mask plate 20 is erected on the photoresist layer 150, the distance between the mask plate 20 and the photoresist layer 150 is greater than zero, a laser beam is erected on the mask plate 20 in parallel, a light spot of the laser beam is aligned to the position of the first part 1501 of the photoresist layer, and the position of the metal layer 140 corresponding to the first part 1501 of the photoresist layer is subjected to laser etching to form the source electrode pattern 160, the drain electrode pattern 170 and the channel region, wherein the etching precision of the laser beam is 0.5 to 5 micrometers, the etching width is 5 to 500 nanometers, the etching speed is 0 to 3000mm/s, the etching time is 1 to 30 seconds, and the wavelength of the laser beam comprises the laser wavelength of a fiber laser, the laser wavelength of a green laser, the laser wavelength of an ultraviolet laser and the like.
Further, the step S4 further includes: translating the mask plate 20 to a predetermined distance along the horizontal direction of the device board, so that the portion of the metal layer 140 corresponding to the first portion 1501 of the photoresist layer is etched; specifically, the mask plate 20 is moved at a predetermined speed, for example, the mask plate 20 is moved at a speed of 1nm/s (nanometers/second), so that the metal layer 140 at the included angle between the horizontal direction and the vertical direction of the device board is completely etched, thereby ensuring the flatness of the exposed metal layer 140 and improving the charging characteristic of the thin film transistor channel. It should be noted that the mask plate 20 may move back and forth, that is, the number of times of movement is greater than or equal to 1, the predetermined moving speed is 0.1nm/s to 10nm/s, and the predetermined distance is 1nm to 1000 nm.
Further, the mask plate 20 includes a light transmitting area 201 and a light shielding area 202, wherein the light transmitting area 201 of the mask plate 20 is erected at a position corresponding to the first portion 1501 of the photoresist layer, and the light shielding area 202 of the mask plate 20 is erected at a position corresponding to the second portion 105 of the photoresist layer, and the width of the light transmitting area 201 is 5 nm to 500 nm.
Optionally, with continued reference to fig. 8, the light-transmitting area 201 of the mask plate 20 includes a first light-transmitting portion 2011 and a second light-transmitting portion 2012, the second light-transmitting portion 2012 is located at two sides of the first light-transmitting portion 2011, and the light transmittance of the first light-transmitting portion 2011 is smaller than the light transmittance of the second light-transmitting portion 2012. When the mask plate 20 and the laser beam are combined to process the metal layer 140 and the first portion 1501 of the photoresist layer, the metal layer 140 of the portion can be uniformly exposed, the flatness of the exposed metal layer 140 is improved, and the charging characteristic of a thin film transistor channel is improved.
It should be noted that in the step of using the combination of the mask plate 20 and the laser beam to form the source pattern 160, the drain pattern 170 and the channel region, the laser etching may be continuously used after the first portion 1501 of the photoresist layer is removed by using the mask plate 20 and the laser beam by adjusting the etching precision of the laser to form the source pattern 160, the drain pattern 170 and the channel region.
Step S5: the photoresist of the second portion 1502 of the photoresist layer is stripped.
Wherein, as shown in fig. 6, the stripping method comprises wet stripping and dry ashing, specifically, when wet stripping is used, the photoresist of the second portion 1502 of the photoresist layer is dissolved and removed by complexing reaction of organic solvent or alkaline aqueous solution with the photoresist polymer; when the treatment is performed by dry ashing, the photoresist of the second portion 1502 of the photoresist layer is oxidatively decomposed by plasma ashing or ozone ashing.
Further, as shown in fig. 7, in an embodiment of the present invention, a method for manufacturing a thin film transistor array panel includes:
forming a channel protection layer 180; wherein the method comprises chemical vapor deposition, physical vapor deposition, and plasma-enhanced chemical vapor depositionThe channel protection layer 180 is formed by deposition or atomic layer deposition, and the material of the channel protection layer 180 includes a silicon oxide compound (SiO)x) And silicon nitride compound (SiN)x) Alumina (Al)2O3) Tantalum pentoxide (Ta)2O5) And the like.
The embodiment of the present invention further includes a thin film transistor array panel, which is manufactured by the above method for manufacturing a thin film transistor array panel, specifically, as shown in the figure, the thin film transistor array panel includes:
a substrate 100;
a gate electrode 110, wherein the gate electrode 110 is disposed on the substrate 100;
a gate insulating layer 120, wherein the gate insulating layer 120 is disposed on the gate 110 and covers the gate 120 and the substrate 100;
an active layer 130, the active layer 130 including an active layer channel region and portions electrically connected to the source and drain electrodes 160 and 170, the active layer 130 covering the gate insulating layer 120;
the source electrode 160, the source electrode 160 covers at least a portion of the active layer 130 and is electrically connected to the active layer 130;
the drain electrode 170, wherein the drain electrode 170 covers at least a portion of the active layer 130 and is electrically connected to the active layer 130;
a channel protection layer 180, the channel protection layer 180 covering the source and drain electrodes 160 and 170 and the channel region of the active layer 130.
Compared with the prior art, in the thin film transistor and the manufacturing method thereof in the embodiment of the invention, the photoresist of the channel region is etched by utilizing the combination of the mask plate and the laser beam, so that the thickness of the photoresist outside the channel region is prevented from being reduced, the photoresist can effectively block etching liquid during subsequent etching, and a metal layer is protected from being etched, thereby improving the stability of the thin film transistor in the display panel.
In addition, the combination of the mask plate and the laser beam is utilized to etch the photoresist, so that the production time can be greatly shortened, and the productivity can be improved.
Meanwhile, the light transmittance of different areas of the mask plate is set to be different, so that the exposed photoresist and the flatness of a subsequently formed channel region can be effectively improved, and the charging characteristic of a thin film transistor channel is improved.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (10)
1. A method for manufacturing a thin film transistor array panel, comprising:
step A: forming a device board, wherein the device board is sequentially laminated with a substrate, a grid electrode insulating layer, an active layer and a metal layer;
and B: forming a photoresist layer on the metal layer, the photoresist layer including a first portion of the photoresist layer and a second portion of the photoresist layer;
and C: processing the first portion of the photoresist layer with a combination of a mask plate and a laser beam to remove the first portion of the photoresist layer;
step D: processing the metal layer to form a source electrode pattern, a drain electrode pattern and a channel region;
step E: and stripping the second part of the photoresist layer.
2. The method of manufacturing a thin film transistor array panel according to claim 1, wherein the step C comprises:
step c 1: erecting the mask plate on the photoresist layer;
step c 2: and irradiating laser to the mask plate, so that the laser penetrating through the mask plate performs laser etching on the first part of the photoresist layer to remove the first part of the photoresist layer.
3. The method of manufacturing a thin film transistor array panel of claim 2, wherein the step c2 comprises:
and translating the mask plate to a preset distance along the horizontal direction of the device plate so that the first part of the photoresist layer is etched.
4. The method of manufacturing a thin film transistor array panel according to claim 1, wherein the step D comprises:
step d 1: and carrying out laser etching on the position of the metal layer corresponding to the first part of the photoresist layer by utilizing the combination of the mask plate and the laser beam so as to form the source electrode pattern, the drain electrode pattern and the channel region.
5. The method of manufacturing a thin film transistor array panel of claim 4, wherein the step d1 comprises:
step d 11: erecting the mask plate on the photoresist layer;
step d 12: and irradiating the laser to the mask plate, so that the laser penetrating through the mask plate performs laser etching on the position of the metal layer corresponding to the first part of the photoresist layer, and the source electrode pattern, the drain electrode pattern and the channel region are formed.
6. The method of fabricating the thin film transistor array panel according to any one of claims 1 to 5, wherein the mask plate includes a light transmissive region and a light opaque region, wherein the light transmissive region of the mask plate is erected at a position corresponding to the first portion of the photoresist layer, and the light opaque region of the mask plate is erected at a position corresponding to the second portion of the photoresist layer.
7. The method of manufacturing a thin film transistor array panel according to claim 6, wherein the light-transmitting region of the mask plate includes a first light-transmitting portion and a second light-transmitting portion, the second light-transmitting portion is located on both sides of the first light-transmitting portion, and the light transmittance of the first light-transmitting portion is smaller than that of the second light-transmitting portion.
8. The method of manufacturing a thin film transistor array panel according to claim 1, wherein the step D further comprises:
step d 2: and etching the position of the metal layer corresponding to the first part of the photoresist layer by adopting an etching process to form the source electrode pattern, the drain electrode pattern and the channel region.
9. The method of fabricating a thin film transistor array panel according to any one of claims 1 to 5, comprising:
and forming the channel region protection layer.
10. A thin film transistor array panel, wherein the thin film transistor is manufactured by the method of manufacturing a thin film transistor array panel according to any one of claims 1 to 9.
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| CN202010079688.2A CN111261588B (en) | 2020-02-04 | 2020-02-04 | Thin film transistor array panel and manufacturing method thereof |
| PCT/CN2020/079567 WO2021155625A1 (en) | 2020-02-04 | 2020-03-17 | Thin film transistor array panel and manufacturing method therefor |
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| CN202010079688.2A CN111261588B (en) | 2020-02-04 | 2020-02-04 | Thin film transistor array panel and manufacturing method thereof |
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| WO2023279810A1 (en) * | 2021-07-09 | 2023-01-12 | 东莞市中麒光电技术有限公司 | Welding apparatus and welding method using same |
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| CN111261588B (en) | 2023-06-02 |
| WO2021155625A1 (en) | 2021-08-12 |
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