CN111243522A - Display device and driving method thereof - Google Patents
Display device and driving method thereof Download PDFInfo
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- CN111243522A CN111243522A CN201811443025.3A CN201811443025A CN111243522A CN 111243522 A CN111243522 A CN 111243522A CN 201811443025 A CN201811443025 A CN 201811443025A CN 111243522 A CN111243522 A CN 111243522A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
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- Theoretical Computer Science (AREA)
- Control Of El Displays (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a display device and a driving method thereof, the display device comprises: the pixel circuits are arranged in the display area and are connected with the corresponding scanning lines; a plurality of scanning signal output circuits disposed in the non-display area; at least one scanning signal output circuit corresponds to at least two scanning lines; each scanning line is connected with the output end of the corresponding scanning signal transmission circuit through one scanning signal gating unit; the scanning signal gating unit gates the scanning signal output circuit and the scanning lines connected with the scanning signal output circuit according to a gating signal. On the premise that the pixel density of the display device is not changed, the number of scanning signal output circuits is reduced, the size of a frame of the display device is reduced, and a narrow frame is realized.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display device and a driving method thereof.
Background
Compared with the conventional liquid crystal display panel, the OLED (Organic Light-Emitting Diode) display panel has the advantages of faster response speed, wider color gamut, higher brightness, more energy saving, and the like, and thus has attracted extensive attention of display technology developers, and is gradually becoming the mainstream of flat panel display devices.
In the current organic light emitting display device, a progressive scanning mode is adopted for operation. Sending a scanning signal through a scanning signal output circuit corresponding to the first row of pixel units, enabling the pixel circuits of the first row of pixel units to be opened, writing a data signal through a data signal line, and then conducting an organic light emitting diode to emit light; then the pixel circuits of the first row of pixel units are closed, scanning signals are sent out through scanning signal output circuits corresponding to the second row of pixel units, the pixel circuits of the second row of pixel units are opened, data signals are written in through data signal lines, and then the organic light emitting diodes are conducted to emit light; and by analogy, the display of the whole screen is finally realized.
By adopting the driving mode, each row of pixel units is at least provided with one corresponding scanning signal output circuit, the process difficulty is high, and the cost is high. In addition, the scan signal output circuit is usually disposed in a non-display area of the display device, i.e., a frame position of the display device, and the conventional driving method is not favorable for realizing a narrow frame.
Disclosure of Invention
The invention provides a display device and a driving method thereof, which are used for reducing the number of scanning signal output circuits, reducing the frame size of the display device and realizing a narrow frame.
In a first aspect, an embodiment of the present invention provides a display device, including:
the pixel circuits are arranged in the display area and are connected with the corresponding scanning lines;
a plurality of scanning signal output circuits disposed in the non-display area;
at least one scanning signal output circuit is provided with at least two corresponding scanning lines;
each scanning line is connected with the output end of the corresponding scanning signal transmission circuit through a scanning signal gating unit; the scanning signal gating unit gates the scanning signal output circuit and the scanning lines connected with the scanning signal output circuit according to the gating signal.
Optionally, each scan signal output circuit includes a shift register, and outputs the same scan signal to at least two scan lines simultaneously.
Optionally, the scan signal gating unit includes a first transistor, a first end of the first transistor is connected to the output end of the scan signal output circuit, a second end of the first transistor is connected to a scan line corresponding to the scan signal output circuit, and a control end of the first transistor accesses the gating signal.
Optionally, the number of the scan signal output circuits is m, the number of the scan lines is n × m, where m and n are integers greater than 1, each scan signal output circuit corresponds to n scan lines, and the n scan lines corresponding to the same scan signal output circuit form a scan line group;
the scanning signal gating units connected with the same scanning line group are sequentially turned on, and during the turn-on period of one scanning signal gating unit, the other scanning signal gating units are turned off.
Optionally, the display device further includes a plurality of light-emitting signal output circuits disposed in the non-display area and a plurality of light-emitting control signal lines disposed in the display area; the light-emitting control signal lines are connected with the light-emitting signal output circuits in a one-to-one correspondence manner;
the pixel circuits connected to the scanning lines in the same scanning line group are connected to the same light emission control signal line.
Optionally, the display device further includes n gating signal lines, each scanning line is arranged along the first direction, and along the first direction, the scanning signal gating unit connected to the kth scanning line in the scanning line group is connected to the kth gating signal line, where k is greater than or equal to 1 and less than or equal to n, and k is a positive integer.
Optionally, in one frame of scanning, the scanning signal output circuit outputs n pulse signals, the signals on the gate signal lines each include a plurality of pulses, and there is no overlap between pulses on different gate signal lines.
Optionally, the pixel circuit includes a second transistor, a third transistor, a fourth transistor, a fifth transistor, a driving transistor, a capacitor, and a light emitting element;
the first end of the second transistor is connected with the data signal input end, the second end of the second transistor is connected with the first end of the driving transistor and the first end of the fifth transistor, and the control end of the second transistor is connected with the first scanning signal input end; the second end of the fifth transistor is connected with the power supply input end;
the first end of the third transistor is connected with the second end of the driving transistor, the second end of the third transistor is connected with the first pole of the light-emitting element, the control end of the third transistor is connected with the light-emitting control signal line corresponding to the pixel circuit, and the second pole of the light-emitting element is connected with a reference voltage;
the control end of the driving transistor is connected with the first end of the capacitor, and the second end of the capacitor is connected with the power input end;
the first end of the fourth transistor is connected with the control end of the driving transistor, the second end of the fourth transistor is connected with the second end of the driving transistor, and the control end of the fourth transistor is connected with the first scanning signal input end;
the first end of the capacitor is connected with the control end of the driving transistor, and the second end of the capacitor is connected with the power input end.
Optionally, the pixel circuit further includes a sixth transistor and a seventh transistor;
a first end of the sixth transistor is connected with the control end of the driving transistor, a second end of the sixth transistor is connected with the reset signal input end, and the control end of the sixth transistor is connected with the second scanning signal input end;
a first end of the seventh transistor is connected with the first pole of the light emitting element, a second end of the seventh transistor is connected with the reset signal input end, and a control end of the seventh transistor is connected with the third scanning signal input end.
Optionally, the first scan signal input terminal of each row of pixel circuits is connected to one scan line;
the second scanning signal input ends of the pixel circuits connected with the scanning lines in the same scanning line group are connected with the output ends of the scanning signal output circuits corresponding to the scanning lines in the scanning line group;
the third scanning signal input ends of the pixel circuits connected with the scanning lines in the same scanning line group are connected with the output ends of the scanning signal output circuits corresponding to the scanning lines in the next scanning line group.
In a second aspect, embodiments of the present invention further provide a driving method of a display device, for driving and displaying the display device according to the first aspect of the present invention;
the driving method comprises the following steps:
the scanning signal output circuit simultaneously outputs scanning signals to at least two corresponding scanning lines;
the scanning signal gating unit conducts the scanning lines connected with the scanning signal output circuit and the scanning signal output circuit according to the gating signals.
Optionally, the number of the scan signal output circuits is m, the number of the scan lines is n × m, where m and n are integers greater than 1, each scan signal output circuit corresponds to n scan lines, and the n scan lines corresponding to the same scan signal output circuit form a scan line group;
the scan signal gate unit turns on the scan signal output circuit according to the gate signal and the scan line connected to the scan signal output circuit includes:
the scanning signal gating units connected with the same scanning line group are sequentially turned on, and during the turn-on period of one scanning signal gating unit, the other scanning signal gating units are turned off.
Optionally, in one frame of scanning, each of the scanning signal output circuits outputs n pulse signals, and during a kth pulse signal output by the scanning signal output circuit, a kth scanning signal gating unit connected to the scanning signal output circuit is turned on, where k is greater than or equal to 1 and less than or equal to n, and k is a positive integer.
The display device provided by the embodiment of the invention comprises a plurality of scanning signal output circuits in a non-display area, at least one scanning signal output circuit is provided with at least two corresponding scanning lines, each scanning line is connected with the output end of the corresponding scanning signal output circuit through a scanning signal gating unit, the scanning signal output circuits simultaneously output scanning signals to the corresponding at least two scanning lines, and the scanning signal gating unit gates the scanning lines connected with the scanning signal output circuits and the scanning signal output circuits according to the gating signals. Therefore, one scanning signal output circuit controls the multiple rows of pixel circuits, the number of the scanning signal output circuits is reduced, the frame size of the display device is reduced, and a narrow frame is realized on the premise that the pixel density of the display device is not changed.
Drawings
Fig. 1 is a schematic structural view of an organic light emitting display device in the prior art;
fig. 2 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another display device according to an embodiment of the present invention;
FIG. 4 is a block diagram of a pixel circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another display device according to an embodiment of the present invention;
FIG. 6 is a timing diagram illustrating an operation of a display device according to an embodiment of the present invention;
fig. 7 is a flowchart of a driving method of a display device according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic structural view of a related art organic light emitting display device, which includes a plurality of pixel circuits 11 in a display region 10 and a plurality of scan signal output circuits 21 in a non-display region 20, as shown in fig. 1. The plurality of pixel circuits 11 are arranged in an array in the display area 10, each row of pixel circuits 11 corresponds to one scanning signal output circuit 21, and each row of pixel circuits 11 is connected with the corresponding scanning signal output circuit through one scanning line. In the current organic light emitting display device, a progressive scanning mode is adopted for operation. Sending a scanning signal through a scanning signal output circuit corresponding to the first row of pixel circuits, enabling the first row of pixel circuits to be turned on, writing a data signal through a data signal line, and then conducting an organic light emitting diode to enable the organic light emitting diode to emit light; then, the first row of pixel circuits are closed, scanning signals are sent out through scanning signal output circuits corresponding to the second row of pixel circuits, the second row of pixel circuits are opened, data signals are written in through data signal lines, and then the organic light emitting diodes are conducted to emit light; and by analogy, the display of the whole screen is finally realized.
By adopting the driving mode, each row of pixel circuits is at least provided with one corresponding scanning signal output circuit, the process difficulty is high, and the cost is high. In addition, the scan signal output circuit is usually disposed in a non-display area of the display device, i.e., a frame position of the display device, and the conventional driving method is not favorable for realizing a narrow frame.
In view of the foregoing problems, an embodiment of the present invention provides a display device, including:
the pixel circuits are arranged in the display area and are connected with the corresponding scanning lines;
a plurality of scanning signal output circuits disposed in the non-display area;
at least one scanning signal output circuit is provided with at least two corresponding scanning lines;
each scanning line is connected with the output end of the corresponding scanning signal transmission circuit through a scanning signal gating unit; the scanning signal gating unit gates the scanning signal output circuit and the scanning lines connected with the scanning signal output circuit according to the gating signal.
The display device provided by the embodiment of the invention comprises a plurality of scanning signal output circuits in a non-display area, at least one scanning signal output circuit is provided with at least two corresponding scanning lines, each scanning line is connected with the output end of the corresponding scanning signal output circuit through a scanning signal gating unit, the scanning signal output circuits simultaneously output scanning signals to the corresponding at least two scanning lines, and the scanning signal gating unit gates the scanning lines connected with the scanning signal output circuits and the scanning signal output circuits according to the gating signals. Therefore, one scanning signal output circuit controls the multiple rows of pixel circuits, the number of the scanning signal output circuits is reduced, the frame size of the display device is reduced, and a narrow frame is realized on the premise that the pixel density of the display device is not changed.
The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the drawings in the embodiments, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative work belong to the protection scope of the present invention.
Fig. 2 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 2, the display device includes:
the specific structure of the pixel circuit 101 is not limited herein, and may be formed by electrically connecting any number of transistors, capacitors, and light emitting diodes to each other. The plurality of pixel circuits 101 are arranged in an array in the display area 101 to form a plurality of rows of pixel circuits and a plurality of columns of pixel circuits, and each row of pixel circuits is connected with a corresponding scanning line. At least one scan signal output circuit 201 corresponds to at least two scan lines, and in the embodiment of the present invention, for example, as shown in fig. 2, each scan signal output circuit 201 corresponds to two scan lines CL1 and CL2, the scan signal output circuit 201 simultaneously outputs the same scan signal to the corresponding two scan lines CL1 and CL2, and the two scan lines CL1 and CL2 are respectively connected to the output end of the corresponding scan signal output circuit 201 through scan signal gating units 211 and 212.
Taking data writing of one scan signal output circuit 201 and two corresponding rows of pixel circuits 101 as an example, the scan signal output circuit 201 simultaneously outputs the same scan signal to two corresponding scan lines CL1 and CL2, at the first time, the scan signal gating unit 211 turns on according to the gate signal to turn on the scan signal output circuit 201 and the scan line CL1, the scan signal is transmitted to one row of pixel circuits 101 connected to the scan line CL1 through the scan line CL1, and the row of pixel circuits 101 perform data signal writing; next, at the second timing, the scan signal gate unit 212 turns on according to the gate signal, and turns on the scan signal output circuit 201 and the scan line CL2, and the scan signal is transmitted to the pixel circuits 101 in one row connected to the scan line CL2 through the scan line CL2, and the pixel circuits 101 in the one row perform data signal writing. The scanning signal gating unit is turned on line by controlling the gating signal, so that the data signal is written line by line. After the data signal writing into the two rows of pixel circuits corresponding to the scanning signal output circuit 201 is completed and the display is performed, the above process is repeated, the data signal writing into the two rows of pixel circuits corresponding to the next scanning signal output circuit 201 is performed, the display is performed, and so on, and the driving display of the whole display device is completed.
Alternatively, with continued reference to fig. 2, each scan signal output circuit 201 includes a shift register (not shown), in other words, the scan signal output circuit 201 is formed by a shift register, and the shift register simultaneously outputs the same scan signal to the corresponding two scan lines CL1 and CL 2. Therefore, in the display device in the embodiment of the invention, the number of the shift registers is reduced by times compared with the prior art, and the process difficulty and the cost are reduced.
Fig. 3 is a schematic structural diagram of another display device according to an embodiment of the present invention, and optionally, the scan signal gating unit includes a first transistor T1, a first end of the first transistor T1 is connected to the output end of the scan signal output circuit 201, a second end of the first transistor T1 is connected to a corresponding scan line of the scan signal output circuit, and a control end of the first transistor T1 is connected to a gating signal. Alternatively, the first transistor T1 may be a P-type thin film transistor, and when the control terminal of the first transistor T1 receives a low level of the strobe signal, the first transistor is turned on, and the scan signal output by the scan signal output circuit 201 is transmitted to a row of pixel circuits connected to the scan line via the first transistor T1 and the scan line, and the row of pixel circuits is turned on and the data signal is written via the data signal line. The first transistor may also be an N-type transistor, and is turned on when the control terminal of the first transistor T1 receives the strobe signal as high.
Optionally, the number of the scan signal output circuits is m, the number of the scan lines is n × m, where m and n are integers greater than 1, each scan signal output circuit corresponds to n scan lines, and the n scan lines corresponding to the same scan signal output circuit form a scan line group. In the embodiment of the present invention, as shown in fig. 2, each scan signal output circuit 201 corresponds to 2 scan lines CL1 and CL2, i.e., 2 scan lines CL1 and CL2 corresponding to the same scan signal output circuit 201 form a scan line group. The 2 scan signal gate units 211 and 212 connected to the same scan line group are sequentially turned on, and while one of the scan signal gate units is turned on, the other scan signal gate units are turned off, that is, the two rows of pixel circuits connected to the two scan lines CL1 and CL2 of the same scan line group sequentially write data signals.
Optionally, as shown in fig. 3, the display device further includes a plurality of light-emitting signal output circuits 203 disposed in the non-display area 200 and a plurality of light-emitting control signal lines disposed in the display area; the light emission control signal lines are connected to the light emission signal output circuits 203 in one-to-one correspondence. The pixel circuits connected to the scan lines CL1 and CL2 within the same scan line group are connected to the same light emission control signal line, i.e., two rows of pixel circuits connected to the two scan lines CL1 and CL2 of the same scan line group are connected to the same light emission control signal line. After the two rows of pixel circuits connected by the two scan lines CL1 and CL2 in the same scan line group write data signals in sequence, one light-emitting control signal line corresponding to the scan line group inputs light-emitting signals to the two corresponding rows of pixel circuits, and the two rows of pixel circuits emit light simultaneously.
Optionally, the display device further includes n gating signal lines, each scanning line is arranged along the first direction, and along the first direction, the scanning signal gating unit connected to the kth scanning line in the scanning line group is connected to the kth gating signal line, where k is greater than or equal to 1 and less than or equal to n, and k is a positive integer. In the embodiment of the present invention, as shown in fig. 3, the display device further includes 2 gate signal lines SS1 and SS2, each of the scan lines is arranged along a first direction (a direction indicated by an arrow in fig. 3), the scan signal gate unit includes a first transistor T1, in each of the scan line groups, along the first direction, a control terminal of the first transistor T1 connected to the first scan line CL1 in the scan line group is connected to the first gate signal line SS1, and a control terminal of the first transistor T1 connected to the second scan line CL2 is connected to the second gate signal line SS 2. The two gate signal lines may be connected to the driving IC, and respectively output gate signals to sequentially turn on the two first transistors T1 corresponding to the scanning line group, and after completing the driving display of the two rows of pixel circuits corresponding to the group of scanning lines, sequentially turn on the two first transistors T1 corresponding to the next scanning line group, thereby completing the driving display of the two rows of pixel circuits corresponding to the group of scanning lines, and so on, thereby completing the driving display of the entire display device. The on-off of all the first transistors T1 can be controlled through the two gating signal lines, which is beneficial to wiring, space saving and realization of a narrow frame.
Fig. 4 is a structural diagram of a pixel circuit according to an embodiment of the present invention, and optionally, as shown in fig. 4, the pixel circuit includes a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a driving transistor DTFT, a capacitor Cst, and a light emitting element D1.
A first end of the second transistor T2 is connected to the Data signal input end Data, a second end of the second transistor T2 is connected to a first end of the driving transistor DTFT and a first end of the fifth transistor T5, a control end of the second transistor T2 is connected to the first scan signal input end Sn, and the first scan signal input end Sn is connected to a corresponding scan line; a second terminal of the fifth transistor T5 is connected to the power input terminal VDD; a first terminal of the third transistor T3 is connected to a second terminal of the driving transistor DTFT, a second terminal of the third transistor T3 is connected to a first electrode of the light emitting element D1, a control terminal of the third transistor T3 is connected to the light emitting control signal line En corresponding to the pixel circuit, and a second electrode of the light emitting element D1 is connected to a reference voltage ELVSS; the control end of the driving transistor DTFT is connected to the first end of the capacitor Cst, and the second end of the capacitor Cst is connected to the power input terminal VDD; a first terminal of the fourth transistor T4 is connected to the control terminal of the driving transistor DTFT, a second terminal of the fourth transistor T4 is connected to the second terminal of the driving transistor DTFT, and a control terminal of the fourth transistor T4 is connected to the first scan signal input terminal; a first terminal of the capacitor Cst is connected to the control terminal of the driving transistor DTFT, and a second terminal of the capacitor Cst is connected to the power input terminal VDD.
Optionally, the driving circuit further includes a sixth transistor T6 and a seventh transistor T7, a first end of the sixth transistor T6 is connected to the control end of the driving transistor DTFT, a second end of the sixth transistor T6 is connected to the reset signal input end Vint, and a control end of the sixth transistor T6 is connected to the second scan signal input end Sn-1; a first terminal of the seventh transistor T7 is connected to the first electrode of the light emitting element D1, a second terminal of the seventh transistor T7 is connected to the reset signal input terminal Vint, and a control terminal of the seventh transistor T7 is connected to the third scan signal input terminal Sn + 1.
Fig. 5 is a schematic structural diagram of another display device according to an embodiment of the present invention, wherein the structure of the pixel circuit 101 is as shown in fig. 4, and optionally, as shown in fig. 5, the first scan signal input terminal Sn of each row of pixel circuits is connected to a scan line; second scanning signal input ends Sn-1 of the pixel circuits connected with the scanning lines in the same scanning line group are connected with output ends of scanning signal output circuits 201 corresponding to the scanning lines in the scanning line group; the third scan signal input terminals Sn +1 of the pixel circuits connected to the scan lines in the same scan line group are connected to the output terminals of the scan signal output circuits 201 corresponding to the scan lines in the next scan line group. In the display device of this embodiment, the second scan signal input terminal Sn-1 and the third scan signal input terminal multiplex the scan signal output circuit corresponding to the previous scan line group and the scan signal output circuit corresponding to the next scan line group, and no scan output circuit needs to be additionally disposed, so that the circuit structure is simplified, and the size of the frame of the display device can be further reduced.
Fig. 6 is a timing diagram of an operation of a display device according to an embodiment of the present invention, where the timing diagram is suitable for the display device shown in fig. 5. Optionally, in one frame of scanning, the scanning signal output circuit outputs n pulse signals, the number of the pulse signals output by the scanning signal output circuit is equal to the number of rows of the pixel circuits connected to the scanning signal output circuit, the signals on the gate signal lines all include multiple pulses, and the pulses on different gate signal lines do not overlap. Referring to fig. 6, in the embodiment of the present invention, the scan signal output circuit outputs 2 pulse signals, the gate signal of the first gate signal line SS1 gates one of the 2 pulse signals output by the scan signal output circuit, so that the pulse signal is input to a row of pixel circuits connected to the scan line CL1 through the first scan line CL1, and the pixel circuits are turned on to perform data signal writing; next, the gate signal of the second gate signal line SS2 gates the other pulse signal of the 2 pulse signals output from the scanning signal output circuit, and the pulse signal is input to the pixel circuit connected to the scanning line CL2 through the second scanning line CL2, so that the pixel circuit is turned on to perform data signal writing. Specifically, the operation timing includes a first reset phase t1, a sampling phase t2, a second reset phase t3, and a light emission phase t 4. Hereinafter, taking the driving process of two rows of pixel circuits connected by the ith scanning line group as an example, taking all the transistors in the pixel circuits as P-type transistors, the description will be exemplarily made with reference to fig. 4, 5 and 6.
In the first reset phase T1, the output terminal of the scan signal output circuit 201 corresponding to the i-1 th scan line group outputs a low level signal to the second scan signal input terminal Sn-1 in the two rows of pixel circuits corresponding to the i-th scan line group, so that the sixth transistor T6 is turned on, the reset voltage Vint is written into the capacitor Cst via the sixth transistor T6, and the control terminals of the capacitor Cst and the driving transistor DTFT are reset, thereby eliminating the influence of the residual voltage signal of the previous frame.
The sampling phase T2 includes a first sampling phase T21 and a second sampling phase T22, in the first sampling phase T21, the first gate signal line SS1 outputs a low level, the second gate signal line SS2 outputs a high level, the first transistor T1 on the first scan line CL1 is turned on, the first transistor T1 on the second scan line CL2 is turned off, the scan signal output circuit 201 outputs a low level signal to the first scan signal input Sn of a row of pixel circuits connected to the first scan line CL1 through the first scan line CL1, so that the second transistor T2, the driving transistor DTFT, and the fourth transistor T4 in the row of pixel circuits are turned on, the data signal and the threshold voltage of the driving transistor DTFT are written into the capacitor Cst, and the control terminal potential of the driving transistor DTFT is gradually pulled up until the driving transistor DTFT is turned off. Next, in a second sampling period T22, the second gate signal line SS2 outputs a low level, the first gate signal line SS1 outputs a high level, the first transistor T1 on the second scan line CL2 is turned on, the first transistor T1 on the first scan line CL1 is turned off, the scan signal output circuit 201 outputs a low level signal to the first scan signal input terminal Sn of a row of pixel circuits connected to the second scan line CL2 through the second scan line CL2, so that the second transistor T2, the driving transistor DTFT, and the fourth transistor T4 in the row of pixel circuits are turned on, the data signal and the threshold voltage of the driving transistor DTFT are written in the capacitor Cst, and the control terminal potential of the driving transistor DTFT is gradually pulled up until the driving transistor DTFT is turned off.
In the second reset stage T3, the output terminal of the scan signal output circuit 201 corresponding to the i +1 th scan line group outputs a low level signal to the third scan signal input terminal Sn +1 of the two rows of pixel circuits corresponding to the i +1 th scan line group, so that the seventh transistor T7 is turned on, the reset voltage is written into the first electrode of the light emitting element D1 through the seventh transistor T7, and the potential of the first electrode of the light emitting element D1 is reset, thereby eliminating the influence of the residual voltage signal of the previous frame.
In the light emitting period T4, a light emitting control signal line corresponding to the ith scan line group simultaneously outputs light emitting signals to two corresponding rows of pixel circuits, so that the third transistor T3 and the fifth transistor T5 are turned on, and the power voltage at the first end of the driving transistor DTFT is combined with the data signal stored in the capacitor Cst and the threshold voltage of the driving transistor DTFT, so that the driving transistor DTFT is turned on, and the light emitting element D1 emits light.
After the driving display of the two rows of pixel circuits connected by the ith scanning line group is finished, the process is repeated to drive and display the two rows of pixel circuits connected by the (i + 1) th scanning line group, and the like, so that the driving display of the whole display device is finished.
In the display device of the embodiment, the plurality of rows of pixel circuits connected by the same scan line group simultaneously perform the first reset phase t1, the second reset phase t3 and the light emitting phase t4, and respectively perform the sampling phase t2, compared with the prior art in which each row of pixel circuits goes through the four phases, more time can be reserved in the scan time of one frame, and the saved time can be allocated to the sampling phase t2, so as to improve the accuracy of data writing and threshold compensation. In addition, the first reset stage t1 of the multi-row pixel circuit corresponding to the ith scan line group controls the writing of the reset signal by using the scan signal output by the scan signal output circuit corresponding to the ith-1 scan line group, the second reset stage t2 of the multi-row pixel circuit corresponding to the ith scan line group controls the writing of the reset signal by using the scan signal output by the scan signal output circuit corresponding to the ith +1 scan line group, and since the scan signal output by the scan signal output circuit includes a plurality of pulse signals, the pixel circuit will be reset for a plurality of times in the first reset stage t1 and the second reset stage respectively, thereby ensuring the reset effect and eliminating the influence of the residual voltage signal of the previous frame. In addition, a scanning signal output circuit respectively outputs n pulse signals through n scanning lines, a scanning signal gating unit gates the n pulse signals, n first transistors corresponding to scanning line groups are sequentially conducted, n rows of pixel circuits corresponding to the scanning line groups write data signals in sequence, under the condition that the number of rows of the pixel circuits is not changed, the number of the scanning signal output circuits is reduced in multiple, driving capability is improved, the size of a frame of the display device is reduced, and a narrow frame is achieved.
An embodiment of the present invention further provides a driving method of a display device, which is used for driving and displaying the display device according to the foregoing embodiment of the present invention, and fig. 7 is a flowchart of the driving method of the display device according to the embodiment of the present invention, and as shown in fig. 7, the driving method includes:
s11: the scanning signal output circuit simultaneously outputs scanning signals to at least two corresponding scanning lines.
As shown in fig. 2, the display device includes: a plurality of pixel circuits 101 and a plurality of scan lines disposed in the display area 100, a plurality of scan signal output circuits 201 and a plurality of scan signal gate units disposed in the non-display area 200. The plurality of pixel circuits 101 are arranged in an array in the display area 101 to form a plurality of rows of pixel circuits and a plurality of columns of pixel circuits, and each row of pixel circuits is connected with a corresponding scanning line. At least one scan signal output circuit 201 corresponds to at least two scan lines, and in the embodiment of the present invention, for example, as shown in fig. 2, each scan signal output circuit 201 corresponds to two scan lines CL1 and CL2, the scan signal output circuit 201 simultaneously outputs the same scan signal to the corresponding two scan lines CL1 and CL2, and the two scan lines CL1 and CL2 are respectively connected to the output end of the corresponding scan signal output circuit 201 through scan signal gating units 211 and 212.
S12: the scanning signal gating unit conducts the scanning lines connected with the scanning signal output circuit and the scanning signal output circuit according to the gating signals.
The scan signal gating unit gates the scan lines, which connect the scan signal output circuit and the scan signal output circuit 201, according to a gating signal. The scanning signal gating unit is turned on line by controlling the gating signal, so that the data signal is written line by line. Specifically, taking data writing of one of the scan signal output circuits 201 and two corresponding rows of pixel circuits 101 as an example, the scan signal output circuit 201 simultaneously outputs the same scan signal to two corresponding scan lines CL1 and CL2, at the first time, the scan signal strobe unit 211 turns on according to the strobe signal to turn on the scan signal output circuit 201 and the scan line CL1, the scan signal is transmitted to one row of pixel circuits 101 connected to the scan line CL1 through the scan line CL1, and the row of pixel circuits 101 perform data signal writing; next, at the second timing, the scan signal gate unit 212 turns on according to the gate signal, and turns on the scan signal output circuit 201 and the scan line CL2, and the scan signal is transmitted to the pixel circuits 101 in one row connected to the scan line CL2 through the scan line CL2, and the pixel circuits 101 in the one row perform data signal writing. The scanning signal gating unit is turned on line by controlling the gating signal, so that the data signal is written line by line. After the data signal writing into the two rows of pixel circuits corresponding to the scanning signal output circuit 201 is completed and the display is performed, the above process is repeated, the data signal writing into the two rows of pixel circuits corresponding to the next scanning signal output circuit 201 is performed, the display is performed, and so on, and the driving display of the whole display device is completed.
In the driving method of the display device according to the first embodiment of the present invention, in combination with the display device according to the first embodiment of the present invention, the scan signal output circuit outputs the scan signals to the at least two corresponding scan lines at the same time, and the scan signal gating unit turns on the scan lines connected to the scan signal output circuit and the scan signal output circuit according to the gating signals. Therefore, one scanning signal output circuit controls the multiple rows of pixel circuits, the number of the scanning signal output circuits is reduced, the frame size of the display device is reduced, and a narrow frame is realized on the premise that the pixel density of the display device is not changed.
Optionally, the number of the scan signal output circuits is m, the number of the scan lines is n × m, where m and n are integers greater than 1, each scan signal output circuit corresponds to n scan lines, and the n scan lines corresponding to the same scan signal output circuit form a scan line group.
The scan signal gate unit turns on the scan signal output circuit according to the gate signal and the scan line connected to the scan signal output circuit includes:
the scanning signal gating units connected with the same scanning line group are sequentially turned on, and in the period of turning on one scanning signal gating unit, the other scanning signal gating units are turned off, namely, the n rows of pixel circuits connected with the n scanning lines in the same scanning line group write data signals in sequence.
Optionally, in one frame of scanning, each scanning signal output circuit outputs n pulse signals, and during a kth pulse signal output by the scanning signal output circuit, a kth scanning signal gating unit connected to the scanning signal output circuit is turned on, where k is greater than or equal to 1 and less than or equal to n, and k is a positive integer. In the embodiment of the present invention, referring to fig. 6, the scan signal output circuit outputs 2 pulse signals, the gate signal of the first gate signal line SS1 gates one of the 2 pulse signals output by the scan signal output circuit, so that the pulse signal is input to a row of pixel circuits connected to the scan line through the first scan line CL1, and the pixel circuits are turned on to write data signals; next, the gate signal of the second gate signal line SS2 gates the other pulse signal of the 2 pulse signals output from the scanning signal output circuit, and the pulse signal is input to the pixel circuit in one row connected to the scanning line via the second scanning line CL2, so that the pixel circuit is turned on and data signal writing is performed.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (13)
1. A display device, comprising:
the pixel circuits are arranged in the display area and are connected with the corresponding scanning lines;
a plurality of scanning signal output circuits disposed in the non-display area;
at least one scanning signal output circuit corresponds to at least two scanning lines;
each scanning line is connected with the output end of the corresponding scanning signal transmission circuit through one scanning signal gating unit; the scanning signal gating unit gates the scanning signal output circuit and the scanning lines connected with the scanning signal output circuit according to a gating signal.
2. The display device according to claim 1, wherein each of the scan signal output circuits includes a shift register, and outputs the same scan signal to at least two of the scan lines at the same time.
3. The display device according to claim 1, wherein the scan signal gating unit comprises a first transistor, a first end of the first transistor is connected to an output end of the scan signal output circuit, a second end of the first transistor is connected to a corresponding scan line of the scan signal output circuit, and a control end of the first transistor receives a gating signal.
4. The display device according to claim 1, wherein the number of the scan signal output circuits is m, the number of the scan lines is n × m, where m and n are integers greater than 1, each of the scan signal output circuits corresponds to n scan lines, and the n scan lines corresponding to the same scan signal output circuit form a scan line group;
the scanning signal gating units connected with the same scanning line group are sequentially turned on, and during the turn-on period of one scanning signal gating unit, the other scanning signal gating units are turned off.
5. The display device according to claim 4, further comprising a plurality of light-emission signal output circuits provided in the non-display region and a plurality of light-emission control signal lines provided in the display region; the light-emitting control signal lines are connected with the light-emitting signal output circuits in a one-to-one correspondence manner;
and the pixel circuits connected with the scanning lines in the same scanning line group are connected with the same light-emitting control signal line.
6. The display device according to claim 4, further comprising n gate signal lines, wherein each of the scan lines is arranged along a first direction, and the scan signal gate unit connected to the k-th scan line in the scan line group is connected to the k-th gate signal line along the first direction, where k is greater than or equal to 1 and less than or equal to n, and k is a positive integer.
7. The display device according to claim 6, wherein the scanning signal output circuit outputs n pulse signals in one frame of scanning, the signals on the gate signal lines each include a plurality of pulses, and there is no overlap of the pulses on different gate signal lines.
8. The display device according to claim 5, wherein the pixel circuit comprises a second transistor, a third transistor, a fourth transistor, a fifth transistor, a driving transistor, a capacitor, and a light-emitting element;
a first end of the second transistor is connected with a data signal input end, a second end of the second transistor is connected with a first end of the driving transistor and a first end of the fifth transistor, and a control end of the second transistor is connected with a first scanning signal input end; a second end of the fifth transistor is connected with a power supply input end;
a first end of the third transistor is connected with a second end of the driving transistor, a second end of the third transistor is connected with a first pole of the light-emitting element, a control end of the third transistor is connected with a light-emitting control signal line corresponding to the pixel circuit, and a second pole of the light-emitting element is connected with a reference voltage;
the control end of the driving transistor is connected with the first end of the capacitor, and the second end of the capacitor is connected with the power input end;
a first end of the fourth transistor is connected with the control end of the driving transistor, a second end of the fourth transistor is connected with the second end of the driving transistor, and the control end of the fourth transistor is connected with the first scanning signal input end;
the first end of the capacitor is connected with the control end of the driving transistor, and the second end of the capacitor is connected with the power input end.
9. The display device according to claim 8, wherein the pixel circuit further comprises a sixth transistor and a seventh transistor;
a first end of the sixth transistor is connected with the control end of the driving transistor, a second end of the sixth transistor is connected with the reset signal input end, and the control end of the sixth transistor is connected with the second scanning signal input end;
a first terminal of the seventh transistor is connected to the first electrode of the light emitting element, a second terminal of the seventh transistor is connected to the reset signal input terminal, and a control terminal of the seventh transistor is connected to the third scan signal input terminal.
10. The display device according to claim 9,
the first scanning signal input end of each row of the pixel circuits is connected with one scanning line;
second scanning signal input ends of the pixel circuits connected with the scanning lines in the same scanning line group are connected with output ends of scanning signal output circuits corresponding to the scanning lines in the same scanning line group;
and the third scanning signal input ends of the pixel circuits connected with the scanning lines in the same scanning line group are connected with the output ends of the scanning signal output circuits corresponding to the scanning lines in the next scanning line group.
11. A driving method for a display device, for driving a display device according to claim 1;
the driving method includes:
the scanning signal output circuit simultaneously outputs scanning signals to at least two corresponding scanning lines;
and the scanning signal gating unit conducts the scanning lines connected with the scanning signal output circuit and the scanning signal output circuit according to the gating signals.
12. The method for driving a display device according to claim 11, wherein the number of the scanning signal output circuits is m, the number of the scanning lines is n × m, where m and n are integers greater than 1, each of the scanning signal output circuits corresponds to n scanning lines, and the n scanning lines corresponding to the same scanning signal output circuit form a scanning line group;
the scan signal gating unit turns on the scan signal output circuit according to a gating signal and a scan line connected to the scan signal output circuit includes:
the scanning signal gating units connected with the same scanning line group are sequentially turned on, and during the turn-on period of one scanning signal gating unit, the other scanning signal gating units are turned off.
13. The method for driving a display device according to claim 12, wherein each of the scan signal output circuits outputs n pulse signals in one frame of scanning, and the kth scan signal gate unit connected to the scan signal output circuit is turned on during a kth pulse signal output from the scan signal output circuit, where 1 ≦ k ≦ n, and k is a positive integer.
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| CN201811443025.3A CN111243522A (en) | 2018-11-29 | 2018-11-29 | Display device and driving method thereof |
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| CN201811443025.3A CN111243522A (en) | 2018-11-29 | 2018-11-29 | Display device and driving method thereof |
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