CN111239899A - Method for realizing spot size conversion based on substrate SiON waveguide bonding and spot size converter - Google Patents
Method for realizing spot size conversion based on substrate SiON waveguide bonding and spot size converter Download PDFInfo
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- CN111239899A CN111239899A CN202010187478.5A CN202010187478A CN111239899A CN 111239899 A CN111239899 A CN 111239899A CN 202010187478 A CN202010187478 A CN 202010187478A CN 111239899 A CN111239899 A CN 111239899A
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/14—Mode converters
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/122—Basic optical elements, e.g. light-guiding paths
- G02B6/1228—Tapered waveguides, e.g. integrated spot-size transformers
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12035—Materials
- G02B2006/12038—Glass (SiO2 based materials)
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- G—PHYSICS
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- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12133—Functions
- G02B2006/12152—Mode converter
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12166—Manufacturing methods
- G02B2006/12197—Grinding; Polishing
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Abstract
The invention discloses a method for realizing spot size conversion based on substrate SiON waveguide bonding and a spot size converter, comprising the following steps: preparing a silicon substrate and an SOI wafer, and manufacturing a first groove on the silicon substrate; production of SiO2A lower cladding to fill the first recess; in the SiO2Manufacturing a second groove in the lower cladding; manufacturing a first SiON waveguide layer to fill the second groove, and carrying out planarization treatment; bonding the top silicon of the SOI wafer to the surface of the silicon substrate, and removing the substrate silicon layer and the buried oxide layer of the SOI wafer; etching the top silicon layer to form the second layerA silicon waveguide on the SiON waveguide layer; manufacturing a second SiON waveguide layer on the first SiON waveguide layer to form an SiON waveguide; production of SiO2And an upper cladding layer to clad the SiON waveguide. The invention can prevent the leakage of the mode field, can realize non-airtight packaging, has high coupling efficiency and is compatible with the CMOS process.
Description
Technical Field
The invention belongs to the technical field of silicon light, and particularly relates to a method for realizing spot size conversion based on substrate SiON waveguide bonding and a spot size converter.
Background
The spot size conversion technology of the end-face coupling waveguide in the silicon optical chip is always the core technical difficulty of silicon optical chip commercialization, the diameter of the spot size of the silicon waveguide is about 0.5um, the spot size of the single-mode fiber coupled with the silicon waveguide is about 10um, and huge mode mismatch causes great end-face coupling loss.
The spot size of the silicon optical waveguide can be expanded to about 3um by the structure of Inverse Taper in the prior art, but SiO is generated by the substrate2The die spot size is difficult to increase further due to the limitations of the buried oxide (Box) and overcladding (Cladding) thicknesses, while the mode readily diffuses into the substrate silicon due to its presence. Although the end-face coupling waveguide based on the cantilever beam structure can further increase the size of the mode spot, the suspended physical structure of the end-face coupling waveguide is difficult to ensure the stability of the device structure, and is not suitable for non-airtight packaging.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a method for realizing the spot size conversion based on the substrate SiON waveguide bonding, which can prevent the mode field leakage and realize the non-airtight packaging, and a spot size converter.
In one aspect of the invention, a method for realizing mode spot conversion based on substrate SiON waveguide bonding comprises the following steps:
preparing a silicon substrate and an SOI wafer, and manufacturing a first groove on the silicon substrate;
production of SiO2A lower cladding to fill the first recess;
in the SiO2Manufacturing a second groove in the lower cladding;
manufacturing a first SiON waveguide layer to fill the second groove, and carrying out planarization treatment;
bonding the top silicon of the SOI wafer to the surface of the silicon substrate, and removing the substrate silicon layer and the buried oxide layer of the SOI wafer;
etching the top layer silicon to form a silicon waveguide on the first SiON waveguide layer;
manufacturing a second SiON waveguide layer on the first SiON waveguide layer to form an SiON waveguide;
production of SiO2And an upper cladding layer to clad the SiON waveguide.
Further, the SiO is prepared2The lower cladding is used for filling the first groove, and specifically comprises: growing SiO on the silicon substrate2Filling the first groove with a material, and performing planarization treatment to form SiO2And a lower cladding layer.
Further, the manufacturing of the first SiON waveguide layer to fill the second groove specifically includes: and growing an SiON material on the silicon substrate to fill the second groove, and carrying out planarization treatment to form a first SiON waveguide layer.
Further, fabricating a second SiON waveguide layer on the first SiON waveguide layer to form a SiON waveguide, specifically including: on the silicon substrate, SiO2Growing a second SiON waveguide layer on the surfaces of the lower cladding layer, the first SiON waveguide layer and the silicon waveguide, and carrying out planarization treatment; etching the second SiON waveguide layer to form a SiON waveguide.
Further, the silicon waveguide is of an inverted cone structure with gradually changed width.
Further, the silicon waveguide is located at a central position of the SiON waveguide.
Further, the planarization process includes a chemical mechanical polishing process.
In another aspect of the invention, a spot-size converter comprises:
silicon substrate and SiO on said silicon substrate2A cladding layer;
is located on the SiO2A SiON waveguide inside the cladding;
a silicon waveguide located inside the SiON waveguide.
Further, the silicon waveguide is located at a central position of the SiON waveguide.
Further, the silicon waveguide is of an inverted cone structure with gradually changed width.
Compared with the prior art, the invention has the following beneficial effects:
the invention realizes the mode spot conversion from Si waveguide to SiON waveguide by bonding, and sequentially etches grooves on a silicon substrate and sequentially fills SiO2And SiON to SiO2The sizes of the cladding and the SiON waveguide are customized, and the size of the SiON waveguide is comparable to the size of the fiber core of the single-mode fiber, so that the high-efficiency coupling with the single-mode fiber is realized, the requirement on coupling precision is reduced, and the coupling efficiency is improved. Meanwhile, the method is compatible with the CMOS process, has stable structural mechanical performance and is suitable for large-scale manufacturing and commercialization.
Drawings
Fig. 1 is a schematic structural diagram of step S1 in embodiment 1 of the method for implementing spot size conversion based on substrate SiON waveguide bonding and the spot size converter of the present invention;
fig. 2 is a schematic structural diagram of step S2 in the method for implementing spot size conversion based on substrate SiON waveguide bonding and the spot size converter in embodiment 1 of the present invention;
fig. 3 is a schematic structural diagram of step S3 in the method for implementing spot size conversion based on substrate SiON waveguide bonding and the spot size converter in embodiment 1 of the present invention;
fig. 4 is a schematic structural diagram of step S4 in the method for implementing spot size conversion based on substrate SiON waveguide bonding and the spot size converter in embodiment 1 of the present invention;
fig. 5 is a schematic structural diagram of step S5 in the method for implementing spot size conversion based on substrate SiON waveguide bonding and the spot size converter in embodiment 1 of the present invention;
fig. 6 is a schematic structural diagram of step S6 in the method for implementing spot size conversion based on substrate SiON waveguide bonding and the spot size converter in embodiment 1 of the present invention;
fig. 7 is a schematic structural diagram of step S7 in the method for implementing spot size conversion based on substrate SiON waveguide bonding and the spot size converter in embodiment 1 of the present invention;
fig. 8 is a schematic structural diagram of step S8 in the method for implementing spot size conversion based on substrate SiON waveguide bonding and the spot size converter in embodiment 1 of the present invention;
fig. 9 is a schematic structural diagram of the spot size conversion method based on the substrate SiON waveguide bonding and the spot size converter in embodiment 2 and step S9 in embodiment 1;
fig. 10 is a schematic flow chart of a method for implementing spot size conversion based on substrate SiON waveguide bonding and a spot size converter in embodiment 1 of the present invention.
Wherein, 1 silicon substrate, 11 first grooves, 12 second grooves, 2SOI wafer, 21 top silicon, 22 substrate silicon layer, 23 buried oxide layer, 3SiO2Cladding, 31SiO2A lower cladding, a 4SiON waveguide, 41 a first SiON waveguide layer, 42 a second SiON waveguide layer, 5 silicon waveguides.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further described with reference to the specific drawings.
Example 1:
the method for realizing the spot size conversion based on the substrate SiON waveguide bonding, as shown in FIGS. 1-10, comprises the following steps:
s1: preparing a silicon substrate 1 and an SOI wafer 2, and etching a first groove 11 on the silicon substrate 1 at a position corresponding to an end-face coupled waveguide, as shown in FIG. 1;
s2: growing SiO on the silicon substrate 12Filling the first groove 11 with a material, and performing chemical mechanical polishing to ensure flatness of the wafer and form SiO2A lower cladding 31, as shown in FIG. 2;
s3: in the SiO2The second groove 12 is etched in the lower cladding 31, as shown in fig. 3;
s4: growing a SiON material on the silicon substrate 1 to fill the second groove 12, and performing chemical mechanical polishing to ensure the wafer to be flat, so as to form a first SiON waveguide layer 41; continuing chemical mechanical polishing to remove excess material to complete the preparation of the substrate silicon wafer, as shown in fig. 4;
s5: cleaning the surface of the SOI wafer 2 to ensure that the surface of the wafer is clean and flat, bonding the top silicon 21 of the SOI wafer 2 to the surface of the silicon substrate 1 in a flip-chip bonding mode, and removing the substrate silicon layer 22 and the buried oxide layer 23 of the SOI wafer 2 to leave the top silicon 21, as shown in FIG. 5;
s6: manufacturing a silicon waveguide 5 at a central position of the top silicon layer 21 corresponding to the first SiON waveguide layer 41, where the silicon waveguide 5 has an inverted cone-shaped structure with gradually changing width, as shown in fig. 6;
s7: on the silicon substrate 1, SiO2Growing a second SiON waveguide layer 42 on the surfaces of the lower cladding layer 31, the first SiON waveguide layer 41 and the silicon waveguide 5, and performing chemical mechanical polishing treatment, as shown in fig. 7;
s8: etching the second SiON waveguide layer 42 to form a SiON waveguide 4, as shown in fig. 8;
s9: on the silicon substrate 1, SiO2Surface-grown SiO of the lower cladding layer 31 and the SiON waveguide 42An upper cladding layer forming SiO for cladding the SiON waveguide 42 Cladding 3, as shown in fig. 9.
The size and depth of the first groove in the step S1 are determined according to the SiO of the cladding layer2Is set. The second groove size in the step S3 corresponds to the size of the SiON waveguide. The step S4 of removing the excess material means that the SiO on the surface of the original silicon substrate will be exceeded2And SiON material is removed. The removal of the substrate silicon layer and the buried oxide layer of the SOI wafer in step S5 may be performed by chemical mechanical polishing and/or wet etching. In the step S6, a dry etching method may be used to fabricate the silicon waveguide with the top layer silicon, and the silicon waveguide with the gradually-changed width and the inverted cone-shaped structure is used to transition the mode field from the silicon waveguide to SiO2A waveguide. The second SiON waveguide layer grown in the step S7 and the first SiON waveguide layer together serve as a material for fabricating the SiON waveguide. SiO grown in the step S92Upper bagLayer and the SiO2The lower cladding layers together serve as a cladding for the SiON waveguide.
According to the scheme, the SiON waveguide with the customized size is manufactured by adopting the substrate silicon wafer and the SOI wafer in a wafer bonding mode, and the silicon waveguide mode is converted into the SiON waveguide mode, so that the mode matching with the single-mode optical fiber is realized. On one hand, the refractive index of the SiON waveguide is more matched with that of the optical fiber core layer, and SiO can be freely set through the waveguide structure customized by the silicon substrate2The sizes of the cladding and the SiON waveguide enable the size of the mode spot of the SiON waveguide to be matched with the size of the mode spot of the optical fiber. At the same time because of SiO2The existence of the cladding can prevent the size of the SiON mode field from leaking into the silicon substrate, and realize the non-airtight packaging of the silicon optical chip. By selecting refractive indices between Si and SiO2The SiON waveguide between the materials not only solves the problem of mode field matching, but also solves the problems of mode field leakage and non-airtight packaging.
The invention realizes the mode spot conversion from Si waveguide to SiON waveguide by bonding, and sequentially etches grooves on the silicon substrate and sequentially fills SiO2And SiON to SiO2The sizes of the cladding and the SiON waveguide are customized, and the size of the SiON waveguide is comparable to the size of the fiber core of the single-mode fiber, so that the high-efficiency coupling with the single-mode fiber is realized, the requirement on coupling precision is reduced, and the coupling efficiency is improved. Meanwhile, the method is compatible with the CMOS process, has stable structural mechanical performance and is suitable for large-scale manufacturing and commercialization.
Example 2:
the spot-size converter, as shown in fig. 9, includes:
is located on the SiO2A SiON waveguide 4 inside the cladding 3;
a silicon waveguide 5 located inside the SiON waveguide 4. The silicon waveguide 5 may be an inverted cone structure with a gradually changing width.
The spot-size converter of this embodiment can be obtained by the method of example 1. The SiON waveguide is completely coated on the SiO2In the cladding layer, mode field leakage can be effectively prevented.
In particular, the silicon waveguide 5 may be located in a central position of the SiON waveguide 4. When the silicon waveguide is positioned at the central position of the SiON waveguide, the high-efficiency coupling with the single-mode fiber can be further realized, the coupling precision requirement can be reduced, and the coupling efficiency can be improved.
The above description is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiment, and all technical solutions belonging to the principle of the present invention belong to the protection scope of the present invention. Modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention.
Claims (10)
1. The method for realizing the spot size conversion based on the substrate SiON waveguide bonding is characterized by comprising the following steps of:
preparing a silicon substrate and an SOI wafer, and manufacturing a first groove on the silicon substrate;
production of SiO2A lower cladding to fill the first recess;
in the SiO2Manufacturing a second groove in the lower cladding;
manufacturing a first SiON waveguide layer to fill the second groove, and carrying out planarization treatment;
bonding the top silicon of the SOI wafer to the surface of the silicon substrate, and removing the substrate silicon layer and the buried oxide layer of the SOI wafer;
etching the top layer silicon to form a silicon waveguide on the first SiON waveguide layer;
manufacturing a second SiON waveguide layer on the first SiON waveguide layer to form an SiON waveguide;
production of SiO2And an upper cladding layer to clad the SiON waveguide.
2. The method for realizing mode spot conversion based on substrate SiON waveguide bonding according to claim 1, wherein said fabricating SiO2The lower cladding is used for filling the first groove, and specifically comprises: growing SiO on the silicon substrate2A material to fill the first recess andline planarization process to form SiO2And a lower cladding layer.
3. The method for realizing the spot conversion based on the substrate SiON waveguide bonding of claim 1, wherein the fabricating the first SiON waveguide layer to fill the second groove specifically comprises: and growing an SiON material on the silicon substrate to fill the second groove, and carrying out planarization treatment to form a first SiON waveguide layer.
4. The method for realizing mode spot conversion based on the substrate SiON waveguide bonding as claimed in claim 1, wherein fabricating a second SiON waveguide layer on the first SiON waveguide layer to form a SiON waveguide specifically comprises: on the silicon substrate, SiO2Growing a second SiON waveguide layer on the surfaces of the lower cladding layer, the first SiON waveguide layer and the silicon waveguide, and carrying out planarization treatment; etching the second SiON waveguide layer to form a SiON waveguide.
5. The method for realizing mode spot conversion based on the substrate SiON waveguide bonding of claim 1, wherein the silicon waveguide is an inverted cone structure with gradually changed width.
6. The method for achieving mode spot conversion based on substrate SiON waveguide bonding of claim 1, wherein said silicon waveguide is located at a central position of said SiON waveguide.
7. The method for realizing the mode spot conversion based on the substrate SiON waveguide bonding as claimed in any one of claims 1 to 6, wherein the planarization treatment mode comprises a chemical mechanical polishing treatment.
8. A spot size converter, comprising:
silicon substrate and SiO on said silicon substrate2A cladding layer;
is located on the SiO2A SiON waveguide inside the cladding;
a silicon waveguide located inside the SiON waveguide.
9. The spot converter according to claim 8, wherein:
the silicon waveguide is located at the center of the SiON waveguide.
10. The spot converter according to claim 8, wherein:
the silicon waveguide is of an inverted cone structure with gradually changed width.
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CN111290148A (en) * | 2020-02-19 | 2020-06-16 | 联合微电子中心有限责任公司 | Method for manufacturing modulator with SiO2 substrate formed based on wafer bonding and modulator structure thereof |
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