CN111225517B

CN111225517B - Hole pattern electroplating method for FPC

Info

Publication number: CN111225517B
Application number: CN201911221793.9A
Authority: CN
Inventors: 蔡合汉; 续振林; 周健强
Original assignee: Xiamen Hongxin Electronic Technology Group Co Ltd
Current assignee: Xiamen Hongxin Electronic Technology Group Co Ltd
Priority date: 2019-12-03
Filing date: 2019-12-03
Publication date: 2021-03-09
Anticipated expiration: 2039-12-03
Also published as: CN111225517A

Abstract

The invention discloses a hole pattern electroplating method of an FPC, which comprises the following steps: pressing a dry film on the substrate, and pressing the dry film on the two sides of the top and bottom layers of the substrate to be locally plated with copper; local exposure; local developing, wherein the obtained substrate is developed to form a unit hole local dry film plating graph of the top layer and the bottom layer, and base copper in a splicing plate waste area outside an FPC unit product is exposed; local copper plating, namely, carrying out local copper plating on the substrate, and plating copper on the via hole of the product and the splicing board waste simultaneously; and demolding the substrate to remove the top and bottom dry films. According to the invention, the electroplated area of the product is enlarged to the sum of the local electroplating area of the hole and the area of the jointed board waste from the original small local electroplating area of the hole, so that the electroplating area of the substrate is greatly increased, and when the via hole of the product is plated with copper, the jointed board waste is also plated with copper at the same time, so that the electroplating density of the product can be dispersed, the height of the hole ring of the via hole is effectively reduced, the poor film clamping performance of the hole ring is improved, the dry film residue is reduced, and the circuit manufacturing yield is improved.

Description

Hole pattern electroplating method for FPC

Technical Field

The invention relates to the technical field of manufacturing of a Flexible Printed Circuit (FPC), in particular to a hole pattern electroplating method of the FPC.

Background

An important process in the production process flow of the flexible printed circuit board FPC is hole metallization, the multilayer circuits of the flexible printed circuit board FPC are electrically conducted through the conduction hole metallization, the conventional flexible printed circuit board adopts whole board copper plating, when the hole copper plating is carried out, a layer of copper is plated on the board surface of the product on the basis of the original base copper, the surface copper of the product is increased, and the requirements of the circuits of the conventional flexible printed circuit board are different and can be met; for FPC products with requirements on fine circuits or impedance, the surface copper of the products is required to be within a certain thickness, and other surface areas can not be plated with copper except for copper plated in hole areas, so that the FPC products are manufactured by adopting a hole local pattern electroplating method. As shown in figures 1 to 3, the conventional electroplating method for local hole patterns of FPC is to press dry films on both sides of the top and bottom layers of the drilled FPC substrate 1, as shown in figure 2, expose and transfer the whole plate hole local dry film-plated pattern 10 onto the dry film on the top and bottom layers of the substrate 1, leave the upper and lower hole ring regions of the via hole 111 unexposed, expose all the other regions of the FPC unit product 11 and the jointed board waste 12, expose the upper and lower hole ring regions of the via hole 111 after development, cover the other regions of the plate surface with the dry films, because the area of the hole ring region is very small, for example, 1 ten thousand via holes are formed in one product, the hole ring is 0.4mm, and the electroplating area is only about 0.13dm²As shown in FIG. 3, electricityThe current density is concentrated in the area of the via hole 111 of the product during copper plating, the via hole ring is particularly thick after electroplating and exceeds the specification requirement, mushroom-shaped hole rings are easy to appear and clamp dry films around the hole, such as a defective hole ring 100 shown in fig. 3, and the via hole ring is not easy to be stripped and completely removed in the subsequent dry film stripping process, so that the open short circuit is not good during the subsequent circuit manufacturing.

In view of the above, the present inventors have made extensive studies and research on various defects and inconveniences caused by the perfection of the conventional method for plating a hole local pattern of an FPC.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provide a hole pattern electroplating method for an FPC, which can improve the height of a hole ring and poor film clamping of the hole ring.

In order to achieve the above purpose, the solution of the invention is:

a hole pattern electroplating method of FPC comprises the following steps:

step A: pressing a dry film on the substrate, and pressing the dry film on the two sides of the top and bottom layers of the substrate to be locally plated with copper;

and B: b, local exposure, namely performing top and bottom layer exposure on the substrate obtained in the step A, transferring the exposure of the unit hole local dry film plating graph to top and bottom layer dry films corresponding to all FPC unit product areas in the substrate, and not exposing a splicing board waste area outside the FPC unit product;

and C: b, local developing, namely developing the substrate obtained in the step B to form a unit hole local dry film plating graph of the top layer and the bottom layer, and exposing base copper in a splicing plate waste area outside the FPC unit product;

step D: c, local copper plating, namely, carrying out local copper plating on the substrate obtained in the step C, and plating copper on the via hole of the product and the upper area of the jointed board waste material simultaneously;

step E: and D, demolding, namely demolding the substrate obtained in the step D to remove the dry film on the top layer and the bottom layer.

Further, in the step a, the thickness of the dry film is greater than the height of the hole ring of the via hole.

Further, in the step B, the shape of the dry film pattern is plated on the part of the unit hole, and a preset size of 0.5-3mm is expanded on the basis of the shape of the FPC unit product.

Further, the preset size is preferably 1 mm.

Further, in the step D, during the local copper plating, 1 or more plating accompanying plates are hung on the front and the back of the substrate synchronously, and the plating receiving area of each plating accompanying plate is equal to the local plating receiving area of the substrate.

Further, in the step D, the plating accompanying plate is made of the same size as the substrate through the steps A to C.

By adopting the scheme, the electroplating plated area of the product is enlarged to the sum of the local electroplating area of the hole and the area of the jointed board waste from the original small local electroplating area of the hole, so that the electroplating area of the substrate is greatly increased, and when the via hole of the product is plated with copper, the jointed board waste is also plated with copper at the same time, so that the electroplating density of the product can be dispersed, the hole ring height of the via hole is effectively reduced, the defect of a hole ring clamped film is improved, the dry film residue is reduced, and the circuit manufacturing yield is improved.

Drawings

FIG. 1 is a schematic plan view of a FPC substrate after drilling;

FIG. 2 is a plan view of a pattern of a whole-board hole partially plated with a dry film after an original FPC substrate is developed;

FIG. 3 is a cross-sectional view of a hole ring with poor plating after partial plating of holes in a via hole of a product;

FIG. 4 is a perspective view of the FPC substrate of the present invention after development;

FIG. 5 is a plan view of a unit hole pattern with a dry film plated locally after development of the FPC substrate according to the present invention;

FIG. 6 is a schematic diagram of the design of the unit hole local dry film plating pattern according to the present invention;

FIG. 7 is a cross-sectional view of a hole ring plating OK after partial hole plating of a via hole of a product of the present invention;

fig. 8 is a process flow for electroplating a hole pattern according to the present invention.

Detailed Description

In order to further explain the technical solution of the present invention, the present invention is explained in detail by the following specific examples.

As shown in fig. 4 to 7, the present invention is a hole pattern plating method of FPC, the process flow of which comprises the steps of:

step A: pressing a dry film on the substrate, and pressing the dry film on the two sides of the top and bottom layers of the substrate 2 to be locally plated with copper;

and B: b, local exposure, wherein the substrate 2 obtained in the step A is subjected to top and bottom layer exposure, the unit hole local dry film plating graph 20 is exposed and transferred to top and bottom layer dry films corresponding to all FPC unit product areas in the substrate 2, and the splicing board waste 22 area outside the FPC unit product 21 is not exposed;

and C: b, local developing, namely developing the substrate 2 obtained in the step B to form a unit hole local dry film plating graph 20 of the top layer and the bottom layer, and exposing base copper in a splicing plate waste 22 area outside the FPC unit product;

step D: c, local copper plating, namely, carrying out local copper plating on the substrate 2 obtained in the step C, and plating copper on the areas of the via hole 211 and the splicing plate waste 22 of the product at the same time;

step E: and D, demolding the substrate 2 obtained in the step D to remove the dry film on the top layer and the bottom layer.

Further, in step a, the dry film thickness is greater than the orifice ring 200 gauge height.

Further, in step B, the shape of the unit hole local plating dry film pattern 20 is expanded by a preset dimension H on the basis of the shape of the FPC unit product 21, where the preset dimension H is 0.5-3mm, preferably 1mm, as shown in fig. 6.

Further, in the step D, in the local copper plating, 1 or more plating assistant plates are attached to the front and rear sides of the substrate 2 in synchronization with each other, and the plating areas of the plating assistant plates are equal to the local plating areas of the substrate 2.

Further, in the step D, the plating assistant plate can be manufactured by the steps a to C with the same size as the substrate.

By adopting the scheme, the electroplating plated area of the product is enlarged to the sum of the local electroplating area of the hole and the area of the jointed board waste from the original small local electroplating area of the hole, so that the electroplating area of the substrate is greatly increased, and when the via hole of the product is plated with copper, the jointed board waste is also plated with copper at the same time, so that the electroplating density of the product can be dispersed, the height of the hole ring 200 of the via hole is effectively reduced, the defect of clamped film of the hole ring is improved, the dry film residue is reduced, and the circuit manufacturing yield is improved.

The above embodiments and drawings are not intended to limit the form and style of the present invention, and any suitable changes or modifications thereof by those skilled in the art should be considered as not departing from the scope of the present invention.

Claims

1. A hole pattern electroplating method of an FPC is characterized by comprising the following steps:

2. The method of electroplating a hole pattern of an FPC as claimed in claim 1, wherein: in the step A, the thickness of the dry film is larger than the height of the hole ring of the via hole.

3. The method of electroplating a hole pattern of an FPC as claimed in claim 1, wherein: in the step B, the appearance of the dry film graph is plated on the part of the unit hole, and the preset size of 0.5-3mm is expanded on the basis of the appearance of the FPC unit product.

4. A hole pattern plating method for FPC as claimed in claim 3, characterized in that: the preset size is 1 mm.

5. The method of electroplating a hole pattern of an FPC as claimed in claim 1, wherein: and D, during local copper plating, synchronously hanging 1 or more plating accompanying plates respectively in front of and behind the substrate, wherein the plating area of the plating accompanying plates is equal to the local plating area of the substrate.

6. The method of electroplating a hole pattern of an FPC as claimed in claim 5, wherein: in the step D, the plating accompanying plate is made in the steps A to C and has the same size as the substrate.