CN111223879B - Display substrate, manufacturing method thereof and display device - Google Patents
Display substrate, manufacturing method thereof and display device Download PDFInfo
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- CN111223879B CN111223879B CN202010128028.9A CN202010128028A CN111223879B CN 111223879 B CN111223879 B CN 111223879B CN 202010128028 A CN202010128028 A CN 202010128028A CN 111223879 B CN111223879 B CN 111223879B
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- 239000000758 substrate Substances 0.000 title claims abstract description 89
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 239000002184 metal Substances 0.000 claims description 55
- 239000000463 material Substances 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 18
- 239000010408 film Substances 0.000 claims 12
- 239000010409 thin film Substances 0.000 claims 1
- 230000006378 damage Effects 0.000 abstract description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 230000002411 adverse Effects 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003700 hair damage Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
- G02F1/13378—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by treatment of the surface, e.g. embossing, rubbing or light irradiation
- G02F1/133784—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by treatment of the surface, e.g. embossing, rubbing or light irradiation by rubbing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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Abstract
The invention provides a display substrate, a manufacturing method thereof and a display device, wherein the display substrate comprises a substrate base plate, the substrate base plate comprises a first surface and a second surface which are arranged in a reverse manner, the substrate base plate comprises a display area and a binding area positioned on one side of the display area, the binding area comprises a first area and a second area on the first surface of the substrate base plate, the first area is provided with a chip on film, and the second area is an area without the chip on film; on the first surface of the substrate, the second area is provided with a filling structure, and the height difference between the filling structure and the flip-chip film in the direction vertical to the first surface is smaller than a preset value. The invention aims to provide a display substrate, a manufacturing method thereof and a display device, which can reduce the break difference of a binding region, improve the working environment of friction hair and greatly reduce the damage probability of the friction hair, thereby reducing the occurrence probability of Rubbing Mura and improving the production efficiency.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display substrate, a manufacturing method of the display substrate and a display device.
Background
With the continuous progress of flat panel display technology, liquid crystal displays have been successfully applied to various display devices such as notebooks, monitors, and televisions. In the production process of the liquid crystal display, various adverse phenomena occur due to design or process reasons, which have great influence on the continuity of production and production efficiency. One of them is Rubbing Mura.
In the production process of the liquid crystal display, the surface of a PI film (polyimide film) on the surface of a substrate needs to be rubbed to form a channel on the surface of the PI film, so as to align the liquid crystal. In the Rubbing alignment process, rubbing Mura may occur for various reasons. Among them, the end difference of the substrate edge damages the friction hair as one of the most main reasons. The traditional display product comprises a display area and a binding area, wherein the binding area is provided with a Chip On Flex (or Chip On Film), areas On two sides of the Chip On Flex (or Chip On Film) are blank areas, and are not filled with any material.
Disclosure of Invention
The invention aims to provide a display substrate, a manufacturing method thereof and a display device, which can reduce the break difference of a binding region, improve the working environment of friction hair and greatly reduce the damage probability of the friction hair, thereby reducing the occurrence probability of rubber Mura and improving the production efficiency.
The technical scheme provided by the invention is as follows:
a display substrate comprises a substrate base plate, wherein the substrate base plate comprises a first surface and a second surface which are arranged in a reverse mode, the substrate base plate comprises a display area and a binding area positioned on one side of the display area, the binding area comprises a first area and a second area on the first surface of the substrate base plate, the first area is provided with a chip on film, and the second area is an area without the chip on film;
and on the first surface of the substrate base plate, the second area is provided with a filling structure, and the height difference between the filling structure and the flip chip film in the direction vertical to the first surface is smaller than a preset value.
Illustratively, the display substrate is provided with a plurality of conductive film layers in the display area, the plurality of conductive film layers including: a metal conductive layer and an ITO conductive layer formed on the first surface of the substrate base plate; the filling structure comprises a pseudo conductive film layer made of the same material as the conductive film layer of the display area, and the pseudo conductive film layer and the conductive film layer in the display area are arranged in an insulating mode.
Illustratively, the metal conductive layer includes a gate line metal layer;
the ITO conductive layer comprises a first ITO conductive layer and a second ITO conductive layer, and the second ITO conductive layer is formed on one side, far away from the first surface, of the first ITO conductive layer;
wherein the dummy conductive film layer includes:
a dummy gate line metal layer which is made of the same material as the gate line metal layer and is arranged at the same layer, and the dummy gate line metal layer is insulated from the gate line metal layer of the display area;
and/or the pseudo second ITO conducting layer is made of the same material as the second ITO conducting layer and arranged on the same layer, and the pseudo second ITO conducting layer and the second ITO conducting layer are arranged in an insulating mode.
Illustratively, the filling structure includes a first portion and a second portion, wherein,
the first part is opposite to the second part, is positioned on one side of the second part close to the chip on film and is formed by adopting the pseudo second ITO conductive layer;
the second part is formed by adopting the pseudo grid line metal layer and the pseudo second ITO conductive layer, and the pseudo second ITO conductive layer is positioned on one side, far away from the first surface, of the pseudo grid line metal layer.
Illustratively, the display substrate comprises a positioning mark formed by a grid line metal layer, and the filling structure is formed by the pseudo second ITO conductive layer at a position close to the positioning mark.
Illustratively, the pseudo conductive film layer comprises a plurality of strip-shaped structures arranged in parallel.
Illustratively, the display substrate is an array substrate.
A display device comprises the display substrate.
A method of manufacturing a display substrate includes:
providing a substrate, wherein the substrate comprises a first surface and a second surface which are arranged in an opposite way, the substrate comprises a display area and a binding area positioned on one side of the display area, and the binding area comprises a first area and a second area;
forming a chip on film in the first area of the bonding area on the first surface of the substrate base plate, forming a filling structure in the second area, wherein the height difference between the filling structure and the chip on film in the direction vertical to the first surface is smaller than a preset value.
In an exemplary embodiment, in the method, forming a flip chip film in the first region of the bonding region and forming a filling structure in the second region on the first surface of the substrate specifically includes:
forming a grid line metal layer in the display area by adopting the same composition process, and forming a pseudo grid line metal layer in the second area;
and forming a second ITO conductive layer in the display area by adopting the same composition process, and forming a pseudo second ITO conductive layer in the second area.
The beneficial effects brought by the invention are as follows:
according to the scheme, the filling structure is arranged in the region, where the chip on film is not arranged, of the binding region of the display substrate, and the region around the chip on film is filled through the filling structure, so that the binding region fault of the display substrate is reduced, the working environment of friction hair is improved, the damage probability of the friction hair is greatly reduced, the occurrence probability of Rubbing Mura is reduced, and the yield of products is improved.
Drawings
Fig. 1 is a schematic partial structure diagram of a bonding region of a display substrate according to an embodiment of the invention;
FIG. 2 is a schematic sectional view in the direction B-B in FIG. 1.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings of the embodiments of the present disclosure. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are within the scope of protection of the disclosure.
Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a," "an," or "the" and similar referents do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
The embodiment of the invention provides a display substrate, a manufacturing method thereof and a display device, aiming at the problems that in the prior art, the bonding area has large breaking difference due to blank areas around a chip on film of the bonding area of the display substrate, and the friction alignment is poor due to friction hair damage easily caused during friction alignment.
As shown in fig. 1, a display substrate provided in an embodiment of the present invention includes a substrate 100, where the substrate 100 includes a first surface and a second surface that are opposite to each other, the substrate 100 includes a display area AA and a bonding area located at one side of the display area AA, the bonding area includes a first area and a second area on the first surface of the substrate 100, the first area is provided with a Chip On Film (COF) 200, and the second area is an area where the chip on film 200 is not provided; on the first surface of the substrate base plate 100, the second area is provided with a filling structure (dummy filling structure) 300, and the height difference between the filling structure 300 and the flip chip 200 in the direction perpendicular to the first surface is smaller than a predetermined value.
In the above scheme, the filling structure 300 is arranged at the second region of the display substrate where the bonding region is not provided with the chip on film 200, and the blank region around the chip on film 200 is filled through the filling structure 300, so that the bonding region break of the display substrate is reduced, the working environment of the friction hair is improved, the damage probability of the friction hair is greatly reduced, the occurrence probability of the Rubbing Mura is reduced, and the yield of the product is improved.
It should be noted that the height difference between the filling structure 300 and the flip chip package 200 in the direction perpendicular to the first surface is smaller than a predetermined value, wherein the value range of the predetermined value is not limited, and the filling structure can be designed according to actual needs as long as the predetermined value is smaller than the height difference between the flip chip package 200 and the first surface.
In an embodiment provided by the present invention, the display substrate is provided with a plurality of conductive film layers in the display area AA, and the plurality of conductive film layers include: a metal conductive layer, an ITO conductive layer, and the like formed on the first surface of the substrate base plate 100, for example, taking the display substrate as an array substrate, the metal conductive layer may include a gate line metal layer, a gate electrode metal layer (the gate electrode metal layer and the gate line metal layer may be made of the same material and disposed in the same layer), a data line metal layer, and the like; the ITO conductive layer may include a first ITO conductive layer (1 ITO), a second ITO conductive layer (2 ITO), and the like, where the second ITO conductive layer is formed on a side of the first ITO conductive layer away from the first surface, for example, taking the display substrate as an array substrate, the first ITO conductive layer may be a pixel electrode layer, and the second ITO electrode layer may be a COM signal line layer, and the like. The filling structure 300 may include a dummy conductive film (dummy conductive film) made of the same material as the conductive film in the display area AA, and the dummy conductive film and the conductive film in the display area AA are insulated from each other.
With the above scheme, the filling structure 300 may be formed by using a metal conductive layer or an ITO conductive layer in the display area AA, so that the filling structure 300 may be formed by using the same patterning process while the metal conductive layer or the ITO conductive layer in the display area AA is manufactured.
In practical applications, the filling structure 300 may be made of other materials, which are not limited to this, and may be formed of, for example, an insulating layer material. However, the patterning process is simpler with a metal conductive layer or an ITO conductive layer material than with other materials.
Further, in an exemplary embodiment, the dummy conductive film layer includes:
a dummy gate line metal layer (dummy gate layer) 310 made of the same material as the gate line metal layer and disposed on the same layer, wherein the dummy gate line metal layer 310 is insulated from the gate line metal layer in the display area AA;
and/or a pseudo second ITO conductive layer (dummy 2ITO layer) 320 made of the same material and disposed on the same layer as the second ITO conductive layer, wherein the pseudo second ITO conductive layer 320 is insulated from the second ITO conductive layer.
With the above scheme, the dummy conductive film layer of the filling structure 300 may be the dummy gate line metal layer 310 which is the same layer as the gate line of the display area AA and is made of the same material, may also be the dummy second ITO conductive layer 320 which is the same layer as the second ITO conductive layer and is made of the same material, and may be one or both of the dummy gate line metal layer 310 and the dummy second ITO conductive layer 320 to form the filling structure 300.
By adopting the above scheme, taking the array substrate as an example, since the sum of the thicknesses of the gate line metal layer and the second ITO conductive layer in the display area AA is closer to the thickness of the chip on film 200, in the second area of the bonding area, the gate line metal layer and the second ITO conductive layer are preferably used to form the filling structure 300, so that the height difference between the filling structure 300 and the chip on film 200 is smaller, and the process and the structure are simpler. In addition, it should be noted that the dummy conductive film layer in the filling structure 300 may only perform a filling function, and is insulated from other conductive film layers in the display region and the bonding region, and is not electrically connected.
It is understood that, in practical applications, for different types and models of display products, the filling structure 300 may also be formed by using a suitable film layer material according to the thickness of each film layer in the display area AA, and the like, which is not limited herein.
In addition, in an exemplary embodiment of the invention, as shown in fig. 1 and fig. 2, the filling structure 300 includes a first portion 300a and a second portion 300b, wherein the first portion 300a is located at a side close to the flip chip film 200 opposite to the second portion 300b and is formed by using the dummy second ITO conductive layer 320; the second portion 300b is formed by using the dummy gate line metal layer 310 and the dummy second ITO conductive layer 320, and the dummy second ITO conductive layer 320 is located on one side of the dummy gate line metal layer 310, which is far away from the first surface.
With the above scheme, since the area where the chip on film 200 is located or the position close to the chip on film 200 has a structure formed by the gate line metal layer, the position close to the chip on film 200 is only filled with the dummy second ITO conductive layer 320, and the position far from the chip on film 200 is filled with the dummy gate line metal layer 310 and the dummy second ITO conductive layer 320.
It should be noted that the position close to the flip chip package 200 and the position far from the flip chip package can be limited according to practical applications, and the position is not limited.
In an example, the display substrate includes a positioning mark 201 formed by using a gate line metal layer, and the filling structure 300 is formed by using the dummy second ITO conductive layer 320 at a position close to the positioning mark 201.
By adopting the above scheme, the display substrate includes the positioning mark 201 for binding and positioning, and is formed by using the gate line metal layer, so that in order to avoid adverse effects caused by the fact that the dummy gate line metal layer 310 is too close to the gate line metal layer, for example, too close to the positioning mark, which leads to difficulty in identifying the positioning mark, etc., the position close to the positioning mark is only filled with the dummy second ITO conductive layer 320, and the position far from the positioning mark is filled with the dummy gate line metal layer 310 and the dummy second ITO conductive layer 320.
In addition, as shown in fig. 1 and 2, in an exemplary embodiment, the dummy conductive film layer includes a plurality of stripe structures arranged in parallel.
By adopting the scheme, the pseudo conductive film layer is of the strip grating structure, because when the pseudo conductive film layer is formed by adopting the metal layer, the metal layer is made of opaque materials, the light transmittance is influenced, and the pseudo conductive film layer is designed into a strip shape, so that the light transmittance can be increased. It is understood that the dummy conductive film layer may not be a stripe structure when the dummy conductive film layer is made of a light-transmitting material, such as an ITO conductive layer. This is not limitative.
In addition, the display substrate provided in the embodiment of the present invention may be an array substrate, or may be another type of substrate, which is not limited to this.
The embodiment of the invention also provides a display device which comprises the display substrate provided by the embodiment of the invention.
The embodiment of the invention also provides a manufacturing method of the display substrate, which is used for manufacturing the display substrate provided by the embodiment of the invention, and the method comprises the following steps:
step S1, providing a substrate 100, wherein the substrate 100 comprises a first surface and a second surface which are arranged in an opposite way, the substrate 100 comprises a display area AA and a binding area positioned on one side of the display area AA, and the binding area comprises a first area and a second area;
step S2, forming a flip chip film 200 in the first area of the bonding region on the first surface of the substrate 100, and forming a filling structure 300 in the second area, where a height difference between the filling structure 300 and the flip chip film 200 in a direction perpendicular to the first surface is smaller than a predetermined value.
In the method, the step S2 specifically includes:
and forming a conductive film layer in the display area AA by adopting the same composition process, and forming a pseudo conductive film layer in the second area.
Specifically, the step S2 includes:
step S21, forming a gate line metal layer in the display area AA by using the same patterning process, and forming a dummy gate line metal layer 310 in the second area;
step S22, forming a second ITO conductive layer in the display area AA by using the same patterning process, and forming a dummy second ITO conductive layer 320 in the second area.
The following points need to be explained:
(1) The drawings of the embodiments of the disclosure only relate to the structures related to the embodiments of the disclosure, and other structures can refer to the common design.
(2) For purposes of clarity, the thickness of layers or regions in the figures used to describe embodiments of the present disclosure are exaggerated or reduced, i.e., the figures are not drawn on a true scale. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, it can be "directly on" or "under" the other element or intervening elements may be present.
(3) Without conflict, embodiments of the present disclosure and features of the embodiments may be combined with each other to arrive at new embodiments.
The above description is only a specific embodiment of the present disclosure, but the scope of the present disclosure is not limited thereto, and the scope of the present disclosure should be subject to the scope of the claims.
Claims (6)
1. A display substrate comprises a substrate base plate, wherein the substrate base plate comprises a first surface and a second surface which are arranged in a back-to-back mode, the substrate base plate comprises a display area and a binding area located on one side of the display area, the binding area on the first surface of the substrate base plate comprises a first area and a second area, a chip on film is arranged in the first area, and the second area is an area where the chip on film is not arranged;
the flip chip package structure is characterized in that a filling structure is arranged in the second area on the first surface of the substrate base plate, and the height difference between the filling structure and the flip chip thin film in the direction vertical to the first surface is smaller than a preset value;
the display substrate is in be equipped with a plurality of electrically conductive retes in the display area, a plurality of electrically conductive retes include: a metal conductive layer and an ITO conductive layer formed on the first surface of the substrate base plate;
the filling structure comprises a pseudo conductive film layer made of the same material as the conductive film layer of the display area, and the pseudo conductive film layer and the conductive film layer in the display area are arranged in an insulating mode;
the metal conductive layer comprises a grid line metal layer;
the ITO conductive layer comprises a first ITO conductive layer and a second ITO conductive layer, and the second ITO conductive layer is formed on one side, far away from the first surface, of the first ITO conductive layer;
wherein the dummy conductive film layer includes:
a dummy gate line metal layer which is made of the same material as the gate line metal layer and is arranged at the same layer, and the dummy gate line metal layer is insulated from the gate line metal layer of the display area;
and/or a pseudo second ITO conducting layer which is made of the same material as the second ITO conducting layer and is arranged on the same layer, and the pseudo second ITO conducting layer and the second ITO conducting layer are arranged in an insulating mode;
the filling structure comprises a first portion and a second portion, wherein,
the first part is opposite to the second part, is positioned on one side of the second part close to the chip on film and is formed by adopting the pseudo second ITO conductive layer;
the second part is formed by adopting the pseudo grid line metal layer and the pseudo second ITO conductive layer, and the pseudo second ITO conductive layer is positioned on one side of the pseudo grid line metal layer, which is far away from the first surface;
the display substrate comprises a positioning mark formed by a grid line metal layer, and the filling structure is formed by the pseudo second ITO conductive layer at a position close to the positioning mark.
2. The display substrate of claim 1,
the pseudo conductive film layer comprises a plurality of strip-shaped structures which are arranged in parallel.
3. The display substrate according to any one of claims 1 to 2,
the display substrate is an array substrate.
4. A display device comprising the display substrate according to any one of claims 1 to 3.
5. A method for manufacturing a display substrate, applied to the display substrate according to any one of claims 1 to 3, comprising:
providing a substrate, wherein the substrate comprises a first surface and a second surface which are arranged in an opposite way, the substrate comprises a display area and a binding area positioned on one side of the display area, and the binding area comprises a first area and a second area;
forming a flip chip film in the first area of the binding area on the first surface of the substrate base plate, and forming a filling structure in the second area, wherein the height difference between the filling structure and the flip chip film in the direction vertical to the first surface is smaller than a preset value.
6. The method for manufacturing a display substrate according to claim 5, wherein the method for manufacturing a display substrate according to claim 1 is used for forming a flip-chip film in the first area of the bonding region and a filling structure in the second area on the first surface of the substrate, and specifically includes:
forming a grid line metal layer in the display area by adopting the same composition process, and forming a pseudo grid line metal layer in the second area;
and forming a second ITO conductive layer in the display area by adopting the same composition process, and forming a pseudo second ITO conductive layer in the second area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202010128028.9A CN111223879B (en) | 2020-02-28 | 2020-02-28 | Display substrate, manufacturing method thereof and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010128028.9A CN111223879B (en) | 2020-02-28 | 2020-02-28 | Display substrate, manufacturing method thereof and display device |
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| CN111223879B true CN111223879B (en) | 2022-10-18 |
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| CN113745287B (en) * | 2021-08-16 | 2023-07-28 | 深圳市华星光电半导体显示技术有限公司 | Display device and method for manufacturing the same |
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