CN111212000B

CN111212000B - Exchange backplate based on PXIe bus

Info

Publication number: CN111212000B
Application number: CN201911369017.3A
Authority: CN
Inventors: 尉晓惠; 季嘉瑞; 何逸伦; 杨硕; 张朝元
Original assignee: Beijing Aerospace Measurement and Control Technology Co Ltd
Current assignee: Beijing Aerospace Measurement and Control Technology Co Ltd
Priority date: 2019-12-26
Filing date: 2019-12-26
Publication date: 2022-04-08
Anticipated expiration: 2039-12-26
Also published as: CN111212000A

Abstract

The utility model provides a PXIe bus-based exchange backplate, through exchange backplate is connected with master control equipment, exchange backplate includes: a system slot position, a function slot position and an exchange chip; the switching chip is used for being connected with the main control equipment through optical fibers, obtaining a test task and configuring a system slot position and a function slot position according to the test task. The method can realize the flexible switching of single master control single task, single master control multiple tasks and multiple master control multiple tasks for meeting various test requirements, improve the equipment integration level, reduce the equipment cost, the complexity, the maintenance period and the like.

Description

Exchange backplate based on PXIe bus

Technical Field

The invention belongs to the field of test equipment, and particularly relates to a PXIe bus-based switching backplane.

Background

The PXIe bus exchange backboard is a key part for building a PXIe bus test system, and a communication bridge between an upper computer and a main control device can be built for the test system through the PXIe bus exchange backboard. The PXIe bus exchange backboard provides a communication interface, a trigger and clock synchronization interface, a power supply interface, a system working state monitoring interface and the like for a test system, and a designer can define relevant indexes of the PXIe bus exchange backboard, such as bus speed, a communication link, slot type, backboard size and the like according to project requirements and in compliance with the PXIe bus specification.

The existing PXIe bus exchange backboard focuses on single-task multifunctional development, that is, a single main control device can control various functional modules through the PXIe bus exchange backboard and is used for integrating multifunctional test equipment, and a user can select a PXIe bus exchange backboard with a corresponding specification according to the complexity of test functions. However, for executing a multi-task and multi-function test, a plurality of test subsystems need to be built and completed by cascading a plurality of PXIe bus switch backplanes, so that the test system is not only complex, but also increases the equipment cost, the maintenance period and the like.

Disclosure of Invention

In view of this, the embodiment of the present application provides a PXIe bus-based switching backplane, which can implement flexible switching of a single master control single task, a single master control multiple task, and a multiple master control multiple task for meeting various test requirements, improve device integration, reduce device cost, complexity, and maintenance period, and the like.

According to an aspect of the present disclosure, an embodiment of the present application provides a PXIe bus-based switching backplane, where the switching backplane is connected to a master control device, and the switching backplane includes: a system slot position, a function slot position and an exchange chip; the switching chip is used for being connected with the main control equipment through optical fibers, obtaining a test task and configuring a system slot position and a function slot position according to the test task.

In a possible implementation manner, the system slot configures a communication interface with the switch chip according to the test task.

In a possible implementation manner, the number of the functional slot is at least one.

In one possible implementation, the functional slot may be configured as a synchronous functional slot.

In a possible implementation manner, the functional slot may be further configured as a digital channel module, an analog test module, a radio frequency test module, a high-speed serial interface module, a DSP module, and a PMU module.

In a possible implementation manner, the system slot configures a task mode according to the test task, and thus, the embodiment of the present application has the following beneficial effects:

Drawings

Fig. 1 is a block diagram illustrating a PXIe bus-based switching backplane according to an embodiment of the present disclosure.

FIG. 2 illustrates a PXIe bus based single master mode switch backplane schematic in accordance with one embodiment of the present application;

FIG. 3 is a schematic diagram of a PXIe bus based multi-master mode switching backplane according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a single master multifunctional switch backplane based on a PXIe bus according to an embodiment of the present application;

Detailed Description

In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the drawings are described in detail below.

Fig. 1 is a block diagram illustrating a PXIe bus-based switching backplane according to an embodiment of the present disclosure. As shown in fig. 1, the switching backplane comprises: a system slot position 101, a function slot position 103 and an exchange chip 102; the switch chip 102 is configured to connect with the main control device 104 through an optical fiber, acquire a test task, and configure the system slot 101 and the function slot 103 according to the test task.

Fig. 2, fig. 3, and fig. 4 respectively show schematic diagrams of a single master mode, a multi-master mode, and a single master multi-function backplane based on a PXIe bus according to an embodiment of the present application.

As shown in fig. 2, fig. 3, and fig. 4, a 24-slot PXIe bus switch backplane is used in an integrated circuit test system, where the integrated circuit test system communicates with a PCIe switch chip of the PXIe bus switch backplane through optical fiber transmission and photoelectric conversion by a PCIe bus of a master control device, and the PCIe switch chip is configured by hardware according to an obtained test task to form 1 uplink port, 23 downlink ports, an uplink port and a system slot connected to a master control end, and the 23 downlink ports are connected to a plurality of function slots required by the integrated circuit test system. And the system slot position, the communication connection port of the PCIe exchange chip and the function slot position can be configured according to the requirement of the test task.

The PXIe bus exchange backboard is a bus architecture form realized based on a PCIe bus exchange chip, and according to a test task, the bus architecture of the PXIe bus exchange backboard can be set into a plurality of modes such as single main control and single task, single main control and multiple tasks, multiple main control and multiple tasks and the like through a software or hardware configuration mode so as to meet various task requirements of a test system.

A single master mode (single master and single task) switch backplane schematic diagram based on a PXIe bus shown in fig. 2. As shown in fig. 2, in the integrated circuit test system, a PCIe bus of the computer master device 1 is subjected to photoelectric conversion by an optical fiber through the backplane system slot 3, and then communicates with a PCIe switch chip 4 of the PXIe bus switch backplane 2. According to the measurement task requirement of the single master control single task of the integrated circuit test system, the PCIe switching chip 4 is configured into 1 uplink port connected with the system slot 3 and 23 downlink ports connected with the functional slots through hardware, and one of the functional slots is configured into a synchronous module slot.

A PXIe bus-based multi-master mode (multi-master multi-task) switch backplane schematic shown in fig. 3. As shown in fig. 3, according to the measurement task requirement of the multiple master control single tasks of the integrated circuit test system, the PCIe switch chip 4 is configured by hardware into n uplink ports connected to the system slot 3 and 23 downlink ports connected to the functional slots, and one of the functional slots is configured as a synchronization module slot. And the master control device 1 and the master control device 2 …, the master control device n respectively communicate with n uplink ports of the PCIe switch chip 4 of the PXIe bus switch backplane 2 after being subjected to photoelectric conversion by the PCIe bus of the integrated circuit test system through the backplane system slot 3 through the optical fiber. The master control device 1 and the master control device 2 … control the master control device n to control different functional slots respectively. Of course, the functional slot may be set to other functional module slots, such as a data processing module slot, a digital channel module slot, etc., according to the requirement of the measurement task of the integrated circuit test system, which is not limited herein. Certainly, the functional slot may also be set as a synchronous module slot, a data processing module slot, a digital channel module slot, and the like, so as to form a multi-master control multi-task mode of the PXIe bus of the integrated circuit test system, so as to meet the test task requirements of the multi-master control multi-task of the integrated circuit test system.

A single master multi-function switch backplane schematic based on PXIe bus shown in fig. 4. As shown in fig. 4, according to the measurement task requirement of the single master control multitask of the integrated circuit test system, the PCIe switch chip 4 is configured by hardware into 1 uplink port connected to the system slot 3, 23 downlink ports connected to the functional slot, and one port connected to the FPGA 5. In the integrated circuit testing system, a PCIe bus of computer master control equipment 1 is in communication with a PCIe exchange chip 4 of a PXIe bus exchange backboard 2 after being subjected to photoelectric conversion through a backboard system slot position 3 through optical fibers. The FPGA5 is used for synchronously controlling a plurality of functional slot positions, and the functional slot positions can be configured into a digital channel module slot position, a high-speed serial interface module slot position, a radio frequency test module slot position, a simulation test module slot position, a DPS slot position, a PMU slot position and the like according to the requirement of a test task.

Through the multiple ports of the PCIe switching chip of the single-master-control multifunctional switching back plate of the PXIe bus, the related test functions required by the integrated circuit can be integrated, multiple test functions of the integrated circuit test system can be realized by one machine, and through the field test requirements, the test requirements of the integrated circuit test system can be flexibly met by replacing various functional module slot positions, so that the system integration degree of the PXIe bus switching back plate is improved, the flexibility is high, the equipment quantity is reduced, the maintenance period is shortened, and the like.

The switching backplane based on the PXIe bus provided by the embodiment of the present disclosure is connected to a master control device through the switching backplane, and the switching backplane includes: a system slot position, a function slot position and an exchange chip; the switching chip is used for being connected with the main control equipment through optical fibers, obtaining a test task and configuring a system slot position and a function slot position according to the test task. The method can realize the flexible switching of single master control single task, single master control multiple tasks and multiple master control multiple tasks for meeting various test requirements, improve the equipment integration level, reduce the equipment cost, the complexity, the maintenance period and the like.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A PXIe bus-based switching backplane, said switching backplane being connected to a master control device, said switching backplane comprising: a system slot position, a function slot position and an exchange chip; the switching chip is used for being connected with the main control equipment through optical fibers, obtaining a test task and configuring a system slot position and a function slot position according to the test task, wherein the specific configuration method comprises the following steps:

according to the test task, the PXIe bus exchange backboard sets the bus architecture of the PXIe bus exchange backboard to a task mode comprising a single main control single task, a single main control multitask and a plurality of main control multitasks in a software or hardware configuration mode; and configuring a system slot position and a function slot position according to the test task.

2. The switch backplane of claim 1, wherein the system slot configures the communication interface with the switch chip based on the test task.

3. The switch backplane of claim 1, wherein the number of functional slots is at least one.

4. The switching backplane of claim 3, wherein the functional slots are configurable as isochronous functional slots.

5. The switching backplane of claim 3, wherein the functional slots are further configurable as digital channel modules, analog test modules, radio frequency test modules, high speed serial interface modules, DSP modules, PMU modules.