CN111148371A

CN111148371A - Electrostatic clamping of electronic boards

Info

Publication number: CN111148371A
Application number: CN201911048932.2A
Authority: CN
Inventors: 西尔维斯特·德梅尔
Original assignee: ASM Assembly Systems GmbH and Co KG
Current assignee: ASMPT GmbH and Co KG
Priority date: 2018-11-06
Filing date: 2019-10-31
Publication date: 2020-05-12
Also published as: TW202019252A; DE102018127658A1; TWI712350B

Abstract

A method of manufacturing a printed circuit board assembly, comprising clamping an electronic board to a carrier by applying an electrostatic field to the electronic board, and applying a print medium (e.g. a conductive print medium) to the electronic board using a printing process during which the electronic board is kept clamped to the carrier by the electrostatic field. Additional plates may be clamped to the carrier in turn, enabling precise placement of each plate.

Description

Electrostatic clamping of electronic boards

Technical Field

The present invention relates to a method of manufacturing a printed circuit board assembly, a method of clamping an electronic board for processing and a carrier.

Background

Industrial screen printers typically apply conductive printing media onto a flat workpiece, such as a circuit board or electronic board, by applying the conductive printing media, such as solder paste or conductive ink, through a pattern of holes in a screen (sometimes referred to as a foil or stencil) using an angled blade or squeegee. The Printed Circuit Board (PCB) thus formed may then be filled with components using a Surface Mount Technology (SMT) process on solder pads for placing the electronic components on the board to form a printed circuit board assembly. The assembly may then be passed through a reflow oven to complete the soldering process, thereby ensuring electrical and mechanical connection of the components to the substrate.

However, this known method has a problem of the tendency of miniaturization of the components. As the size of the components decreases, the solder paste pads required to attach the components must be correspondingly reduced in size. In addition, circuit boards are becoming thinner and thinner, and the use of flexible boards (so-called "Flex-PCBs" or "flexible printed PCBs") is becoming more common. All these trends require very precise printing, which puts pressure on productivity and manufacturing quality. PCBs have associated tolerances and distortions, and it is therefore difficult to precisely align all the necessary components.

As one particular example, flexible PCBs typically include very small components in "clusters" and also in mosaic (paneled), such that each panel contains at least one of these clusters. Each component has its own associated tolerance and, in addition, each cluster also has its own tolerance relative to the clusters in the other panels. Thus, the tolerances may be higher than the precision required for successful printing within one cluster.

Currently, a vacuum carrier is used to support the plates during the printing process, thereby vacuum clamping each plate to the carrier. With such carriers it is not possible to provide multiple alignments of the plates, so it is only possible to print with an average position, i.e. to align the plates on the carrier in a position optimized for all clusters simultaneously, rather than realigning between the optimal positions for the respective clusters. Therefore, printing accuracy is impaired.

Disclosure of Invention

The present invention seeks to overcome these problems and provides, by way of example, a means for clamping such a flexible PCB. Other objects of the invention include providing a simplified and more accurate board assembly process.

According to the invention, this object is achieved by using a novel carrier which utilizes electrostatic clamping instead of vacuum clamping.

This solution is in stark contrast to the conventionally recognized concept in the printing industry, which is generally thought necessary to avoid electrostatic charges within the printer. However, it has been determined that electrostatic fixturing is in fact a viable clamping option, since the generated field is only present with significant strength in the surface of the material or component being clamped.

The non-conductive material may be clamped in this manner if it has electrically polarized properties. An external electric field applied to the dielectric material may cause a displacement of the bound charged elements. These are elements that bind to molecules and cannot move freely around the material. The positively charged elements are shifted in the direction of the field and the negatively charged elements are shifted opposite to the direction of the field. The molecules can retain a neutral charge but still form an electric dipole moment.

The electrostatic field can be maintained for several days without the need for a power source, which allows the same carrier to be used for various different processes, such as printing, placement and reflow soldering. In addition, the high temperature of the reflow oven does not affect the clamping force.

According to a first aspect of the present invention, there is provided a method of manufacturing a printed circuit board assembly, comprising the steps of:

i) clamping the electronic board to the carrier by applying an electrostatic field to the electronic board;

ii) applying a print medium to the electronic board using a printing process,

wherein the electronic board is kept clamped to the carrier by an electrostatic field during the printing process.

According to a second aspect of the present invention, there is provided a method of clamping an electronic board for processing, comprising the steps of:

i) providing a carrier comprising an electrostatic field generator adapted to generate clamping electrostatic fields at least two spatially separated regions of the carrier,

ii) placing a first electronic board onto the carrier at a first determined position within a first area of the carrier,

iii) clamping the first electronic board to the carrier by generating an electrostatic field at the first area,

iv) placing a second electronic board onto the carrier at a second determined position within a second area of the carrier, and

v) clamping the second electronic board to the carrier by generating an electrostatic field at the second area.

According to a third aspect of the invention, there is provided a carrier for use in a method according to any one of the first and second aspects.

As used herein, the term "electronic board" is used to denote a flexible or rigid, printed or unprinted board, substrate or workpiece for carrying electronic circuits, electronic components or electronic devices.

According to a preferred embodiment of the invention, the electrostatic carrier is capable of individually holding individual, single circuits or clusters (e.g. flexible PCBs). The respective plate can be placed accurately on the carrier, for example using a pick-and-place machine, and then clamped in place by switching on the electrostatic field. The board can be held accurately in this position throughout the manufacturing process (i.e., printing, assembly, and reflow soldering). The further circuits or clusters can be placed individually on the carrier and clamped individually so that each circuit or cluster board can be clamped in an optimal position. At the end of the manufacturing process, the clamping may be released by discharging the electrostatic field.

Other particular aspects and features of the present invention are set out in the appended claims.

Drawings

The invention will now be described with reference to the accompanying drawings (not to scale), in which.

Fig. 1 schematically illustrates a side view of an electrostatic carrier according to an embodiment of the invention.

Fig. 2 schematically illustrates a cross-sectional view of the electrostatic carrier of fig. 1 along line a-a.

Description of the figure numbers:

1-Electrostatic Carrier

2-carrier base

3-lower dielectric insulating layer

4-electrode layer

5-upper dielectric insulating layer

6a, 6 b-electronic board

7-electric contact

8a-8 c-anode structure

9a-9 c-cathode structure

10-Carrier reference

11-plate reference.

Detailed Description

Fig. 1 schematically shows a side view of an electrostatic carrier 1 according to an embodiment of the invention. The carrier 1 is formed as a layered structure having a flat top surface adapted to support at least one electronic board on top in use, two

separate boards

6a, 6b being supported being shown in fig. 1. The lowermost layer of the carrier 1 in use is a carrier base 2 which provides structural rigidity to the carrier 1. The carrier base 2 may comprise various materials, such as glass, silicon, metal or organic materials. In the embodiment shown, a lower dielectric insulation layer 3, for example formed by thin-film technology, is located on top of the carrier base 2. The lower dielectric insulating layer 3 is only required when the carrier base 2 is formed of a conductive material such as aluminum Al or other metals. An electrode layer 4 is placed on top of the lower dielectric insulating layer 3, the electrode layer 4 being described in more detail below. If the lower dielectric insulating layer 3 is not present, the electrode layer 4 can be positioned directly on the carrier substrate 2. An upper dielectric insulating layer 5 is placed on top of the electrode layer 4, which upper dielectric insulating layer 5 may be formed similarly to the lower dielectric insulating layer 3. The upper and lower dielectric layers may be formed of various materials including, for example, a polymer such as polyvinyl chloride (PVC) or polycarbonate, or a non-polymeric material such as SiO₂. The various layers may be formed separately and then attached together, for example, by using a small amount of adhesive or film techniques.

The upper dielectric insulation layer 5 serves as a support surface for one or more

electronic boards

6a, 6 b. It should be noted that the thickness of the upper dielectric insulation layer 5 affects the clamping force available for the electronic board and, therefore, in order to ensure an effective clamping, the upper dielectric insulation layer 5 should be kept as thin as possible. If PVC or polycarbonate is used as the upper dielectric insulation layer 5, a thickness of about 10 μm can now be achieved, while thin-film techniques are used, for example for SiO₂For example, a layer thickness of about 50nm is possible.

Although not shown in fig. 1, the carrier may also be provided with identification indicia, such as a 2D or 3D barcode or RFID tag, so that the carrier can be tracked during subsequent manufacturing processes.

Fig. 2 schematically illustrates a cross-sectional view of the electrostatic carrier of fig. 1 along line a-a. In this view, the internal structure of the electrode layer 4 is visible. The relative stacking position of the

electronic boards

6a, 6b is shown in outline, and as explained in more detail below, various carrier fiducials 10 are also shown on top of the upper dielectric insulating layer 5. The electrode layer 4 comprises an electrostatic field generator having at least one (in this embodiment three) electrostatic field generator in the form of an electrostatic clamping area defined by a capacitive interdigitated comb electrode pattern. Each pattern is formed by an interdigitated arrangement of a comb-like structure 8a-8c for the anode electrode and a comb-like structure 9a-9c for the cathode electrode. Each comb structure is independently electrically connectable to an external dc voltage source (not shown) via a respective electrical contact 7. When so connected, each of the generators generates an electrostatic field that applies a downward force or clamping force to the electronic board on the top surface of the carrier 1. To facilitate connection, each electrical contact 7 is conductively connected to a point on the outer surface (not shown) of the carrier 1 that is connected to an external voltage.

The electrode layer 4 may be formed in various ways that will be apparent to a person skilled in the art, for example by printing the desired electrode pattern onto a dielectric substrate, by forcing a conductive paste through a suitable mask or using PCB manufacturing techniques or thin film techniques.

The three patterns shown are spatially separated along the carrier 1, so that in use, i.e. when each pattern is connected to an external voltage source, three local areas or zones of the carrier 1 of relatively high electrostatic fields are generated. As described above, each pattern may be individually connected to an external voltage source, so that each pattern, and thus each field region, may be individually and selectively actuated. In this way, the different electronic boards 6 can be clamped individually or sequentially to respective areas of the carrier 1, generally corresponding to the respective patterns. Figure 2 shows an embodiment where one electronic board can be clamped to each area, but in other embodiments more than one electronic board can be clamped to the same area, however such an embodiment would be disadvantageous because both boards would be clamped at the same time and therefore would not be able to clamp a first board and subsequently position and clamp a second board.

Fig. 2 shows a plurality of carrier reference marks ("fiducials") 10, which are optically identifiable marks located on the upper surface of the carrier 1. Furthermore, and as is well known in the art, each

electronic board

6a, 6b is provided with a respective board reference 11. The carrier fiducial 10 and the board fiducial 11 may help to accurately place the electronic board 6 on the carrier 1, as explained in more detail below.

An exemplary method of manufacturing a printed circuit board assembly according to the present invention will now be described.

In an initial step, a carrier (such as the carrier shown in fig. 1 and 2) is provided and discharged so that the carrier does not generate an electrostatic field.

The first electronic board may then be placed on the carrier at a first determined position within the first area of the carrier. Such placement may be performed, for example, using a pick-and-place machine capable of highly precise placement. The correct positioning of the electronic board may be achieved by positioning the board fiducials 11 on the electronic board relative to the carrier fiducials 10. Typically, the pick-and-place machine includes optical position sensors adapted to identify these fiducials.

Then, by connecting the cathode and anode electrodes of the respective electrostatic field generators to a voltage source, an electrostatic field is generated at the first area, thereby clamping the first electronic board to the carrier.

If desired, and while the first electronic board is clamped to the carrier, further electronic boards may be placed sequentially on the carrier at respective determined positions within respective areas of the carrier in a similar manner as the first electronic board, and clamped after positioning by generating electrostatic fields at the respective areas.

It should be noted that this method enables each plate to be placed optimally, which is not possible with the known vacuum clamping methods. In particular, this method enables a high degree of precision in the placement and clamping of a single flexible PCB.

Once the electronic board is clamped to the carrier, the respective electrostatic field generators can be disconnected from the voltage source, since the electrostatic field can be kept high enough to perform clamping over several days. This enables the electronic board to remain clamped on the same carrier in more than one manufacturing process and the carrier can be transported between processes.

Thus, after clamping as described above, the carrier can be accurately positioned within the printer, for example by aligning carrier fiducials or plate fiducials as is known in the art. A printing process may then be used to apply a print medium (e.g., a conductive print medium such as solder paste) to the top surface of the electronic board, typically including forcing the print medium through apertures in a stencil by sweeping a squeegee blade across the appropriately patterned stencil.

After this printing process, the printed electronic board may be equipped with one or more electronic components while the electronic board remains clamped to the carrier. Advantageously, the carrier may be transported to a pick-and-place machine, for example along a conveyor belt, and accurately positioned within the placement area of the machine. As is known in the art, the carrier and/or plate reference may again be used to ensure proper alignment.

After this assembly process, the assembled electronic board may be subjected to a reflow soldering process while the electronic board remains clamped to the carrier. Advantageously, the carrier may be transported, for example along a conveyor belt, to a reflow oven for heat treatment, as is well known in the art. The electrostatic clamping function of the carrier is not affected by the high temperature in the furnace.

After reflow soldering, the or each electronic board may be released from the carrier by discharging the respective electrostatic fields (e.g. by short-circuiting the positive and negative electrodes of each pattern).

In all of these steps, the carrier can be tracked by correctly reading the carrier identification indicia of each machine so that the correct processing is performed on the or each plate on the carrier.

The above embodiments are exemplary only, and other possibilities and alternatives within the scope of the invention will be apparent to those skilled in the art. For example, the interdigitated comb electrode pattern shown in fig. 2 may be replaced with any capacitive electrode pattern. Each carrier may be provided with one or more patterns, the upper limit being determined by the physical dimensions of the carrier in question. The carrier is capable of holding various materials, clusters, and components, including thin glass (e.g., about 150 μm thickness) for microstructuring.

Claims

1. A method of manufacturing a printed circuit board assembly, comprising the steps of:

ii) applying a printing medium to the electronic board using a printing process,

wherein the electronic board remains clamped to the carrier by the electrostatic field during the printing process.

2. The method of claim 1, wherein the carrier comprises an electrostatic field generator for generating the electrostatic field.

3. The method of claim 2, wherein the electrostatic field generator comprises at least two spatially separated and individually actuatable electrostatic field generators adapted to generate clamping electrostatic fields in respective regions of the carrier.

4. A method according to claim 3, wherein step i) comprises clamping the electronic board to the carrier at a first determined position within a first area of the carrier, and clamping a second electronic board to the carrier at a second determined position within a second area of the carrier while the electronic board is clamped to the carrier.

5. The method according to claim 1, wherein step i) comprises placing the electronic board on the carrier using a pick and place machine.

6. A method according to any preceding claim, comprising the step of assembling the electronic board printed during the printing process with one or more electronic components, wherein the electronic board remains clamped to the carrier throughout the printing and assembling process.

7. The method of claim 6, wherein the electronic board is assembled using a pick and place machine.

8. A method according to claim 6, comprising the step of performing a reflow soldering process on the assembled electronic board, wherein the electronic board remains clamped to the carrier throughout the printing, assembly and reflow soldering processes.

9. A method of clamping an electronic board for processing, comprising the steps of:

10. The method of claim 9, wherein the carrier comprises at least one fiducial to enable positioning of the first and second electronic boards relative to the carrier.

11. A method according to claim 9 or 10, wherein the first and second electronic boards are placed on the carrier by a pick and place machine.

12. A vector for use in the method of claim 9 or 10.

13. The carrier of claim 12, comprising an electrostatic field generator adapted to generate individually controllable clamping electrostatic fields at least two spatially separated regions of the carrier.