Disclosure of Invention
The invention aims to provide a deep ultraviolet light emitting diode and a preparation method thereof, and aims to solve the problems of poor heat dissipation, low brightness and short service life of the deep ultraviolet light emitting diode caused by high contact resistance in the prior art.
The technical problem is solved, and the invention is realized by the following technical scheme:
the invention provides a deep ultraviolet light emitting diode, comprising:
a substrate;
an N-type semiconductor layer disposed on the substrate;
a light emitting layer disposed on the N-type semiconductor layer;
a P-type semiconductor layer disposed on the light emitting layer;
a first electrode pad disposed on the N-type semiconductor layer, the first electrode pad including an electrode of a metal multilayer alternating structure;
a second electrode pad disposed on the P-type semiconductor layer.
In one embodiment of the present invention, the first electrode pad includes a first ohmic electrode disposed on the N-type semiconductor layer, the first ohmic electrode including a metal multilayer alternating structure.
In one embodiment of the present invention, the metal multilayer alternating structure includes a first metal and a second metal, which are alternately stacked.
In one embodiment of the invention, the first metal and the second metal are titanium and aluminum, respectively.
In one embodiment of the present invention, the number of times of the first metal and the second metal are alternately stacked is 5 to 10.
The invention also provides a preparation method of the deep ultraviolet light-emitting diode, which comprises the following steps:
providing a substrate;
forming an N-type semiconductor layer on the substrate;
forming a light emitting layer on the N-type semiconductor layer;
forming a P-type semiconductor layer on the light emitting layer;
forming a first electrode pad including a metal multi-layer alternating structure on the N-type semiconductor layer;
and forming a second electrode pad on the P-type semiconductor layer to obtain the deep ultraviolet light-emitting diode.
In one embodiment of the present invention, the first electrode pad includes a first ohmic electrode formed on the N-type semiconductor layer, the first ohmic electrode including a metal multilayer alternating structure.
In one embodiment of the present invention, the metal multilayer alternating structure includes a first metal and a second metal, which are alternately stacked.
In one embodiment of the present invention, the preparation method further comprises the steps of: and etching off the protective layer on the peripheral part on the surface of the P-type semiconductor layer, and performing first etching on the peripheries of the P-type semiconductor layer and the light-emitting layer to form a convex part between the P-type semiconductor layer and the light-emitting layer, exposing the N-type semiconductor layer and obtaining a mesa structure.
In one embodiment of the present invention, the preparation method further comprises the steps of: and carrying out second etching to repair and smooth the etched surface after the first etching.
According to the invention, the electrode with the metal multilayer alternating structure is arranged, so that the sufficient fusion between the electrodes is effectively ensured to form linear ohmic contact, and the contact resistance of the deep ultraviolet light-emitting diode is reduced. Meanwhile, compared with the traditional electrode with a single-layer metal structure, the electrode containing the metal multi-layer alternating structure can improve the overall appearance and taste of the deep ultraviolet light-emitting diode. The invention provides a novel mesa etching process, namely, the mesa etching process adopts a twice etching process, wherein the second etching process adopts the mixed gas of sulfur hexafluoride and argon as the etching gas for etching repair, which is beneficial to reducing the contact resistance of the deep ultraviolet light-emitting diode, simplifying the preparation process and improving the production efficiency. In an embodiment of the invention, under the actual measurement condition of 20mA, the voltage is reduced by 2V (10 multiplied by 20mil chip), the brightness is increased by 2%, the light attenuation in the life test is reduced by 1%, and the overall appearance and taste of the chip are improved.
Of course, it is not necessary for any product in which the invention is practiced to achieve all of the above-described advantages at the same time.
Detailed Description
The technical solution in the embodiments of the present invention will be further clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely a few embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, the present invention provides a deep ultraviolet light emitting diode package structure, which includes: deep ultraviolet light emitting diode 101, support 102 and silicon oxide protective layer 103.
The chip, also called a wafer, i.e. the light emitting material of the led, must be isolated from the outside to prevent the electrical performance degradation caused by the corrosion of the chip circuit by the impurities in the air, and the packaged chip is more convenient for installation and transportation. The packaging structure of the deep ultraviolet light emitting diode 101 aims at the deep ultraviolet light emitting diode 101, the structure of the deep ultraviolet light emitting diode 101 comprises a substrate 1, an epitaxial wafer structure and an electrode structure, and the epitaxial wafer structure at least comprises an N-type semiconductor layer 2, a light emitting layer 3 and a P-type semiconductor layer 4 which are sequentially stacked on the substrate 1. Wherein the N-type semiconductor layer 2 has abundant electrons, the P-type semiconductor layer 4 forms positively charged holes due to lack of electrons, and there is recombination of electrons and electron holes between the N-type semiconductor layer 2 and the P-type semiconductor layer 4, and when current passes through, the electrons and holes are combined with each other and release energy, so that light is radiated, that is, the light emitting layer 3. The electrode structure includes a cathode connected to the N-type semiconductor layer 2 and an anode connected to the P-type semiconductor layer 4. The light emitting material used in the deep ultraviolet led 101 of this embodiment may be gallium aluminum nitride (AlGaN), for example, and emits deep ultraviolet light with a wavelength of less than 280nm, for example.
Specifically, referring to fig. 3, the deep ultraviolet light emitting diode 101 of the present invention may include: the light emitting diode comprises a substrate 1, an N-type semiconductor layer 2, a light emitting layer 3, a P-type semiconductor layer 4, a first electrode pad 5 and a second electrode pad 6.
Referring to fig. 3, a substrate 1, i.e. a substrate for epitaxial layer growth, has a supporting and stabilizing function, and the substrate 1 may comprise, for example, sapphire, silicon carbide, aluminum nitride, etc., and in the embodiment, an aluminum nitride coated substrate is preferred.
Referring to fig. 3, an N-type semiconductor layer 2, a light emitting layer 3 and a P-type semiconductor layer 4 are sequentially disposed on the substrate 1, wherein the N-type semiconductor layer 2 is on a side close to the substrate 1, and the P-type semiconductor layer 4 is on a side far from the substrate 1. The material used for the semiconductor layer is obtained by adding aluminum to gallium nitride to enlarge the band gap and thereby obtain a shorter emission wavelength. In one embodiment of the present invention, the deep ultraviolet light emitting diode 101 obtains a deep ultraviolet light having a wavelength of 260 to 280 nm.
Referring to fig. 3, a first electrode pad 5 is connected to the N-type semiconductor layer 2, and the first electrode pad 5 includes a first ohmic electrode 501, a first thickened electrode 502, and a first gold block electrode 503. The first ohmic electrode 501 comprises a metal multilayer alternating structure, the metal multilayer alternating structure comprises two metals which are alternately stacked, the metals are first metal titanium and second metal aluminum, the number of stacking times of the first metal titanium and the second metal aluminum is 5-10, the thickness of the titanium film can be 1-20 nm, and the thickness of the aluminum film can be 20-150 nm. The first ohmic electrode 501 further includes metal gold, and the thickness of the gold film may be, for example, 40 to 200 nm. The thickness of the first gold block electrode 503 may be, for example, 1 to 3 μm.
Referring to fig. 3 and 4, a second electrode pad 6 is connected to the P-type semiconductor layer 4, and the second electrode pad 6 includes a second ohmic electrode 601, a second thickened electrode 602, and a second gold bump electrode 603. The second ohmic electrode 601 may be, for example, an ohmic electrode containing nickel and gold, wherein a thickness of a nickel film may be, for example, 10 to 40nm, a thickness of a gold film may be, for example, 10 to 150nm, and an electrode thickness of the second gold bulk electrode 603 may be, for example, 1 to 3 μm.
Referring to fig. 3 to 5, the present invention further provides a method for manufacturing a deep ultraviolet light emitting diode 101, which includes the following steps:
s1: providing a substrate 1;
s2: forming an N-type semiconductor layer 2 on the substrate;
s3: forming a light emitting layer 3 on the N-type semiconductor layer;
s4: forming a P-type semiconductor layer 4 on the light emitting layer;
s5: forming a first electrode pad 5 including a metal multi-layer alternating structure on the N-type semiconductor layer 2;
s6: and forming a second electrode pad 6 on the P-type semiconductor layer 4 to obtain the deep ultraviolet light emitting diode 101.
Referring to fig. 3 to 5, in step S1, a substrate 1, i.e. a substrate for epitaxial layer growth, is provided, the substrate 1 has a supporting and stabilizing function, the substrate 1 may comprise sapphire, silicon carbide, aluminum nitride, etc., and an aluminum nitride coated substrate is preferred in this embodiment.
Referring to fig. 3 to 5, in steps S2 to S4, a multi-layer film may be plated on the substrate 1 by using a film plating technique, for example, a metal organic chemical vapor deposition method, and the N-type semiconductor layer 2, the light emitting layer 3, and the P-type semiconductor layer 4 are sequentially formed, so as to adjust the gallium-aluminum composition, change the forbidden band width, and output the deep ultraviolet light with a wavelength of 260 to 280nm, thereby obtaining the epitaxial wafer of the deep ultraviolet light emitting diode.
Referring to fig. 3 to 5, in step S5, the first electrode pad 5 includes the first ohmic electrode 501, a first thickened electrode 502 and a first gold bump electrode 503. The first ohmic electrode 501 is formed on the N-type semiconductor layer 2, and the first ohmic electrode 501 includes a metal multilayer alternating structure. The forming process of the first electrode pad 5 may include the steps of:
referring to fig. 3 to 5, a protective layer may be formed on the surface of the P-type semiconductor layer 4 by depositing dense and high-transmittance silicon dioxide, and the thickness of the protective layer may be, for example, 200nm to 500 nm.
Referring to fig. 3 to 5, the protective layer on the upper periphery of the P-type semiconductor layer 4 is etched, and a first mesa etching is performed on the peripheries of the P-type semiconductor layer 4 and the light emitting layer 3, for example, an inductively coupled plasma may be used for etching, the depth may be, for example, 500 to 900nm, so that a convex portion is formed on the P-type semiconductor layer 4 and the light emitting layer 3, the N-type semiconductor layer 2 is exposed, and a mesa structure is obtained.
Referring to fig. 3 to 5, a second mesa etching is performed to repair and level the etched surface after the first mesa etching. The working surfaces of the second mesa etching are the mesa, the side surface of the P-type semiconductor layer and the side surface of the light emitting layer, the adopted etching gas can be mixed gas of sulfur hexafluoride and argon, the equipment process parameters can be set to be lower plate power of 10-60W, the upper plate power of 100-400W, and the etching time can be 500-1000 s.
Referring to fig. 3 to 5, photolithography is performed on the surface of the exposed N-type semiconductor layer 2, the first ohmic electrode 501 is evaporated, and after the evaporation, gold is stripped, photoresist is removed, and annealing is performed.
Referring to fig. 3 to 5, when forming the first ohmic electrode 501, for example, a metal titanium film may be formed first, and then an aluminum film may be formed, and the titanium film and the aluminum film may be alternately stacked, where the stacking number may be, for example, 5 to 10 times, the thickness of the titanium film may be, for example, 1 to 20nm, and the thickness of the aluminum film may be, for example, 20 to 180 nm. And then, forming a gold film on the surface of the titanium-aluminum metal alternate laminated structure, wherein the thickness of the gold film can be 40-150 nm, stripping gold and removing glue after evaporation, forming a covering layer containing titanium-aluminum-gold metal on the surface of the N-type semiconductor layer 2, and annealing at 800-1000 ℃ for 30-60 s in a nitrogen atmosphere to form the first ohmic electrode 501.
Referring to fig. 3 to 5, a chip via is etched on the surface of the first ohmic electrode 501 by photolithography or etching, an electrode metal is etched and evaporated by photolithography to form the first thickened electrode 502 of the first ohmic electrode 501, the thickness of the first thickened electrode 502 may be, for example, 1 to 3 μm, excess metal is stripped off after evaporation, and the photoresist is removed and cleaned.
Referring to fig. 3 to 5, after the above steps are completed, photolithography and deep etching are performed on the surface of the deep ultraviolet light emitting diode, the exposed N-type semiconductor layer 2 is partially etched to the substrate 1 layer, the inter-chip connection is completely isolated, and the photoresist is removed and cleaned. And etching a chip path on the surface of the obtained deep ultraviolet light emitting diode in a photoetching or/etching mode, and generating an insulating layer 7, wherein for example, dense and high-transmittance silicon dioxide can be deposited as the insulating layer 7, and the thickness of the insulating layer 7 can be 80-500 nm.
Referring to fig. 3 to 5, a pattern required by a silicon dioxide pore channel is etched on the first thickened electrode 502, excess silicon dioxide is removed by a dry etching method, a photoresist is removed and cleaned, and then the first gold block electrode 503 is etched and evaporated by evaporation, wherein the thickness of the first gold block electrode 503 may be, for example, 1 to 3 μm.
Referring to fig. 3 to 5, in step S6, the second electrode pad 6 includes a second ohmic electrode 601, a second thickened electrode 602 and a second gold bump electrode 603, wherein the second ohmic electrode 601 is formed on the P-type semiconductor layer 4. The forming process of the second electrode pad 6 includes the steps of:
referring to fig. 3 to 5, the passivation layer on the surface of the P-type semiconductor layer 4 is etched clean, the second ohmic electrode 601 is subjected to photolithography and evaporation to deposit the electrode metal of the second ohmic electrode 601 on the surface, the gold is stripped after evaporation, a covering layer, which may include, for example, nickel and gold metal, is formed on the surface of the P-type semiconductor layer 4, and the second ohmic electrode 601 is formed by annealing at 500 to 700 ℃ for 5 to 10min in an air environment, wherein the thickness of the nickel film may be, for example, 10 to 40nm, and the thickness of the gold film may be, for example, 10 to 80 nm.
Referring to fig. 3 to 5, a chip via is etched on the surface of the second ohmic electrode 601 by, for example, photolithography or etching, a thickened electrode metal is etched and evaporated to form the second thickened electrode 602, the thickness of the second thickened electrode may be, for example, 1 to 3 μm, after evaporation, excess metal is stripped off, the photoresist is removed, and the second thickened electrode is cleaned.
Referring to fig. 3 to 5, on the surface of the second thickened electrode 602, for example, a chip pore channel may be etched by photolithography or etching, and a dense and high-transmittance insulating layer 7, which may be, for example, silicon dioxide, is deposited, where the thickness of the insulating layer 7 may be, for example, 80 to 500 nm.
Referring to fig. 3 to 5, a desired pattern, such as a silicon dioxide pore channel, is formed on the second thickened electrode 602 by photolithography, excess material of the insulating layer 7 is removed by dry etching, the photoresist is removed and cleaned, then photolithography and evaporation are performed on the second gold block electrode 603, the thickness of the second gold block electrode 603 may be, for example, 1 to 3 μm, and after the evaporation, the gold is stripped and the photoresist is removed, so as to obtain the deep ultraviolet light emitting diode.
Referring to fig. 3 to 5, in the deep ultraviolet light emitting diode provided by the present invention, the first ohmic electrode 501 includes two metals in the metal multilayer alternating structure that are alternately stacked, so that a good linear ohmic contact is more easily formed, a contact resistance of the deep ultraviolet light emitting diode is reduced, a high temperature resistance of the deep ultraviolet light emitting diode is improved, and a problem that the deep ultraviolet light emitting diode is easy to age is solved, compared with a conventional ohmic electrode with a single-layer metal structure. Meanwhile, compared with the traditional electrode with a single-layer metal structure, the electrode with the metal multi-layer alternating structure also improves the rough appearance and taste of the traditional deep ultraviolet light-emitting diode. In addition, the invention provides a new mesa etching process, saves the subsequent high-temperature annealing procedure of the traditional mesa etching process, simplifies the preparation process of the deep ultraviolet light-emitting diode and improves the production efficiency.
Referring to fig. 1 and 2, in the package structure of the present invention, a deep ultraviolet light emitting diode 101 is fixed on a support 102, and the support 102 is electrically connected to the deep ultraviolet light emitting diode 101. The support 102 may be a ceramic support, for example, and the thickness of the support 102 may be 0.5 to 0.7mm, for example. The support 102 may include a die bonding site, and the deep ultraviolet light emitting diode 101 is bonded to the die bonding site of the support 102. The positive and negative electrodes of the deep ultraviolet light emitting diode 101 correspond to the positive and negative electrodes of the bracket 102, the center of the deep ultraviolet light emitting diode 101 coincides with the center of the bracket 102, and the bonding material may be, for example, solder paste.
Referring to fig. 1, the package structure of the present invention further includes a silicon oxide protection layer 103 disposed on the deep ultraviolet light emitting diode 101, wherein the silicon oxide protection layer 103 wraps the deep ultraviolet light emitting diode 101 and the support 102. The silicon oxide may be, for example, silicon dioxide, and the thickness of the silicon oxide protective layer 103 may be, for example, 80 to 250 nm.
Referring to fig. 1, fig. 2 and fig. 6, the present invention further provides a method for packaging a deep ultraviolet light emitting diode, which includes the steps of:
s101: providing a deep ultraviolet light emitting diode 101;
s102: fixing the deep ultraviolet light emitting diode 101 on a bracket 102, and electrically connecting the deep ultraviolet light emitting diode 101 with the bracket 102;
s103: forming a silicon oxide protection layer 103 on the surfaces of the deep ultraviolet light emitting diode 101 and the bracket 102, so that the deep ultraviolet light emitting diode 101 and the bracket 102 are wrapped by the silicon oxide protection layer 103, and the deep ultraviolet light emitting diode 101 is packaged.
Referring to fig. 1, fig. 2 and fig. 6, in step S101, the deep ultraviolet light emitting diode 101 is placed in a cleaning device for cleaning, so as to ensure that the contaminants on the surface of the deep ultraviolet light emitting diode 101 are removed. The cleaning device may be, for example, a plasma cleaner, or may be a wet cleaning device, such as an ultrasonic cleaner. Based on the difference of cleaning principles between the deep ultraviolet light emitting diode and the substrate, the cleaning effect is different to a certain extent, and in order to better improve the bonding effect of the surface of the deep ultraviolet light emitting diode 101, enhance the surface adhesion of a chip, and improve the subsequent packaging quality, the cleaning process is preferably adopted in a plasma cleaning machine, and the surface of the deep ultraviolet light emitting diode 101 is cleaned by using plasma. The plasma is a process in which a gas is ionized into a plasma state by applying sufficient energy to the gas, including ions, electrons, atoms, photons, and the like.
Referring to fig. 1, 2 and 6, in step S102, the cleaned deep ultraviolet light emitting diode 101 is fixed on the bracket 102 by using an adhesive material, and the center of the deep ultraviolet light emitting diode 101 is overlapped with the center of the bracket 102 according to the positive and negative poles of the deep ultraviolet light emitting diode 101 corresponding to the positive and negative poles of the bracket 102. The bonding material may be, for example, a solder paste and the support may be, for example, a ceramic support. The ceramic support may comprise, for example, a ceramic substrate and a frame, which may be, for example, ceramic or metal, and may be a support with high thermal conductivity formed by integral molding or assembly by bonding. The ceramic frame is fixed to the ceramic substrate by, for example, soldering. The thermal conductivity of the bracket 102 may be, for example, 150 to 200W/(m × K), and the thickness of the bracket 102 may be, for example, 0.5 to 0.7 mm.
Referring to fig. 6, in step S102, the support 102 of the deep ultraviolet light emitting diode 101 is electrically connected, so as to further enhance the firmness of the packaged bead. The electrical connection may be achieved, for example, by means of reflow soldering. The deep ultraviolet light emitting diode 101 may be fixed on the bracket 102 by silver paste bonding, solder paste welding or eutectic welding, for example, and the anode and the cathode of the deep ultraviolet light emitting diode 101 are connected to the anode and the cathode of the bracket 102 by gold wires. In this embodiment, a fixing method of solder paste soldering is preferable, and the solder paste method belongs to a soldering and bonding method, and the soldering and bonding method has better thermal conductivity than chip mounting methods such as an eutectic bonding method and a conductive adhesive bonding method. The contact surface of the deep ultraviolet light emitting diode 101 and the bracket 102 is processed through a welding process, so that the heat conductivity coefficient of the deep ultraviolet light emitting diode is increased, and low thermal resistance is ensured during normal use. The reflow soldering process is reliable and suitable for mass production and processing, the reflow time of the reflow soldering process can be 10-15 min, the reflow temperature can be 230-260 ℃, and the soldering process can be carried out in an atmosphere which can prevent oxidation, such as hot nitrogen.
As shown in fig. 1, fig. 2 and fig. 6, in step S102, a step of baking and dehumidifying the lamp bead is further included to remove moisture on the surfaces of the deep ultraviolet light emitting diode 101 and the bracket 102, and to play a role of curing the chip, so that the deep ultraviolet light emitting diode 101 and the bracket 102 form a good connection.
Referring to fig. 1, fig. 2 and fig. 6, in step S103, in order to protect the deep ultraviolet light emitting diode 101, a protective layer is disposed outside the deep ultraviolet light emitting diode 101, and the protective layer is a silicon oxide protective layer 103. The silicon oxide protection layer 103 may be formed on the surface of the deep ultraviolet light emitting diode 101 and the support 102 by using a plasma enhanced chemical vapor deposition method, for example. The plasma enhanced chemical vapor deposition can form plasma on a local part of gas containing film constituent atoms by means of a microwave or radio frequency source, and the plasma reacts by utilizing the strong chemical activity of the plasma, so that the desired film is deposited on the substrate. The plasma enhanced chemical vapor deposition method can deposit materials such as silicon oxide, silicon nitride, silicon carbide, polysilicon and the like, can realize accurate control of deposition thickness, and can adjust the refractive index of a deposited film in a certain range by changing the components of reaction gas. The silicon oxide protection layer 103 in this embodiment may be, for example, a silicon dioxide thin film, and the thickness of the silicon dioxide thin film may be, for example, 80 to 250 nm.
Referring to fig. 1, 2 and 6, in step S103, a silicon oxide protective layer 103 is deposited on the surfaces of the deep ultraviolet light emitting diode 101 and the support 102, and the deep ultraviolet light emitting diode 101 and the support 102 are sealed together, so that the corrosion of air moisture and oxygen to the deep ultraviolet light emitting diode 101 is isolated, the process is simplified, and the phenomenon of material performance degradation such as easy yellowing of organic materials such as gelatin under ultraviolet irradiation is avoided. The deep ultraviolet light emitting diode is packaged by the deep ultraviolet light emitting diode packaging method, so that the light extraction rate of the deep ultraviolet light emitting diode is improved, and the service life of the deep ultraviolet light emitting diode is prolonged. The embodiment has the beneficial effects that the brightness is increased by 1%, and the light attenuation of the life test is reduced by 2%. In addition, the invention has simple process route and can reduce the production cost.
The preferred embodiments of the invention disclosed above are intended to be illustrative only. The preferred embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention. The invention is limited only by the claims and their full scope and equivalents.