CN111129178B - Bulk structure GaAs photoconductive switch based on graphene interface layer and preparation process thereof - Google Patents

Bulk structure GaAs photoconductive switch based on graphene interface layer and preparation process thereof Download PDF

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CN111129178B
CN111129178B CN201911368897.2A CN201911368897A CN111129178B CN 111129178 B CN111129178 B CN 111129178B CN 201911368897 A CN201911368897 A CN 201911368897A CN 111129178 B CN111129178 B CN 111129178B
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composite structure
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graphene
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胡龙
李昕
崔宏旺
朱莉
刘康
孙岳
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Xian Jiaotong University
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
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    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
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    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
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Abstract

The invention discloses a bulk structure GaAs photoconductive switch based on a graphene interface layer and a preparation process thereof. At present, most photoconductive switches are manufactured by a principle of forming ohmic contact around gallium arsenide and multilayer metals, but the switch device has the phenomena of short service life, uneven heat dissipation, easy burning and the like.

Description

Bulk structure GaAs photoconductive switch based on graphene interface layer and preparation process thereof
Technical Field
The invention relates to the technical field of gallium arsenide photoconductive switches, in particular to a bulk GaAs photoconductive switch based on a graphene interface layer and a preparation process thereof.
Background
The gallium arsenide photoconductive switch has many advantages, such as simple structure, fast response speed, high voltage resistance, small trigger jitter, high switching precision, can be used in environments with high switching precision, THz technology, high-power optical communication and large noise, has wide application prospects in ultra-high-speed electronics and instantaneous electromagnetic wave technology, has important applications in the fields of weapon ignition, radar communication, environment monitoring and the like, and gradually shows important applications in other fields such as biology, medicine and the like.
However, the traditional gallium arsenide photoconductive switch device has many problems to be solved by related personnel, and the gallium arsenide photoconductive switch (PCSS) high-power chip has the technical problems of low reliability and short service life caused by too fast internal temperature rise and thermal stress accumulation.
Disclosure of Invention
In order to solve the problems, the invention provides a bulk GaAs photoconductive switch based on a graphene interface layer and a preparation process thereof, most of the existing photoconductive switches are manufactured by the principle of forming ohmic contact around gallium arsenide and multilayer metals, but the switch devices have the phenomena of short service life, uneven heat dissipation, easy burning and the like.
The purpose of the invention is realized by adopting the following technical scheme:
the utility model provides a body structure GaAs photoconductive switch based on graphite alkene boundary layer, including the GaAs substrate, the negative pole contact electrode, the positive pole contact electrode, external electrode, receive unthreaded hole and graphite alkene layer, the negative pole contact electrode sets up in the lower surface of GaAs substrate, the positive pole contact electrode sets up in the upper surface of GaAs substrate, set up graphite alkene layer between positive pole contact electrode and the GaAs substrate, external electrode sets up in the upper surface of positive pole contact electrode, it runs through external electrode and positive pole contact electrode to receive the unthreaded hole, the upper surface of GaAs substrate still covers has the passivation layer, the supreme Ni layer that is in proper order down of positive pole contact electrode, the Ge layer, first Au layer, Ni layer and second Au layer.
The external electrode extends towards one side to form an extension part, the extension part extends out of the area opposite to the anode contact electrode, and the corner of the extension part is provided with an arc chamfer.
External electrode, positive pole contact electrode and graphite alkene layer are the circular of equidimension, and external electrode, positive pole contact electrode and graphite alkene layer are concentric, and external electrode, positive pole contact electrode and graphite alkene layer are located the center of GaAs substrate, and the photic hole sets up along the center of external electrode and positive pole contact electrode.
The external electrode is provided with an extension part, the external electrode is a rounded rectangle with an arc edge, the diameter of the arc edge is the same as that of the anode contact electrode, one side position of the arc edge on the external electrode is right above the anode contact electrode, one side position extension part opposite to the arc edge on the external electrode extends out of the area right opposite to the anode contact electrode.
The passivation layer is a SiN passivation layer.
The thickness of the GaAs substrate is 600 mu m, the thickness of the cathode contact electrode is 300nm, the thickness of the anode contact electrode is 283.5nm, the thickness of the external electrode is 700nm, the thickness of the graphene layer is 0.34nm, the thickness of the passivation layer is 400nm, the thickness of the Ni layer is 1.5nm, the thickness of the Ge layer is 26nm, the thickness of the first Au layer is 100nm, the thickness of the Ni layer is 26nm, and the thickness of the second Au layer is 130 nm.
The process for preparing the bulk GaAs photoconductive switch based on the graphene interface layer comprises the following steps:
s1, moving the graphene film to the upper surface of the GaAs substrate to obtain a first composite structure;
s2, drying the first composite structure, and patterning the first composite structure on the surface to expose the area corresponding to the anode contact electrode on the surface of the graphene film to form a second composite structure;
s3, sequentially evaporating a Ni layer, a Ge layer, an Au layer, a Ni layer and an Au layer on the second composite structure to form a third composite structure;
s4, performing lift off technology on the third composite structure to enable the anode contact electrode to be reserved on the surface of the graphene film and the cathode contact electrode to be reserved on the lower surface of the GaAs substrate to obtain a fourth composite structure;
s5, patterning the surface of the fourth composite structure, and covering masks on the upper surface of the anode contact electrode and the light receiving hole position on the anode contact electrode to form a fifth composite structure;
s6, etching the exposed graphene on the fifth composite structure, and cleaning the mask to obtain a sixth composite structure;
s7, annealing the sixth composite structure to obtain a seventh composite structure;
s8, making a passivation layer on the upper surface of the GaAs substrate to form an eighth composite structure;
s9, patterning the surface of the eighth composite structure, covering a mask, and only exposing the passivation layer on the upper surface of the anode contact electrode 3 to form a ninth composite structure;
s10, removing the passivation layer on the upper surface of the anode contact electrode 3, and then removing the mask to form a tenth composite structure;
s11, patterning the surface of the tenth composite structure, covering a mask, and only exposing the upper surface of the anode contact electrode 3 to form an eleventh composite structure;
s12, evaporating a metal layer on the surface of the eleventh composite structure, and performing lift off process to prepare the external electrode 4.
When the patterning is carried out, photoresist is adopted.
In S6, the exposed graphene on the fifth composite structure is etched away by using oxygen plasma, wherein the gas flow of oxygen is 20-25sccm for 180-200S.
In S7, in the annealing treatment, ultra-pure nitrogen gas is used as the annealing gas.
The invention has the following beneficial effects:
according to the GaAs photoconductive switch, flexible graphene high-thermal-conductivity carbon is used as a chip heat dissipation material, the graphene layer is introduced into a chip hot end electrode, and local area heat generated in the working process of a chip is timely conducted to a low-temperature area in the surface of the chip by utilizing the performance advantage of high thermal conductivity of the graphene carbon material, so that the accumulation of the heat in the chip is inhibited. The invention realizes that the graphene heat dissipation layer is introduced between the hot end electrode and the gallium arsenide, thereby eliminating the electrode hot spot and homogenizing the temperature. The research provides for improving the reliability of the chip and prolonging the service life of the chip in the later period. The anode adopts a graphene-metal composite structure, the ohmic contact metal layer on the surface of the graphene is sequentially provided with a Ni layer, a Ge layer, a first Au layer, a Ni layer and a second Au layer, the first metal Ni layer is stable in performance, and the metal is used as an adhesion layer for increasing the adhesive force among the conductive metal layer, the barrier metal layer and the contact metal layer and performing thermoelectric matching on each layer of metal. The metal Ge is used as a doped metal layer, so that a gold half-contact interface becomes a metal-n + structure with high concentration, the Schottky barrier becomes very thin, and the tunneling current formed by electrons passing through the barrier through the field emission effect is increased. The metal Ni is used as a barrier metal layer to prevent the mutual permeation among metals and between the metal and a semiconductor and avoid the formation of high-resistance compounds, the inert metal barrier layer is used to improve the corrosion resistance and high-temperature resistance of the ohmic electrode, and the outermost layer of an electrode metal system is a conductive metal layer which is generally required to have better stability, lower resistivity, stronger corrosion resistance and easier welding. The thickness of the conductive layer is typically on the order of μm thick, which results in a large increase in current capacity.
Furthermore, the external electrode extends towards one side to form an extension part, the extension part extends out of an area right opposite to the anode contact electrode, the corner of the extension part is set to be an arc chamfer, the surface electric field of the power device is reduced by setting the extension part, the breakdown voltage is improved, the concentration of the surface electric field is inhibited by changing the surface potential distribution, the breakdown voltage of the device is improved, in order to homogenize the surface electric field better, the edge of the external electrode avoids a tip as much as possible by setting an arc to a foot, and the corner of the external electrode is smooth.
Further, external electrode, positive pole contact electrode and graphite alkene layer are big circular such as, and external electrode, positive pole contact electrode and graphite alkene layer are concentric, and external electrode, positive pole contact electrode and graphite alkene layer are located the center of GaAs substrate, and the photic hole sets up along the center of external electrode and positive pole contact electrode for the electric field of whole device can evenly distributed, suppresses the concentration of surface electric field, thereby improves the breakdown voltage of device.
The method for preparing the GaAs photoconductive switch has the advantages of clear and simple process, good heat dissipation performance and long service life, and is suitable for batch production and processing.
Drawings
FIG. 1 is a schematic structural diagram of a bulk gallium arsenide photoconductive switch in an embodiment of the present invention;
fig. 2 is a cross-sectional view of a gallium arsenide-graphene-metal electrode composite photoconductive switch in an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a gallium arsenide-graphene-metal electrode composite structure in an embodiment of the present invention;
fig. 4 is a flow chart of a gallium arsenide-graphene-metal electrode composite structure photoconductive switch in an embodiment of the present invention;
in the figure, 1: a GaAs substrate; 2: a cathode contact electrode; 3: an anode contact electrode; 3-1: a Ni layer; 3-2: a Ge layer; 3-3: a first Au layer; 3-4: a Ni layer; 3-5: a second Au layer; 4: an external electrode; 4-1: an extension portion; 5: a light receiving hole; 6: a passivation layer; 7: a graphene layer.
Detailed Description
The invention is described in further detail below with reference to the figures and examples.
Referring to fig. 1 to 3, the GaAs photoconductive switch of the present invention includes a GaAs substrate 1, a cathode contact electrode 2, an anode contact electrode 3, an external electrode 4, a light receiving hole 5, and a graphene layer 7, wherein the cathode contact electrode 2 is disposed on a lower surface of the GaAs substrate 1, the anode contact electrode 3 is disposed on an upper surface of the GaAs substrate 1, the graphene layer 7 is disposed between the anode contact electrode 3 and the GaAs substrate 1, the external electrode 4 is disposed on an upper surface of the anode contact electrode 3, the light receiving hole 5 penetrates through the external electrode 4 and the anode contact electrode 3, the upper surface of the GaAs substrate 1 is further covered with a passivation layer 6, and the anode contact electrode 3 is sequentially a Ni layer, a Ge layer, a first Au layer, a Ni layer, and a second Au layer from bottom to top.
When the GaAs photoconductive switch is used, current vertically flows through the inside of the device, the upper surface and the lower surface of the device are sequentially divided into an anode electrode and a cathode electrode, a light hole is designed on the anode surface, the anode adopts a graphene-metal composite structure, an ohmic contact metal layer on the surface of the graphene sequentially comprises a Ni layer, a Ge layer, a first Au layer, a Ni layer and a second Au layer, and a first metal Ni layer is used as an adhesion layer for increasing the adhesion force among the conductive metal layer, the barrier metal layer and the contact metal layer and performing thermoelectric matching on the metals. The metal Ge is used as a doped metal layer, so that a gold half-contact interface becomes a metal-n + structure with high concentration, the Schottky barrier becomes very thin, and the tunneling current formed by electrons passing through the barrier through the field emission effect is increased. The metal Ni is used as a barrier metal layer to prevent the mutual permeation among metals and between the metal and a semiconductor and avoid the formation of high-resistance compounds, the inert metal barrier layer is used to improve the corrosion resistance and high-temperature resistance of the ohmic electrode, and the outermost layer of an electrode metal system is a conductive metal layer which is generally required to have better stability, lower resistivity, stronger corrosion resistance and easier welding. The thickness of the conductive layer is typically on the order of μm thick, which results in a large increase in current capacity. Metals such as Au, Al, Ag, etc. can be used as the conductive layer. Although the AuGeNi metal system has the advantages, the problems of the flatness and the quality of the metal interface morphology, thermal instability and the like still exist in the process of preparing the ohmic contact.
Therefore, in order to reduce the surface electric field and improve the breakdown voltage of the power device, an external electrode-field plate (namely, an extension part 4-1 is formed by extending an external electrode 4 to one side) is manufactured in the application, the surface electric potential distribution is changed to inhibit the concentration of the surface electric field, so that the breakdown voltage of the device is improved, and in order to better homogenize the surface electric field, the edge of the field plate is designed to avoid a tip as much as possible, so that the edge of the field plate is smooth. On this basis, utilize graphite alkene electric conductivity and thermal diffusivity, propose novel photoconductive switch's new construction, like this in the preceding basis can homogenize electric field and heat dissipation more to this life who improves the device.
Referring to fig. 1 and 2, in a preferred embodiment of the present invention, the external electrode 4 is formed with an extension portion 4-1 extending to one side, the extension portion 4-1 extends out of a region opposed to the anode contact electrode 3, and a corner portion of the extension portion 4-1 is a rounded chamfer.
Referring to fig. 1 and 2, the external electrode 4, the anode contact electrode 3 and the graphene layer 7 are circular with equal size, the external electrode 4, the anode contact electrode 3 and the graphene layer 7 are concentric, the external electrode 4, the anode contact electrode 3 and the graphene layer 7 are positioned in the center of the GaAs substrate 1, and the light receiving hole 5 is arranged along the centers of the external electrode 4 and the anode contact electrode 3.
As a preferred embodiment of the present invention, based on the above examples, referring to fig. 1 and 2, the external electrode 4 has an extension portion 4-1, the external electrode 4 is a rounded rectangle with one side being an arc, the diameter of the arc side is the same as the diameter of the anode contact electrode 3, one side of the arc side on the external electrode 4 is located right above the anode contact electrode 3, one side of the external electrode 4 opposite to the arc side is located at the extension portion 4-1, and the extension portion 4-1 extends out of the area right opposite to the anode contact electrode 3.
As a preferred embodiment of the present invention, the passivation layer is a SiN passivation layer.
As a preferred embodiment of the present invention, referring to FIGS. 1 to 3, the GaAs substrate 1 has a thickness of 600 μm, the cathode contact electrode 2 has a thickness of 300nm, the anode contact electrode 3 has a thickness of 283.5nm, the external electrode 4 has a thickness of 700nm, the graphene layer 7 has a thickness of 0.34nm, the passivation layer 8 has a thickness of 400nm, the Ni layer has a thickness of 1.5nm, the Ge layer has a thickness of 26nm, the first Au layer has a thickness of 100nm, the Ni layer has a thickness of 26nm, and the second Au layer has a thickness of 130 nm.
Referring to fig. 4, the process for preparing a GaAs photoconductive switch of the present invention includes the steps of:
s1, moving the graphene film to the upper surface of the GaAs substrate to obtain a first composite structure;
s2, drying the first composite structure, and patterning the first composite structure on the surface to expose the area corresponding to the anode contact electrode on the surface of the graphene film to form a second composite structure;
s3, sequentially evaporating a Ni layer, a Ge layer, an Au layer, a Ni layer and an Au layer on the second composite structure to form a third composite structure;
s4, performing lift off technology on the third composite structure to enable the anode contact electrode to be reserved on the surface of the graphene film and the cathode contact electrode to be reserved on the lower surface of the GaAs substrate to obtain a fourth composite structure;
s5, patterning the surface of the fourth composite structure, and covering masks on the upper surface of the anode contact electrode and the light receiving hole position on the anode contact electrode to form a fifth composite structure;
s6, etching the exposed graphene on the fifth composite structure, and cleaning the mask to obtain a sixth composite structure;
s7, annealing the sixth composite structure to obtain a seventh composite structure;
s8, making a passivation layer on the upper surface of the GaAs substrate to form an eighth composite structure;
s9, patterning the surface of the eighth composite structure, covering a mask, and only exposing the passivation layer on the upper surface of the anode contact electrode 3 to form a ninth composite structure;
s10, removing the passivation layer on the upper surface of the anode contact electrode 3, and then removing the mask to form a tenth composite structure;
s11, patterning the surface of the tenth composite structure, covering a mask, and only exposing the upper surface of the anode contact electrode 3 to form an eleventh composite structure;
s12, evaporating a metal layer on the surface of the eleventh composite structure, and performing lift off process to prepare the external electrode 4.
In a preferred embodiment of the present invention, a photoresist is used for patterning.
In S6, the exposed graphene on the fifth composite structure is etched away by using oxygen plasma, wherein the gas flow rate of oxygen is 20-25sccm and the time is 180-.
In S7, a preferable embodiment of the present invention, the annealing gas used in the annealing treatment is ultra-pure nitrogen.
Referring to fig. 4, the process for preparing a GaAs photoconductive switch according to the present invention, which is a preferred embodiment of the present invention, comprises the steps of:
s1, growing graphene on the Cu substrate;
s2, transferring the graphene to the surface of the semi-insulating GaAs substrate through a pulling method to obtain a first composite structure;
the specific process is as follows:
1) coating with PMMA: cut 1X 1cm2Cu foil grown with graphene, laid flat on blue filmSlightly pressing the four corners by using a pair of tweezers, sucking PMMA by using a dropper to be dripped on the Cu foil to cover more than 2/3, closing the cover of the spin coater, clicking a start button to start spin coating, and finishing glue coating after countdown is finished;
2) pre-baking: oven drying at 90 deg.C for 1 min;
3) etching the Cu substrate: scrubbing PMMA and graphene on the back, placing the Cu substrate coated with PMMA into etching liquid to be etched for about 4-5 hours, enabling the side with PMMA (with darker color and reddish color) to face upwards, and ending etching after the Cu substrate is completely invisible;
4) transferring graphene: and (3) fishing out the graphene/PMMA film with the growth substrate etched away from the etching solution by using a clean glass slide, rinsing the film in deionized water for 3-5 minutes, and preferably repeating the step for more than 3 times. Transferring the graphene to a target position of a silicon wafer substrate, placing a sample on clean dust-free paper, and airing for 5-10 minutes to enable water between the film and the substrate to be aired;
5) post-baking: placing the sample with the converted graphene on a heating plate, and drying at 90 ℃ for at least 30 min;
6) removing the photoresist: after drying, the sample is clamped by tweezers and placed on dust-free paper, three clean culture dishes are washed, acetone, isopropanol and absolute ethyl alcohol are respectively poured into the three clean culture dishes, and the three clean culture dishes are respectively covered by the culture dishes. Soaking the sample in acetone for 8-10min, clamping the sample with tweezers during soaking, shaking to quickly disperse the molten PMMA, changing new acetone after 8-10min, soaking the sample for about 40min (since acetone is quickly volatilized, the sample needs to be covered by a culture dish), and then cleaning with isopropanol, absolute ethyl alcohol and deionized water;
7) and (3) drying: after removing the photoresist, high voltage N is used2The residual water stain on the surface of the sample is blown off by a gun, and then the sample is placed on a hot plate at 90 ℃ to be baked for about 10 min.
S3, drying the first composite structure, and patterning the surface of the first composite structure to form a second composite structure;
patterning the first composite structure with a photoresist.
S4, evaporating five layers of metal on the second composite structure by using an electron beam evaporation table to form a third composite structure;
five layers of metal are evaporated by an electron beam, namely a Ni layer, a Ge layer, an Au layer, a Ni layer and an Au layer in sequence, and the total thickness of the five layers of metal is 283.5 nm.
S5, performing lift off technology on the third composite structure to enable the anode contact electrode to be reserved on the surface of the graphene film and the cathode contact electrode to be reserved on the lower surface of the GaAs substrate to obtain a fourth composite structure;
s6, patterning the surface of the fourth composite structure, and covering masks on the upper surface of the anode contact electrode and the light receiving hole position on the anode contact electrode to form a fifth composite structure;
s7, etching the exposed graphene on the fifth composite structure by using oxygen plasma, and cleaning the photoresist under the action of the mask to obtain a sixth composite structure;
and making the fifth composite structure into oxygen plasma, wherein the gas flow of oxygen is 20-25sccm, and the time is 180-.
S8, annealing the sixth composite structure by using a rapid annealing furnace, wherein the graphene is attached to the surface of the target substrate and is positioned between the metal and the semi-insulating GaAs of the target substrate, so as to obtain a seventh composite structure;
s9, making a passivation layer on the upper surface of the GaAs substrate of the seventh composite structure, wherein the passivation material is silicon nitride, and forming an eighth composite structure;
s10, patterning the surface of the eighth composite structure, coating photoresist, covering a mask, and only exposing the passivation layer on the upper surface of the anode contact electrode 3 to form a ninth composite structure;
s11, etching the exposed silicon nitride of the ninth composite structure by utilizing ICP (inductively coupled plasma), and cleaning the photoresist under the action of the mask to form a tenth composite structure;
s12, patterning the surface of the tenth composite structure, coating photoresist, covering a mask, and only exposing the upper surface of the anode contact electrode 3 to form an eleventh composite structure;
s13, evaporating two layers of metal on the eleventh composite structure by using an electron beam evaporation table, and performing lift off process to prepare an external electrode 4 to obtain the GaAs photoconductive switch; the electron beam evaporation plating metal comprises two layers of Ag and Au, and the total thickness is 1 mu m.
Example 1
Selecting a semi-insulating gallium arsenide double polishing piece with the four-inch crystal orientation <100> and the thickness of 600 mu m, and cleaning the gallium arsenide surface by utilizing the processes of acetone, sulfuric acid and the like to remove surface impurities. The device structure is schematically shown in figures 1-2,
1) preparation of composite structure of CVD graphene and gallium arsenide
And (3) growing graphene on a Cu foil with the thickness of 25 microns by using a CVD (chemical vapor deposition) method, and transferring the graphene to the surface of semi-insulating GaAs by a Czochralski method to obtain a first composite structure.
2) Patterning the first composite structure:
first lithography (front side):
(1) coating a photoresist AZ-5214(2), homogenizing the photoresist (3), pre-baking (4), exposing (5), developing (6), post-baking (7) and removing residual photoresist by UVO (ultraviolet light oxidation);
3) then five layers of metal (front and back) are made on the surface to serve as electrodes (a Ni layer, a Ge layer, an Au layer, a Ni layer and an Au layer), and the total thickness of the five layers of metal is 283.5 nm;
4) removing photoresist (removing the part with the photoresist by lift off process, and then removing the metal on the photoresist to present the metal electrode required by the experiment);
5) then, performing second photoetching on the surface, such as the first photoetching, aiming at masking the middle circle, protecting the graphene required by the experiment, and exposing the unnecessary graphene so as to remove the graphene in the subsequent process;
6) then, performing oxygen plasma bombardment, removing the exposed graphene, and reserving the light holes and the graphene below the metal;
7) then annealed using a rapid annealing furnace (RTA), annealing gas: ultra-pure nitrogen;
8) and then, depositing a passivation layer SiN on the upper surface of the device: PECVD, 400nm thickness;
9) then, the first photoetching mask is used for carrying out third photoetching (front surface);
10) performing ICP etching, etching the exposed silicon nitride, and removing the mask photoresist after etching;
11) then, a fourth photolithography (front side) is performed: thickening the pattern mask, and the photoetching process and the steps are as above;
12) then plating two layers of metal on the surface of the device, wherein the metal types are Ag and Au, and the thickness is 700 nm;
13) then, photoresist is removed, the photoresist at the position of the mask is removed to obtain an external electrode 4, and then a dicing saw is used for scribing a small wafer with the size of 5 multiplied by 5 mm. The dark current of the device is between 20 and 30nA when the voltage at two ends is 10V, the dark current of the device is 700nA when the voltage is above 6400V, and the breakdown phenomenon does not occur above 10000V.
Example 2
Selecting a gallium arsenide double polished wafer with a four-inch crystal orientation of <100>, wherein the resistivity is more than or equal to 10 omega cm, the thickness is 600 mu m, and cleaning the surface of gallium arsenide by using the processes of acetone, sulfuric acid and the like to remove surface impurities.
1) Preparation of composite structure of CVD graphene and gallium arsenide
And (3) growing graphene on a Cu foil with the thickness of 25 microns by using a CVD (chemical vapor deposition) method, and transferring the graphene to the surface of semi-insulating GaAs by a Czochralski method to obtain a first composite structure.
2) Patterning the first composite structure:
first lithography (front side):
(1) coating a photoresist AZ-5214(2), homogenizing the photoresist (3), pre-baking (4), exposing (5), developing (6), post-baking (7) and removing residual photoresist by UVO (ultraviolet light oxidation);
3) then five layers of metal (front and back) are made on the surface to serve as electrodes (a Ni layer, a Ge layer, an Au layer, a Ni layer and an Au layer), and the total thickness of the five layers of metal is 283.5 nm;
4) removing photoresist (removing the part with the photoresist by lift off process, and then removing the metal on the photoresist to present the metal electrode required by the experiment);
5) then, performing second photoetching on the surface, such as the first photoetching, aiming at masking the middle circle, protecting the graphene required by the experiment, and exposing the unnecessary graphene so as to remove the graphene in the subsequent process;
6) then, performing oxygen plasma bombardment, removing the exposed graphene, and reserving the light holes and the graphene below the metal;
7) then annealed using a rapid annealing furnace (RTA), annealing gas: nitrogen gas;
8) and then, depositing a passivation layer SiN on the upper surface of the device: PECVD with the thickness of 600 nm;
9) then, the first photoetching mask is used for carrying out third photoetching (front surface);
10) performing ICP etching, etching the exposed silicon nitride, and removing the mask photoresist after etching;
11) then, a fourth photolithography (front side) is performed: thickening the pattern mask, and the photoetching process and the steps are as above;
12) then plating two layers of metal on the surface of the device, wherein the metal types are Ag and Au, and the thickness is 700 nm;
13) then, photoresist is removed, the photoresist at the position of the mask is removed to obtain an external electrode 4, and then a dicing saw is used for scribing a small wafer with the size of 5 multiplied by 5 mm. The dark current of the device is between 10 and 20nA when the voltage at two ends is 10V, the dark current of the device is 640nA when the voltage is above 6400V, and the breakdown phenomenon does not occur above 10000V.
Example 3
Selecting a gallium arsenide double polished wafer with a four-inch crystal orientation of <100>, wherein the resistivity is more than or equal to 10 omega cm, the thickness is 600 mu m, and cleaning the surface of gallium arsenide by using the processes of acetone, sulfuric acid and the like to remove surface impurities.
1) Preparation of composite structure of CVD graphene and gallium arsenide
And (3) growing graphene on a Cu foil with the thickness of 25 microns by using a CVD (chemical vapor deposition) method, and transferring the graphene to the surface of semi-insulating GaAs by a Czochralski method to obtain a first composite structure.
2) Patterning the first composite structure:
first lithography (front side):
(1) coating a photoresist AZ-5214(2), homogenizing the photoresist (3), pre-baking (4), exposing (5), developing (6), post-baking (7) and removing residual photoresist by UVO (ultraviolet light oxidation);
3) then five layers of metal (front and back) are made on the surface to serve as electrodes (a Ni layer, a Ge layer, an Au layer, a Ni layer and an Au layer), and the total thickness of the five layers of metal is 283.5 nm;
4) removing photoresist (removing the part with the photoresist by lift off process, and then removing the metal on the photoresist to present the metal electrode required by the experiment);
5) then, performing second photoetching on the surface, such as the first photoetching, aiming at masking the middle circle, protecting the graphene required by the experiment, and exposing the unnecessary graphene so as to remove the graphene in the subsequent process;
6) then, performing oxygen plasma bombardment, removing the exposed graphene, and reserving the light holes and the graphene below the metal;
7) then annealed using a rapid annealing furnace (RTA), annealing gas: nitrogen gas;
8) and then, depositing a passivation layer SiN on the upper surface of the device: PECVD, 400nm thickness;
9) then, the first photoetching mask is used for carrying out third photoetching (front surface);
10) performing ICP etching, etching the exposed silicon nitride, and removing the mask photoresist after etching;
11) then, a fourth photolithography (front side) is performed: thickening the pattern mask, and the photoetching process and the steps are as above;
12) then plating a thickening layer of metal on the surface of the device, wherein the metal type is Au, and the thickness is 600 nm;
13) then, photoresist is removed, the photoresist at the position of the mask is removed to obtain an external electrode 4, and then a dicing saw is used for scribing a small wafer with the size of 5 multiplied by 5 mm. When the voltage of two ends of the device is 10V, the dark current is between 10 and 20nA, and the breakdown phenomenon does not occur above 11000V.
The experiment shows that the gallium arsenide photoconductive switch manufactured by the novel graphene metal electrode composite structure on the basis of not changing the raw material of the switch improves the service life of the electrode, the working voltage and the voltage resistance of the electrode, thereby promoting the development of miniaturization and durability of the photoconductive switch.

Claims (9)

1. A bulk structure GaAs photoconductive switch based on a graphene interface layer is characterized by comprising a GaAs substrate (1), a cathode contact electrode (2), an anode contact electrode (3) and an external electrode (4), the light receiving hole (5) and the graphene layer (7), the cathode contact electrode (2) is arranged on the lower surface of the GaAs substrate (1), the anode contact electrode (3) is arranged on the upper surface of the GaAs substrate (1), the graphene layer (7) is arranged between the anode contact electrode (3) and the GaAs substrate (1), the external electrode (4) is arranged on the upper surface of the anode contact electrode (3), the light receiving hole (5) penetrates through the external electrode (4) and the anode contact electrode (3), the upper surface of the GaAs substrate (1) is covered with the passivation layer (6), and the anode contact electrode (3) is sequentially provided with a Ni layer, a Ge layer, a first Au layer, a Ni layer and a second Au layer from bottom to top;
the external electrode (4) extends towards one side to form an extension part (4-1), the extension part (4-1) extends out of the area opposite to the anode contact electrode (3), and the corner of the extension part (4-1) is provided with an arc chamfer;
the thickness of the Ni layer is 1.5nm, the thickness of the Ge layer is 26nm, the thickness of the first Au layer is 100nm, the thickness of the Ni layer is 26nm, and the thickness of the second Au layer is 130 nm.
2. The bulk structure GaAs photoconductive switch based on the graphene interface layer according to claim 1, wherein the external electrode (4), the anode contact electrode (3) and the graphene layer (7) are circular with equal size, the external electrode (4), the anode contact electrode (3) and the graphene layer (7) are concentric, the external electrode (4), the anode contact electrode (3) and the graphene layer (7) are located at the center of the GaAs substrate (1), and the light receiving hole (5) is arranged along the centers of the external electrode (4) and the anode contact electrode (3).
3. The GaAs optical switch based on bulk structure of graphene interface layer of claim 2, wherein the external electrode (4) has an extension portion (4-1), the external electrode (4) is a rounded rectangle with an arc edge, the diameter of the arc edge is the same as that of the anode contact electrode (3), one side of the arc edge on the external electrode (4) is directly above the anode contact electrode (3), one side of the extension portion (4-1) opposite to the arc edge on the external electrode (4) extends out of the region opposite to the anode contact electrode (3), and the extension portion (4-1) extends out of the region opposite to the anode contact electrode (3).
4. The bulk GaAs optical switch of claim 2, wherein the passivation layer is a SiN passivation layer.
5. A bulk GaAs light guide switch based on a graphene interface layer according to any of claims 1 to 4, characterized in that the GaAs substrate (1) has a thickness of 600 μm, the cathode contact electrode (2) has a thickness of 300nm, the anode contact electrode (3) has a thickness of 283.5nm, the external electrode (4) has a thickness of 700nm, the graphene layer (7) has a thickness of 0.34nm, and the passivation layer (6) has a thickness of 400 nm.
6. The process for preparing the GaAs optical switch with the bulk structure based on the graphene interface layer as claimed in any one of claims 1 to 5, which comprises the following steps:
s1, moving the graphene film to the upper surface of the GaAs substrate (1) to obtain a first composite structure;
s2, drying the first composite structure, and patterning the first composite structure on the surface to expose the area corresponding to the anode contact electrode (3) on the surface of the graphene film to form a second composite structure;
s3, sequentially evaporating a Ni layer, a Ge layer, an Au layer, a N i layer and an Au layer on the second composite structure to form a third composite structure;
s4, performing lift off technology on the third composite structure to enable the anode contact electrode (3) to be reserved on the surface of the graphene film and enable the cathode contact electrode (2) to be reserved on the lower surface of the GaAs substrate (1) to obtain a fourth composite structure;
s5, patterning the surface of the fourth composite structure, and covering masks on the upper surface of the anode contact electrode (3) and the light receiving hole position on the anode contact electrode (3) to form a fifth composite structure;
s6, etching the exposed graphene on the fifth composite structure, and cleaning the mask to obtain a sixth composite structure;
s7, annealing the sixth composite structure to obtain a seventh composite structure;
s8, making a passivation layer on the upper surface of the GaAs substrate (1) to form an eighth composite structure;
s9, patterning the surface of the eighth composite structure, covering a mask, and only exposing the passivation layer on the upper surface of the anode contact electrode (3) to form a ninth composite structure;
s10, removing the passivation layer on the upper surface of the anode contact electrode (3), and then removing the mask to form a tenth composite structure;
s11, patterning the surface of the tenth composite structure, covering a mask, and only exposing the upper surface of the anode contact electrode (3) to form an eleventh composite structure;
s12, evaporating a metal layer on the surface of the eleventh composite structure, and performing lift off process to prepare the external electrode (4).
7. The process of claim 6, wherein the patterning is performed using a photoresist.
8. The process as claimed in claim 6, wherein in S6, the exposed graphene on the fifth composite structure is etched away by using oxygen plasma, and the gas flow rate of oxygen is 20-25sccm for 180-200S.
9. The process of claim 6, wherein in the step S7, the annealing gas is ultra-pure nitrogen gas.
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