CN111129163B - Schottky diode and preparation method thereof - Google Patents
Schottky diode and preparation method thereof Download PDFInfo
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- CN111129163B CN111129163B CN201911231350.8A CN201911231350A CN111129163B CN 111129163 B CN111129163 B CN 111129163B CN 201911231350 A CN201911231350 A CN 201911231350A CN 111129163 B CN111129163 B CN 111129163B
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- 238000002360 preparation method Methods 0.000 title abstract description 10
- 230000003647 oxidation Effects 0.000 claims abstract description 152
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 152
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims abstract description 94
- 229910001195 gallium oxide Inorganic materials 0.000 claims abstract description 94
- 229910052751 metal Inorganic materials 0.000 claims abstract description 89
- 239000002184 metal Substances 0.000 claims abstract description 89
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 238000000137 annealing Methods 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 221
- 238000001039 wet etching Methods 0.000 claims description 7
- 238000011268 retreatment Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 238000001312 dry etching Methods 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 239000002356 single layer Substances 0.000 claims description 4
- 230000015556 catabolic process Effects 0.000 abstract description 15
- 230000005684 electric field Effects 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 7
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- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
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- 238000004381 surface treatment Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention relates to the field of semiconductors, in particular to a Schottky diode and a preparation method thereof. The method comprises the following steps: an n-type gallium oxide layer is epitaxially grown on the substrate; preparing a first mask layer on the n-type gallium oxide layer; the window of the first mask layer is a region corresponding to a thermal oxidation treatment region to be prepared, wherein the thermal oxidation treatment region comprises at least one first thermal oxidation region and two second thermal oxidation regions; performing first high-temperature annealing treatment on the front surface of the device to form a thermal oxidation treatment area; removing the first mask layer; preparing an anode metal layer on the front side and a cathode metal layer on the back side; wherein the first thermal oxidation zone is located below the anode metal and each second thermal oxidation zone is located partially below the anode metal. The method can form a terminal structure through thermal oxidation, and reduce the electric field below the anode metal and in the edge area, thereby reducing the reverse leakage of the anode and improving the breakdown and conduction characteristics.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a Schottky diode and a preparation method thereof.
Background
With the application of semiconductor devices in more and more technical fields, conventional silicon-based semiconductor diodes with narrow bandgap encounter a plurality of problemsChallenges, where breakdown voltage is difficult to meet with ever-increasing demands, are one of the key factors affecting further device performance enhancement. Gallium oxide (Ga) 2 O 3 ) Compared with the third generation semiconductor materials represented by SiC and GaN, the semiconductor material has wider forbidden band width, the breakdown field strength is more than 20 times of Si, and more than 2 times of SiC and GaN, and in theory, when the diode device with the same voltage resistance is manufactured, the on-resistance of the device can be reduced to 1/10 of SiC and 1/3 of GaN, ga 2 O 3 The Barlish figure of merit of the material is 18 times that of SiC and 4 times that of GaN material, thus Ga 2 O 3 The wide bandgap semiconductor material has excellent performance and is suitable for preparing power devices and high-voltage switching devices.
The wide bandgap gallium oxide Schottky diode has the advantages of high breakdown, low on-resistance and the like, and the Ga is improved at present 2 O 3 The quality of the crystal material and the optimized doping process are improved, the device performance of the Schottky diode is improved, but the breakdown voltage and the conduction characteristic of the existing Schottky diode are far lower than the expected value of the material.
Disclosure of Invention
In view of the above, the embodiment of the invention provides a schottky diode and a preparation method thereof, so as to improve the breakdown voltage and the conduction characteristic of the existing schottky diode.
A first aspect of an embodiment of the present invention provides a method for manufacturing a schottky diode, including:
an n-type gallium oxide layer is epitaxially grown on the substrate;
preparing a first mask layer on the n-type gallium oxide layer; the window of the first mask layer is a region corresponding to a thermal oxidation treatment region to be prepared, and the thermal oxidation treatment region comprises at least one first thermal oxidation region and two second thermal oxidation regions;
performing first high-temperature annealing treatment on the front surface of the device to form a thermal oxidation treatment area;
removing the first mask layer;
preparing an anode metal layer on the front side and a cathode metal layer on the back side;
the region corresponding to the projection of the anode metal layer on the n-type gallium oxide layer is a first region, the region outside the region corresponding to the projection of the anode metal layer on the n-type gallium oxide layer is a second region, and the first thermal oxidation region is located in the first region; the first portion of each second thermal oxidation zone is located in the first region and the second portion of each second thermal oxidation zone is located in the second region.
Optionally, the thermal oxidation treatment zone further comprises: and a third thermal oxidation zone located in the second zone.
Optionally, after forming the thermal oxidation treatment zone, the method further comprises: and carrying out high-temperature annealing treatment on at least one of the first thermal oxidation zone, the second thermal oxidation zone and the third thermal oxidation zone.
Optionally, the substrate is an n-type gallium oxide substrate, and the doping concentration is greater than that of the n-type gallium oxide layer.
Optionally, the n-type gallium oxide layer is unevenly doped, and the n-type gallium oxide layer has a multilayer structure with concentration increasing from top to bottom.
Optionally, the preparing the front-side anode metal layer includes:
after the first mask layer is removed, depositing an insulating medium layer;
removing the insulating medium layer of the preset anode region by dry etching or wet etching;
preparing an anode metal layer with a front surface of a field plate structure; wherein the field plate structure comprises a single-layer field plate structure, a multi-layer field plate structure and an oblique field plate structure;
correspondingly, the preset anode region is a first region, and the region outside the preset anode region is a second region.
A second aspect of an embodiment of the present invention provides a schottky diode, including:
a substrate;
an n-type gallium oxide layer formed on the substrate;
an anode metal layer formed on the n-type gallium oxide layer;
a cathode metal layer formed on the back surface of the substrate;
wherein the n-type gallium oxide layer comprises: the anode metal layer is arranged on the n-type gallium oxide layer, the projection of the anode metal layer on the n-type gallium oxide layer corresponds to a first area, the area of the anode metal layer outside the area corresponding to the projection of the anode metal layer on the n-type gallium oxide layer corresponds to a second area, and the first thermal oxidation area is positioned in the first area and is in contact with the anode metal layer; the first portion of each second thermal oxidation zone is located in the first region, the second portion of each second thermal oxidation zone is located in the second region, and the first portion of each second thermal oxidation zone is in contact with the anodic metal layer.
Optionally, the n-type gallium oxide layer further includes: and the third thermal oxidation area is positioned in the second area, and the upper surface of the third thermal oxidation area is the upper surface of the n-type gallium oxide layer.
Optionally, the annealing temperature and the annealing time in the formation process of the first thermal oxidation zone, the second thermal oxidation zone and the third thermal oxidation zone are different.
Optionally, the substrate is an n-type gallium oxide substrate, and the doping concentration is greater than that of the n-type gallium oxide layer;
the n-type gallium oxide layer is unevenly doped, and the n-type gallium oxide layer has a multilayer structure with the concentration increased from top to bottom.
In the embodiment of the invention, when the Schottky diode is prepared, the front surface of the device is subjected to high-temperature annealing treatment to form a thermal oxidation treatment area; the first mask layer is prepared on the n-type gallium oxide layer, and a thermal oxidation treatment area can be formed at a specific position, wherein the thermal oxidation treatment area comprises at least one first thermal oxidation area positioned in the area below the anode metal layer and two second thermal oxidation areas partially positioned below the anode metal layer. And after the first mask layer is removed, preparing an anode metal layer at a specific position on the front surface of the device, wherein the first thermal oxidation region and the second thermal oxidation region are arranged below the anode metal layer, so that the electric fields below the anode metal layer and in the edge region are reduced, the reverse electric leakage of the anode metal layer is reduced, and the breakdown voltage and the conduction characteristic of the prepared Schottky diode are improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a preparation method of a schottky diode according to an embodiment of the present invention;
fig. 2 is a schematic cross-sectional structure of an n-type gallium oxide layer epitaxially grown on a substrate according to an embodiment of the present invention;
fig. 3 is a schematic cross-sectional structure of a first mask layer formed on an n-type gallium oxide layer according to an embodiment of the present invention;
FIG. 4 is a schematic cross-sectional structure of a device according to an embodiment of the present invention after a thermal oxidation treatment is performed on the front surface of the device to form a thermal oxidation treatment region;
FIG. 5 is a schematic cross-sectional view of the first mask layer removed according to an embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view of a front-side anode metal layer and a back-side cathode metal layer according to an embodiment of the present invention;
fig. 7 is a schematic cross-sectional structure of a device formed when the number of first oxidation regions is two according to an embodiment of the present invention;
fig. 8 to 11 are schematic cross-sectional structures of schottky diodes corresponding to the preparation of the schottky diode including the third thermal oxidation region according to the embodiment of the present invention;
fig. 12 is a schematic cross-sectional structure of a schottky diode provided with two first thermal oxidation regions and four third thermal oxidation regions according to an embodiment of the present invention;
FIG. 13 is a schematic cross-sectional view of an embodiment of the present invention after a mask layer is deposited on an n-type gallium oxide layer;
FIG. 14 is a schematic cross-sectional view of an embodiment of the present invention after deposition of an insulating dielectric layer;
fig. 15 is a schematic cross-sectional structure of the embodiment of the present invention after removing the insulating dielectric layer in the preset anode region;
FIG. 16 is a schematic cross-sectional view of an anode metal layer having a front side with a field plate structure and a cathode metal layer having a back side according to an embodiment of the present invention;
fig. 17 is a schematic cross-sectional view of a schottky diode with an anode metal layer on the front side of the field plate structure corresponding to fig. 7 according to an embodiment of the present invention;
fig. 18 is a schematic cross-sectional view of a schottky diode having an anode metal layer with a front side of a field plate structure corresponding to fig. 11 according to an embodiment of the present invention;
fig. 19 is a schematic cross-sectional view of a schottky diode having an anode metal layer with a front side of a field plate structure corresponding to fig. 12 according to an embodiment of the present invention;
fig. 20 is a schematic cross-sectional view of a schottky diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings in combination with the embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Fig. 1 is a schematic flow chart of a preparation method of a schottky diode according to an embodiment of the present invention, and referring to fig. 1, the preparation method of the schottky diode may include:
step S101, an n-type gallium oxide layer is epitaxially grown on the substrate.
In an embodiment of the present invention, referring to fig. 2, substrate 201 is an n-type heavily doped gallium oxide substrate. The n-type gallium oxide layer 202 is a lightly doped gallium oxide layer realized by doping Si or Sn, and the thickness of the n-type gallium oxide layer 202 is set according to actual requirements.
Step S102, preparing a first mask layer on the n-type gallium oxide layer; the window of the first mask layer is a region corresponding to a thermal oxidation treatment region to be prepared, and the thermal oxidation treatment region comprises at least one first thermal oxidation region and two second thermal oxidation regions.
In the embodiment of the present invention, referring to fig. 3, in order to form a thermal oxidation treatment region in a specific region in a subsequent step, a first mask layer 204 may be first prepared in a region corresponding to a region other than the thermal oxidation treatment region to be prepared, even if a window of the first mask layer 204 is a region corresponding to the thermal oxidation treatment region to be prepared.
And step S103, performing high-temperature annealing treatment on the front surface of the device to form a thermal oxidation treatment area.
In the embodiment of the present invention, referring to fig. 4, the front surface of the device is subjected to high-temperature annealing treatment, and because of the shielding of the first mask layer 204, a thermal oxidation treatment region is not formed in the n-type gallium oxide layer corresponding to the region where the first mask layer 204 exists, and a thermal oxidation treatment region is formed in the n-type gallium oxide layer outside the corresponding region of the first mask layer.
Step S104, removing the first mask layer.
In an embodiment of the present invention, referring to fig. 5, the first mask layer is removed to form the device structure shown in fig. 5. The thermal oxidation treatment areas include a first thermal oxidation area 2051 and a second thermal oxidation area 2052, the classification of the oxidation treatment areas is classified according to the relative positions of the first thermal oxidation area 2051 and the metal anode to be prepared, the first thermal oxidation area 2051 is located in an area corresponding to the position right below the metal anode to be prepared, the number of the first thermal oxidation area 2051 is at least one, and the second thermal oxidation area 2052 is partially located in an area corresponding to the position right below the metal anode to be prepared, and the number of the second thermal oxidation area 2052 is fixed to two. Correspondingly, when different numbers of the first thermal oxidation regions 2051 are to be prepared, the windows of the first mask layer correspondingly change.
Step S105, preparing a front anode metal layer and a back cathode metal layer; the region corresponding to the projection of the anode metal layer on the n-type gallium oxide layer is a first region, the region outside the region corresponding to the projection of the anode metal layer on the n-type gallium oxide layer is a second region, and the first thermal oxidation region is located in the first region; the first portion of each second thermal oxidation zone is located in the first region and the second portion of each second thermal oxidation zone is located in the second region.
In this embodiment, referring to fig. 6, after the first mask layer is removed, an anode metal layer 206 is prepared on the front surface of the device, so that the left and right edges of the anode metal layer 206 are respectively located in the areas corresponding to the two second thermal oxidation areas 2052, that is, the area corresponding to the projection of the anode metal layer on the n-type gallium oxide layer is the first area, the area other than the area corresponding to the projection of the anode metal layer on the n-type gallium oxide layer is the second area, and when the anode metal layer is prepared, the first thermal oxidation areas 2051 are located in the first area, the first part of each second thermal oxidation area 2052 is located in the first area, and the second part of each second thermal oxidation area 2052 is located in the second area. Compared with the n-type gallium oxide layer which is not subjected to high-temperature annealing treatment, the n-type gallium oxide layer which is subjected to high-temperature annealing treatment has ion concentration difference, the thermal oxidation treatment region is formed at a specific position, and the relative positions of the anode metal layer 206 and the thermal oxidation treatment region are controlled, so that the electric field below the anode metal layer 206 and in the edge region can be reduced, the reverse electric leakage of the anode is reduced, and the breakdown and conduction characteristics are improved. When there are two first oxidation regions, the resulting device is shown in fig. 7.
In the embodiment of the invention, when the Schottky diode is prepared, the front surface of the device is subjected to high-temperature annealing treatment to form a thermal oxidation treatment area; and preparing a first mask layer on the n-type gallium oxide layer, wherein a thermal oxidation treatment region can be formed at a specific position in the n-type gallium oxide layer due to the shielding effect of the first mask layer, namely at least one first thermal oxidation region and two second thermal oxidation regions are formed. Preparing an anode metal layer on the front side of the device after removing the first mask layer, and preparing a cathode metal layer on the back side of the device; the left and right edges of the anode metal layer are respectively positioned in the corresponding areas of the second thermal oxidation area, and the first thermal oxidation area is positioned below the anode metal layer, so that the electric fields below the anode metal and in the edge area are reduced, the reverse electric leakage of the anode is reduced, and the breakdown characteristic and the conduction characteristic are improved.
In some embodiments, referring to fig. 8-11, the thermal oxidation treatment zone further comprises: and a third thermal oxidation zone located in the second zone.
In the embodiment of the invention, a plurality of thermal oxidation treatment areas can be formed in the drift layer through high-temperature annealing surface treatment, so that more concentration variation is introduced, and the breakdown characteristic of the device is further improved. Based on the device structure shown in fig. 2, a first mask layer 204 is prepared on the n-type gallium oxide layer 202, forming the device structure shown in fig. 8. Referring to fig. 9, a high temperature annealing treatment is performed on the front surface of the device to form a thermal oxidation treatment region; after forming the thermal oxidation treatment region, the first mask layer 204 is removed to form the device structure as shown in fig. 10, and the thermal oxidation treatment region may further include, in addition to the first thermal oxidation region 2051 and the second thermal oxidation region 2052: a third thermal oxidation zone 2053 located in the second zone. The front side anode metal layer 206 and the back side cathode metal layer 207 are then fabricated over the device structure shown in fig. 10 to form the device structure shown in fig. 11. The configurations provided in fig. 8-11 are illustrative only, and the first thermal oxidation zone and the third thermal oxidation zone may be more, for example, the number of first thermal oxidation zones may be two or more, and the number of third thermal oxidation zones may be two or more; such as the structure provided in fig. 12, the number of the first thermal oxidation areas is two, and the number of the third thermal oxidation areas is four. In the embodiment of the invention, more transverse concentration change is introduced into the n-type gallium oxide layer below the anode, so that the high voltage resistance of the device is further improved.
In some embodiments, after forming the thermal oxidation treatment zone, further comprising: and carrying out high-temperature annealing treatment on at least one of the first thermal oxidation zone, the second thermal oxidation zone and the third thermal oxidation zone.
In the embodiment of the invention, the high-temperature annealing retreatment is used for forming a plurality of first thermal oxidation areas, second thermal oxidation areas and third thermal oxidation areas with different concentrations and/or different depths so as to improve the breakdown characteristic and the conduction characteristic of the device. And after the high-temperature annealing treatment is carried out on the front surface of the device to form a thermal oxidation treatment area, carrying out high-temperature annealing retreatment for a plurality of times, wherein the treatment power and the treatment time of the equipment can be changed when the high-temperature retreatment is carried out each time, and the high-temperature annealing treatment with various powers and various times can be carried out. Multiple high-temperature retreatment can form more thermal oxidation treatment areas with different concentrations and/or depths, so that the breakdown characteristic and the conduction characteristic of the device are further improved.
In some embodiments, the substrate is an n-type gallium oxide substrate and the doping concentration is greater than the doping concentration of the n-type gallium oxide layer.
In an embodiment of the present invention, referring to fig. 2, the substrate 201 is an n-type gallium oxide substrate. An n-type gallium oxide layer 202 is epitaxially grown on the n-type gallium oxide substrate 201, wherein the doping concentration of the n-type gallium oxide layer 202 is smaller than that of the n-type gallium oxide substrate 201, which is more beneficial to realizing high voltage resistance.
In some embodiments, the n-type gallium oxide layer is non-uniformly doped; the n-type gallium oxide layer has a multilayer structure with an increased concentration from top to bottom.
In the embodiment of the invention, the n-type gallium oxide layer has a multilayer structure with increased concentration from top to bottom, which is more beneficial to realizing high pressure resistance.
In some embodiments, the preparing a first mask layer on the n-type gallium oxide layer may include: depositing a mask layer on the n-type gallium oxide layer; and removing the mask layer corresponding to the thermal oxidation treatment area to be prepared through photoetching and wet etching to form a first mask layer.
In the embodiment of the present invention, referring to fig. 13, a mask layer 203 may be first deposited on an n-type gallium oxide layer 202, and then the mask layer 203 corresponding to a thermal oxidation treatment area to be prepared may be removed by photolithography and wet etching, so that a first mask layer is formed in an area corresponding to an area outside the thermal oxidation treatment area to be prepared. In practice, the location and morphology of the first mask layer are both prepared according to the location of the thermal oxidation treatment region to be prepared, and finally the formation is composed of a plurality of discontinuous portions, such as the morphology of the first mask layer 204 in fig. 3 and 8.
In some embodiments, the first mask layer may include SiO 2 、Si 3 N 4 、Al 2 O 3 、HfO 2 And MgO.
In some embodiments, the removing the first mask layer may include: and putting the device with the formed thermal oxidation treatment area into a preset solution until the first mask layer is removed, wherein the preset solution is etching solution of the first mask layer.
In some embodiments, the preparing the front-side anodic metal layer may include: after the first mask layer is removed, depositing an insulating medium layer; removing the insulating medium layer of the preset anode region by dry etching or wet etching; preparing an anode metal layer with a front surface of a field plate structure; wherein the field plate structure comprises a single-layer field plate structure, a multi-layer field plate structure and an oblique field plate structure; correspondingly, the preset anode region is a first region, and the region outside the preset anode region is a second region.
In the embodiment of the invention, after the first mask layer is removed, an insulating medium layer is deposited, and then the insulating medium layer of a preset anode region is removed through dry etching or wet etching; the preset anode region is a contact part of an anode metal layer with the front surface of the field plate structure and the n-type gallium oxide layer, and is a first region, and a region outside the preset anode region is a second region, so that the transverse concentration change is introduced into the n-type gallium oxide layer below the anode, the electric field at the anode junction is optimized, the breakdown voltage is improved, and the on-resistance is simultaneously considered. Meanwhile, compared with the anode metal layer without the field plate structure, the anode metal layer for preparing the front surface with the field plate structure has better high-voltage resistance and conduction characteristics, and the structure of the field plate can be selected according to actual conditions and comprises a single-layer field plate structure, a multi-layer field plate structure and an oblique field plate structure.
In some embodiments, an anode metal layer with a field plate structure may be formed on the device structure shown in fig. 5, and a back cathode metal layer may be prepared, where the corresponding steps are shown in schematic views in fig. 14-16.
In the embodiment of the present invention, referring to fig. 14 to 16, after removing the first mask layer, an insulating dielectric layer 208 is deposited, and the insulating dielectric layer 208 in a preset anode region is removed by dry etching or wet etching, so as to prepare an anode metal layer 206 with a front surface of a field plate structure; the preset anode region is a first region, and the region outside the preset anode region is a second region, so that the transverse concentration change is introduced into the n-type gallium oxide layer below the anode, the electric field at the anode junction is optimized, the breakdown voltage is improved, and the on-resistance is simultaneously considered. Preparing the anode metal layer 206 with a field plate structure and preparing the cathode metal layer 207 on the back side forms a schottky diode as described in fig. 16. In practice, the cathode metal layer 207 may be prepared in any of the above steps.
In some embodiments, in the schottky diode structure shown in fig. 7, 11 and 12, the anode metal layer 206 may be an anode metal layer having a field plate structure, and the preparation steps are the same as those described above, and the corresponding field plate structures are shown in fig. 17, 18 and 19.
Fig. 20 is a schematic cross-sectional structure of a schottky diode according to an embodiment of the present invention, including:
a substrate 201;
an n-type gallium oxide layer 202 formed on the substrate 201;
an anode metal layer 206 formed on the n-type gallium oxide layer 202;
a cathode metal layer 207 formed on the back surface of the substrate 201;
wherein the n-type gallium oxide layer 202 includes: at least one first thermal oxidation region 2051 and two second thermal oxidation regions 2052, wherein a region corresponding to a projection of the anode metal layer 206 on the n-type gallium oxide layer 202 is a first region, a region other than a region corresponding to a projection of the anode metal layer 206 on the n-type gallium oxide layer 202 is a second region, and the first thermal oxidation region 2051 is located in the first region and is in contact with the anode metal layer 206; a first portion of each second thermal oxidation zone 2052 is located in a first region, a second portion of each second thermal oxidation zone 2052 is located in a second region, and the first portion of each second thermal oxidation zone 2052 is in contact with the anode metal layer 206.
According to the Schottky diode, the thermal oxidation treatment area is formed in the specific area on the upper surface of the n-type gallium oxide layer, and comprises at least one first thermal oxidation area positioned in the area below the anode metal layer and two second thermal oxidation areas partially positioned below the anode metal layer, so that the electric fields below the anode metal and in the edge area can be reduced, the reverse electric leakage of the anode is reduced, and the breakdown characteristic of the device is improved.
In some embodiments, the n-type gallium oxide layer further includes: and the third thermal oxidation area is positioned in the second area, and the upper surface of the third thermal oxidation area is the upper surface of the n-type gallium oxide layer.
In some embodiments, the annealing temperature and the annealing time are different during the formation of the first thermal oxidation zone, the second thermal oxidation zone, and the third thermal oxidation zone.
In some embodiments, the substrate is an n-type gallium oxide substrate and the doping concentration is greater than the doping concentration of the n-type gallium oxide layer;
in some embodiments, the n-type gallium oxide layer is unevenly doped, and the n-type gallium oxide layer has a multilayer structure with increasing concentration from top to bottom.
The forming process of each part in the schottky diode may refer to the corresponding process in the foregoing method embodiment, and will not be described herein.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.
Claims (6)
1. A method of manufacturing a schottky diode comprising:
an n-type gallium oxide layer is epitaxially grown on the substrate;
preparing a first mask layer on the n-type gallium oxide layer; the window of the first mask layer is a region corresponding to a thermal oxidation treatment region to be prepared, and the thermal oxidation treatment region comprises at least one first thermal oxidation region and two second thermal oxidation regions;
carrying out high-temperature annealing treatment on the front surface of the device to form a thermal oxidation treatment area;
removing the first mask layer;
preparing an anode metal layer on the front side and a cathode metal layer on the back side;
the region corresponding to the projection of the anode metal layer on the n-type gallium oxide layer is a first region, the region outside the region corresponding to the projection of the anode metal layer on the n-type gallium oxide layer is a second region, and the first thermal oxidation region is located in the first region; a first portion of each second thermal oxidation zone is located in the first region and a second portion of each second thermal oxidation zone is located in the second region;
the thermal oxidation treatment zone further comprises: a third thermal oxidation zone located in the second region;
after forming the thermal oxidation treatment zone, further comprising:
carrying out high-temperature annealing retreatment on at least one of the first thermal oxidation zone, the second thermal oxidation zone and the third thermal oxidation zone;
the high temperature annealing retreatment is used for forming a plurality of first thermal oxidation areas, second thermal oxidation areas and third thermal oxidation areas with different concentrations and/or different depths.
2. The method of manufacturing a Schottky diode of claim 1,
the substrate is an n-type gallium oxide substrate, and the doping concentration is larger than that of the n-type gallium oxide layer.
3. The method of fabricating a schottky diode of claim 1 wherein said n-type gallium oxide layer is non-uniformly doped;
the n-type gallium oxide layer has a multilayer structure with an increased concentration from top to bottom.
4. The method of fabricating a schottky diode of claim 1 wherein said fabricating a front side anode metal layer comprises:
after the first mask layer is removed, depositing an insulating medium layer;
removing the insulating medium layer of the preset anode region by dry etching or wet etching;
preparing an anode metal layer with a front surface of a field plate structure; wherein the field plate structure comprises a single-layer field plate structure, a multi-layer field plate structure and an oblique field plate structure;
correspondingly, the preset anode region is a first region, and the region outside the preset anode region is a second region.
5. A schottky diode, comprising:
a substrate;
an n-type gallium oxide layer formed on the substrate;
an anode metal layer formed on the n-type gallium oxide layer;
a cathode metal layer formed on the back surface of the substrate;
wherein the n-type gallium oxide layer comprises: the anode metal layer is arranged on the n-type gallium oxide layer, the projection of the anode metal layer on the n-type gallium oxide layer corresponds to a first area, the area of the anode metal layer outside the area corresponding to the projection of the anode metal layer on the n-type gallium oxide layer corresponds to a second area, and the first thermal oxidation area is positioned in the first area and is in contact with the anode metal layer; a first portion of each second thermal oxidation zone is located in the first region, a second portion of each second thermal oxidation zone is located in the second region, and the first portion of each second thermal oxidation zone is in contact with the anodic metal layer;
the n-type gallium oxide layer further comprises:
the third thermal oxidation area is positioned in the second area, and the upper surface of the third thermal oxidation area is the upper surface of the n-type gallium oxide layer;
the annealing temperature and the annealing time are different in the forming process of the first thermal oxidation zone, the second thermal oxidation zone and the third thermal oxidation zone;
the first thermal oxidation zone, the second thermal oxidation zone, and the third thermal oxidation zone are different in concentration and/or different in depth.
6. The schottky diode of claim 5 wherein,
the substrate is an n-type gallium oxide substrate, and the doping concentration is larger than that of the n-type gallium oxide layer;
the n-type gallium oxide layer is unevenly doped, and the n-type gallium oxide layer has a multilayer structure with the concentration increased from top to bottom.
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| CN113964183A (en) * | 2021-09-13 | 2022-01-21 | 西安电子科技大学 | Fluorine plasma injection terminal gallium oxide power diode and preparation method thereof |
| CN114709138A (en) * | 2022-02-11 | 2022-07-05 | 西安电子科技大学杭州研究院 | Gallium oxide Schottky diode and preparation method and preparation system thereof |
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| CN103346083A (en) * | 2013-07-09 | 2013-10-09 | 苏州捷芯威半导体有限公司 | Gallium nitride schottky diode and manufacturing method thereof |
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| US7633135B2 (en) * | 2007-07-22 | 2009-12-15 | Alpha & Omega Semiconductor, Ltd. | Bottom anode Schottky diode structure and method |
| KR101261928B1 (en) * | 2011-11-07 | 2013-05-08 | 현대자동차주식회사 | Manufacturing method for silicon carbide schottky barrier diode |
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| JP2011082392A (en) * | 2009-10-08 | 2011-04-21 | Sumitomo Electric Ind Ltd | Schottky barrier diode |
| CN103346083A (en) * | 2013-07-09 | 2013-10-09 | 苏州捷芯威半导体有限公司 | Gallium nitride schottky diode and manufacturing method thereof |
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