CN110972413B - Composite circuit board and manufacturing method thereof - Google Patents

Composite circuit board and manufacturing method thereof Download PDF

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Publication number
CN110972413B
CN110972413B CN201811152605.7A CN201811152605A CN110972413B CN 110972413 B CN110972413 B CN 110972413B CN 201811152605 A CN201811152605 A CN 201811152605A CN 110972413 B CN110972413 B CN 110972413B
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layer substrate
substrate
mark
outer layer
circuit pattern
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CN110972413A (en
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刘立坤
李艳禄
王超
吴苹
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Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Avary Holding Shenzhen Co Ltd
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Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Avary Holding Shenzhen Co Ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4638Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The invention relates to a manufacturing method of a composite circuit board, which comprises the following steps: providing an inner layer substrate, and forming a first circuit pattern, a first mark, a second circuit pattern and a second mark on each inner layer substrate unit; attaching a colloid on the inner substrate; cutting the inner layer substrate into a plurality of inner layer substrate units; providing a first outer layer substrate to form a first outer layer circuit pattern and a third mark; attaching the inner layer substrate unit to the first outer layer substrate, and aligning the first mark with the third mark for positioning; providing a second outer layer substrate to form a second outer layer circuit pattern and a fourth mark; combining the inner layer substrate unit on the second outer layer substrate, and aligning the second mark with the fourth mark for positioning; forming electric conduction among the inner layer substrate unit, the first outer layer substrate and the second outer layer substrate; forming through holes on the first outer layer substrate and the second outer layer substrate respectively; cutting to form a plurality of composite circuit boards. The invention also provides a composite circuit board manufactured by the method.

Description

Composite circuit board and manufacturing method thereof
Technical Field
The invention relates to a composite circuit board and a manufacturing method thereof.
Background
Along with the continuous updating of terminal electronic products, the electronic products gradually tend to be thin, narrow in frame and full in screen design. Because the Chip On Flex (COF) circuit substrate has ultra-fine conductive lines and good flexibility, the Chip On Flex (COF) circuit substrate is widely applied to thin, narrow-frame and full-screen electronic products.
Generally, COF is required to be integrated with flexible circuit board into a composite circuit board for use because of its own properties, which do not meet the surface mount technology (Surface Mount Technology, SMT) routing requirements. At present, when the COF is integrated with the flexible circuit board, the COF is mainly designed by an overall inner two-layer circuit, and is manufactured by adopting a double-sided addition method, so that a bonding pad is formed, and then the flexible circuit board is formed on the COF.
COF and flexible circuit board bonding are typically performed by bonding a plurality of COF units (PCS) to a flexible circuit board in the form of a substrate (PNL). The COF units may have an uncertainty in the direction of the offset during lamination, resulting in an unfixed relative position of each product after lamination. The common bonding and positioning method is to sleeve the COF and the flexible circuit board on the positioning rod for positioning. The method still can cause the offset of the inner and outer products to not meet the requirement of laminating precision.
Disclosure of Invention
In view of the foregoing, there is a need for a composite circuit board and a method of manufacturing the same that overcomes the above-mentioned problems.
A manufacturing method of a composite circuit board comprises the following steps:
providing an inner layer substrate, wherein the inner layer substrate comprises a plurality of connected inner layer substrate units, a first circuit pattern and at least one first mark are formed on one side of each inner layer substrate unit, a second circuit pattern and at least one second mark are formed on the other side of each inner layer substrate unit, at least one first bonding pad is formed on the first circuit pattern, and at least one second bonding pad is formed on the second circuit pattern;
attaching colloid on the inner layer substrate;
cutting the inner layer substrate to form a plurality of inner layer substrate units;
providing a first outer layer substrate, forming a first outer layer circuit pattern and a third mark on the first outer layer substrate, wherein the third mark corresponds to the first mark one by one;
attaching the inner layer substrate unit to the first outer layer substrate through the colloid, and positioning the first mark by aligning the first mark with the third mark during attachment;
providing a second outer layer substrate, and forming a second outer layer circuit pattern and a fourth mark on the second outer layer substrate, wherein the fourth mark corresponds to the second mark one by one;
attaching the other side of the inner substrate unit to the second outer substrate through the colloid, and positioning the second mark by aligning the second mark with the fourth mark during attaching;
forming electric conduction among the inner layer substrate unit, the first outer layer substrate and the second outer layer substrate;
forming through holes on the first outer layer substrate and the second outer layer substrate respectively to expose the first bonding pad and the second bonding pad;
and cutting the second outer layer substrate and the first outer layer substrate to form a plurality of composite circuit boards, wherein at least one edge of the inner layer substrate does not extend to the edge of the composite circuit board.
Further, after forming the first circuit pattern and the at least one first mark on one side of the inner substrate and forming the second circuit pattern and the at least one second mark on the other side of the inner substrate, the method further comprises: and forming a first protective layer on the outer surface of the inner layer substrate by tin plating, wherein the first protective layer covers the first circuit pattern and the second circuit pattern.
Further, after forming the first protective layer, further comprising: a first cover layer is formed on the first protective layer of the inner layer substrate.
Further, the first cover layer includes a body portion formed on the first protective layer and a plurality of extension portions extending from the body portion toward the first and second line patterns.
Further, in the step of forming electrical conduction among the inner substrate unit, the first outer substrate and the second outer substrate, the inner substrate unit, the first outer substrate and the second outer substrate are electrically connected in a manner of forming conductive holes and plugging conductive paste.
Further, after the step of forming electrical conduction between the inner substrate unit, the first outer substrate, and the second outer substrate, the method further includes: and forming a second cover layer and a second protective layer on the outer surface of the first outer layer substrate and the second outer layer substrate.
Further, a first conductive hole and a second conductive hole are formed in the first outer layer substrate, the first conductive hole penetrates through the first outer layer substrate, the colloid and extends to a first circuit pattern of the inner layer substrate unit, the second conductive hole penetrates through the first outer layer substrate, the colloid and extends to the second outer layer substrate, a third conductive hole is formed in the second outer layer substrate, and the third conductive hole penetrates through the second outer layer substrate and extends to a second circuit pattern of the inner layer substrate unit.
Further, the number of the first marks is two, and the two first marks are respectively arranged at the diagonal positions of the surface where the first marks are arranged.
Further, in the step of attaching the inner substrate unit to the first outer substrate through the colloid, the first mark is aligned to the third mark by identifying and positioning through a visual identification device.
The utility model provides a compound circuit board, includes inlayer base plate unit, connect respectively in inlayer base plate unit both sides first outer base plate and second outer base plate, inlayer circuit base plate unit both sides form at least a first pad and at least a second pad respectively, inlayer base plate unit pass through the colloid connect respectively in first outer base plate and second outer base plate, at least one side of inlayer base plate unit does not extend to compound circuit board's edge, set up on the first outer base plate and be formed with first conductive hole and second conductive hole, first conductive hole runs through first outer base plate and extend to inlayer base plate unit's first circuit pattern, the second conductive hole runs through first outer base plate, colloid and second outer base plate, set up on the second outer base plate and form the third conductive hole, the third conductive hole runs through second outer base plate and extends to inlayer base plate unit's second circuit pattern, just the third conductive hole sets up with first conductive hole is relative, set up on the first outer base plate and be formed with first outer base plate and extend to the first outer base plate unit is equipped with second mark, second outer base plate is equipped with at least second outer base plate is equipped with second mark, second outer base plate is equipped with at least a second outer base plate is in alignment, second outer base plate is equipped with the second mark. Compared with the prior art, in the manufacturing method of the composite circuit board, the first mark and the second mark are respectively arranged on the two opposite sides of the inner layer substrate, the third mark is arranged on the first outer layer substrate, and the fourth mark is arranged on the second outer layer substrate. When the first mark is aligned with the third mark and the second mark is aligned with the fourth mark for positioning during the bonding, thereby effectively improving the precision during the bonding. The composite circuit board is accurate in alignment.
Drawings
Fig. 1 is a schematic cross-sectional view of an inner substrate provided by an embodiment of the invention after forming a first circuit pattern, a first mark, a second circuit pattern and a second mark.
Fig. 2 is a schematic cross-sectional view of the inner substrate of fig. 1 after forming a first protective layer thereon.
Fig. 3 is a schematic cross-sectional view of the inner substrate of fig. 2 after forming a first cover layer on the first protective layer.
FIG. 4 is a schematic cross-sectional view of the inner substrate bonding gel of FIG. 3 after being cut into a plurality of inner substrate units.
Fig. 5 is a schematic cross-sectional view of a first outer layer circuit pattern and a third mark formed on a first outer layer substrate according to an embodiment of the present invention.
Fig. 6 is a schematic cross-sectional view of the inner substrate unit of fig. 4 attached to the first outer substrate of fig. 5.
Fig. 7 is a schematic cross-sectional view of a second outer layer substrate according to an embodiment of the present invention after forming a second outer layer circuit pattern and a fourth mark.
Fig. 8 is a schematic cross-sectional view of the second outer substrate of fig. 7 bonded to the plurality of inner substrate units of fig. 6.
Fig. 9 is a schematic cross-sectional view of the inner substrate unit, the first outer substrate and the second outer substrate of fig. 8 after electrical conduction is formed therebetween.
Fig. 10 is a schematic cross-sectional view of the first and second outer substrates of fig. 9 after forming a second cover layer and a second protective layer.
Fig. 11 is a schematic cross-sectional view of the first and second outer substrates of fig. 10 after forming first and second through holes.
Fig. 12 is a schematic cross-sectional view of a composite circuit board according to an embodiment of the present invention.
Description of the main reference signs
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Figure BDA0001818276920000061
The invention will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
The manufacturing method of the composite circuit board provided by the technical scheme comprises the following steps:
first, referring to fig. 1, an inner substrate 10a is provided, the inner substrate 10a includes a plurality of connected inner substrate units 10, a first circuit pattern 121 and at least one first mark 122 are formed on one side of each inner substrate unit 10, and a second circuit pattern 123 and at least one second mark 124 are formed on the other side of each inner substrate unit 10. Wherein at least one first pad 1211 is formed on each of the first line patterns 121, and at least one second pad 1231 is formed on each of the second line patterns 123.
In this embodiment, the number of the first marks 122 and the second marks 124 is two, and the first marks and the second marks are respectively located at diagonal positions of the inner substrate unit 10. In this embodiment, the first mark 122 and the second mark 124 are rectangular. It is understood that in other embodiments, the number and shape of the first and second marks 122, 124 may be provided as desired.
In the present embodiment, the first line pattern 121 and the second line pattern 123 are formed by a half-additive method. That is, the first and second circuit patterns 121 and 123 are formed by sequentially performing steps of drilling, electroless copper plating, film pressing, exposure, development, copper plating, film removal, etching, and the like on the inner layer substrate 10 a.
The first mark 122 and the second mark 124 are formed together in the etching step, and the first mark 122 and the second mark 124 are not electrically connected to the first circuit pattern 121 or the second circuit pattern 123.
It is understood that in other embodiments, the first and second circuit patterns 121 and 123 may be formed by an additive method or a subtractive method.
In the second step, referring to fig. 2, a first protection layer 13 is formed on the outer surface of the inner substrate 10 a.
The first protective layer 13 is formed by tin plating.
The first protective layer 13 covers the first and second wiring patterns 121 and 123.
In the third step, referring to fig. 3, a first cover layer 14 is formed on the first protective layer 13 of the inner substrate 10 a.
The first cover layer 14 includes a body portion 141 formed on the first protective layer 13 and a plurality of extension portions 142 extending from the body portion 141 toward the first and second line patterns 121 and 123.
Fourth, referring to fig. 4, a glue 40 is attached to one side of the inner substrate 10a, and the inner substrate 10a is cut into a plurality of inner substrate units 10.
In the embodiment of the invention, the glue 40 is adhered to one side of the first circuit pattern 121. The first pads 1211 are exposed through the gel 40.
Fifth, referring to fig. 5, a first outer substrate 20 is provided, and a first outer circuit pattern 221 and a third mark 222 are formed on the first outer substrate 20.
In the present embodiment, the first outer layer line pattern 221 and the third mark 222 are formed by a subtractive process. That is, the first outer layer substrate 20 is subjected to the steps of film pressing, etching, film removing, etc. once to form the first outer layer line pattern 221 and the third mark 222.
The third marks 222 are in one-to-one correspondence with the first marks 122.
Sixth, referring to fig. 6, the inner substrate unit 10 is attached to the first outer substrate 20 through the glue 40, and the first mark 122 is aligned with the third mark 222 for positioning.
In the present embodiment, the first mark 122 is aligned with the third mark 222 by recognizing the positioning by the visual recognition device, but is not limited thereto.
The glue body 40 is connected to the first circuit pattern 121 of the inner substrate unit 10 and the first insulating layer 21 of the first outer substrate 20.
Seventh, referring to fig. 7, a second outer substrate 30 is provided, and a second outer circuit pattern 321 and a fourth mark 322 are formed on the second outer substrate 30.
The second outer layer wiring pattern 321 and the fourth mark 322 are formed by a subtractive process. The fourth mark 322 corresponds to the second mark 124 one-to-one with 1.
In the eighth step, referring to fig. 8, a second outer substrate 30 is attached to the other side of the inner substrate unit 10.
The inner substrate unit 10 and the second outer substrate 30 are also connected by a glue 40. The glue 40 connects the second circuit pattern 123 and the second insulating layer 31. The gel 40 further fills the space between the first outer substrate 20 and the second outer substrate 30 and covers the inner substrate unit 10. The at least one second bonding pad 1231 is exposed through the glue 40.
Ninth, referring to fig. 9, electrical conduction is formed among the inner substrate unit 10, the first outer substrate 20, and the second outer substrate 30.
In the embodiment of the present invention, the inner substrate unit 10, the first outer substrate 20, and the second outer substrate 30 are electrically connected by forming conductive holes and plugging conductive paste. The conductive hole forming mode includes but is not limited to forming through laser drilling and punching in two times.
Specifically, the first outer substrate 20 is provided with a first conductive hole 201 and a second conductive hole 202. The first conductive hole 201 penetrates the first outer substrate 20 and the gel 40 and extends to the first circuit pattern 121 of the inner substrate unit 10. The second conductive via 202 penetrates the first outer substrate 20, the gel 40 and extends to the second outer substrate 30. The second outer substrate 30 is provided with a third conductive hole 301. The third conductive via 301 penetrates the second outer substrate 30 and extends to the second circuit pattern 123 of the inner substrate unit 10. The third conductive via 301 is disposed opposite the first conductive via 201. The first conductive hole 201, the second conductive hole 202 and the third conductive hole 301 are all electrically connected by means of a plug conductive paste.
In the tenth step, referring to fig. 10, a second cover layer 50 and a second protective layer 60 are formed on the outer surfaces of the first and second outer substrates 20 and 30.
The second cover layer 50 includes, but is not limited to, CVL, piCL, ink, or the like, and the second protective layer 60 is formed by a surface treatment such as gold plating or gold melting.
Eleventh, referring to fig. 11, a partial region of the first outer substrate 20 and a partial region of the second outer substrate 30 are removed, thereby forming first and second through holes 203 and 303 to expose the first and second pads 1211 and 1231 of the inner substrate.
Twelfth, referring to fig. 12, the second outer substrate 30 and the first outer substrate 20 are cut in sequence to form a plurality of composite circuit boards 100.
At least one side of the inner substrate unit 10 does not extend to an edge of the composite circuit board 100.
In the method for manufacturing the composite circuit board 100 according to the embodiment of the invention, the first mark 122 and the second mark 124 are respectively disposed on two opposite sides of the inner substrate 10a, the third mark 222 is disposed on the first outer substrate 20, and the fourth mark 322 is disposed on the second outer substrate 30. Positioning is performed by aligning the first mark 122 with the third mark 222 and aligning the second mark 124 with the fourth mark 322 at the time of bonding, thereby effectively improving the accuracy at the time of bonding.
Further, the inner substrate 10a is cut into a plurality of inner substrate units 10 and then connected with the first outer substrate 20 and the second outer substrate 30 through the glue 40, so that the first outer substrate 20 and the second outer substrate 30 are not wasted due to scrapping of the inner substrate unit 10, and the inner substrate unit 10 and the first outer substrate 20 and the second outer substrate 30 have higher layout flexibility, so that the utilization rate of the inner substrate 10a and the first outer substrate 20 and the second outer substrate 30 is improved.
Further, the inner substrate 10a, the first outer substrate 20, and the second outer substrate 30 are manufactured independently and then bonded, so that the manufacturing cycle can be reduced.
In the present embodiment, the composite circuit board 100 manufactured by the composite circuit board manufacturing method of the present invention is a four-layer board stacked structure, but is not limited thereto, and in other embodiments, five-layer boards, six-layer boards, or other layers of circuit boards may be formed in the same manner.
With continued reference to fig. 12, the present invention further provides a composite circuit board 100 manufactured by the above-mentioned method for manufacturing a composite circuit board. The composite circuit board 100 includes an inner substrate unit 10, a first outer substrate 20 and a second outer substrate 30 respectively connected to two sides of the inner substrate unit 10. The first outer substrate 20 and the second outer substrate 30 are bonded to the inner substrate unit 10 by a glue 40.
The two sides of the inner substrate unit 10 are respectively provided with a first mark 122 and a second mark 124. The first outer substrate 20 is provided with a third mark 222. The second outer substrate 30 is provided with a fourth mark 322. The first mark 122 is aligned with the third mark 222. The second mark 124 is aligned with the fourth mark 322.
In the embodiment of the present invention, the inner substrate unit 10 is a COF, and the first outer substrate 20 and the second outer substrate 30 are flexible circuit boards.
The inner substrate unit 10 is connected to the first outer substrate 20 and the second outer substrate 30, and in this embodiment, is connected to one end of the first outer substrate 20 and one end of the second outer substrate 30. At least one side of the inner substrate unit 10 does not extend to an edge of the composite circuit board 100.
The first circuit pattern 121 and the second circuit pattern 123 are formed on both sides of the inner substrate unit 10. In the embodiment of the present invention, the material of the first circuit pattern 121 and the second circuit pattern 123 is copper, and it is understood that the material of the first circuit pattern 121 and the second circuit pattern 123 may be similar conductive metals.
Further, at least one first pad 1211 is formed on the first line pattern 121. At least one second bonding pad 1231 is formed on the second circuit pattern 123. The at least one first pad 1211 is exposed through the first outer substrate 20. The at least one second bonding pad 1231 is exposed through the second outer substrate 30.
Further, the inner substrate unit 10 further includes a first protective layer 13 formed on the outer surfaces of the first and second line patterns 121 and 123, that is, the first protective layer 13 covers the first and second line patterns 121 and 123. The first protective layer 13 prevents oxidation of the first and second pads 1211 and 1231, increasing reliability of the inner layer substrate unit 10. In the embodiment of the present invention, the first protection layer 13 is formed by means of tin plating.
Further, the inner substrate unit 10 further includes a first cover layer 14 formed on an outer surface of the first protective layer 13 and filled in portions of the first and second line patterns 121 and 123. The first cover layer 14 includes a body portion 141 formed on an outer surface of the first protective layer 13 and a plurality of extension portions 142 extending from the body portion 141 toward the first or second line patterns 121 or 123. The extension 142 is disposed perpendicular to the main body 141.
The first outer substrate 20 is provided with a first outer circuit pattern 221.
Further, the first outer substrate 20 is provided with a first conductive hole 201 and a second conductive hole 202. The first conductive hole 201 penetrates the first outer substrate 20 and extends to the first line pattern 121 of the inner substrate unit 10. The second conductive holes 202 penetrate the first outer substrate 20, the colloid 40, and the second outer substrate 30.
Further, the first outer substrate 20 is provided with a first through hole 203. The first pad 1211 is exposed through the first through hole 203.
The second outer substrate 30 is provided with a second outer circuit pattern 321.
Further, the second outer substrate 30 is provided with a third conductive hole 301. The third conductive via 301 penetrates the second outer substrate 30 and extends to the second circuit pattern 123 of the inner substrate unit 10, and the third conductive via 301 is disposed opposite to the first conductive via 201. The inner substrate unit 10 is located at one side of the second conductive via 202.
Further, the first conductive hole 201, the second conductive hole 202, and the third conductive hole 301 are filled with conductive paste, so that an electrical connection is formed among the inner substrate unit 10, the first outer substrate 20, and the second outer substrate 30.
Further, a second through hole 303 is formed in the second outer substrate 30. The second pad 1231 is exposed through the second via 303.
In addition, the composite circuit board 100 of the present invention further includes a second cover layer 50 and a second protective layer 60 formed on the outer surfaces of the first outer substrate 20 and the second outer substrate 30. The second cover layer 50 and the second protective layer 60 serve to prevent oxidation of the first and second outer substrates 20 and 30 to improve stability and reliability of the composite circuit board 100.
In the embodiment of the present invention, the second cover layer 50 includes, but is not limited to, CVL, piCL, ink, etc., and the second protective layer 60 is formed by a surface treatment method such as gold plating or gold plating.
It should be understood that various other corresponding changes and modifications can be made by one skilled in the art according to the technical concept of the present invention, and all such changes and modifications should fall within the scope of the claims of the present invention.

Claims (10)

1. A manufacturing method of a composite circuit board comprises the following steps:
providing an inner layer substrate, wherein the inner layer substrate comprises a plurality of connected inner layer substrate units, a first circuit pattern and at least one first mark are formed on one side of each inner layer substrate unit, a second circuit pattern and at least one second mark are formed on the other side of each inner layer substrate unit, at least one first bonding pad is formed on the first circuit pattern, and at least one second bonding pad is formed on the second circuit pattern;
attaching colloid on the inner layer substrate;
cutting the inner layer substrate to form a plurality of inner layer substrate units;
providing a first outer layer substrate, forming a first outer layer circuit pattern and a third mark on the first outer layer substrate, wherein the third mark corresponds to the first mark one by one;
attaching the inner layer substrate unit to the first outer layer substrate through the colloid, and positioning the first mark by aligning the first mark with the third mark during attachment;
providing a second outer layer substrate, and forming a second outer layer circuit pattern and a fourth mark on the second outer layer substrate, wherein the fourth mark corresponds to the second mark one by one;
attaching the other side of the inner substrate unit to the second outer substrate through the colloid, and positioning the second mark by aligning the second mark with the fourth mark during attaching;
forming electric conduction among the inner layer substrate unit, the first outer layer substrate and the second outer layer substrate;
forming through holes on the first outer layer substrate and the second outer layer substrate respectively to expose the first bonding pad and the second bonding pad;
and cutting the second outer layer substrate and the first outer layer substrate to form a plurality of composite circuit boards, wherein at least one edge of the inner layer substrate does not extend to the edge of the composite circuit board.
2. The method for manufacturing a composite circuit board according to claim 1, wherein: after forming the first circuit pattern and at least one first mark on one side of the inner substrate and forming the second circuit pattern and at least one second mark on the other side of the inner substrate, the method further comprises the steps of: and forming a first protective layer on the outer surface of the inner layer substrate by tin plating, wherein the first protective layer covers the first circuit pattern and the second circuit pattern.
3. The method for manufacturing a composite circuit board according to claim 2, wherein: after forming the first protective layer, further comprising: a first cover layer is formed on the first protective layer of the inner layer substrate.
4. The method for manufacturing a composite circuit board according to claim 3, wherein: the first cover layer includes a body portion formed on the first protective layer and a plurality of extension portions extending from the body portion toward the first and second line patterns.
5. The method for manufacturing a composite circuit board according to claim 1, wherein: in the step of forming electrical conduction among the inner substrate unit, the first outer substrate and the second outer substrate, the inner substrate unit, the first outer substrate and the second outer substrate are electrically communicated in a mode of forming conductive holes and plugging conductive paste.
6. The method for manufacturing a composite circuit board according to claim 1, wherein: after the step of forming electrical conduction among the inner substrate unit, the first outer substrate and the second outer substrate, the method further includes: and forming a second cover layer and a second protective layer on the outer surface of the first outer layer substrate and the second outer layer substrate.
7. The method for manufacturing a composite circuit board according to claim 6, wherein: the first outer layer substrate is provided with a first conductive hole and a second conductive hole, the first conductive hole penetrates through the first outer layer substrate, the colloid and extends to a first circuit pattern of the inner layer substrate unit, the second conductive hole penetrates through the first outer layer substrate, the colloid and extends to the second outer layer substrate, the second outer layer substrate is provided with a third conductive hole, and the third conductive hole penetrates through the second outer layer substrate and extends to a second circuit pattern of the inner layer substrate unit.
8. The method for manufacturing a composite circuit board according to claim 1, wherein: the number of the first marks is two, and the two first marks are respectively arranged at the diagonal positions of the surface where the first marks are arranged.
9. The method for manufacturing a composite circuit board according to claim 1, wherein: in the step of attaching the inner layer substrate unit to the first outer layer substrate through the colloid, the first mark is aligned to the third mark through identification and positioning of a visual identification device.
10. The utility model provides a compound circuit board, includes inlayer base plate unit, connect respectively in inlayer base plate unit both sides first outer base plate and second outer base plate, inlayer base plate unit both sides form at least a first bonding pad and at least a second bonding pad, its characterized in that respectively: the inner layer substrate unit is respectively connected to the first outer layer substrate and the second outer layer substrate through colloid, at least one side of the inner layer substrate unit does not extend to the edge of the composite circuit board, a first conductive hole and a second conductive hole are formed in the first outer layer substrate, the first conductive hole penetrates through the first outer layer substrate and extends to a first circuit pattern of the inner layer substrate unit, the second conductive hole penetrates through the first outer layer substrate, the colloid and the second outer layer substrate, a third conductive hole is formed in the second outer layer substrate, a second circuit pattern penetrating through the second outer layer substrate and extending to the inner layer substrate unit is formed in the third conductive hole and is opposite to the first conductive hole, a first through hole is formed in the first outer layer substrate and exposes the first bonding pad, a second through hole is formed in the second outer layer substrate and exposes the second bonding pad, at least one first mark and at least one second outer layer mark are respectively arranged on two sides of the inner layer substrate unit, at least one first outer layer mark and at least one second outer layer mark are arranged on the second outer layer substrate, at least one first alignment mark is arranged on the second outer layer substrate, and at least one fourth alignment mark is arranged on the second outer layer substrate;
wherein the first circuit pattern and the first mark are formed together, and the second circuit pattern and the second mark are formed together.
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