CN110955942A - Semiconductor device threshold voltage simulation method - Google Patents
Semiconductor device threshold voltage simulation method Download PDFInfo
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- CN110955942A CN110955942A CN201911212066.6A CN201911212066A CN110955942A CN 110955942 A CN110955942 A CN 110955942A CN 201911212066 A CN201911212066 A CN 201911212066A CN 110955942 A CN110955942 A CN 110955942A
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Abstract
A semiconductor device threshold voltage simulation method comprises the following steps: 1) extracting all device characteristic parameters in the circuit, and converting the device characteristic parameters into a corresponding netlist in a spice simulator; 3) in a spice simulator, establishing transconductance matrixes for all devices in the netlist; 4) and carrying out iterative solution on the transconductance matrix. The semiconductor device threshold voltage simulation method can quickly and accurately simulate to obtain the semiconductor device threshold voltage, and improves the simulation efficiency.
Description
Technical Field
The invention relates to the technical field of semiconductor device models, in particular to a semiconductor device threshold voltage simulation method.
Background
In the traditional semiconductor threshold voltage simulation, the source/drain section voltage is fixed, and the grid voltage is scanned to obtain the drain terminal current. And searching a point closest to the fixed current ICON in the drain end current, wherein the corresponding voltage is the threshold voltage.
The traditional method has large simulation calculation amount, and particularly in the simulation related to the extraction of statistical model parameters, the problem of overlong threshold voltage simulation time is more obvious due to the increase of simulation times.
The voltage current (IV) characteristics of a semiconductor device are simulated, typically a fixed voltage resulting current. Taking a four-terminal mos device as an example, the ports are gate (g), source(s), drain (d), and substrate (b), and the source/substrate voltage is usually zero. Therefore, if Vg, Vd is known, the drain current Id can be obtained. In the threshold voltage simulation, Vd is known and Id is required to be equal to the fixed current ICON, and Vg is then solved.
In the conventional semiconductor threshold voltage simulation, drain voltage Vd is fixed, and gate voltage Vg is scanned to obtain drain terminal current Id. And searching a point closest to the fixed current ICON in the drain end current, wherein the corresponding voltage is the threshold voltage Vg. This simulation is computationally expensive and the accuracy is affected by the Vg scan step size.
Disclosure of Invention
In order to solve the defects in the prior art, the invention aims to provide a semiconductor device threshold voltage simulation method, which can quickly and accurately simulate the threshold voltage of a semiconductor device and improve the simulation efficiency.
In order to achieve the above object, the present invention provides a method for simulating a threshold voltage of a semiconductor device, comprising the steps of:
1) extracting characteristic parameters of all devices in the circuit;
2) converting the characteristic parameters into a corresponding netlist in a spice simulator;
3) in a spice simulator, establishing transconductance matrixes for all devices in the netlist;
4) and carrying out iterative solution on the transconductance matrix.
Further, the circuit comprises a control source and a controlled source, wherein the control source is provided with a known voltage current, and the controlled source is a voltage source with a floating voltage.
Further, the controlled source comprises two interfaces of C1 and C0, the C1 is connected with the gate of the semiconductor device, the control source comprises two interfaces of S1 and S0, the S1 is connected with the drain of the semiconductor device, and the C0 interface, the S0 interface and the rest terminals of the semiconductor device are grounded.
Further, the transconductance matrix includes a first derivation of a current-voltage relationship, and a matrix is established according to kirchhoff's theorem.
And further, solving the transconductance matrix, and obtaining voltage and current information in the circuit after convergence succeeds.
Further, the characteristic parameter includes voltage current information.
In order to achieve the above object, the present invention further provides a controlled source, which includes a control source terminal and a controlled source terminal, wherein the control source terminal knows voltage and current, and the controlled source terminal is a voltage source of floating voltage.
Further, the controlled source end comprises two interfaces of C1 and C0, the C1 interface is connected with the gate of the semiconductor device, the control source end comprises two interfaces of S1 and S0, the S1 interface is connected with the drain of the semiconductor device, and the C0 interface, the S0 interface and the rest terminals of the semiconductor device are grounded.
In order to achieve the above object, the present invention further provides a semiconductor device threshold voltage simulation apparatus, which includes a memory and a processor, wherein the memory stores computer instructions running on the processor, and the processor executes the computer instructions to execute the semiconductor device threshold voltage simulation method steps as described above.
To achieve the above object, the present invention also provides a computer readable storage medium having stored thereon computer instructions which, when executed, perform the steps of the semiconductor device threshold voltage simulation method as described above.
The semiconductor device threshold voltage simulation method has the following beneficial effects:
the threshold voltage of the semiconductor device can be obtained through rapid and accurate simulation, time consumed by threshold voltage simulation is reduced, and efficiency is improved.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a flow chart of a method for simulating a threshold voltage of a semiconductor device according to the present invention;
FIG. 2 is a schematic diagram of a controlled source configuration according to the present invention;
FIG. 3 is a schematic diagram of a method for simulating threshold voltage of a semiconductor device according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
Fig. 1 is a flowchart of a method for simulating a threshold voltage of a semiconductor device according to the present invention, and the method for simulating a threshold voltage of a semiconductor device according to the present invention will be described in detail with reference to fig. 1.
First, in step 101, all device characteristic parameters in the circuit are extracted and converted into a corresponding netlist in a spice simulator.
Preferably, the circuit is composed of a semiconductor device and a controlled source (brown Voltage Current controlled Voltage flowing VCVF), fig. 2 is a schematic diagram of a controlled source structure according to the present invention, as shown in fig. 2, the controlled source of the present invention includes a control source end and a controlled source end, the control source end has a known Voltage and Current, the controlled source end is a Voltage of a floating Voltage, the controlled source end has two interfaces of C1 and C0, C0 is grounded, and C1 is connected to a gate of the semiconductor device; the control source end is provided with two interfaces S1 and S0, S0 is grounded, S1 is connected with the drain electrode of the semiconductor device, the rest end points of the semiconductor device are grounded, the voltage value of the control source end is v _ value, and the current value is i _ value.
At step 102, in a spice simulator, a transconductance matrix is established for all devices in the netlist. In this step, the transconductance matrix is used as a well-known technology and is the basis of spice simulation. The transconductance matrix is a matrix which is established according to kirchhoff's theorem after first-order derivation is carried out on the current-voltage relation under the current condition. Semiconductor device transconductance matrices are known in the art and only the VCVF transconductance matrix will be described with emphasis here.
In the embodiment of the present invention, the controlled source (hereinafter referred to as VCVF) has 6 corresponding variables, which are voltages corresponding to points S1, S0, C1, and C0, a control source end current isoute, and a controlled source end current Icontrol.
Two equations corresponding to VCVF are:
a control source terminal voltage V _ value ═ V (s1) -V (s 0);
the source current Isource is controlled to be i _ value.
According to the above description, according to the transconductance theory, the transconductance matrix corresponding to VCVF is shown as the following table:
in step 103, the transconductance matrices of all devices are iteratively solved. In the step, after all the device transconductance matrixes are successfully established, the matrixes are solved, and the information of the voltage and the current in the circuit is obtained after convergence is successful.
The method for simulating the threshold voltage of the semiconductor device according to the present invention will be further described with reference to an embodiment.
FIG. 3 is a schematic diagram of a method for simulating threshold voltage of a semiconductor device according to the present invention.
The circuit is specifically composed of a semiconductor device (here, an NMOS device is taken as an example) and a VCVF. The NMOSgate terminal is connected to the VCVF C1 terminal, and the drain terminal is connected to the VCVF S1 terminal. The rest terminals of the NMOS are grounded, and in the VCVF, the terminals C0 and S0 are grounded. The voltage value of the VCVF control source end is v _ value, and the current value of the VCVF control source end is i _ value. The circuit can be simulated in a spice simulator to obtain the voltage corresponding to the end of VCVF C1.
The specific simulation process is described as follows:
first, convert FIG. 3 to the corresponding netlist in the spice simulator. The specific expression is as follows:
w s1 0 VCVF c1 0 v_value i_value
m1 s1 c1 0 0 nmos
the spice netlist is a way to describe the circuit connection structure, and is widely used as a well-known technology. The netlist is expressed here in a manner consistent with the circuit description of FIG. 3. W refers to the name of the VCVF device. VCVF is a generic name of a type of device, and there may be multiple VCVFs in a circuit, and different VCVF devices will be named differently to distinguish them from each other. s1 s0 is the control source port, c1 c0 is the controlled source port, v _ value is the voltage value, i _ value is the current value. m1 is the name of the nmos device.
And secondly, in a spice simulator, establishing transconductance matrixes for all devices in the netlist. The transconductance matrix is a well-known technique and is the basis of spice simulation. The transconductance matrix is a matrix which is established according to kirchhoff's theorem after first-order derivation is carried out on the current-voltage relation under the current condition. Transconductance matrices of nmos devices are known in the art, and only the VCVF transconductance matrix is described here, and the corresponding transconductance matrices are shown in the following table.
The VCVF corresponds to 6 variables which are respectively the voltage corresponding to the points S1, S0, C1 and C0, the control end current Isoute and the controlled end current Icontrol.
Two equations corresponding to VCVF are:
control terminal voltage V (s1) -V (s0) V _ value
Control terminal current Isource i _ value
According to the above description, according to the transconductance theory, the transconductance matrix corresponding to VCVF is shown as the following table:
and thirdly, iteratively solving. After all the device transconductance matrixes are successfully established, the matrixes are solved, and after convergence is successful (the technologies such as matrix solving and the like are relatively mature and are not described in detail), the information of the voltage and the current in the circuit can be obtained. In this example, the current corresponding to Icontrol, i.e., the gate terminal, is obtained.
The invention provides a semiconductor device threshold voltage simulation method, and in the rapid simulation method described herein, a new controlled source (VCVF) is introduced into a spice simulator. Specifically, in the threshold voltage simulation of the semiconductor device, the control end voltage of the VCVF is set to be Vd, the control end current of the VCVF is set to be Icon, and the threshold voltage Vg can be directly, quickly and accurately obtained through spice matrix solving.
To achieve the above object, the present invention also provides a computer readable storage medium having stored thereon computer instructions which, when executed, perform the steps of the semiconductor device threshold voltage simulation method as described above.
In order to achieve the above object, the present invention further provides a semiconductor device threshold voltage simulation apparatus, which includes a memory and a processor, wherein the memory stores computer instructions running on the processor, and the processor executes the computer instructions to execute the semiconductor device threshold voltage simulation method steps as described above.
Those of ordinary skill in the art will understand that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (9)
1. A method for simulating threshold voltage of a semiconductor device is characterized by comprising the following steps:
1) extracting all semiconductor device characteristic parameters in the circuit, and converting the characteristic parameters into a corresponding netlist in a spice simulator;
2) in a spice simulator, establishing transconductance matrixes for all devices in the netlist;
3) and carrying out iterative solution on the transconductance matrix.
2. The method of simulating threshold voltage of semiconductor device according to claim 1, wherein the step 1) further comprises,
connecting a C1 interface of a controlled source end in a controlled source with a grid electrode of a semiconductor device, connecting an S1 interface of a control source end with a drain electrode of the semiconductor device, and grounding a C0 interface of the controlled source end, an S0 interface of the control source end and other end points of the semiconductor device;
and simulating the circuit in a spice simulator to obtain the voltage corresponding to the C1 interface of the controlled source end.
3. The method of claim 1, wherein the characteristic parameters comprise voltage and current information.
4. The method for simulating the threshold voltage of the semiconductor device according to claim 1, wherein the transconductance matrix of step 2) comprises performing first-order derivation on a current-voltage relationship, and establishing a matrix according to kirchhoff's theorem.
5. The method for simulating the threshold voltage of the semiconductor device according to claim 4, wherein the step 3) further comprises solving the transconductance matrix, and obtaining the voltage and current information in the circuit after the convergence is successful.
6. The controlled source is characterized by comprising a control source end and a controlled source end, wherein the control source end is provided with a known voltage and a known current, and the controlled source end is a voltage source with a floating voltage.
7. The controlled source of claim 6, wherein the controlled source terminal comprises two interfaces of C1 and C0, the C1 interface is connected to a gate of a semiconductor device, the control source comprises two interfaces of S1 and S0, the S1 interface is connected to a drain of the semiconductor device, and the C0 interface, the S0 interface, and the remaining terminals of the semiconductor device are grounded.
8. A semiconductor device threshold voltage simulation apparatus comprising a memory and a processor, the memory having stored thereon computer instructions for execution on the processor, the processor executing the computer instructions to perform a semiconductor device threshold voltage simulation method steps of any of claims 1 to 5.
9. A computer readable storage medium having computer instructions stored thereon for performing the steps of a method for threshold voltage simulation of a semiconductor device according to any of claims 1 to 5 when the computer instructions are executed.
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| US20160171136A1 (en) * | 2012-06-22 | 2016-06-16 | Universite Pierre Et Marie Curie (Paris 6) | Method for automated assistance to design nonlinear analog circuit with transient solver |
| CN106934153A (en) * | 2017-03-13 | 2017-07-07 | 北京智芯微电子科技有限公司 | A kind of method and device of extraction device model parameter |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102663166A (en) * | 2011-12-08 | 2012-09-12 | 清华大学 | Method and system for simulating on-chip power supply network |
| US20160171136A1 (en) * | 2012-06-22 | 2016-06-16 | Universite Pierre Et Marie Curie (Paris 6) | Method for automated assistance to design nonlinear analog circuit with transient solver |
| CN102841960A (en) * | 2012-07-13 | 2012-12-26 | 北京华大九天软件有限公司 | Method for eliminating internal node of diode to rapidly simulate circuit |
| CN104899350A (en) * | 2015-04-27 | 2015-09-09 | 北京交通大学 | Method for modeling SiC MOSFET simulation model |
| CN106934153A (en) * | 2017-03-13 | 2017-07-07 | 北京智芯微电子科技有限公司 | A kind of method and device of extraction device model parameter |
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