CN110942997A - 一种指纹识别芯片封装体及其制备方法 - Google Patents
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- 238000002360 preparation method Methods 0.000 title claims abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 239000004033 plastic Substances 0.000 claims abstract description 36
- 229920003023 plastic Polymers 0.000 claims abstract description 36
- 238000004806 packaging method and process Methods 0.000 claims abstract description 18
- 239000005022 packaging material Substances 0.000 claims abstract description 16
- 229910000679 solder Inorganic materials 0.000 claims abstract description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 12
- 238000007731 hot pressing Methods 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 85
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 239000012790 adhesive layer Substances 0.000 claims description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 7
- 239000007769 metal material Substances 0.000 claims description 7
- 238000002207 thermal evaporation Methods 0.000 claims description 7
- 239000003822 epoxy resin Substances 0.000 claims description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 229920000647 polyepoxide Polymers 0.000 claims description 6
- -1 polyethylene Polymers 0.000 claims description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 238000005566 electron beam evaporation Methods 0.000 claims description 5
- 238000009713 electroplating Methods 0.000 claims description 5
- 229910052709 silver Inorganic materials 0.000 claims description 5
- 239000004332 silver Substances 0.000 claims description 5
- 238000005476 soldering Methods 0.000 claims description 5
- 238000004544 sputter deposition Methods 0.000 claims description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 4
- 238000003466 welding Methods 0.000 claims description 4
- 239000004698 Polyethylene Substances 0.000 claims description 3
- 239000004743 Polypropylene Substances 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 238000001816 cooling Methods 0.000 claims description 3
- 239000005038 ethylene vinyl acetate Substances 0.000 claims description 3
- 238000010329 laser etching Methods 0.000 claims description 3
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 3
- 238000001020 plasma etching Methods 0.000 claims description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 3
- 229920001200 poly(ethylene-vinyl acetate) Polymers 0.000 claims description 3
- 229920000573 polyethylene Polymers 0.000 claims description 3
- 229920001155 polypropylene Polymers 0.000 claims description 3
- 229920000915 polyvinyl chloride Polymers 0.000 claims description 3
- 239000004800 polyvinyl chloride Substances 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 2
- 238000007906 compression Methods 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 238000001259 photo etching Methods 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 239000010936 titanium Substances 0.000 claims description 2
- 230000001133 acceleration Effects 0.000 claims 1
- 238000002844 melting Methods 0.000 abstract 2
- 230000008018 melting Effects 0.000 abstract 2
- 230000035945 sensitivity Effects 0.000 description 3
- 230000032683 aging Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
本发明涉及一种指纹识别芯片封装体及其制备方法,包括以下步骤:提供一承载基底,在所述承载基底上设置可脱离粘结层以及指纹识别芯片,提供一基底,在所述基底的上表面形成凹腔,并形成导电线路层;在所述导电线路层上分别形成第一、第二导电柱,在加热状态下在所述凹腔的底面设置一塑胶层,在所述指纹识别芯片的焊垫上设置焊球,将所述指纹识别芯片嵌入到所述基底的所述凹腔中,接着在所述凹腔与所述指纹识别芯片之间的间隙中注入封装材料,接着在所述基底的上表面形成一层致密的无机介电层以及半固化片,接着通过热压合工艺使得封装材料与塑胶层熔融在一起,并使得所述半固化片熔融而充分粘结所述无机介电层。
Description
技术领域
本发明涉及半导体封装结构及其制备方法,特别是涉及一种指纹识别芯片封装体及其制备方法。
背景技术
现有的指纹识别芯片封装结构的制备过程中,通常是在电路板上设置一指纹识别芯片,然后利用塑封材料塑封该指纹识别芯片,接着在塑封层上设置一盖板。现有的指纹识别封装结构在使用过程中,由于塑封材料容易老化老化,进而导致该指纹识别封装结构翘曲变形。
发明内容
本发明的目的是克服上述现有技术的不足,提供一种指纹识别芯片封装体及其制备方法。
为实现上述目的,本发明采用的技术方案是:
一种指纹识别芯片封装体的制备方法,包括以下步骤:
1)提供一承载基底,在所述承载基底上设置一可脱离粘结层,在所述可脱离粘结层上设置一指纹识别芯片,所述指纹识别芯片的正面设置有指纹识别功能区以及多个焊垫;
2)提供一基底,在所述基底的上表面形成一容纳所述指纹识别芯片的凹腔,在所述凹腔的底面、所述凹腔的侧表面以及所述基底的上表面形成导电线路层;
3)接着在所述基底上以及所述凹腔中形成光刻胶层以覆盖所述导电线路层,通过光刻工艺以形成暴露所述凹腔的底面的所述导电线路层的第一开口,并形成暴露所述基底的上表面的所述导电线路层的第二开口;
4)在所述第一、第二开口中填充金属材料以分别形成第一、第二导电柱,并在所述第一、第二导电柱的顶端形成凹坑;
5)去除所述光刻胶层,并在加热状态下在所述凹腔的底面设置一塑胶层,所述塑胶层暴露所述第一导电柱,且所述塑胶层稍高于所述第一导电柱;
6)在所述指纹识别芯片的焊垫上设置焊球,所述焊球与所述第一导电柱一一对应;
7)将所述指纹识别芯片嵌入到所述基底的所述凹腔中,在加热状态下,使得塑胶层具有粘性,进而将所述指纹识别芯片粘结到所述凹腔的底面,接着通过回流焊工艺使得焊球融化进而嵌入到相应的所述第一导电柱的所述凹坑中;
8)将所述可脱离粘结层连同所述承载基底一起与所述指纹识别芯片分离,接着在所述凹腔与所述指纹识别芯片之间的间隙中注入封装材料,接着在所述基底的上表面形成一层致密的无机介电层,接着在所述无机介电层上铺设一半固化片,所述无机介电层和所述半固化片均暴露所述第二导电柱;
9)接着通过热压合工艺使得封装材料与塑胶层熔融在一起,并使得所述半固化片熔融而充分粘结所述无机介电层。
作为优选,在所述步骤1)中,所述可脱离粘结层为临时键合胶层。
作为优选,在所述步骤2)中,所述导电线路层的材质为铜、铝、银中的一种或多种,形成所述导电线路层的方法为热蒸镀、电镀、溅射、电子束蒸法中的一种。
作为优选,在所述步骤4)中,填充金属材料的方法为热蒸镀、电镀、溅射、电子束蒸法中的一种,金属材料为金、银、铜、铝、镍、钛、钯中的一种或多种,形成凹坑的方法为激光刻蚀或反应离子刻蚀。
作为优选,在所述步骤5)中,所述塑胶层为聚乙烯、聚氯乙烯、聚丙烯、EVA、环氧树脂中的一种。
作为优选,在所述步骤5)和7)中,加热的温度为100-150℃使得使得塑胶层具有粘性
作为优选,在所述步骤8)中,封装材料为环氧树脂,无机介电层的材质为氮化硅、碳化硅、氧化锆、氧化硅中的一种,所述无机介电层的形成方法为PECVD或ALD。
作为优选,在所述步骤9)中,所述热压合工艺具体为:以压力增加速率为每分钟增加5-10Kg/cm2的条件将压力增至30-60Kg/cm2同时以10-20℃/min升温至105-120℃,保持5-15分钟,接着以10-20℃/min升温至150-180℃,同时以压力降低速率为每分钟降低5-10Kg/cm2的条件将压力降至10-20Kg/cm2,保持20-30分钟,接着以10-20℃/min降温至室温,保持压力不变的条件下再压合5-10分钟。
本发明还提出一种指纹识别芯片封装体,其采用上述方法制备形成的。
本发明与现有技术相比具有下列优点:
在本发明的指纹识别芯片封装体的制备过程中,首先在所述凹腔的底面设置一塑胶层,然后在加热状态下,使得塑胶层具有粘性,进而将所述指纹识别芯片粘结到所述凹腔的底面,实现了指纹识别芯片与基底初步固定,进而可以在后续的回流焊工艺过程中避免芯片歪斜。而通过在导电柱的顶端形成凹坑进而可以增强导电柱与焊球的焊接强度。而在后续的热压合工艺中,通过优化热压合工艺的具体工艺参数,使得封装材料与塑胶层熔融在一起,并使得所述半固化片熔融而充分粘结所述无机介电层,使得该指纹识别芯片封装结构间接为一个整体,提高了其稳定性。且在本发明的指纹识别芯片封装结构中,由于在基底中设置凹腔,一方面有效减少了封装材料的用量,另一方面直接将指纹识别芯片安装在基底中,通过优化凹腔的深度,有效防止封装材料老化对封装结构的影响,同时提高了指纹识别芯片封装结构的灵敏度。
附图说明
图1-图7为本发明的指纹识别芯片封装体的制备方法各步骤的结构示意图。
具体实施方式
如图1-图7所示,本实施例提供一种指纹识别芯片封装体的制备方法,包括以下步骤:
如图1所示,首先进行步骤1),提供一承载基底101,在所述承载基底上设置一可脱离粘结层102,在所述可脱离粘结层102上设置一指纹识别芯片103,所述指纹识别芯片103的正面设置有指纹识别功能区1031以及多个焊垫1032。
其中,所述可脱离粘结层102为临时键合胶层,所述可脱离粘结层102与所述指纹识别芯片103可脱离的粘结,以便于后续指纹识别芯片103的分离。
如图2所示,在步骤2)中,提供一基底201,在所述基底201的上表面形成一容纳所述指纹识别芯片103的凹腔202,在所述凹腔202的底面、所述凹腔202的侧表面以及所述基底201的上表面形成导电线路层203
其中,所述基底201的材质可以为玻璃、塑料、硅、陶瓷、蓝宝石中的一种,通过切割、湿法刻蚀或干法刻蚀形成所述凹腔202,所述导电线路层203的材质为铜、铝、银中的一种或多种,在本实施例中导电线路层203的材料优选为铜,形成所述导电线路层203的方法为热蒸镀、电镀、溅射、电子束蒸法中的一种,在本实施例中形成导电线路层203的方法优选为热蒸镀。
如图3所示,在步骤3)中,在所述基底201上以及所述凹腔202中形成光刻胶层301以覆盖所述导电线路层,通过光刻工艺以形成暴露所述凹腔202的底面的所述导电线路层203的第一开口302,并形成暴露所述基底201的上表面的所述导电线路层203的第二开口303。
如图4所示,在步骤4)在所述第一开口302和第二开口303中填充金属材料以分别形成第一导电柱401和第二导电柱402,并在所述第一、第二导电柱401、402的顶端形成凹坑403。
其中,填充金属材料的方法为热蒸镀、电镀、溅射、电子束蒸法中的一种,金属材料为金、银、铜、铝、镍、钛、钯中的一种或多种,在本实施例中所述第一、第二导电柱401、402的材料优选为铜,且通过热蒸镀的方式形成所述第一、第二导电柱401、402,形成凹坑403的方法为激光刻蚀或反应离子刻蚀。
如图5所示,在步骤5),去除所述光刻胶层301,并在加热状态下在所述凹腔202的底面设置一塑胶层501,所述塑胶层501暴露所述第一导电柱401,且所述塑胶层501稍高于所述第一导电柱401,其中,所述塑胶层501为聚乙烯、聚氯乙烯、聚丙烯、EVA、环氧树脂中的一种。所述塑胶层501对应于所述指纹识别功能区1031。加热的温度为50-150℃使得使得塑胶层501具有粘性,而粘结于所述凹腔202的底面。更为优选的,所述塑胶层501比所述导电柱401高300-2000微米,以便于容纳焊球。
如图6所示,在步骤6)中,在所述指纹识别芯片103的焊垫1032上设置焊球601,所述焊球601与所述第一导电柱401一一对应;在步骤7)中,将所述指纹识别芯片嵌入到所述基底的所述凹腔中,在加热状态下,使得塑胶层具有粘性,进而将所述指纹识别芯片粘结到所述凹腔的底面,接着通过回流焊工艺使得焊球融化进而嵌入到相应的所述第一导电柱的所述凹坑中。其中,加热的温度为50-150℃使得使得塑胶层具有粘性。
如图7所示,在步骤8)中,将所述可脱离粘结层102连同所述承载基底101一起与所述指纹识别芯片103分离,接着在所述凹腔202与所述指纹识别芯片103之间的间隙中注入封装材料701,接着在所述基底201的上表面形成一层致密的无机介电层801,接着在所述无机介电层801上铺设一半固化片901,所述无机介电层801和所述半固化片901均暴露所述第二导电柱402;在步骤9)中,接着通过热压合工艺使得封装材料701与塑胶层501熔融在一起,并使得所述半固化片901熔融而充分粘结所述无机介电层801。
其中,封装材料701为环氧树脂,无机介电层801的材质为氮化硅、碳化硅、氧化锆、氧化硅中的一种,所述无机介电层801的形成方法为PECVD或ALD。所述热压合工艺具体为:以压力增加速率为每分钟增加5-10Kg/cm2的条件将压力增至30-60Kg/cm2同时以10-20℃/min升温至105-120℃,保持5-15分钟,接着以10-20℃/min升温至150-180℃,同时以压力降低速率为每分钟降低5-10Kg/cm2的条件将压力降至10-20Kg/cm2,保持20-30分钟,接着以10-20℃/min降温至室温,保持压力不变的条件下再压合5-10分钟,其中,可以减薄所述指纹识别芯片103,以使得所述指纹识别芯片103完全嵌入所述凹腔202中。
在本实施例中,可以进一步包括减薄所述基底201的工序,以使得在所述凹腔202区域,减薄后的所述基底201的厚度为80-150微米,有效提高了该指纹识别芯片封装体的灵敏度。
本发明还公开一种利用上述方法制备的指纹识别芯片封装体。
如上所述,本发明的指纹识别芯片封装体及其制备方法与现有技术相比具有下列优点:
在本发明的指纹识别芯片封装体的制备过程中,首先在所述凹腔的底面设置一塑胶层,然后在加热状态下,使得塑胶层具有粘性,进而将所述指纹识别芯片粘结到所述凹腔的底面,实现了指纹识别芯片与基底初步固定,进而可以在后续的回流焊工艺过程中避免芯片歪斜。而通过在导电柱的顶端形成凹坑进而可以增强导电柱与焊球的焊接强度。而在后续的热压合工艺中,通过优化热压合工艺的具体工艺参数,使得封装材料与塑胶层熔融在一起,并使得所述半固化片熔融而充分粘结所述无机介电层,使得该指纹识别芯片封装结构间接为一个整体,提高了其稳定性。且在本发明的指纹识别芯片封装结构中,由于在基底中设置凹腔,一方面有效减少了封装材料的用量,另一方面直接将指纹识别芯片安装在基底中,通过优化凹腔的深度,有效防止封装材料老化对封装结构的影响,同时提高了指纹识别芯片封装结构的灵敏度。
以上所述是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也视为本发明的保护范围。
Claims (9)
1.一种指纹识别芯片封装体的制备方法,其特征在于:包括以下步骤:
1)提供一承载基底,在所述承载基底上设置一可脱离粘结层,在所述可脱离粘结层上设置一指纹识别芯片,所述指纹识别芯片的正面设置有指纹识别功能区以及多个焊垫;
2)提供一基底,在所述基底的上表面形成一容纳所述指纹识别芯片的凹腔,在所述凹腔的底面、所述凹腔的侧表面以及所述基底的上表面形成导电线路层;
3)接着在所述基底上以及所述凹腔中形成光刻胶层以覆盖所述导电线路层,通过光刻工艺以形成暴露所述凹腔的底面的所述导电线路层的第一开口,并形成暴露所述基底的上表面的所述导电线路层的第二开口;
4)在所述第一、第二开口中填充金属材料以分别形成第一、第二导电柱,并在所述第一、第二导电柱的顶端形成凹坑;
5)去除所述光刻胶层,并在加热状态下在所述凹腔的底面设置一塑胶层,所述塑胶层暴露所述第一导电柱,且所述塑胶层稍高于所述第一导电柱;
6)在所述指纹识别芯片的焊垫上设置焊球,所述焊球与所述第一导电柱一一对应;
7)将所述指纹识别芯片嵌入到所述基底的所述凹腔中,在加热状态下,使得塑胶层具有粘性,进而将所述指纹识别芯片粘结到所述凹腔的底面,接着通过回流焊工艺使得焊球融化进而嵌入到相应的所述第一导电柱的所述凹坑中;
8)将所述可脱离粘结层连同所述承载基底一起与所述指纹识别芯片分离,接着在所述凹腔与所述指纹识别芯片之间的间隙中注入封装材料,接着在所述基底的上表面形成一层致密的无机介电层,接着在所述无机介电层上铺设一半固化片,所述无机介电层和所述半固化片均暴露所述第二导电柱;
9)接着通过热压合工艺使得封装材料与塑胶层熔融在一起,并使得所述半固化片熔融而充分粘结所述无机介电层。
2.根据权利要求1所述的指纹识别芯片封装体的制备方法,其特征在于:在所述步骤1)中,所述可脱离粘结层为临时键合胶层。
3.根据权利要求1所述的指纹识别芯片封装体的制备方法,其特征在于:在所述步骤2)中,所述导电线路层的材质为铜、铝、银中的一种或多种,形成所述导电线路层的方法为热蒸镀、电镀、溅射、电子束蒸法中的一种。
4.根据权利要求1所述的指纹识别芯片封装体的制备方法,其特征在于:在所述步骤4)中,填充金属材料的方法为热蒸镀、电镀、溅射、电子束蒸法中的一种,金属材料为金、银、铜、铝、镍、钛、钯中的一种或多种,形成凹坑的方法为激光刻蚀或反应离子刻蚀。
5.根据权利要求1所述的指纹识别芯片封装体的制备方法,其特征在于:在所述步骤5)中,所述塑胶层为聚乙烯、聚氯乙烯、聚丙烯、EVA、环氧树脂中的一种。
6.根据权利要求1所述的指纹识别芯片封装体的制备方法,其特征在于:在所述步骤5)和7)中,加热的温度为50-150℃使得使得塑胶层具有粘性。
7.根据权利要求1所述的指纹识别芯片封装结构的制备方法,其特征在于:在所述步骤8)中,封装材料为环氧树脂,无机介电层的材质为氮化硅、碳化硅、氧化锆、氧化硅中的一种,所述无机介电层的形成方法为PECVD或ALD。
8.根据权利要求1所述的指纹识别芯片封装结构的制备方法,其特征在于:在所述步骤9)中,所述热压合工艺具体为:以压力增加速率为每分钟增加5-10Kg/cm2的条件将压力增至30-60Kg/cm2同时以10-20℃/min升温至105-120℃,保持5-15分钟,接着以10-20℃/min升温至150-180℃,同时以压力降低速率为每分钟降低5-10Kg/cm2的条件将压力降至10-20Kg/cm2,保持20-30分钟,接着以10-20℃/min降温至室温,保持压力不变的条件下再压合5-10分钟。
9.一种指纹识别芯片封装体,其特征在于,采用权利要求1-8任一项所述的方法制备形成的。
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