CN110931572B - Crystalline silicon solar cell and preparation method thereof - Google Patents

Crystalline silicon solar cell and preparation method thereof Download PDF

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CN110931572B
CN110931572B CN201810998350.XA CN201810998350A CN110931572B CN 110931572 B CN110931572 B CN 110931572B CN 201810998350 A CN201810998350 A CN 201810998350A CN 110931572 B CN110931572 B CN 110931572B
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passivation layer
lead sulfide
layer
annealing
aluminum oxide
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CN110931572A (en
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谭伟华
孙翔
赵志强
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BYD Co Ltd
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BYD Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868—Passivation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention relates to the field of solar cells, and discloses a crystalline silicon solar cell and a preparation method thereof. The crystalline silicon solar cell provided by the invention has the advantages of high photoelectric conversion efficiency, good passivation effect and relatively simple process.

Description

Crystalline silicon solar cell and preparation method thereof
Technical Field
The invention relates to the field of solar cells, in particular to a crystalline silicon solar cell with passivated back surface and a preparation method thereof.
Background
With the development and competition of the solar energy industry, more technologies need to be explored to improve the conversion efficiency of the solar cell. The passivated emitter region and the passivated back surface cell (PERC) formed by the back surface passivation technique of depositing an aluminum oxide passivation layer on the back surface of a polished silicon wafer have become hot spots in the current solar cell research. The solar cell has good passivation and light reflection effects on the back surface of a P-type silicon wafer mainly based on aluminum oxide, so that the photoelectric conversion efficiency of the cell is greatly improved.
The conventional back surface passivation cell generally comprises the following process flows, the process is basically the same as that of a common crystalline silicon cell before phosphorus doping diffusion and diffusion, after diffusion, phosphorosilicate glass on the back surface is removed and the back surface of a silicon wafer is polished, an aluminum oxide film passivation layer is deposited on the polished surface by adopting the Atomic Layer Deposition (ALD) or Plasma Enhanced Chemical Vapor Deposition (PECVD) technology, the passivation film layer is thin and generally ranges from 5nm to 20nm, then the passivation layer is annealed, a silicon nitride layer with a certain thickness is deposited on the front surface and the back surface by adopting the PECVD method, the silicon nitride layer on the front surface is used as an antireflection film, the thickness of the silicon nitride layer is similar to that of the common crystalline silicon cell, the silicon nitride layer on the back surface is used as a protection layer of the aluminum oxide film passivation layer, and the thickness of the silicon nitride layer on the front surface is between 120 nm and 150 nm. And then, ablating the silicon nitride and aluminum oxide passivation layer on the back of the silicon by laser, forming grooves with certain width and certain spacing distance on the surface of the silicon nitride and aluminum oxide passivation layer, printing back silver paste, aluminum paste and front silver paste according to a common crystalline silicon cell process after grooving, and sintering to obtain the crystalline silicon solar cell with passivated back surface.
The back passivation crystalline silicon solar cell prepared by the process of depositing the aluminum oxide passivation layer by the ALD method or the PECVD method has the advantages that two layers of films, namely the aluminum oxide passivation layer and the silicon nitride protection layer, need to be deposited on the back surface of the back passivation crystalline silicon solar cell, the aluminum oxide passivation layer and the silicon nitride protection layer are deposited by the ALD method or the PECVD method, the equipment price of the two process methods is high, and the process is complex. The deposition of the back silicon nitride protective layer also requires PECVD equipment, which is also relatively expensive. In addition, the aluminum oxide passivation layer and the silicon nitride protection layer on the back surface are not conductive and thick, and the etching aluminum paste cannot be etched (especially for preparing a double-sided PERC cell), so that a laser device is needed for slotting, the laser device is also expensive, the laser process is complex to control, and the laser is easy to damage the silicon wafer, which causes the reduction of the cell efficiency.
Disclosure of Invention
The invention aims to improve a crystalline silicon solar cell, and provides a back surface passivated crystalline silicon solar cell which is high in photoelectric conversion efficiency, good in passivation effect and relatively simple in process and a preparation method thereof.
In order to achieve the above object, an aspect of the present invention provides a crystalline silicon solar cell, which includes a silicon substrate, a front electrode on a front surface of the silicon substrate, an aluminum oxide passivation layer on a back surface of the silicon substrate, a lead sulfide protection layer on the aluminum oxide passivation layer, and a back electrode on the lead sulfide protection layer, wherein the aluminum oxide passivation layer and the lead sulfide protection layer have a plurality of through trenches thereon.
According to the present invention, it is preferable that the aluminum oxide passivation layer and the lead sulfide protective layer have a plurality of grooves formed thereon, respectively, and the grooves formed in the aluminum oxide passivation layer and the grooves formed in the lead sulfide protective layer overlap to form the through grooves.
Preferably, the width of the through groove is 50-150 μm, and the center distance between adjacent grooves is 800-1000 μm.
Preferably, the thickness of the aluminum oxide passivation layer is 30-100 nm, and the thickness of the lead sulfide protection layer is 100-200 nm.
The invention also provides a preparation method of the crystalline silicon solar cell, wherein the method comprises the following steps,
1) making the silicon wafer sequentially subjected to texturing, diffusion junction making, etching and back polishing;
2) printing an alumina colloid on the polished surface of the silicon wafer obtained in the step 1) by using a first silk screen, sintering to form an alumina passivation layer with a plurality of grooves, and performing first annealing on the alumina passivation layer;
3) printing a lead sulfide colloid on the aluminum oxide passivation layer by using a second silk screen, and then drying and carrying out second annealing to form a lead sulfide protection layer with through grooves which are overlapped with the plurality of grooves on the aluminum oxide passivation layer;
4) and 3) depositing a silicon nitride film on the front surface of the silicon wafer obtained in the step 3), sequentially printing a back silver paste, a back aluminum paste and a front silver paste, and sintering.
Preferably, the line width of the first silk screen is 100-200 μm, and the center distance between adjacent lines is 800-1000 μm.
Preferably, the printing wet weight of the aluminum oxide colloid printed on the polished surface of the silicon wafer obtained in the step 1) is 0.18-0.25 g.
Preferably, the sintering is carried out in a sintering furnace, and during sintering, the temperature of the highest temperature zone of the sintering furnace is 750-800 ℃, and the actual temperature of the silicon wafer is 650-700 ℃;
preferably, the conditions of the first annealing include: the annealing temperature is 700-720 ℃, and the annealing time is 15-18 minutes.
Preferably, the thickness of the aluminum oxide passivation layer is 30-100 nm.
Preferably, the thickness of the lead sulfide protection layer is 100-200 nm.
Preferably, the line width of the second screen is 10 to 30 μm greater than the line width of the first screen.
Preferably, the printing wet weight of the lead sulfide colloid printed on the aluminum oxide passivation layer is 0.50-0.70 g.
Preferably, the drying conditions include: the drying temperature is 100-150 ℃, and the drying time is 1-3 min.
Preferably, the conditions of the second annealing include: the annealing temperature is 500-550 ℃, and the annealing time is 10-15 min.
Preferably, the width of the through groove is 50-150 μm, and the center distance between adjacent grooves is 800-1000 μm.
The inventor of the invention prints a lead sulfide protective layer on the annealed alumina passivation layer by adopting a silk screen which is the same as (or similar to) the screen printing of the alumina colloid screen, wherein the position, the width and the number of the grooves on the lead sulfide protective layer are the same as those of the previous alumina grooves, and then dries and anneals the lead sulfide protective layer to obtain the lead sulfide protective layer. The lead sulfide protective layer can be used as a protective layer of an aluminum oxide passivation layer. When the aluminum paste is printed subsequently, the aluminum paste is in contact with the silicon wafer through the through grooves in the aluminum oxide passivation layer and the lead sulfide protection layer, and the sintered aluminum paste and silicon form a local aluminum back surface field, so that the effect of the aluminum back surface field of the crystalline silicon battery is achieved.
By the technical scheme, the manufacturing process of the passivation layer and the protective layer on the back surface is greatly simplified, and ALD or PECVD equipment for depositing the passivation layer and PECVD equipment for depositing the protective layer are not needed. And, because the groove that is used for passing through the aluminium thick liquids when having reserved printing aluminium thick liquids during printing, consequently also need not laser grooving technology, also saved laser grooving equipment like this, whole process compares traditional back of the body passivation solar cell, has saved expensive equipment cost to the short-circuit current of battery promotes with open circuit voltage by a wide margin, and photoelectric conversion efficiency obtains obviously improving.
Detailed Description
The endpoints of the ranges and any values disclosed herein are not limited to the precise range or value, and such ranges or values should be understood to encompass values close to those ranges or values. For ranges of values, between the endpoints of each of the ranges and the individual points, and between the individual points may be combined with each other to give one or more new ranges of values, and these ranges of values should be considered as specifically disclosed herein.
In the present invention, the "through-groove" means a groove that penetrates the alumina passivation layer and the lead sulfide protective layer and has portions overlapping each other on the alumina passivation layer and the lead sulfide protective layer.
The crystalline silicon solar cell provided by the invention comprises a silicon substrate, a front electrode positioned on the front surface of the silicon substrate, an aluminum oxide passivation layer positioned on the back surface of the silicon substrate, a lead sulfide protection layer positioned on the aluminum oxide passivation layer, and a back electrode positioned on the lead sulfide protection layer, wherein a plurality of through grooves are formed in the aluminum oxide passivation layer and the lead sulfide protection layer.
Preferably, a plurality of grooves are formed on the aluminum oxide passivation layer and the lead sulfide protection layer respectively, and the grooves formed by the aluminum oxide passivation layer and the grooves formed by the lead sulfide protection layer are overlapped to form the through grooves.
Preferably, the width of the through groove is 50-150 μm, and more preferably 80-120 μm. In addition, the center distance between adjacent grooves is preferably 800 to 1000 μm, and more preferably 850 to 950 μm. Through making the width of the through groove and the center distance between the adjacent grooves be in the ranges, the aluminum paste passes through the through groove to be in contact with the silicon substrate, and after the aluminum paste and silicon form a local aluminum back field after sintering in the sintering furnace, the effect of the aluminum back field of the crystal silicon battery is achieved.
Preferably, the thickness of the aluminum oxide passivation layer is 30-100 nm, and more preferably 40-80 nm. Preferably, the thickness of the lead sulfide protective layer is 100-200 nm, and more preferably 130-180 nm. By making the thickness of the aluminum oxide passivation layer and the lead sulfide protection layer within the above range, on one hand, the aluminum oxide passivation layer can fully passivate the surface of the silicon substrate, and the lead sulfide protection layer can protect the aluminum oxide passivation layer from being damaged by the aluminum paste layer; on the other hand, the total thickness of the two layers can enable the back aluminum paste to be easily contacted with the silicon substrate through the through grooves under the pressure of a printing scraper, and a good local aluminum back field is formed after the back aluminum paste passes through the sintering furnace.
In a preferred embodiment of the present invention, the aluminum oxide passivation layer is formed by screen printing.
In another preferred embodiment of the present invention, the lead sulfide protective layer is formed by screen printing.
In a particularly preferred embodiment of the invention, the aluminium oxide passivation layer is formed by screen printing and the lead sulphide protective layer is formed by screen printing.
The aluminum oxide passivation layer and the lead sulfide protection layer are formed through screen printing, so that the manufacturing processes of the passivation layer and the protection layer on the back surface can be greatly simplified, and ALD or PECVD equipment for depositing the passivation layer and PECVD equipment for depositing the protection layer are not needed. And, through the groove that is used for passing through the aluminium thick liquids when reserving printing aluminium thick liquids during printing, consequently also need not laser grooving technology, also saved laser grooving equipment like this, whole process compares traditional back of the body passivation solar cell, has saved expensive equipment cost to the short-circuit current and the open-circuit voltage of battery promote by a wide margin, and photoelectric conversion efficiency obtains obviously improving.
According to the present invention, preferably, the crystalline silicon solar cell further comprises an antireflection layer between the front surface of the silicon substrate and the front electrode. The anti-reflection layer may be various anti-reflection layers that can be used for a crystalline silicon solar cell, and may be, for example, a silicon nitride layer. In addition, the thickness of the antireflection layer may be, for example, 70 to 85 nm.
In the present invention, the silicon substrate sheet, the front electrode, the back electrode, and the like are not limited at all, and they may be various silicon substrate sheets, front electrodes, and back electrodes that can be used in crystalline silicon solar cells, for example, the front electrode may be a silver front electrode, and the back electrode may be a silver back electrode, an aluminum back electrode, and the like, which are well known in the art and will not be described herein in detail.
The invention also provides a preparation method of the crystalline silicon solar cell, which comprises the following steps,
1) making the silicon wafer sequentially subjected to texturing, diffusion junction making, etching and back polishing;
2) printing an alumina colloid on the polished surface of the silicon wafer obtained in the step 1) by using a first silk screen, sintering to form an alumina passivation layer with a plurality of grooves, and performing first annealing on the alumina passivation layer;
3) printing a lead sulfide colloid on the aluminum oxide passivation layer by using a second silk screen, and then drying and carrying out second annealing to form a lead sulfide protection layer with through grooves which are overlapped with the plurality of grooves on the aluminum oxide passivation layer;
4) and 3) depositing a silicon nitride film on the front surface of the silicon wafer obtained in the step 3), sequentially printing a back silver paste, a back aluminum paste and a front silver paste, and sintering.
According to the invention, the overall preparation method comprises: sequentially texturing, diffusing to form junctions, etching and back polishing the silicon wafer, printing an alumina colloid layer on the back polished surface of the silicon wafer by adopting a screen printing method, reserving grooves with certain intervals and numbers on the alumina colloid layer, and then sintering and annealing to obtain an alumina layer passivation layer; and then printing a layer of lead sulfide colloid layer, wherein the lead sulfide colloid layer is also provided with grooves, and the positions, the widths and the number of the grooves are consistent with those of the grooves on the previous aluminum oxide passivation layer, and then drying and annealing the lead sulfide colloid layer to obtain a lead sulfide protective layer, wherein the lead sulfide protective layer is used as a protective layer of the aluminum oxide passivation layer, and the lead sulfide protective layer is compact in material, good in adhesiveness, waterproof, anti-pollution and moderate in thickness. And then depositing a front silicon nitride film, sequentially printing back silver paste, back aluminum paste and front silver paste, and drying and sintering to obtain the crystalline silicon solar cell with passivated back surface. And the screen printing method greatly reduces the process cost.
The invention mainly improves the following points: printing an alumina colloid layer on the polished back surface of the silicon wafer by adopting a screen printing method, reserving grooves with certain intervals and numbers on the alumina colloid layer, then sintering to obtain an alumina passivation layer, and annealing to obtain the alumina passivation layer; and then printing a lead sulfide colloid layer, wherein the lead sulfide colloid layer is provided with grooves, and the positions, the widths and the number of the grooves are consistent with those of the grooves on the previous aluminum oxide passivation layer, and then drying and annealing the lead sulfide colloid layer to obtain the lead sulfide protective layer. The texturing, diffusing PN junction, etching and back polishing steps in step 1) are not particularly limited, and may be performed by methods and conditions commonly used in the art for preparing conventional back-passivated crystalline silicon solar cells, for example, the texturing may be performed by a conventional mixed acid texturing method, the diffusing junction may be performed by a normal pressure or low pressure diffusing method, the etching may be performed by a secondary cleaning method, and the back polishing may be performed by a method of adding a polishing additive to a strong base, which are not described in detail herein since they are not related to the improvement point of the present invention.
In the invention, after the silicon wafer is subjected to texturing, diffusion knot making, etching and back polishing in sequence, a silk screen with a pre-designed pattern is adopted, a screen printing method is adopted on the polished surface of the silicon wafer, an alumina colloid layer is printed, grooves with certain intervals and number are reserved on the alumina colloid layer, then sintering is carried out to obtain an alumina passivation layer, and annealing is further carried out to ensure that the alumina passivation layer is more compact and uniform, so that the surface of the silicon wafer can achieve a better passivation effect.
According to the present invention, the polished surface of the silicon wafer obtained in step 1) is printed with alumina colloid by using the first screen (i.e., the screen with the previously designed pattern described above). Preferably, the line width of the first silk screen is 100-200 μm, and the center distance between adjacent lines is 800-1000 μm; more preferably, the line width of the first screen is 140 to 180 μm, and the center distance between adjacent lines is 850 to 950 μm. By using the screen within the above range, an alumina passivation layer having a certain pitch and number of grooves can be obtained.
In the present invention, the "center distance between adjacent lines" means a distance between the center lines of two adjacent parallel grooves.
Further, the first screen on which the alumina colloid is printed preferably uses a 420-mesh nylon screen. By using a 420 mesh nylon screen, trace metal impurities in the alumina gel printed on the silicon wafer can be prevented.
According to the invention, for the reason of obtaining an alumina passivation layer with a proper thickness, the printing wet weight of the alumina colloid printed on the polished surface of the silicon wafer obtained in the step 1) needs to be strictly controlled, and preferably, the printing wet weight of the alumina colloid printed on the polished surface of the silicon wafer obtained in the step 1) is 0.18-0.25 g; more preferably, the polished surface of the silicon wafer obtained in step 1) is printed with alumina colloid with a wet weight of 0.20-0.23 g.
When the wet weight of the printing is more than 0.25g, the aluminum oxide passivation layer obtained after sintering is too thick, the subsequent annealing is difficult, the density of the passivation layer is influenced, and the passivation effect is further influenced; when the wet weight of the printing is less than 0.18g, the passivation layer of alumina obtained after sintering is thin, which easily causes unevenness in thickness of the whole surface, and it is difficult to achieve the optimum passivation effect on the back surface of silicon.
According to the present invention, the alumina colloid may be various alumina colloids generally used in the art for screen printing, for example, alumina colloid having a model number of IP1257-L, which is commercially available from yingxing material of taiwan, china, may be used.
According to the invention, preferably, the sintering is carried out in a sintering furnace, the temperature of the highest temperature zone of the sintering furnace during sintering is 750-800 ℃, and the actual temperature of the silicon wafer is 650-700 ℃. By sintering under the above conditions, a dense alumina passivation layer can be obtained.
According to the invention, the thickness of the aluminum oxide passivation layer is preferably 30-100 nm, and more preferably 40-80 nm. By making the thickness of the aluminum oxide passivation layer within the above range, the passivation effect on the silicon surface can be further improved.
According to the present invention, the first annealing is performed after the aluminum oxide passivation layer is formed by the sintering. Preferably, the conditions of the first annealing include: the annealing temperature is 700-720 ℃, and the annealing time is 15-18 minutes. Further, the first annealing may be performed using a diffusion furnace in which the flow rate ratio of oxygen to nitrogen is preferably 1: 0.5 to 2.0, particularly preferably 1: 1. by carrying out the first annealing under the above conditions, the aluminum oxide passivation layer can be more compact and uniform, and the passivation effect on the silicon surface is better.
According to the invention, after the first annealing, a lead sulfide colloid layer is printed on the aluminum oxide passivation layer by the same screen printing method, and then drying and second annealing are carried out to obtain the lead sulfide protective layer. The silk screen pattern of the printed lead sulfide colloid is approximately the same as that of the printed alumina colloid, and a 420-mesh nylon silk screen can be selected, only the line width of the pattern is slightly different, and the line width of the general printed lead sulfide silk screen is 10-30 μm (preferably 15-25 μm) larger than that of the printed alumina, so that the aluminum oxide colloid and the lead sulfide colloid can be ensured to be approximately the same in the width of the groove of the obtained two layers of films under different printing thicknesses (the lead sulfide protective film is thicker, and therefore the screen line for printing the lead sulfide colloid is wider). Therefore, when the aluminum paste is printed subsequently, the aluminum paste can smoothly contact with the silicon wafer along the groove to form an aluminum back surface field.
According to the invention, for the reason of obtaining a lead sulfide protective layer with a proper thickness, the printing wet weight of the lead sulfide colloid printed on the alumina passivation layer of the silicon wafer obtained in the step 2) needs to be strictly controlled, and preferably, the printing wet weight of the lead sulfide colloid printed on the alumina passivation layer of the silicon wafer obtained in the step 2) is 0.50-0.70 g; more preferably, the printing wet weight of the lead sulfide colloid printed on the alumina passivation layer of the silicon wafer obtained in the step 2) is 0.55-0.65 g.
According to the present invention, the alumina colloid may be lead sulfide colloid commonly used in the art for screen printing. The lead sulfide colloid may be obtained commercially or may be obtained synthetically. For example, the lead sulfide colloid can be obtained by placing lead nitrate and thiourea in a mortar, grinding uniformly, transferring into organic molten salt (such as sodium acetate), heating to 50-60 ℃, keeping the temperature for 2-5h, taking out the product, washing with ethanol, drying to obtain lead sulfide nanopowder, and dispersing the lead sulfide nanopowder in terpineol to obtain a colloidal solution. Here, the molar amount of the lead nitrate and thiourea may be, for example, 1: 2-4, preferably 1: 3.
according to the present invention, drying is performed after printing a lead sulfide colloid to form a lead sulfide colloid layer, and the drying may be performed in a drying oven, for example. The drying conditions are not particularly limited as long as sufficient drying is possible, and preferably, the drying conditions include: the drying temperature is 100-150 ℃, and the drying time is 1-3 min.
According to the present invention, after the drying, the second annealing is performed. Preferably, the conditions of the second annealing include: the annealing temperature is 500-550 ℃, and the annealing time is 10-15 min. In addition, the second annealing can be carried out by using a diffusion furnace and adopting nitrogen protection. By carrying out the second annealing under the above conditions, the lead sulfide protective layer can be made more uniform and dense.
According to the invention, the thickness of the lead sulfide protective layer is preferably 100-200 nm, and more preferably 130-180 nm.
According to the invention, the aluminum oxide passivation layer and the lead sulfide protection layer formed after sintering are provided with superposed through grooves, preferably, the width of each through groove is 50-150 μm, and more preferably 80-120 μm; in addition, the center distance between adjacent grooves is preferably 800 to 1000 μm, and more preferably 850 to 950 μm. The width of the through grooves and the center distance between the adjacent grooves are within the range, so that the aluminum back surface field forming device has the advantage of good local aluminum back surface field forming effect.
According to the invention, after the back passivation layer is formed, the front surface (light facing surface) of the silicon wafer is plated with the antireflection film by adopting a PECVD method, the method and conditions for plating can adopt the method and conditions for preparing a conventional back passivation crystalline silicon solar cell or a common crystalline silicon cell in the field, the thickness of the general antireflection film is about 80-85 mu m, and the refractive index is 2.0-2.1.
And after the front side is plated with the antireflection film, printing back silver paste, back aluminum paste and front silver paste, wherein the method and conditions for printing the paste can adopt the method and conditions for preparing the conventional back passivated crystalline silicon solar cell in the field. And (3) after printing the slurry, sintering the slurry in a sintering furnace, wherein the preheating temperature is 200-400 ℃, the peak temperature of the highest temperature zone is 860-890 ℃, the time of the whole sintering furnace is about 2min, and the peak sintering time is about 1s, so that the back surface passivated crystalline silicon solar cell is obtained.
The invention simplifies the manufacturing process of the passivation layer and the protective layer on the back, and does not need ALD or PECVD equipment for depositing the passivation layer or PECVD equipment for depositing the silicon nitride protective layer on the back. The method also does not need a laser grooving process, saves expensive laser equipment, greatly saves equipment cost compared with the traditional back passivation solar cell in the whole process, greatly improves the short-circuit current and the open-circuit voltage of the cell, and obviously improves the photoelectric conversion efficiency.
Examples
The present invention will be described in detail below by way of examples.
In the test of the invention, the raw material substances, grades and concentrations are respectively as follows, unless otherwise specified: potassium hydroxide, electronic grade, mass concentration 45%; nitric acid: electronic grade, mass concentration of 65-68%, hydrofluoric acid: an electronic grade, wherein the mass concentration is 49-50%; hydrogen peroxide and an electronic grade, wherein the mass concentration is 30-32%; hydrochloric acid: and the mass concentration of the electronic grade is 35-38%.
Example 1
The resistivity value range of the 156 mm-156 mm polycrystalline silicon wafer cut by diamond wires is 1.20-2.50 omega-cm through testing, and the resistivity requirement of the polycrystalline silicon wafer is met. The minority carrier lifetime value range is 1.10-1.60 mu s, and the minority carrier lifetime requirement of the silicon wafer is met. The experiment was performed using 200 tablets each time, and the results were averaged. After the traditional texturing and diffusion junction manufacturing process is carried out on the polycrystalline silicon wafer, the sheet resistance after diffusion is about 85 omega/□, and the crystalline silicon solar cell with passivated back surface is manufactured according to the following steps.
S1 (dephosphorized silicon glass and back polishing)
1) Silicon glass for removing phosphorus on back and periphery of silicon wafer
The equipment adopts secondary cleaning equipment with a liquid roller, and is etched by adopting hydrofluoric acid solution, wherein the volume concentration of hydrofluoric acid is 10%, and the belt speed is 1.5-2.1 m/min. After etching, washing with deionized water and drying with hot air.
2) Cleaning silicon wafer by adopting mixed liquid of potassium hydroxide and hydrogen peroxide
In a cleaning tank having a volume of 80L, the silicon wafer was cleaned using the following cleaning reagents and conditions, and after cleaning, was cleaned with deionized water for 200 s.
Cleaning reagent: mixing 0.8L of potassium hydroxide, 75L of water and 3.5L of hydrogen peroxide to obtain a mixed solution;
cleaning conditions are as follows: the cleaning temperature was 60 ℃ and the cleaning time was 50 s.
3) Back polishing with potassium hydroxide solution
The silicon wafer was back-polished using the following polishing reagents and polishing conditions, and washed with deionized water for 200 seconds after polishing. After back polishing, the silicon wafer had a weight loss of 0.226g and a reflectance of 42.7% as measured with a reflectance meter.
Polishing reagent: a mixed solution obtained by mixing 4L of potassium hydroxide, 75L of water, and 1.8L of PS30 (a polishing additive produced in changzhou);
polishing conditions: the polishing temperature was 75 ℃ and the etching time was 190 s.
4) Cleaning of residual additive on silicon wafer surface
Cleaning for 100s by using the same cleaning agent as the step 2), and cleaning for 200s by using deionized water after cleaning.
5) Cleaning metal impurities on surface of silicon wafer
The following cleaning reagents and conditions were used to clean metal impurities on the silicon wafer surface, and after cleaning, the silicon wafer was cleaned with deionized water for 200 seconds.
Cleaning reagent: a mixed solution obtained by mixing 15L of hydrochloric acid and 2L of hydrogen peroxide with 48L of water;
cleaning conditions are as follows: the cleaning temperature was 25 ℃ and the cleaning time was 200 s.
(6) Method for cleaning phosphorosilicate glass on front surface of silicon wafer by adopting hydrofluoric acid
The silicon wafer was cleaned using the following cleaning reagents and conditions, and was then rinsed with deionized water for 200 seconds.
Cleaning reagent: a mixed solution obtained by mixing 10L of hydrofluoric acid and 60L of water;
cleaning conditions are as follows: the washing temperature was 25 ℃ and the washing time was 90 s.
(7) Drying was carried out at a temperature of 85 ℃ for 300s using a drying tank.
S2 (printing alumina colloid and sintering)
The alumina colloid (produced by Taiwan Happy material industry of China, model number is IP1257-L) is screen-printed by 420-mesh nylon, the line width of the screen is 150 μm, and the spacing k between adjacent lines is 900 μm. The wet weight of the print on the polished silicon wafer was 0.21 g. The peak temperature of sintering is 780 ℃, and the actual temperature sensed by the silicon wafer is about 680 ℃. And sintering to obtain the silicon wafer with the back surface covered with the aluminum oxide passivation layer. The width of the groove on the aluminum oxide passivation layer is 90-100 mu m, the center distance between two adjacent grooves is about 900 mu m, and the thickness of the sintered aluminum oxide passivation layer is 65 nm.
S3 (aluminium oxide passivation layer annealing)
And (4) putting the silicon wafer obtained in the step S2 into a diffusion furnace for annealing, wherein the annealing temperature is 700 ℃, the annealing time is 15 minutes, and the flow ratio of oxygen to nitrogen is 1: 1.
s4 (preparation of lead sulfide colloid)
Weighing 0.1mol of lead nitrate and 0.3mol of thiourea, putting the lead nitrate and the thiourea in a mortar, grinding uniformly, transferring the ground lead nitrate and the thiourea into organic molten salt (sodium acetate), heating to 50 ℃, keeping the temperature for 3 hours, taking out a product, cleaning the product with ethanol for 5-6 times, and naturally drying to obtain the lead sulfide nano powder. And then dispersing lead sulfide powder into terpineol at 25 ℃ to prepare a colloidal solution, and adjusting the viscosity to 40 Pa.s to obtain the lead sulfide colloid.
S5 (printing lead sulfide colloid and drying)
The lead sulfide colloid was screen printed using 420 mesh nylon with a screen width of 180 μm and a spacing k between adjacent lines of 900 μm. Adjusting the parameters of the printer, and setting the printing wet weight on the polished silicon wafer to be 0.60g to obtain a lead sulfide colloid layer, and drying in a drying furnace to obtain a lead sulfide protective layer, wherein the temperature of the drying furnace is set at 120 ℃, and the drying time is 2 min.
S6 (lead sulfide protective layer annealing)
And after drying to form a lead sulfide protective layer, annealing in a diffusion furnace. And (3) adopting nitrogen protection, wherein the annealing temperature is 520 ℃, the annealing time is 12min, and the thickness of the obtained lead sulfide protective layer is 152 nm. The width of the groove formed by the superposition of the aluminum oxide passivation layer and the lead sulfide protective layer is more than 90-100 mu m.
S7 (front silicon nitride film plating)
And adopting a conventional process for plating a silicon nitride antireflection film on the front surface of polycrystalline silicon, and plating a double-layer film by adopting PECVD equipment, wherein the total thickness of the film is 82nm, and the average refractive index is 2.06, so as to obtain the silicon wafer with the front surface plated with the silicon nitride film.
S8 (printing paste and metallization)
Similar to the printing and metallization of a conventional polycrystalline PERC battery, back silver paste (the model is RX6260604A6-1 produced by Ru xing company) and aluminum paste (the model is PA690 produced by Pan mining company) are printed on the back surface of the silicon wafer in sequence, the printing wet weight of the back silver is 35mg, and the printing wet weight of the back aluminum is 950 mg. And printing front silver paste (the model is CK711180706044 manufactured by the first gallop company), wherein the printing wet weight is 100mg, then putting the front silver paste into a sintering furnace to be dried and sintered, the preheating temperature is 200-400 ℃, the peak temperature is 885 ℃, the actual sensing temperature of a silicon wafer is about 760 ℃, the time of the whole sintering furnace is about 2min, and the peak sintering time is about 1s, so that the printing type back surface passivated crystalline silicon solar cell is obtained. The solar cell sheet obtained in this example was designated as KK 1.
Example 2
The same as example 1 was repeated except that the line width of the nylon screen on which the alumina colloid was printed in the step S2 in example 1 was changed to 200 μm, the line width of the nylon screen on which the lead sulfide colloid was printed in the step S5 was changed to 220 μm, and the center distance between adjacent lines was changed to 1000 μm. The width of the groove overlapped by the aluminum oxide passivation layer and the lead sulfide protective layer is tested to be 140-150 mu m. The thickness of the aluminum oxide passivation layer is 68nm, and the thickness of the lead sulfide protective layer is 158 nm. The solar cell sheet prepared in this example is denoted as KK 2.
Example 3
The same as example 1 was repeated except that the line width of the nylon screen on which the alumina colloid was printed in the step S2 in example 1 was changed to 100 μm, the line width of the nylon screen on which the lead sulfide colloid was printed in the step S5 was changed to 110 μm, and the center distance between adjacent lines was changed to 800 μm. And testing that the width of the superposed groove of the aluminum oxide passivation layer and the lead sulfide protective layer is 50-60 mu m. The thickness of the aluminum oxide passivation layer is 60nm, and the thickness of the lead sulfide protective layer is 147 nm. The solar cell sheet prepared in this example is denoted as KK 3.
Example 4
The procedure of example 1 was repeated, except that the wet weight of the printed lead sulfide in the step of S5 in example 1 was changed to 0.70 g. And testing that the width of the superposed groove of the aluminum oxide passivation layer and the lead sulfide protective layer is more than 90-100 mu m. The thickness of the aluminum oxide passivation layer is 65nm, and the thickness of the lead sulfide protective layer is 195 nm. The solar cell sheet prepared in this example is denoted as KK 4.
Example 5
The procedure of example 1 was repeated, except that the wet weight of the printed lead sulfide in the step of S5 in example 1 was changed to 0.50 g. And testing that the width of the superposed groove of the aluminum oxide passivation layer and the lead sulfide protective layer is more than 90-100 mu m. The thickness of the aluminum oxide passivation layer is 60nm, and the thickness of the lead sulfide protective layer is 103 nm. The solar cell sheet prepared in this example is denoted as KK 5.
Example 6
The procedure of example 1 was repeated, except that the wet weight of the printed alumina in the step of S2 in example 1 was changed to 0.18 g. And testing that the width of the superposed groove of the aluminum oxide passivation layer and the lead sulfide protective layer is more than 90-100 mu m. The thickness of the aluminum oxide passivation layer is 31nm, and the thickness of the lead sulfide protective layer is 152 nm. The solar cell sheet prepared in this example is denoted as KK 6.
Example 7
The procedure of example 1 was repeated, except that the wet weight of the printed alumina in the step of S2 in example 1 was changed to 0.25 g. And testing that the width of the superposed groove of the aluminum oxide passivation layer and the lead sulfide protective layer is more than 90-100 mu m. The thickness of the aluminum oxide passivation layer is 97nm, and the thickness of the lead sulfide protective layer is 152 nm. The solar cell sheet prepared in this example is denoted as KK 7.
Comparative example 1
Removing the steps S2-S6, replacing the step S2 with a conventional atomic vapor deposition (ALD) method for depositing an aluminum oxide passivation layer, wherein the thickness of the aluminum oxide passivation layer is 7-8 nm, and depositing a silicon nitride film protection layer by adopting a PECVD method in the step S5, wherein the thickness of the silicon nitride film protection layer is 130nm, and the rest is the same as that of the embodiment 1. The solar cell sheet prepared in this comparative example was designated as DKK 1.
Comparative example 2
The steps S2 to S6 are removed, the step S1 is changed into the conventional polycrystalline battery secondary cleaning process, the step S7 is changed into the printing and sintering process of the conventional polycrystalline battery, the type, the wet weight, the sintering temperature and the like of printing slurry are the same as those of the conventional polycrystalline battery process, and the rest processes are the same as those of the example 1. The solar cell sheet prepared in this comparative example was designated as DKK 2.
Performance testing
The solar cell sheets obtained in the above examples 1 to 7 and comparative examples 1 to 2 were tested for electrical performance parameters according to the following test methods.
And testing by using a special testing instrument for the solar cell, such as a single flash simulator. Test conditions were Standard Test Conditions (STC): light intensity: 1000W/m2(ii) a Spectrum: 1.5 of AM; temperature: 25. the test method was carried out according to IEC 904-1.
The main electrical performance parameters of the cell (photoelectric conversion efficiency (Eta, unit:%), short circuit current (Isc, unit: a), open circuit voltage (Voc, unit: V), (fill factor (FF, unit:%), leakage current (IRev)2The unit: A) series resistance (Rs, unit: m Ω), parallel resistance (Rsh, unit: Ω) are shown in table 1.
TABLE 1
Sample (I) Eta Isc Voc FF IRev2 Rs Rsh
KK1 19.68 9.429 0.656 79.24 0.145 2.51 210.78
KK2 19.52 9.326 0.649 78.10 0.322 2.91 257.49
KK3 19.55 9.392 0.652 79.05 0.785 2.21 132.62
KK4 19.57 9.402 0.650 78.80 0.536 2.31 57.49
KK5 19.64 9.360 0.657 79.22 0.257 2.78 146.32
KK6 19.56 9.334 0.645 79.20 0.427 2.61 286.32
KK7 19.65 9.412 0.653 79.10 0.236 2.51 177.49
DKK1 19.52 9.285 0.657 79.35 0.117 2.19 111.94
DKK2 18.74 9.068 0.638 80.24 0.597 1.36 168.37
As can be seen from the results in the table, compared with the polycrystalline cell DKK2 prepared by the conventional process, the open-circuit voltage Voc and the short-circuit current Isc of the cell KK 1-cell KK7 prepared in examples 1-7 are significantly increased, the open-circuit voltage is increased by more than 10mV, and the short-circuit current is increased by more than 200 mA. The photoelectric conversion efficiency (Eta) is greatly improved, and the absolute value of the Eta is improved to more than 0.76% from the data point of view.
Compared with a back passivation solar cell DKK1 of a passivation film prepared by a conventional ALD process, the printed back surface passivation crystalline silicon solar cell prepared by the method has the advantages that the open-circuit voltage and the short-circuit current of the crystalline silicon solar cell are basically equal, the photoelectric conversion efficiency is very close, and the efficiency tends to exceed under better process conditions, such as embodiments of a cell piece KK1, a cell piece KK5, a cell piece KK7 and the like.
The preferred embodiments of the present invention have been described above in detail, but the present invention is not limited thereto. Within the scope of the technical idea of the invention, many simple modifications can be made to the technical solution of the invention, including combinations of various technical features in any other suitable way, and these simple modifications and combinations should also be regarded as the disclosure of the invention, and all fall within the scope of the invention.

Claims (12)

1. A method for preparing a crystalline silicon solar cell is characterized by comprising the following steps,
1) making the silicon wafer sequentially subjected to texturing, diffusion junction making, etching and back polishing;
2) printing an alumina colloid on the polished surface of the silicon wafer obtained in the step 1) by using a first silk screen, sintering to form an alumina passivation layer with a plurality of grooves, and performing first annealing on the alumina passivation layer;
3) printing a lead sulfide colloid on the aluminum oxide passivation layer by using a second silk screen, and then drying and carrying out second annealing to form a lead sulfide protection layer with through grooves which are overlapped with the plurality of grooves on the aluminum oxide passivation layer;
4) and 3) depositing a silicon nitride film on the front surface of the silicon wafer obtained in the step 3), sequentially printing a back silver paste, a back aluminum paste and a front silver paste, and sintering.
2. The method of claim 1, wherein the first screen has a line width of 100 to 200 μm and a center distance between adjacent lines of 800 to 1000 μm.
3. The method according to claim 1, wherein the polished surface of the silicon wafer obtained in step 1) is printed with alumina colloid having a wet weight of 0.18 to 0.25 g.
4. The method according to claim 1, wherein the sintering is carried out in a sintering furnace, the temperature of the highest temperature zone of the sintering furnace is 750-800 ℃ during sintering, and the actual temperature of the silicon wafer is 650-700 ℃.
5. The method of claim 4, wherein the conditions of the first anneal comprise: the annealing temperature is 700-720 ℃, and the annealing time is 15-18 minutes.
6. The method of claim 1, wherein the aluminum oxide passivation layer has a thickness of 30 to 100 nm.
7. The method of claim 6, wherein the lead sulfide protective layer has a thickness of 100 to 200 nm.
8. The method of claim 1, wherein the line width of the second screen is 10-30 μm greater than the line width of the first screen.
9. The method of claim 1, wherein the lead sulfide colloid is printed on the alumina passivation layer at a print wet weight of 0.50-0.70 g.
10. The method of claim 1, wherein the drying conditions comprise: the drying temperature is 100-150 ℃, and the drying time is 1-3 min.
11. The method of claim 10, wherein the second annealing conditions comprise: the annealing temperature is 500-550 ℃, and the annealing time is 10-15 min.
12. The method according to claim 1, wherein the width of the through grooves is 50 to 150 μm, and the center distance between adjacent grooves is 800 to 1000 μm.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202736931U (en) * 2012-08-28 2013-02-13 横店集团东磁股份有限公司 Back side windowing structure of crystalline silicon solar cell
CN105489670A (en) * 2015-11-30 2016-04-13 何晨旭 Aluminium oxide slurry for surface passivation for crystalline silicon solar cell and preparation method for passivating film
CN106711239A (en) * 2017-02-24 2017-05-24 广东爱康太阳能科技有限公司 Preparation method of PERC solar battery and PERC solar battery

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202736931U (en) * 2012-08-28 2013-02-13 横店集团东磁股份有限公司 Back side windowing structure of crystalline silicon solar cell
CN105489670A (en) * 2015-11-30 2016-04-13 何晨旭 Aluminium oxide slurry for surface passivation for crystalline silicon solar cell and preparation method for passivating film
CN106711239A (en) * 2017-02-24 2017-05-24 广东爱康太阳能科技有限公司 Preparation method of PERC solar battery and PERC solar battery

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