CN110895922A - High-reliability buzzer driving circuit - Google Patents

Abstract

The circuit of the invention comprises a current limiting device, a diode D1, a resistor R1, a resistor R2, a resistor R3, an amplifier, a frequency generating circuit, a grid control circuit and a driving NMOS tube, wherein V1, V2 and Y, F, G are signal wires, one end of the current limiting device is connected with a power supply, the other end of the current limiting device is connected with the anode of a diode D1, the cathode of a diode D1 is grounded, one end of a resistor R2 is connected with the anode of a diode D1, the other end of the resistor R3 is connected with V2, the other end of the resistor is grounded, the negative input end of the amplifier is connected with V2, the positive input end is connected with V1, the output end is connected with Y, the output end of the frequency generating circuit is connected with F, one input end of the grid control circuit is connected with F, the other input end of the resistor R3 is connected with Y, the output of the NMOS tube is connected with G, the drain of the NMOS tube is connected with OUT, the, the circuit has the advantage of high reliability.

Description

High-reliability buzzer driving circuit

Technical Field

The invention relates to the field of buzzer circuits, in particular to a high-reliability buzzer driving circuit.

Background

As shown in fig. 5, the conventional buzzer circuit comprises a frequency generating circuit and a driving tube, and when the current flowing through the driving tube is too large or the temperature of the chip is too high, the circuit has the disadvantages that the power consumption is not reduced, the chip is damaged or the buzzer or even the whole system is damaged.

Disclosure of Invention

The invention provides a high-reliability buzzer driving circuit, which aims to overcome the defect that a chip is damaged or a buzzer or even the whole system is damaged when the current flowing through a driving tube of the traditional buzzer driving circuit is overlarge or the temperature of the chip is overlarge.

In order to solve the above technical problems, the present invention provides a high reliability buzzer driving circuit, which comprises a current limiting device, a diode D1, a resistor R1, a resistor R2, a resistor R3, an amplifier, a frequency generation circuit, a gate control circuit, and a driving NMOS transistor, wherein one end of the current limiting device is connected to a power supply, the other end of the current limiting device is connected to the anode of a diode D1, the cathode of a diode D1 is connected to a ground line, one end of a resistor R2 is connected to the anode of a diode D1, the other end of the resistor R2 is connected to a signal line V2, one end of a resistor R3 is connected to a signal line V2, the other end of the resistor R3 is connected to a ground line, the negative input end of the amplifier is connected to a positive input signal line V2, the amplifier output end is connected to a signal line V1, the amplifier output end is connected to a signal line Y, the output signal, the drain electrode of the driving NMOS tube is connected with the output OUT, the source electrode of the driving NMOS tube is connected with the signal line V1, the substrate of the driving NMOS tube is connected with the grounding wire, one end of the resistor R1 is connected with the signal line V1, and the other end of the resistor R1 is connected with the grounding wire.

With reference to fig. 1, if the current of the driving NMOS transistor is in the normal range, the voltage drop across the resistor R1 is smaller than the voltage drop across the resistor R3, i.e., the voltage across the signal line V1 is smaller than the voltage across the signal line V2, and the output Y of the amplifier is at a low level, indicating that the current of the driving NMOS transistor is normal, and if the current flowing through the driving NMOS transistor is too large, the voltage drop across the resistor R1 is larger than the voltage across the resistor R3, i.e., the voltage across the signal line V1 is greater than the voltage across the signal line V2, and the output Y of the amplifier is at a high level, indicating that the current; since the forward voltage drop of the diode is a negative temperature characteristic, when the temperature rises, the voltage drop across the resistor R3 becomes low, and when the voltage drop across the resistor R1 is not changed, when the temperature is too high, the voltage drop across the resistor R3 becomes lower than the voltage drop across the resistor R1, that is, the voltage of the signal line V1 is higher than the voltage of the signal line V2, and the output Y of the amplifier is at a high level, which indicates that the chip temperature is too high, as can be seen from the connection manner of the signal line V1 and the signal line V2 shown in fig. 1, and the output Y of the amplifier is at a high level, which indicates that the chip temperature is too high or the current flowing through the driving. If the signal line V1 and the signal line V2 are connected to the positive input end and the negative input end of the amplifier, namely the signal line V1 is connected with the negative input end of the amplifier, the signal line V2 is connected with the positive input end of the amplifier, and the connection relations between the signal line V1 and the signal line V2 and the resistor R1, the resistor R2 and the resistor R3 are not changed, the output Y of the amplifier is low level, which indicates that the temperature of the chip is too high or the current flowing through the driving NMOS transistor is too high. When the output of the amplifier indicates that the temperature of the chip and the current flowing through the drive NMOS tube are normal, the grid control circuit enables the output signal F of the frequency generation circuit to normally pass, namely the output signal F of the frequency generation circuit is the same as the frequency of the output signal line G of the grid control circuit, and the drive NMOS tube normally drives the buzzer; when the output of the amplifier indicates that the temperature of the chip is too high or the current flowing through the drive NMOS tube is too large, the grid control circuit outputs a signal line G to cut off the drive NMOS tube so as to reduce the power consumption of the circuit and prevent the chip and the system from being damaged. The circuit is simple to realize and has the advantages of high reliability and low cost.

Preferably, the substrate of the drive NMOS tube is connected with a ground wire or connected with the source electrode of the drive NMOS tube.

Preferably, the current limiting device may be a resistor, or may also be an active device such as a current source or a MOS transistor, or a combination thereof.

Preferably, the diode can be a series-parallel combination of more than one diode, or a diode-connected MOS transistor, or a series-parallel combination of more than one diode-connected MOS transistor, or a diode-connected triode, or a series-parallel combination of more than one diode-connected triode.

Preferably, the driving NMOS transistor may be replaced by an NPN transistor, that is, the NPN transistor is used as the driving transistor of the buzzer.

The invention has the following beneficial effects: according to the high-reliability buzzer driving circuit provided by the invention, when the current flowing through the driving tube is too large or the temperature of the chip is too high, the driving NMOS tube is turned off to reduce the power consumption of the chip, so that the chip is prevented from being damaged or the buzzer or even the whole system is prevented from being damaged.

Drawings

Fig. 1 is a schematic structural diagram of a highly reliable buzzer driving circuit of the present invention.

Fig. 2 is a highly reliable buzzer driving circuit according to a first embodiment of the present invention.

Fig. 3 is a highly reliable buzzer driving circuit according to a second embodiment of the present invention.

Fig. 4 is a highly reliable buzzer driving circuit according to a third embodiment of the present invention.

Fig. 5 is a schematic diagram of the background art.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.

Referring to fig. 1, the present invention provides a high reliability buzzer driving circuit, which includes a current limiting device, a diode D1, a resistor R1, a resistor R2, a resistor R3, an amplifier, a frequency generation circuit, a gate control circuit, and a driving NMOS transistor, wherein one end of the current limiting device is connected to a power supply, the other end of the current limiting device is connected to the anode of the diode D1, the cathode of the diode D1 is connected to the ground, one end of the resistor R2 is connected to the anode of the diode D1, the other end of the resistor R2 is connected to the signal line V2, one end of the resistor R3 is connected to the signal line V2, the other end of the resistor R3 is connected to the ground, the negative input end of the amplifier is connected to the signal line V2, the positive input end of the amplifier is connected to the signal line V1, the output end of the amplifier is connected to the signal line Y, the output signal, the drain electrode of the driving NMOS tube is connected with the output OUT, the source electrode of the driving NMOS tube is connected with the signal line V1, the substrate of the driving NMOS tube is connected with the grounding wire, one end of the resistor R1 is connected with the signal line V1, and the other end of the resistor R1 is connected with the grounding wire.

With reference to fig. 1, if the current flowing through the driving NMOS transistor is within the normal range, the voltage drop across the resistor R1 is smaller than the voltage drop across the resistor R3, i.e., the voltage across the signal line V1 is smaller than the voltage across the signal line V2, and the output Y of the amplifier is at a low level, indicating that the current flowing through the driving NMOS transistor is normal, and if the current flowing through the driving NMOS transistor is too large, the voltage drop across the resistor R1 is larger than the voltage across the resistor R3, i.e., the voltage across the signal line V1 is greater than the voltage across the signal line V2, and the output Y of the amplifier is at a high level, indicating that; due to the negative temperature characteristic of the forward voltage drop of the diode, when the temperature rises, the voltage drop across the resistor R3 becomes lower, and when the voltage drop across the resistor R1 is not changed, when the temperature is too high, the voltage drop across the resistor R3 becomes lower than the voltage drop across the resistor R1, that is, the voltage of the signal line V1 is higher than the voltage of the signal line V2, and the output Y of the amplifier is at a high level, which indicates that the chip temperature is too high, and it can be seen that the connection manner of the signal line V1 and the signal line V2 as shown in fig. 1 is adopted, and the output Y of the amplifier is at a high level, which indicates that the chip temperature is too high or the. If the signal line V1 and the signal line V2 are connected to the positive input end and the negative input end of the amplifier in a reversed way, namely the signal line V1 is connected with the negative input end of the amplifier, the signal line V2 is connected with the positive input end of the amplifier, and the connection relations between the signal line V1 and the signal line V2 and the resistor R1, the resistor R2 and the resistor R3 are unchanged, the output Y of the amplifier is low level, which indicates that the temperature of the chip is too high or the current flowing through the drive NMOS tube is too high. When the output of the amplifier shows that the chip temperature and the current of the driving NMOS tube are normal, the grid control circuit enables the output signal F of the frequency generation circuit to normally pass, namely the output signal F of the frequency generation circuit is the same as the frequency of the output signal line G of the grid control circuit, the driving NMOS tube normally drives the buzzer, and when the output of the amplifier shows that the chip temperature is too high or the current flowing through the driving NMOS tube is too large, the output signal line G of the grid control circuit enables the driving NMOS tube to be cut off, so that the power consumption of the circuit is reduced, and the chip and the system are prevented from being damaged.

The first embodiment of the present invention, as shown in fig. 2, includes a resistor R4, a diode D1, a resistor R1, a resistor R2, a resistor R3, an amplifier, a frequency generation circuit, a gate control circuit, and a driving NMOS, wherein one end of the resistor R4 is connected to a power supply, the other end of the resistor R4 is connected to the anode of the diode D1, the cathode of the diode D1 is connected to the ground, one end of the resistor R2 is connected to the anode of the diode D1, the other end of the resistor R2 is connected to the signal line V2, one end of the resistor R3 is connected to the signal line V2, the other end of the resistor R3 is connected to the ground, the negative input end of the amplifier is connected to the signal line V2, the positive input end of the amplifier is connected to the signal line V1, the output end of the amplifier is connected to the signal line Y, the output signal line F of the frequency generation circuit is connected to one input, the source electrode of the driving NMOS tube is connected with the signal line V1, the substrate of the driving NMOS tube is connected with the grounding line, one end of the resistor R1 is connected with the signal line V1, and the other end of the resistor R1 is connected with the grounding line.

In the first embodiment of the present invention, referring to fig. 2, the resistor R4 is a current limiting device, the voltage of the anode of the diode D1 is stabilized at about 0.7V at normal temperature by the current flowing through the resistor R4, if the current flowing through the driving NMOS transistor is within the normal range, the voltage drop across the resistor R1 is smaller than the voltage drop across the resistor R3, that is, the voltage of the signal line V1 is smaller than the voltage of the signal line V2, and the output Y of the amplifier is at a low level, which indicates that the current flowing through the driving NMOS transistor is normal; if the current flowing through the driving NMOS transistor is too large, the voltage drop of the resistor R1 is larger than that of the resistor R3, namely the voltage of the signal wire V1 is larger than that of the signal wire V2, the output Y of the amplifier is at a high level, which indicates that the current flowing through the driving NMOS transistor is too large; since the forward voltage drop of the diode is a negative temperature characteristic, when the temperature rises, the voltage drop of the resistor R3 becomes low, and under the condition that the voltage drop of the resistor R1 is not changed, and when the temperature is too high, the voltage drop of the resistor R3 becomes lower than the voltage drop of the resistor R1, that is, the voltage of the signal line V1 is higher than the voltage of the signal line V2, the output Y of the amplifier is at a high level, which indicates that the temperature of the chip is too high; it can be seen that the output Y of the amplifier is high, which indicates that the temperature of the chip is too high or the current flowing through the driving NMOS transistor is too large. When the output of the amplifier is at a low level, the grid control circuit enables the output signal F of the frequency generation circuit to normally pass, namely the frequency of the output signal F of the frequency generation circuit is the same as that of the output signal G of the grid control circuit, the NMOS tube is driven to normally drive the buzzer, and when the output of the amplifier is at a high level, the output signal G of the grid control circuit is at a low level, the NMOS tube is driven to be cut off, so that the power consumption of the circuit is reduced, and the chip and the system are prevented from being damaged.

The second embodiment of the present invention, as shown in fig. 3, includes a resistor R4, a PNP transistor Q1, a resistor R1, a resistor R2, a resistor R3, an amplifier, a frequency generation circuit, a gate control circuit, and a driving NMOS transistor, wherein one end of the resistor R4 is connected to a power supply, the other end of the resistor R4 is connected to an emitter of the PNP transistor Q1, a collector ground of the PNP transistor Q1, a base ground of the PNP transistor Q1, one end of the resistor R2 is connected to an emitter of the PNP transistor Q1, the other end of the resistor R2 is connected to a signal line V2, one end of the resistor R3 is connected to a signal line V2, the other end of the resistor R3 is connected to a ground, a negative input end of the amplifier is connected to the signal line V1, a positive input end of the amplifier is connected to the signal line V2, an output end of the amplifier is connected to the signal line Y, an output signal line, the drain electrode of the driving NMOS tube is connected with the output, the source electrode of the driving NMOS tube is connected with the signal line V1, the substrate of the driving NMOS tube is connected with the ground line, one end of the resistor R1 is connected with the signal line V1, and the other end of the resistor R1 is connected with the ground line.

In the second embodiment of the present invention, with reference to fig. 3 and fig. 1, a diode connection method using a triode PNP transistor Q1 is used in fig. 3 to replace the diode D1 in fig. 1, the resistor R4 is a current limiting device, and the current flowing through the resistor R4 makes the diode forward voltage drop between the emitter and the base of the PNP transistor Q1 stable at about 0.7V at normal temperature, if the driving transistor current is in a normal range, the voltage drop across the resistor R1 is smaller than the voltage drop across the resistor R3, that is, the voltage across the signal line V1 is smaller than the voltage across the signal line V2, and the output Y of the amplifier is at a high level, which indicates that the current driving the NMOS transistor is normal; if the current flowing through the driving NMOS transistor is too large, the voltage drop of the resistor R1 is larger than that of the resistor R3, namely the voltage of the signal wire V1 is larger than that of the signal wire V2, the output Y of the amplifier is at a low level, which indicates that the current flowing through the driving NMOS transistor is too large; since the forward voltage drop of the diode is a negative temperature characteristic, when the temperature rises, the voltage drop of the resistor R3 becomes low, and when the temperature is too high under the condition that the voltage drop of the resistor R1 is not changed, the voltage drop of the resistor R3 becomes lower than the voltage drop of the resistor R1, that is, the voltage of the signal line V1 is higher than the voltage of the signal line V2, and the output Y of the amplifier is at a low level, which indicates that the temperature of the chip is too high; it can be seen that the output Y of the amplifier is low, which indicates that the temperature of the chip is too high or the current flowing through the driving NMOS transistor is too large. When the output of the amplifier is at a high level, the grid control circuit enables the output signal F of the frequency generation circuit to normally pass, namely the output signal F of the frequency generation circuit has the same frequency as the output signal line G of the grid control circuit, so that the NMOS tube is driven to normally drive the buzzer.

The third embodiment of the present invention, as shown in fig. 4, comprises a PMOS transistor P1, an NMOS transistor N1, a resistor R1, a resistor R2, a resistor R3, an amplifier, a frequency generation circuit, a gate control circuit, and a driving NMOS transistor, wherein the source of the PMOS transistor P1 is connected to the substrate, the drain of the PMOS transistor P1 is connected to the drain of the NMOS transistor N1, the gate of the NMOS transistor N1 is shorted to the drain, the source of the NMOS transistor N1 is connected to the substrate, one end of the resistor R2 is connected to the drain of the NMOS transistor N1, the other end of the resistor R2 is connected to the signal line V2, one end of the resistor R3 is connected to the signal line V2, the other end of the resistor R3 is connected to the ground, the negative input end of the amplifier is connected to the signal line V2, the positive input end of the amplifier is connected to the signal line V1, the output end of the amplifier is connected to the signal line Y, the output signal line F of, the drain electrode of the driving NMOS tube is connected with the output OUT, the source electrode of the driving NMOS tube is connected with the signal line V1, the substrate of the driving NMOS tube is connected with the grounding wire, one end of the resistor R1 is connected with the signal line V1, and the other end of the resistor R1 is connected with the grounding wire.

In the third embodiment of the present invention, with reference to fig. 4 and fig. 1, a diode connection method using an NMOS transistor N1 is used in fig. 4 to replace the diode D1 in fig. 1, the PMOS transistor P1 is a current limiting device, and the current flowing through the PMOS transistor P1 makes the drain and gate voltages of the NMOS transistor N1 stable around the threshold voltage of the NMOS transistor at normal temperature, if the driving transistor current is in a normal range, the voltage drop across the resistor R1 is smaller than the voltage drop across the resistor R3, that is, the voltage across the signal line V1 is smaller than the voltage across the signal line V2, and the output Y of the amplifier is at a low level, which indicates that the current flowing through the driving NMOS transistor is normal; if the current flowing through the driving NMOS transistor is too large, the voltage drop of the resistor R1 is larger than the voltage drop of the resistor R3, namely the voltage of the signal wire V1 is larger than the voltage of the signal wire V2, the output Y of the amplifier is at a high level, which indicates that the current flowing through the driving NMOS transistor is too large; since the threshold voltage of the NMOS transistor is a negative temperature characteristic, when the temperature rises, the voltage drop across the resistor R3 becomes low, and when the chip temperature is too high, the voltage drop across the resistor R3 becomes lower than the voltage drop across the resistor R1, that is, the voltage across the signal line V1 is higher than the voltage across the signal line V2, and the output Y of the amplifier is at a high level, indicating that the chip temperature is too high, while the voltage drop across the resistor R1 is unchanged; it can be seen that the output Y of the amplifier is high, which indicates that the temperature of the chip is too high or the current flowing through the driving NMOS transistor is too large. When the output of the amplifier is at low level, the grid control circuit enables the output signal F of the frequency generation circuit to normally pass, namely the output signal F of the frequency generation circuit has the same frequency as the output signal line G of the grid control circuit, the NMOS tube is driven to normally drive the buzzer, and when the output of the amplifier is at high level, the output signal line G of the grid control circuit is at low level, the NMOS tube is driven to be cut off, so that the power consumption of the circuit is reduced, and chips and systems are prevented from being damaged.

In summary, according to the high-reliability buzzer driving circuit provided by the invention, when the current of the driving tube is too large or the temperature of the chip is too high, the driving tube is turned off to reduce power consumption, so that the chip and the system are prevented from being damaged, and the circuit has the advantages of high reliability and low cost.

The above description is only an example of the present invention, and is not intended to limit the present invention, and it is obvious to those skilled in the art that various modifications and variations can be made in the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims (9)

1. A high-reliability buzzer driving circuit is characterized by comprising a current limiting device, a diode D1, a resistor R1, a resistor R2, a resistor R3, an amplifier, a frequency generation circuit, a grid control circuit and a driving NMOS tube, wherein one end of the current limiting device is connected with a power supply, the other end of the current limiting device is connected with the anode of a diode D1, the cathode of a diode D1 is grounded, one end of a resistor R2 is connected with the anode of a diode D1, the other end of the resistor R2 is connected with a signal line V2, one end of a resistor R3 is connected with a signal line V2, the other end of the resistor R3 is connected with a ground wire, the negative input end of the amplifier is connected with a signal line V2, the positive input end of the amplifier is connected with a signal line V1, the output end of the amplifier is connected with a signal line Y, the output signal line F of the frequency generation circuit, the drain electrode of the driving NMOS tube is connected with the output OUT, the source electrode of the driving NMOS tube is connected with the signal line V1, the substrate of the driving NMOS tube is connected with the grounding wire, one end of the resistor R1 is connected with the signal line V1, and the other end of the resistor R1 is connected with the grounding wire.

2. The high reliability buzzer driving circuit as claimed in claim 1, wherein said driving NMOS transistor substrate is connected to a ground line or to a source of a driving NMOS transistor.

3. The highly reliable buzzer driver circuit as claimed in claim 1, wherein said amplifier functions to detect whether the current flowing through the driving NMOS transistor is excessive.

4. The highly reliable buzzer driver circuit of claim 1, wherein said amplifier functions to detect if the temperature of the chip is too high.

5. The highly reliable buzzer driver circuit as claimed in claim 1, wherein said amplifier may also be connected with its positive input terminal to said signal line V2, and said amplifier may be connected with its negative input terminal to said signal line V1.

6. The high reliability buzzer driving circuit as claimed in claim 1, wherein the gate control circuit functions such that when the output of the amplifier indicates that the chip temperature is too high or the current flowing through the driving NMOS transistor is too large, the gate control circuit outputs a signal line G to turn off the driving NMOS transistor, and when the output of the amplifier indicates that the chip temperature and the current flowing through the driving NMOS transistor are both normal, the gate control circuit allows the frequency generation circuit output signal F to pass normally, i.e. the frequency generation circuit output signal F has the same frequency as the gate control circuit output signal G.

7. The high reliability buzzer driving circuit of claim 1, wherein the current limiting device may be a resistor, an active device such as a current source or a MOS transistor, or a combination thereof.

8. The high reliability buzzer driving circuit of claim 1, wherein said diode may be a series, parallel combination of more than one diode, or a diode-connected MOS transistor, or a series, parallel combination of more than one diode-connected MOS transistor, or a diode-connected triode, or a series, parallel combination of more than one diode-connected triode.

9. The high-reliability buzzer driving circuit as claimed in claim 1, wherein said driving NMOS transistor can be replaced by NPN transistor, i.e. NPN transistor is used as the driving transistor of buzzer.

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