CN110890283A - Improved method for passivating diode glass - Google Patents

Improved method for passivating diode glass Download PDF

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Publication number
CN110890283A
CN110890283A CN201911204022.9A CN201911204022A CN110890283A CN 110890283 A CN110890283 A CN 110890283A CN 201911204022 A CN201911204022 A CN 201911204022A CN 110890283 A CN110890283 A CN 110890283A
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CN
China
Prior art keywords
glass
photoresist
groove
ratio
chip
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Pending
Application number
CN201911204022.9A
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Chinese (zh)
Inventor
游佩武
王毅
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YANGZHOU JIELI SEMICONDUCTOR CO Ltd
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YANGZHOU JIELI SEMICONDUCTOR CO Ltd
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Priority to CN201911204022.9A priority Critical patent/CN110890283A/en
Publication of CN110890283A publication Critical patent/CN110890283A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3178Coating or filling in grooves made in the semiconductor body

Abstract

An improved method of passivating diode glass. Relates to a diode processing technology, in particular to an improved method for passivating diode glass. The method for improving the passivation of the diode glass is simple and convenient to process and capable of improving the chip cutting quality. The method comprises the steps of etching a chip groove, arranging a glass layer in the groove, passivating the glass layer by using a knife scraping method, coating a photoresist layer, exposing, developing, corroding and the like, and the quality of glass cutting is improved. The invention aims to improve the process based on the original knife scraping process when the glass passivation is carried out on the diode by using the knife scraping method, prevent the glass from being damaged when a chip is cut and improve the product quality. The invention has the characteristics of simple and convenient processing, reduction of rejection rate and the like.

Description

Improved method for passivating diode glass
Technical Field
The invention relates to a diode processing technology, in particular to an improved method for passivating diode glass.
Background
In the current knife scraping process, the process is simple and the cost is low, so that the method is used by a plurality of diode chip manufacturers; however, when the finished chip is cut, because the groove has glass, when the blade cuts the glass, the glass is easily damaged and hidden cracks are easily caused, and the reliability of the product is affected.
Disclosure of Invention
Aiming at the problems, the invention provides an improved diode glass passivation method which is simple and convenient to process and improves the chip cutting quality.
The technical scheme of the invention is as follows: an improved method for passivating diode glass, comprising the steps of:
1.1) etching a chip groove;
transferring the chip coated with the photoresist after being diffused by the diffusion furnace to an etching machine, and etching the surface of the chip by using the etching machine to form a groove;
1.2) arranging a glass layer in the groove;
1.3) passivating the glass layer by using a knife scraping method;
1.4) coating photoresist;
coating a layer of photoresist on the surface of the chip after the step 1.2).
1.5) exposure;
transferring the chip coated with the photoresist to an exposure machine, and exposing the area needing to be removed with the photoresist through a photoetching plate;
1.6) developing;
and developing by using a negative photoresist developing solution to remove the photoresist at the exposed area, namely the table top and the cutting path.
1.7) corrosion;
and removing the mesa and the groove glass by using an etching solution prepared from HF and HCL in a volume ratio of 1:10, and removing the photoresist.
The step of arranging a glass layer in the groove in the step 1.2) comprises the following steps:
2.1), binder configuration: mixing butyl carbitol and ethyl cellulose in a ratio of (100 CC-600 CC): (10g-50g) mixing in proportion to prepare a binding agent;
2.2) preparing glass paste: mixing a bonding agent and glass powder in a ratio of 3:1 to form glass slurry;
2.3), glass scraping: uniformly scraping and coating the glass slurry on the etched wafer at 45 ℃ to enable the glass slurry to be uniformly filled in the groove, airing at normal temperature for 10min, and baking at the temperature of 90-120 ℃ for 30min by using an oven to dry the solution.
2.4), glass sintering: and pushing the wafer into a glass melting furnace, burning off organic matters in the glass slurry, and sintering the glass powder into glass which is coated in the groove.
The ratio of butyl carbitol and ethyl cellulose in the step 2.1) is 100 CC: mixing at a ratio of 10g to prepare the binder.
The butyl carbitol and ethyl cellulose in step 2.1) are mixed at a ratio of 600 CC: mixing at a ratio of 50g to prepare the binder.
The thickness of the photoresist in the step 1.4) is 7-10 um.
The method comprises the steps of etching a chip groove, arranging a glass layer in the groove, passivating the glass layer by using a knife scraping method, coating a photoresist layer, exposing, developing, corroding and the like, and the quality of glass cutting is improved. The invention aims to improve the process based on the original knife scraping process when the glass passivation is carried out on the diode by using the knife scraping method, prevent the glass from being damaged when a chip is cut and improve the product quality. The invention has the characteristics of simple and convenient processing, reduction of rejection rate and the like.
Drawings
FIG. 1 is a schematic structural diagram of a chip trench after diffusion through a diffusion furnace in step 1.1),
FIG. 2 is a schematic view showing the structure of step 1.3) in which the passivation of the glass layer is carried out by using a knife-blade method,
FIG. 3 is a schematic structural diagram of step 1.4) of coating a photoresist layer on the surface of a wafer,
FIG. 4 is a schematic structural view of step 1.5),
FIG. 5 is a schematic structural diagram of step 1.6),
FIG. 6 is a schematic structural view of the product after completion of step 1.7);
in the figure 1 is a chip, 2 is a trench, 3 is a glass layer, 4 is a photoresist layer, and 5 is a reticle.
Detailed Description
The invention is illustrated in fig. 1-6, an improved method for passivating diode glass, comprising the steps of:
1.1) etching a groove of a chip 1;
transferring the chip 1 coated with the photoresist after being diffused by the diffusion furnace to an etching machine, and etching the surface of the chip 1 by using the etching machine to form a groove 2;
1.2) arranging a glass layer 3 in the groove 2;
1.3) passivating a glass layer by using a knife scraping method, wherein the purpose of glass passivation is to protect a PN junction of a diode from being influenced by external environment by using glass;
the knife scraping method comprises the following specific steps:
1.3.1), binder configuration: mixing butyl carbitol and ethyl cellulose in a ratio of (100 CC-600 CC): (10g-50g) mixing in proportion to prepare a binding agent;
1.3.2), glass paste preparation: mixing a bonding agent and glass powder in a ratio of 3:1 to form glass slurry;
1.3.3), glass coating: and uniformly scraping and coating the glass slurry on the etched wafer at 45 ℃ to uniformly fill the glass slurry in the groove 2, airing at normal temperature for 10min, and baking at 90-120 ℃ for 30min by using an oven to dry the solution.
1.3.4), glass sintering: the wafer is pushed into a glass melting furnace, organic matters in the glass slurry are burnt out, and simultaneously, the glass powder is sintered into glass and coated in the groove 2.
1.4) coating a photoresist layer 4;
coating a photoresist layer 4 on the surface of the chip 1 after the step 1.2).
1.5) exposure;
transferring the chip 1 coated with the photoresist to an exposure machine, and exposing a region needing to remove the photoresist through a photoetching plate 5;
1.6) developing;
and developing by using a negative photoresist developing solution to remove the photoresist at the exposed area, namely the table top and the cutting path.
1.7) corrosion;
the method comprises the following steps of (1) removing the mesa and groove glass by using an etching solution prepared from HF and HCL in a volume ratio of 1:10, wherein the etching time is 20-60S, and the equation is as follows: SIO2+4HF=SIF4+2H2O; inspecting the appearance of the product after etching to confirm that the glass is removed completely, and soaking the wafer in H2SO4+H2O210m in solutionAnd in, removing the photoresist (organic matter) on the surface of the wafer.
The step of arranging the glass layer 3 in the groove in the step 1.2) comprises the following steps:
2.1), binder configuration: mixing butyl carbitol and ethyl cellulose in a ratio of (100 CC-600 CC): (10g-50g) mixing in proportion to prepare a binding agent;
2.2) preparing glass paste: mixing a bonding agent and glass powder in a ratio of 3:1 to form glass slurry;
2.3), glass scraping: and uniformly scraping and coating the glass slurry on the etched wafer at 45 ℃ to ensure that the glass slurry is uniformly and fully filled in the groove, and drying.
2.4), glass sintering: and pushing the wafer into a glass melting furnace, burning off organic matters in the glass slurry, and sintering the glass powder into glass which is coated in the groove.
The ratio of butyl carbitol and ethyl cellulose in the step 2.1) is 100 CC: mixing at a ratio of 10g to prepare the binder.
The butyl carbitol and ethyl cellulose in step 2.1) are mixed at a ratio of 600 CC: mixing at a ratio of 50g to prepare the binder.
The thickness of the photoresist in the step 1.4) is 7-10 um.
The disclosure of the present application also includes the following points:
(1) the drawings of the embodiments disclosed herein only relate to the structures related to the embodiments disclosed herein, and other structures can refer to general designs;
(2) in case of conflict, the embodiments and features of the embodiments disclosed in this application can be combined with each other to arrive at new embodiments;
the above embodiments are only embodiments disclosed in the present disclosure, but the scope of the disclosure is not limited thereto, and the scope of the disclosure should be determined by the scope of the claims.

Claims (5)

1. An improved method for passivating diode glass, comprising the steps of:
1.1) etching a chip groove;
transferring the chip coated with the photoresist after being diffused by the diffusion furnace to an etching machine, and etching the surface of the chip by using the etching machine to form a groove;
1.2) arranging a glass layer in the groove;
1.3) passivating the glass layer by using a knife scraping method;
1.4) coating photoresist;
coating a layer of photoresist on the surface of the chip after the step 1.2);
1.5) exposure;
transferring the chip coated with the photoresist to an exposure machine, and exposing the area needing to be removed with the photoresist through a photoetching plate;
1.6) developing;
developing by negative photoresist developing solution, and removing the photoresist at the exposure area, namely the table top and the cutting path;
1.7) corrosion;
and removing the mesa and the groove glass by using an etching solution prepared from HF and HCL in a volume ratio of 1:10, and removing the photoresist.
2. The method for improving the glass passivation of the diode according to claim 1, wherein the step of arranging the glass layer in the groove in the step 1.2) is as follows:
2.1), binder configuration: mixing butyl carbitol and ethyl cellulose in a ratio of (100 CC-600 CC): (10g-50g) mixing in proportion to prepare a binding agent;
2.2) preparing glass paste: mixing a bonding agent and glass powder in a ratio of 3:1 to form glass slurry;
2.3), glass scraping: uniformly scraping and coating the glass slurry on the etched wafer at 45 ℃ to uniformly fill the glass slurry in the groove, and drying;
2.4), glass sintering: and pushing the wafer into a glass melting furnace, burning off organic matters in the glass slurry, and sintering the glass powder into glass which is coated in the groove.
3. The method of claim 2 wherein the butyl carbitol and ethyl cellulose in step 2.1) are mixed at a ratio of 100 CC: mixing at a ratio of 10g to prepare the binder.
4. The method of claim 2 wherein the butyl carbitol and ethyl cellulose in step 2.1) are mixed at a ratio of 600 CC: mixing at a ratio of 50g to prepare the binder.
5. The method for improving the passivation of the diode glass according to claim 2, wherein the photoresist thickness in step 1.4) is 7-10 um.
CN201911204022.9A 2019-11-29 2019-11-29 Improved method for passivating diode glass Pending CN110890283A (en)

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Application Number Priority Date Filing Date Title
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113299567A (en) * 2021-05-24 2021-08-24 捷捷半导体有限公司 Passivation layer manufacturing method
CN114361011A (en) * 2021-12-15 2022-04-15 安徽芯旭半导体有限公司 Photoetching production process of PG (patterned conductor) chip
CN114420560A (en) * 2022-01-13 2022-04-29 杭州赛晶电子有限公司 GPP diode chip production process adopting honeycomb photoetching plate and knife scraping method
CN114975095A (en) * 2022-04-29 2022-08-30 安徽芯旭半导体有限公司 Processing method for improving passivation edge breakage of diode wafer groove

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1167342A (en) * 1996-06-05 1997-12-10 智威科技股份有限公司 Silicon semiconductor diode chip of all tangent plane junction glass passivation and making method
CN104008970A (en) * 2014-06-17 2014-08-27 安徽芯旭半导体有限公司 Glassivation diode chip and manufacturing method thereof
CN105470150A (en) * 2015-12-21 2016-04-06 中国电子科技集团公司第五十五研究所 Glass passivation method for silicon mesa diodes
CN109659230A (en) * 2018-12-13 2019-04-19 吉林华微电子股份有限公司 The semiconductor processing method of double-sided glass terminal

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1167342A (en) * 1996-06-05 1997-12-10 智威科技股份有限公司 Silicon semiconductor diode chip of all tangent plane junction glass passivation and making method
CN104008970A (en) * 2014-06-17 2014-08-27 安徽芯旭半导体有限公司 Glassivation diode chip and manufacturing method thereof
CN105470150A (en) * 2015-12-21 2016-04-06 中国电子科技集团公司第五十五研究所 Glass passivation method for silicon mesa diodes
CN109659230A (en) * 2018-12-13 2019-04-19 吉林华微电子股份有限公司 The semiconductor processing method of double-sided glass terminal

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113299567A (en) * 2021-05-24 2021-08-24 捷捷半导体有限公司 Passivation layer manufacturing method
CN113299567B (en) * 2021-05-24 2024-02-02 捷捷半导体有限公司 Passivation layer manufacturing method
CN114361011A (en) * 2021-12-15 2022-04-15 安徽芯旭半导体有限公司 Photoetching production process of PG (patterned conductor) chip
CN114361011B (en) * 2021-12-15 2022-08-19 安徽芯旭半导体有限公司 Photoetching production process of PG (patterned conductor) chip
CN114420560A (en) * 2022-01-13 2022-04-29 杭州赛晶电子有限公司 GPP diode chip production process adopting honeycomb photoetching plate and knife scraping method
CN114420560B (en) * 2022-01-13 2023-12-08 杭州赛晶电子有限公司 GPP diode chip production process adopting honeycomb photoetching plate and knife scraping method
CN114975095A (en) * 2022-04-29 2022-08-30 安徽芯旭半导体有限公司 Processing method for improving passivation edge breakage of diode wafer groove

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Application publication date: 20200317