CN110854246B - Light emitting diode and light emitting diode manufacturing method - Google Patents

Light emitting diode and light emitting diode manufacturing method Download PDF

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CN110854246B
CN110854246B CN201911119307.2A CN201911119307A CN110854246B CN 110854246 B CN110854246 B CN 110854246B CN 201911119307 A CN201911119307 A CN 201911119307A CN 110854246 B CN110854246 B CN 110854246B
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CN110854246A (en
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王晟
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Wuhu Elec Tech Optical Electronic Co ltd
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Wuhu Elec Tech Optical Electronic Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

The application provides a light-emitting diode and a preparation method thereof. Each sub-layer structure includes a first quantum well structure and a plurality of second quantum well structures. The first quantum well structure replaces a conventional quantum barrier layer structure. The second quantum well structures are arranged on the first quantum well structure to form a deeper quantum well structure. And the thickness of each second quantum well structure is less than the thickness of the first quantum well structure, such that the second quantum well structures form a narrow quantum well structure compared to the first quantum well structure. At this time, the quantum barrier in the conventional structure is replaced with the first quantum well structure. A plurality of sub-layer deep and narrow multi-quantum well structures are formed in the multi-quantum well layer through the plurality of second quantum well structures, and compared with the traditional quantum well, the multi-quantum well structure is deeper, so that the quantum well has better limiting capacity on electrons and holes, the half width of the light-emitting wavelength is reduced, and a specified waveband with purer wave color and stronger light-emitting intensity is generated.

Description

Light emitting diode and light emitting diode manufacturing method
Technical Field
The application relates to the technical field of semiconductors, in particular to a light-emitting diode and a preparation method of the light-emitting diode.
Background
A Light-Emitting Diode (LED) is a semiconductor electronic component that converts electrical energy into Light energy. The LED lamp is popular due to the advantages of small volume, low energy consumption, long service life, low driving voltage and the like, and is widely applied to the fields of traffic signal lamps, automobile interior and exterior lamps, urban landscape lighting, mobile phone backlight sources and the like. The epitaxial wafer is a basic structure for preparing the light emitting diode. The structure of the traditional light emitting diode epitaxial wafer comprises a substrate, and a low-temperature buffer layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer and a P-type GaN layer which are sequentially grown on the substrate. The multiple quantum well layer comprises InGaN well layers and GaN barrier layers which are alternately grown, and electrons in the N-type GaN layer and holes in the P-type GaN layer both migrate into the multiple quantum well layer and perform composite light emission under the action of current.
However, since electrons have smaller effective mass and higher mobility, electrons can easily cross the GaN barrier, reach the P-type layer, and undergo non-radiative recombination with holes, and the concentration and injection efficiency of holes are reduced, so that the light emitting efficiency of the light emitting diode is reduced.
Disclosure of Invention
In view of the above, it is necessary to provide a light emitting diode and a method for manufacturing the light emitting diode, aiming at the problem of the reduction of the light emitting efficiency caused by the reduction of the concentration and the injection efficiency of the holes in the conventional light emitting diode epitaxial wafer.
The application provides a light emitting diode which comprises a substrate, a buffer layer, a gallium nitride layer, an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer. The buffer layer, the gallium nitride layer, the N-type semiconductor layer and the P-type semiconductor layer are sequentially stacked on the surface of the substrate. The multiple quantum well layer is arranged between the N-type semiconductor layer and the P-type semiconductor layer in a laminated mode. The multiple quantum well layer includes at least one sublayer structure. The sublayer structure is arranged on the surface of the N-type semiconductor layer far away from the gallium nitride layer. Every the sublayer structure includes first quantum well structure and a plurality of second quantum well structure, first quantum well structure set up in N type semiconductor layer keeps away from the surface of gallium nitride layer, a plurality of second quantum well structures set gradually set up in first quantum well structure keeps away from the surface of N type semiconductor layer, and every the thickness of second quantum well structure is less than the thickness of first quantum well structure.
In one embodiment, the first quantum well structure includes a quantum barrier layer. The quantum barrier layer is arranged on the surface of the N-type semiconductor layer far away from the gallium nitride layer. The first potential well layer is arranged on the surface, far away from the N-type semiconductor layer, of the quantum barrier layer.
In one embodiment, the quantum barrier layer is AlmInnGa1-m-nN, wherein 0<m<0.6，0<n<0.2. The first potential well layer is InxGa1-xN, wherein 0.2<x<0.22。
In one embodiment, the thickness of the quantum barrier layer is 100nm to 140 nm. The thickness of the first potential well layer is 2 nm-6 nm.
In one embodiment, each of the second quantum well structures includes a first barrier layer and a second well layer. The first barrier layer is arranged on the surface of the first potential well layer far away from the quantum barrier layer. The second potential well layer is arranged on the surface of the first potential well layer, which is far away from the first potential well layer.
In one embodiment, the first barrier layer is InyGa1-yN, wherein 0<y<0.1. The second potential well layer is InxGa1-xN, wherein 0.2<x<0.22。
In one embodiment, the first barrier layer has a thickness of 4nm to 8 nm. The thickness of the second potential well layer is 2 nm-6 nm.
In one embodiment, a method for manufacturing a light emitting diode includes:
s10, providing a substrate, and sequentially preparing a buffer layer, a gallium nitride layer and an N-type semiconductor layer on the surface of the substrate;
s20, setting the growth temperature to be 850-950 ℃, and preparing a quantum barrier layer on the surface of the N-type semiconductor layer away from the gallium nitride layer;
s30, setting the growth temperature to 700-800 ℃, and preparing a first potential well layer on the surface of the quantum barrier layer far away from the N-type semiconductor layer;
s40, setting the growth temperature to 750-850 ℃, preparing a first potential well layer on the surface of the first potential well layer far away from the quantum barrier layer, and preparing a second potential well layer on the surface of the first potential well layer far away from the first potential well layer; and
and S50, according to the step S40, sequentially circulating the second well layer away from the surface of the first barrier layer for 3-6 times to prepare the second quantum well structure.
In one embodiment, the quantum barrier layer and the first well layer form a first quantum well structure, the first barrier layer and the second well layer form a second quantum well structure, and the first quantum well structure and a plurality of the second quantum well structures form a sub-layer structure. The preparation method of the light-emitting diode further comprises the following steps:
s60, preparing 8-15 sub-layer structures on the surface of the N-type semiconductor layer away from the gallium nitride layer according to the steps S20-S50;
wherein a plurality of the sub-layer structures form a multiple quantum well layer.
In one embodiment, the method for preparing the light emitting diode further comprises:
s70, setting the growth temperature to be 900-1000 ℃, and preparing the magnesium-doped high-temperature P-type semiconductor layer on the surface of the multiple quantum well layer away from the N-type semiconductor layer.
The present application provides the above light emitting diode. The multiple quantum well layer is arranged on the surface of the N-type semiconductor layer, which is far away from the gallium nitride layer. The MQW layer comprises one or more of the sub-layer structures, and a deeper layer of the MQW layer can be formed on the surface of the N-type semiconductor layer. Meanwhile, each of the sub-layer structures includes a first quantum well structure and a plurality of second quantum well structures. The first quantum well structure replaces a conventional quantum barrier layer structure. The plurality of second quantum well structures are arranged on the first quantum well structure to form a deeper quantum well structure. And each of the second quantum well structures has a thickness less than a thickness of the first quantum well structure such that the second quantum well structures form a narrow quantum well structure compared to the first quantum well structure.
At this time, the quantum barrier in the conventional structure is replaced with the first quantum well structure. Meanwhile, a plurality of sub-layer deep and narrow multi-quantum well structures are formed in the multi-quantum well layer through the plurality of second quantum well structures. Thus, the multiple quantum well layer includes a plurality of deep and narrow multiple quantum well structures therein. Furthermore, compared with the traditional quantum well, the multiple deep and narrow quantum well structure is deeper, so that the quantum well has better limiting capability on electrons and holes, the half width of the light-emitting wavelength is reduced, and a specified waveband with purer wave color and stronger light-emitting intensity is generated.
Drawings
Fig. 1 is a schematic structural diagram of a light emitting diode provided in the present application;
FIG. 2 is a schematic structural diagram of a sub-layer structure provided herein;
fig. 3 is a schematic structural diagram of a multiple quantum well layer provided in the present application;
fig. 4 is a schematic diagram of an alternate stacking of multiple quantum well layers provided herein;
fig. 5 is a schematic flow chart of a method for manufacturing a light emitting diode provided by the present application.
Description of the reference numerals
The light emitting diode comprises a light emitting diode 100, a substrate 10, a buffer layer 20, a gallium nitride layer 30, an N-type semiconductor layer 40, a multi-quantum well layer 50, a sub-layer structure 501, a first quantum well structure 510, a second quantum well structure 520, a quantum barrier layer 511, a first potential well layer 512, a first barrier layer 521, a second potential well layer 522 and a P-type semiconductor layer 60.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is further described in detail below by way of embodiments and with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings). In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present application and for simplicity in description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be considered as limiting the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through intervening media. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
Referring to fig. 1-4, the present application provides a light emitting diode 100 including a substrate 10, a buffer layer 20, a gallium nitride layer 30, an N-type semiconductor layer 40, a multi-quantum well layer 50, and a P-type semiconductor layer 60. The buffer layer 20, the gallium nitride layer 30, the N-type semiconductor layer 40, and the P-type semiconductor layer 60 are sequentially stacked on the surface of the substrate 10. The multiple quantum well layer 50 is stacked between the N-type semiconductor layer 40 and the P-type semiconductor layer 60. The mqw layer 50 includes at least one sublayer structure 501. The sublayer structure 501 is disposed on the surface of the N-type semiconductor layer 40 away from the gallium nitride layer 30. Each of the sub-layer structures 501 includes a first quantum well structure 510 and a plurality of second quantum well structures 520. The first quantum well structure 510 is disposed on a surface of the N-type semiconductor layer 40 away from the gallium nitride layer 30. The plurality of second quantum well structures 520 are sequentially disposed on the surface of the first quantum well structure 510 away from the N-type semiconductor layer 40. And the thickness of each of the second quantum well structures 520 is less than the thickness of the first quantum well structure 510.
The mqw layer 50 is disposed on the surface of the N-type semiconductor layer 40 away from the gallium nitride layer 30. The mqw layer 50 includes one or more of the sub-layer structures 501, and the mqw layer 50 may be formed at a deeper level on the surface of the N-type semiconductor layer 40. Meanwhile, each of the sub-layer structures 501 includes a first quantum well structure 510 and a plurality of second quantum well structures 520. The first quantum well structure 510 replaces the conventional quantum barrier layer structure. The plurality of second quantum well structures 520 are disposed on the first quantum well structure 510 to form a deeper quantum well structure. And, the thickness of each of the second quantum well structures 520 is less than the thickness of the first quantum well structure 510, such that the second quantum well structures 520 form a narrow quantum well structure compared to the first quantum well structure 510.
At this time, the quantum barrier in the conventional structure is replaced with the first quantum well structure 510. Meanwhile, a plurality of sub-layer deep and narrow multi-quantum well structures are formed in the multi-quantum well layer 50 by the plurality of second quantum well structures 520. Thus, the multiple quantum well layer 50 includes a plurality of deep and narrow multiple quantum well structures therein. Furthermore, compared with the traditional quantum well, the multiple deep and narrow quantum well structure is deeper, so that the quantum well has better limiting capability on electrons and holes, the half width of the light-emitting wavelength is reduced, and a specified waveband with purer wave color and stronger light-emitting intensity is generated.
Referring to fig. 2, in one embodiment, the first quantum well structure 510 includes a quantum barrier layer 511 and a first well layer 512. The quantum barrier layer 511 is disposed on the surface of the N-type semiconductor layer 40 away from the gallium nitride layer 30. The first well layer 512 is disposed on the surface of the quantum barrier layer 511 away from the N-type semiconductor layer 40.
The quantum barrier layer 511 is disposed on the surface of the N-type semiconductor layer 40 away from the gallium nitride layer 30, and replaces the quantum barrier in the conventional structure. While the first well layer 512 is disposed on the quantum barrier layer 511. The plurality of second quantum well structures 520 are then disposed in the first well layer 512. The quantum barrier layer 511, the first potential well layer 512 and the second quantum well structures 520 can form a plurality of deep and narrow multiple quantum well structures, which are deeper than the conventional quantum well structures, so that the quantum wells have better limiting capability on electrons and holes, half width of light-emitting wavelength is reduced, and a specified waveband with purer wave color and stronger light-emitting intensity is generated.
In one embodiment, quantum barrier layer 511 is AlmInnGa1-m-nN, wherein 0<m<0.6，0<n<0.2. The first well layer 512 is InxGa1-xN, wherein 0.2<x<0.22。
By AlmInnGa1-m-nThe quantum barrier layer 511 of N replaces the traditional quantum barrier structure, InxGa1-xA first well layer 512 of N is disposed on the quantum barrier layer 511 to form the first quantum well structure 510. Wherein Al is prepared at high temperaturemInnGa1-m-nThe N structure provides a high energy level, a quantum barrier for high lattice matching and high lattice quality.
Due to electronsThe light-emitting diode has smaller effective mass and higher mobility, so electrons can easily cross a GaN potential barrier in the traditional light-emitting diode structure and reach a P-type layer to be subjected to non-radiative recombination with holes, so that the concentration and the injection efficiency of the holes are reduced. By Al in this examplemInnGa1-m-nThe high-energy-level quantum barrier layer 511 formed by N can effectively slow down the movement of electrons. At the same time, in the AlmInnGa1-m-nThe multiple second quantum well structures 520 are arranged on the surface of the quantum barrier layer 511 of the N, so that a deep and narrow multiple quantum well structure can be formed, the limiting capability of the quantum well on electrons and holes can be further improved, and the light emitting efficiency is improved.
Referring to fig. 2, in one embodiment, each of the second quantum well structures 520 includes a first barrier layer 521 and a second well layer 522. The first barrier layer 521 is disposed on a surface of the first well layer 512 away from the quantum barrier layer 511. The second well layer 522 is disposed on a surface of the first barrier layer 521 away from the first well layer 512.
One of the second quantum well structures 520 is formed by the first barrier layer 521 and the second well layer 522. Wherein the thickness of each of the second quantum well structures 520 is less than the thickness of the first quantum well structure 510. Since the influence of the thickness on the polarization is large, the influence of the polarization can be reduced by reducing the thicknesses of the first barrier layer 521 and the second well layer 522 at this time. Thus, polarization is reduced by reducing the well barrier thickness of the single layer. In addition, the first barrier layer 521 and the second well layer 522 are both composed of InGaN, and the lattice matching between the same materials is better, so that the light emitting efficiency of the light emitting diode 100 can be improved.
Due to lattice mismatch between a GaN barrier layer and an InGaN well layer of a multi-quantum well layer in the traditional light-emitting diode, the generated polarization effect is large, so that the wave function overlap is reduced, the radiative recombination probability is obviously reduced, and the light-emitting efficiency is reduced. The sub-layer quantum well structure formed by sequentially and alternately superposing the plurality of first barrier layers 521 and the plurality of second potential well layers 522 in the embodiment enables lattice matching between the sub-layer quantum well and the sub-layer quantum barrier to be better, reduces polarization effect, and improves luminous efficiency.
Meanwhile, the first barrier layer 521 is disposed on the surface of the first well layer 512, and the first well layer 512 is also made of InGaN, so that the lattice matching between the first well layer 512 and the first barrier layer 521 is better. At this time, Al passesmInnGa1-m-n Quantum barrier layer 511 of N, InxGa1-xN first well layer 512, InyGa1-y First barrier layer 521 of N and InxGa1-xThe second well layer 522 of N forms the multiple quantum well layer 50. The mqw layer 50 has advantages of good lattice matching and small polarization effect, and improves the light emitting efficiency of the light emitting diode 100.
Further, by the sub-layer structure 501 including a plurality of the second quantum well structures 520, a deep and narrow multiple quantum well structure can be formed. The MQW layer 50 includes a plurality of the sublayer structures 501, i.e., includes Al arranged in a plurality of cyclesmInnGa1-m-n Quantum barrier layer 511 of N, InxGa1-xN first well layer 512, InyGa1-y First barrier layer 521 of N and InxGa1-xThe second potential well layer 522 of N makes the quantum well have better restriction capability to electrons and holes, reduces the half-width of the light-emitting wavelength, and generates a specified waveband with purer wave color and stronger light-emitting intensity.
In one embodiment, the first barrier layer 521 is InyGa1-yN, wherein 0<y<0.1. The second well layer 522 is InxGa1-xN, wherein 0.2<x<0.22。
The first barrier layer 521 and the second potential well layer 522 are both composed of InGaN, and lattice matching between the same materials is better, so that the light emitting efficiency of the light emitting diode 100 can be improved. The first well layer 512 is also composed of InGaN, so that the lattice matching between the first well layer 512 and the first barrier layer 521 is better.
In one embodiment, the thickness of quantum barrier layer 511 is 100nm to 140 nm. The thickness of the first potential well layer 512 is 2nm to 6 nm. The thickness of the first barrier layer 521 is 4nm to 8 nm. The thickness of the second potential well layer 522 is 2nm to 6 nm.
The first well layer 512, the first barrier layer 521, and the second well layer 522 are less thick than the quantum barrier layer 511 and also have a reduced thickness compared to conventional structures. At this time, the first well layer 512, the first barrier layer 521, and the second well layer 522 are formed to have thicknesses that reduce the influence of polarization, thereby improving the light emission efficiency of the light emitting diode 100.
Referring to fig. 5, in an embodiment, a method for manufacturing a light emitting diode includes:
s10, providing a substrate 10, and preparing a buffer layer 20, a gallium nitride layer 30 and an N-type semiconductor layer 40 on the surface of the substrate 10 in sequence;
s20, setting the growth temperature to 850-950 ℃, and preparing a quantum barrier layer 511 on the surface of the N-type semiconductor layer 40 away from the gallium nitride layer 30;
s30, setting the growth temperature to 700-800 ℃, preparing a first potential well layer 512 on the surface of the quantum barrier layer 511 away from the N-type semiconductor layer 40, where the quantum barrier layer 511 and the first potential well layer 512 form a first quantum well structure 510;
s40, setting the growth temperature to 750-850 ℃, preparing a first barrier layer 521 on the surface of the first potential well layer 512 away from the quantum barrier layer 511, and preparing a second potential well layer 522 on the surface of the first barrier layer 521 away from the first potential well layer 512, wherein the first barrier layer 521 and the second potential well layer 522 form a second quantum well structure 520;
s50, according to the step S40, sequentially circulating the second potential well layer 522 away from the surface of the first barrier layer 521 for 3-6 times to prepare the second quantum well structure 520;
wherein the first quantum well structure 510 and the plurality of second quantum well structures 520 form a sub-layer structure 501.
In step S10, the substrate 10 may be a sapphire substrate, a Si substrate, or a SiC substrate. And growing a GaN buffer layer 20 with the thickness of 25 nm-35 nm on the surface of the substrate 10 in the environment with the growth temperature of about 550 ℃. The growth temperature is controlled to rise to 1100 ℃ at 500 ℃, a GaN layer without doping Si is grown on the surface of the buffer layer 20, the thickness is about 0.5um to 1um, and a U-GaN gallium nitride layer 30 (undoped gallium nitride) is formed. High temperature N-GaN (N-type semiconductor layer 40) is grown at a growth temperature of 1070 ℃ to 1110 ℃. Wherein the Si doping concentration is 1.00E19-4.00E19, and the thickness is 0.5-1.0 μm.
In the step S20, Al is prepared on the surface of the N-type semiconductor layer 40 away from the gallium nitride layer 30 in an environment with a growth temperature of 850 ℃ to 950 ℃mInnGa1-m-nAnd a quantum barrier layer 511 of N. Wherein, AlmInnGa1-m-nThe thickness of the quantum barrier layer 511 of N is 100 nm-140 nm, 0<m<0.6，0<n<0.2。
In the step S30, In is prepared on the surface of the quantum barrier layer 511 away from the N-type semiconductor layer 40 In the environment of the growth temperature of 700 to 800 ℃xGa1-xN first well layer 512. Wherein the thickness of the first potential well layer 512 is 2 nm-6 nm, 0.2<x0.22。
In the step S40, In is prepared on the surface of the first potential well layer 512 away from the quantum barrier layer 511 at an environment with a growth temperature of 750 to 850 ℃yGa1-yA first barrier layer 521 of N. Wherein the first barrier layer 521 has a thickness of 4nm to 8nm, 0<y<0.1、
In said step S50xGa1-xN as a well of a quantum well of a sublayer In the MQW layer 50, InyGa1-yAnd N is used as a barrier of the sub-layer quantum well in the multi-quantum well layer 50, and is alternately grown for 3-6 times in a cycle number to form a sub-layer quantum well (a plurality of second quantum well structures 520).
The multiple quantum well layer 50 includes a plurality of deep narrow multiple quantum wells through steps S20 to S50. The deep narrow multiple quantum well is formed by InxGa1-xN/InyGa1-yN cycles are formed multiple times, i.e., a plurality of the second quantum well structures 520 are formed. The light-emitting diode prepared by the preparation method of the light-emitting diode is used for pairing electrons and holes through deep and narrow multiple quantum wellsThe limit capability of the LED is better, the half width of the light-emitting wavelength is reduced, and the specified waveband with purer wave color and stronger light-emitting intensity is generated. And, passing InxGa1- xN/InyGa1-yThe structure of N (the second quantum well structure) enables the lattice matching between the sub-layer quantum well and the sub-layer quantum barrier to be better, reduces the polarization effect and improves the luminous efficiency. Simultaneously, Al produced at high temperaturemInnGa1-m-nThe N quantum barrier layer 511 provides a high energy order, high lattice matching, high lattice quality quantum barrier.
In one embodiment, the method for preparing the light emitting diode further comprises:
and S60, sequentially circulating the N-type semiconductor layer 40 away from the surface of the gallium nitride layer 30 for 8-15 times to prepare the sublayer structure 501 according to the steps S20-S50. That is, 8 to 15 sub-layer structures 501 are prepared on the surface of the N-type semiconductor layer 40 away from the gallium nitride layer 30.
Wherein a plurality of said sub-layer structures 501 form a multiple quantum well layer 50.
Forming the multiple quantum well layer 50 by preparing a plurality of the sublayer structures 501 by cycling 8 to 15 times in the step S60. Each of the sub-layer structures 501 includes InxGa1-xN、InyGa1-yN and AlmInnGa1-m-nAnd N is added. Wherein, AlmInnGa1-m- nThe N layer may be doped with Si. Deep narrow multiple quantum wells are formed by a plurality of said sublayer structures 501.
At this time, the obtained mqw layer 50 is prepared through the steps S10 to S60. The limit capability of electrons and holes is better through the deep and narrow multiple quantum wells, the half width of the light-emitting wavelength is reduced, and a specified waveband with purer wave color and stronger light-emitting intensity is generated.
In one embodiment, the method for preparing the light emitting diode further comprises:
s70, preparing the Mg-doped high-temperature P-type semiconductor layer 60 on the surface of the multiple quantum well layer 50 far away from the N-type semiconductor layer 40 under the environment that the growth temperature is 900-1000 ℃.
In the step S70, the P-type semiconductor layer 60 is grown and prepared at an environment of a growth temperature of 900 to 1000 ℃. The P-type semiconductor layer 60 is a Mg-doped high-temperature P-type GaN layer. The thickness of the P-type semiconductor layer 60 is 100nm to 120 nm.
The light-emitting diode 100 obtained by the light-emitting diode preparation method can emit a specified waveband with purer wave color and stronger luminous intensity, and has high luminous efficiency.
In one embodiment, the method for manufacturing the light emitting diode may employ a Metal-organic Chemical Vapor Deposition (MOCVD) method, a MOVPE (Metal-organic Chemical Vapor-Phase epitoxy) method, or the like.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (8)

1. A light emitting diode, comprising:
a substrate (10);
a buffer layer (20), a gallium nitride layer (30), an N-type semiconductor layer (40), and a P-type semiconductor layer (60) which are sequentially stacked on the surface of the substrate (10);
a multiple quantum well layer (50) which is laminated between the N-type semiconductor layer (40) and the P-type semiconductor layer (60);
the multi-quantum well layer (50) comprises at least one sublayer structure (501), and the sublayer structure (501) is arranged on the surface of the N-type semiconductor layer (40) far away from the gallium nitride layer (30);
each sub-layer structure (501) comprises a first quantum well structure (510) and a plurality of second quantum well structures (520), the first quantum well structure (510) is arranged on the surface of the N-type semiconductor layer (40) far away from the gallium nitride layer (30), the plurality of second quantum well structures (520) are sequentially arranged on the surface of the first quantum well structure (510) far away from the N-type semiconductor layer (40), and the thickness of each second quantum well structure (520) is smaller than that of the first quantum well structure (510);
the first quantum well structure (510) comprises:
the quantum barrier layer (511) is arranged on the surface, far away from the gallium nitride layer (30), of the N-type semiconductor layer (40);
the first potential well layer (512) is arranged on the surface, far away from the N-type semiconductor layer (40), of the quantum barrier layer (511);
the quantum barrier layer (511) is AlmInnGa1-m-nN, the first well layer (512) being InxGa1-xN；
Each of the second quantum well structures (520) comprises:
a first barrier layer (521) disposed on a surface of the first potential well layer (512) remote from the quantum barrier layer (511);
a second well layer (522) disposed on a surface of the first barrier layer (521) distal from the first well layer (512);
the first barrier layer (521) is InyGa1-yN, the second well layer (522) being InxGa1-xN；
The first well layer (512), the first barrier layer (521), and the second well layer (522) have thicknesses less than the quantum barrier layer (511).
2. The light-emitting diode according to claim 1, wherein the Al ismInnGa1-m-nN is 0<m<0.6，0<n<0.2；
Said InxGa1-x0.2 in N<x<0.22。
3. The light-emitting diode according to claim 2, wherein the quantum barrier layer (511) has a thickness of 100nm to 140 nm;
the thickness of the first potential well layer (512) is 2 nm-6 nm.
4. The light-emitting diode according to claim 1, wherein InyGa1-yN is 0<y<0.1；
Said InxGa1-x0.2 in N<x<0.22。
5. The light-emitting diode according to claim 4, wherein the first barrier layer (521) has a thickness of 4nm to 8 nm;
the thickness of the second potential well layer (522) is 2nm to 6 nm.
6. A method for producing the light-emitting diode according to any one of claims 1 to 5, comprising:
s10, providing a substrate (10), and sequentially preparing a buffer layer (20), a gallium nitride layer (30) and an N-type semiconductor layer (40) on the surface of the substrate (10);
s20, setting the growth temperature to be 850-950 ℃, and preparing a quantum barrier layer (511) on the surface of the N-type semiconductor layer (40) far away from the gallium nitride layer (30);
s30, setting the growth temperature to 700-800 ℃, and preparing a first potential well layer (512) on the surface of the quantum barrier layer (511) far away from the N-type semiconductor layer (40);
s40, setting the growth temperature to be 750-850 ℃, preparing a first barrier layer (521) on the surface of the first potential well layer (512) far away from the quantum barrier layer (511), preparing a second potential well layer (522) on the surface of the first barrier layer (521) far away from the first potential well layer (512), and forming a second quantum well structure (520) by the first barrier layer (521) and the second potential well layer (522); and
s50, according to the step S40, the second quantum well structure (520) is prepared on the surface, away from the first barrier layer (521), of the second potential well layer (522) in a circulating mode for 3-6 times.
7. The method of claim 6, wherein said quantum barrier layer (511) and said first well layer (512) form a first quantum well structure (510), said first quantum well structure (510) and a plurality of said second quantum well structures (520) form a sub-layer structure (501);
the preparation method of the light-emitting diode further comprises the following steps:
s60, preparing 8-15 layers of the sublayer structure (501) on the surface of the N-type semiconductor layer (40) far away from the gallium nitride layer (30) according to the steps S20-S50;
wherein a plurality of the sub-layer structures (501) form a multiple quantum well layer (50).
8. The method of claim 7, further comprising:
s70, setting the growth temperature to be 900-1000 ℃, and preparing the magnesium-doped high-temperature P-type semiconductor layer (60) on the surface of the multiple quantum well layer (50) far away from the N-type semiconductor layer (40).
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