CN110780501B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN110780501B CN110780501B CN201911207045.5A CN201911207045A CN110780501B CN 110780501 B CN110780501 B CN 110780501B CN 201911207045 A CN201911207045 A CN 201911207045A CN 110780501 B CN110780501 B CN 110780501B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
Abstract
The embodiment of the invention provides a display panel and a display device. The display panel comprises a module reserved area, a first non-display area and a display area, wherein the first non-display area surrounds the module reserved area, and the display area surrounds the first non-display area; the first non-display area comprises a first winding part and a second winding part which are adjacent, wherein the first winding part and the second winding part are internally provided with: one is electrically connected to the gate signal line, and the other is electrically connected to the emission control signal line. Through setting up two metal levels respectively with adjacent part in first wire winding portion and the second wire winding portion, and the insulating layer thickness of interval between these two metal levels is thicker to can effectively reduce the coupling capacitance between first wire winding portion and the second wire winding portion, avoid coupling capacitance to influence and show.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a display device.
Background
In the conventional display device technology, the display panel is mainly divided into two mainstream technologies, namely a liquid crystal display panel and an organic light emitting display panel. The liquid crystal display panel forms an electric field capable of controlling the deflection of liquid crystal molecules by applying voltage on the pixel electrode and the common electrode, and further controls the transmission of light rays to realize the display function of the liquid crystal display panel; the organic self-luminous display panel adopts an organic electroluminescent material, and when current passes through the organic electroluminescent material, the luminescent material can emit light, so that the display function of the organic electroluminescent display panel is realized.
With the application of display technology in intelligent wearing and other portable electronic devices, smooth use experience of users is continuously pursued in the aspect of electronic product design, meanwhile, better visual experience is also pursued more and more, and high screen occupation ratio becomes the focus of current research. In the current scheme, through holes can be formed in the display panel according to the shape of a device so as to improve the screen occupation ratio, but in the scheme, because the through holes are formed in the display area, the signal lines on two sides of the display area need to be electrically connected through the winding wires arranged around the through holes, the winding wires around the through holes are dense, the coupling capacitance between the winding wires is large, and the display of the display panel is influenced.
Disclosure of Invention
The embodiment of the invention provides a display panel and a display device, wherein two metal layers are respectively arranged at adjacent parts in a first winding part and a second winding part, and the thickness of an insulating layer at an interval between the two metal layers is thicker, so that the coupling capacitance between the first winding part and the second winding part can be effectively reduced, and the influence of the coupling capacitance on display is avoided.
In a first aspect, the present invention provides a display panel, which includes a module reserved area, a first non-display area and a display area, wherein the first non-display area surrounds the module reserved area, and the display area surrounds the first non-display area;
the display area includes a plurality of scanning signal lines extending in a first direction and arranged in a second direction, the first direction and the second direction being crossed, the scanning signal lines including a first scanning signal line and a second scanning signal line, of which: one is a gate signal line, and the other is a light emission control signal line;
the first non-display area comprises a plurality of winding parts which semi-surround the module reserved area, the plurality of winding parts comprise a first winding part and a second winding part which are adjacent, two first scanning signal lines positioned on two sides of the module reserved area in the first direction are electrically connected through the first winding part, and two second scanning signal lines positioned on two sides of the module reserved area in the first direction are electrically connected through the second winding part;
the display panel comprises a substrate and a pixel circuit positioned on one side of the substrate, wherein the pixel circuit comprises a capacitor and at least one transistor;
the display panel comprises a grid metal layer and a capacitor metal layer, wherein the capacitor metal layer is positioned on one side of the grid metal layer, which is far away from the substrate; the grid of the transistor is positioned on the grid metal layer, one polar plate of the capacitor is positioned on the capacitor metal layer, and the thickness of the insulating layer between the grid metal layer and the capacitor metal layer is d 1;
the display panel also comprises a third metal layer positioned on one side of the capacitor metal layer far away from the substrate base plate, the thickness of an insulating layer between the third metal layer and the capacitor metal layer is d2, and d1< d 2;
the first winding part is at least partially located on the gate metal layer or the capacitor metal layer, the second winding part is at least partially located on the third metal layer, and adjacent parts of the first winding part and the second winding part are located on different layers along the second direction.
Based on the same inventive concept, in a second aspect, an embodiment of the present invention further provides a display device, including the display panel provided in any embodiment of the present invention.
The display panel and the display device provided by the embodiment of the invention have the following beneficial effects:
in the display panel provided in the embodiment of the present invention, the first winding portion and the second winding portion are adjacent to each other, the first winding portion is disposed at least partially on the gate metal layer or the capacitor metal layer, the second winding portion is disposed at least partially on the third metal layer, and adjacent portions of the first winding portion and the second winding portion are located on different layers, where: one is electrically connected to the gate scanning line, and the other is electrically connected to the light emission control signal line. The thickness of the insulating layer between the adjacent parts of the first winding part and the second winding part can be ensured to be larger than d1, namely, the coupling capacitance between the adjacent first winding part and the second winding part is smaller than the coupling capacitance generated by respectively arranging the two adjacent windings on the gate metal layer and the capacitor metal layer. According to the embodiment of the invention, the arrangement of the winding part film layer corresponding to the grid scanning line and the light-emitting control signal line in the first non-display area is adjusted, so that the coupling capacitance between the first winding part and the second winding part is reduced, the influence of the coupling capacitance on display is improved, and the display quality of the display panel is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a partial schematic view of a display panel according to an embodiment of the invention;
fig. 2 is a schematic structural diagram of an alternative implementation of a pixel circuit in a display panel according to an embodiment of the present invention;
fig. 3 is a diagram of a film structure of an alternative embodiment of a display panel according to an embodiment of the present invention;
fig. 4 is a film structure diagram of another alternative embodiment of a display panel according to an embodiment of the present invention;
FIG. 5 is a timing diagram of gate scanning signal lines and emission control signals;
FIG. 6 is a partial schematic view of another alternative embodiment of a display panel according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a film structure of another alternative embodiment of a display panel according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a film structure of another alternative embodiment of a display panel according to an embodiment of the present invention;
FIG. 9 is a partial schematic view of another alternative embodiment of a display panel according to an embodiment of the invention;
FIG. 10 is a schematic cross-sectional view of an alternative embodiment taken at line A-A' of FIG. 9;
FIG. 11 is a schematic diagram of another alternative embodiment of a display panel according to an embodiment of the present invention;
FIG. 12 is a schematic cross-sectional view of an alternative embodiment taken at line B-B' of FIG. 1;
FIG. 13 is a schematic cross-sectional view taken at line C-C' of FIG. 1;
FIG. 14 is a schematic cross-sectional view of another alternative embodiment of a display panel according to an embodiment of the present invention;
fig. 15 is a schematic view of a display device according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
Fig. 1 is a partial schematic view of a display panel according to an embodiment of the present invention. Fig. 2 is a schematic structural diagram of an alternative implementation of a pixel circuit in a display panel according to an embodiment of the present invention. Fig. 3 is a film structure diagram of an alternative implementation manner of a display panel according to an embodiment of the present invention. Fig. 4 is a film structure diagram of another alternative implementation of a display panel according to an embodiment of the present invention.
As shown in fig. 1, the display panel includes a module reserved area Q, a first non-display area BA1 and a display area AA, the first non-display area BA1 surrounds the module reserved area Q, and the display area AA surrounds the first non-display area BA 1; wherein, module reservation district Q can be the through-hole on the display panel, when assembling into display device, sets up image acquisition device and/or sound generating mechanism among the display device and is located module reservation district Q. It should be noted that, in the present invention, the shape of the module reserved area Q is not limited, and the module reserved area Q may be a circle, a triangle, or a square, and may be selected according to specific design requirements in practice, which is only schematically shown in fig. 1. Because module reservation district Q is located the inside of display area, first non-display area BA1 surrounds module reservation district Q, can set up corresponding walking line in first non-display area BA1 to guarantee the demonstration that the display area around module reservation district Q can be normal.
The display area AA includes a plurality of scanning signal lines S extending in a first direction x and arranged in a second direction y, the first direction x and the second direction y intersecting, the scanning signal lines S including a first scanning signal line S1 and a second scanning signal line S2, of the first scanning signal line S1 and the second scanning signal line S2: one is a gate signal line, and the other is a light emission control signal line.
The first non-display area BA1 includes a plurality of winding portions R half-surrounding the module reserved area Q, the plurality of winding portions R includes adjacent first and second winding portions R1 and R2, two first scanning signal lines S1 positioned at both sides of the module reserved area Q in the first direction x are electrically connected through the first winding portion R1, and two second scanning signal lines S2 positioned at both sides of the module reserved area Q in the first direction x are electrically connected through the second winding portion R2;
the display panel comprises a substrate and a pixel circuit positioned on one side of the substrate, wherein the pixel circuit comprises a capacitor and at least one transistor; the structure of the pixel circuit can refer to the schematic in fig. 2, as shown in fig. 2, the pixel circuit shows 7 transistors (T1 to T7) and 1 capacitor C, and further shows a gate signal input terminal (Scan1 and Scan2) and a light-emitting signal input terminal Emit, a Data signal terminal Data, a positive electrode power source terminal PVDD, a negative electrode power source terminal PVEE, and a reset signal terminal Ref. When the display panel is driven to display, the grid signal line is electrically connected with the grid signal input end and is used for inputting grid scanning signals to the grid signal input end when the pixel display is driven, the grid scanning line in the display panel is correspondingly electrically connected with the shift register in the panel, and voltage signals are provided for the grid scanning line through the shift register. The gate signal input terminal Scan1 and the gate signal input terminal Scan2 are respectively connected to a gate Scan line, and the two gate Scan lines are respectively connected to one of the two cascaded shift registers; the light-emitting control signal line is electrically connected with the light-emitting signal input end and is used for inputting a light-emitting control signal to the light-emitting signal input end when the pixel is driven to display.
As shown in fig. 3, the display panel includes a gate metal layer M1 and a capacitor metal layer M2, the capacitor metal layer M2 is located on a side of the gate metal layer M1 away from the substrate 101; the gate g of the transistor T is located in the gate metal layer M1, and the active layer w of the transistor T is also shown, wherein the transistor is only illustrated in a top-gate configuration. The transistor T also comprises a source electrode s and a drain electrode d, and the source electrode s and the drain electrode d are positioned on the source drain metal layer. One plate B1 of the capacitor C is positioned on the capacitor metal layer M2, the other plate B2 is positioned on the gate metal layer M1, and the thickness of an insulating layer J1 between the gate metal layer M1 and the capacitor metal layer M2 is d 1. The display panel further includes a third metal layer M3 located on the side of the capacitor metal layer M2 away from the substrate 101, in the embodiment of the present invention, the third metal layer is located on the side of the capacitor metal layer M2 away from the substrate 101, and the third metal layer may be a source-drain metal layer, or may be a metal layer on the source-drain metal layer. Fig. 3 only shows that the third metal layer M3 is used as a source-drain metal layer, the source s and the drain d are located in the third metal layer M3, an insulating layer J2 is arranged between the source-drain metal layer and the capacitor metal layer M2, the thickness of the insulating layer J2 is d2, that is, the thickness of the insulating layer between the third metal layer M3 and the capacitor metal layer M2 is d2, and d1< d 2.
Optionally, the third metal layer may be a metal layer on the source-drain metal layer. As shown in fig. 4, the display panel includes a source-drain metal layer, the source s and the drain d of the transistor T are located in the source-drain metal layer, and the third metal layer M3 is located on a side of the source-drain metal layer away from the capacitor metal layer M2. An insulating layer J2 is arranged between the source drain metal layer and the capacitor metal layer M2, and an insulating layer J3 is arranged between the source drain metal layer and the third metal layer M3, namely, the insulating layer between the third metal layer M3 and the capacitor metal layer M2 comprises an insulating layer J2 and an insulating layer J3, and the thickness of the insulating layer between the third metal layer M3 and the capacitor metal layer M2 is d2 which is the sum of the thicknesses of the insulating layer J2 and the insulating layer J3. The third metal layer M3 labeled in FIG. 4 is only for the purpose of illustrating the relative positions of the third metal layer M2 and the capacitor metal layer M2.
In the display panel provided in the embodiment of the invention, the first winding part R1 is at least partially located on the gate metal layer M1 or the capacitor metal layer M2, the second winding part R2 is at least partially located on the third metal layer M3, and adjacent portions of the first winding part R1 and the second winding part R2 in the second direction y are located on different layers. The positions of the film layers of the display panel, where the first winding portion R1 and the second winding portion R2 are located, include, but are not limited to, the following embodiments.
In one embodiment, the first winding parts R1 are entirely located in the gate metal layer M1, and the second winding parts are entirely located in the third metal layer M3.
In one embodiment, the first winding portion R1 is entirely located on the capacitor metal layer M2, and the second winding portion is entirely located on the third metal layer M3.
In one embodiment, a portion of the first winding part R1 is located at the gate metal layer M1, a portion of the second winding part is located at the third metal layer M3, and adjacent portions of the first and second winding parts R1 and R2 are located at different layers.
In one embodiment, a portion of the first winding portion R1 is located at the capacitor metal layer M2, a portion of the second winding portion is located at the third metal layer M3, and adjacent portions of the first and second winding portions R1 and R2 are located at different layers.
Optionally, in the display panel provided by the embodiment of the present invention, the gate metal layer M1 and the capacitor metal layer M2 may be made of the same material. In general, a wiring area at a position of a fan-out area of a display panel, that is, a lower bezel of the panel, includes a plurality of signal lines led out from a driver chip and connected to the display area in the wiring area. Can set up these signal lines and adopt two-layer metal level of grid metal level M1 and electric capacity metal level M2 to make, set up two adjacent signal lines and be located grid metal level M1 and electric capacity metal level M2 respectively, can be favorable to reducing the spacing distance between two adjacent signal lines, thereby reduce the space that the fan-out district took, set up simultaneously that grid metal level M1 and electric capacity metal level M2 can adopt the same material preparation, be favorable to reducing the resistance difference between the signal line in the fan-out district.
Therefore, when the method is applied to the scheme of arranging the module reserved area in the display area, the winding needs to be arranged around the module reserved area to realize the electric connection between the scanning signal lines at the two sides of the module reserved area. The winding arranged around the module reserved area and the module reserved area jointly form a non-display area inside the display area. In order to reduce the area of the non-display area and improve the display effect, a plurality of winding wires extending along the same direction are made of two layers of metal, so that the spacing distance between two adjacent winding wires can be reduced, the space occupied by the plurality of winding wires is reduced, and the size of the non-display area inside the display area is reduced. In normal display area, scanning signal line is located the grid metal level, uses in the scheme that scanning signal line carries out the wire winding, adopts grid metal level and electric capacity metal level with scanning signal line around the wire winding that the module reservation set up (also wire winding portion in this application), totally two-layer metal comes the preparation to reduce the space that the wire winding occupied.
Two polar plates of a pixel capacitor in a display panel are usually arranged on a grid metal layer and a capacitor metal layer respectively, then the thickness of an insulating layer between the grid metal layer and the capacitor metal layer is thinner, and the area of the two polar plates does not need to be too large, so that the capacitance value between the two polar plates can be ensured to be large enough, and the requirement of a pixel circuit on the pixel capacitor is met. According to the law of capacitance, in order to ensure a certain capacitance value, when the thickness of the insulating layer between the gate metal layer and the capacitance metal layer is increased, the areas of the two electrode plates also need to be correspondingly increased, which may cause the space occupied by the pixel circuit to be enlarged, which is not favorable for the wiring design in the panel. The wire winding of the scanning signal line around the module reserved area is made of two layers of metal, namely a gate metal layer and a capacitor metal layer, and because the scanning signal line extending in the same direction comprises the gate scanning line and the light-emitting control signal line, in the process of driving the display panel to display, as shown in fig. 5, fig. 5 is a timing diagram of the gate scanning signal line and the light-emitting control signal. Scanning the signal lines S in the display arean、Sn+1、Sn+2、Sn+3Arranged in sequence in a second direction y, wherein SnAnd Sn+2For scanning signal lines for gates, Sn+1And Sn+3For the light emitting control signal line, the timing diagram shows that the adjacent gate scanning line and the light emitting control signal line are also adjacent in the scanning timing sequence, so that a larger coupling capacitance is easily caused when the distance between the adjacent gate scanning line and the light emitting control signal line is short, and the gate scanning line and the light emitting control signal line usually provide fixed pulse signals, so that the timing sequence of the gate scanning line and the light emitting control signal line is fixed, and the driving chip adjusts the timing sequence to supplement the influence of the coupling capacitance on the signals on the gate scanning line and the light emitting control signal line respectively, so that the design difficulty is very large. If the wiring for transmitting the grid scanning signal and the wiring for transmitting the light-emitting control signal are respectively arranged on the grid metal layer and the capacitance metal layer, the wiring for transmitting the grid scanning signal and the wiring for transmitting the light-emitting control signal are arranged on the grid metal layer and the capacitance metal layerA large coupling capacitance is generated between the windings of the light emission control signal, which affects the light emission of the pixel and may cause abnormal display.
Based on the above analysis, in the embodiment of the present invention, the winding (the winding portion of the present application) around the reserved area of the module is designed to reduce the coupling capacitance between two adjacent winding portions. In the display panel provided in the embodiment of the present invention, the first winding portion and the second winding portion are adjacent to each other, at least a part of the first winding portion is disposed on the gate metal layer or the capacitor metal layer, at least a part of the second winding portion is disposed on the third metal layer, and adjacent portions of the first winding portion and the second winding portion are disposed on different layers, where: one is electrically connected to the gate scanning line, and the other is electrically connected to the light emission control signal line. The thickness of the insulating layer between the adjacent parts of the first winding part and the second winding part can be ensured to be larger than d1, namely, the coupling capacitance between the adjacent first winding part and the second winding part is smaller than the coupling capacitance generated by respectively arranging the two adjacent windings on the gate metal layer and the capacitor metal layer. According to the embodiment of the invention, the film layer arrangement of the winding part corresponding to the grid scanning line and the light-emitting control signal line in the first non-display area is adjusted, so that the coupling capacitance between the first winding part and the second winding part is reduced under the condition of not increasing additional film layers, and the influence of the coupling capacitance on display is improved.
As illustrated in fig. 3, when the third metal layer M3 is a source-drain metal layer, the source s and the drain d of the transistor are located in the source-drain metal layer, and the data line in the display region is also located in the source-drain metal layer. The scan signal line in the display region is usually located in the gate metal layer M1, and the reset signal line in the display region is usually located in the capacitor metal layer M2, where the reset signal line is electrically connected to the reset signal terminal Ref in the pixel circuit, and the reset signal line supplies a reset signal to the pixel circuit when the pixel is driven to emit light. That is, metal lines are disposed between the metal layers, and in order to reduce the coupling capacitance between the metal lines between different layers, the thickness of the insulating layer between the source/drain metal layer (the third metal layer M3 in this embodiment) and the capacitor metal layer M2 is generally greater than d 1. The first winding part is at least partially arranged on the grid metal layer or the capacitor metal layer, the second winding part is at least partially arranged on the third metal layer, and the adjacent parts in the first winding part and the second winding part are positioned on different layers, so that the reduction of the coupling capacitance between the first winding part and the second winding part is facilitated, and the influence of the coupling capacitance on display is improved.
As illustrated in fig. 4, when the third metal layer M3 is located on the side of the source-drain metal layer away from the capacitor metal layer M2, the thickness of the insulating layer J2 between the source-drain metal layer and the capacitor metal layer M2 is greater than d1, the thickness d2 between the third metal layer M3 and the capacitor metal layer M2 is the sum of the thickness of the insulating layer J2 and the thickness of the insulating layer J3, and d2 is greater than d1, which is the same as the principle explained in the embodiment of fig. 3. The first winding part is at least partially arranged on the gate metal layer or the capacitor metal layer, the second winding part is at least partially arranged on the third metal layer, and the adjacent parts of the first winding part and the second winding part are positioned on different layers, so that the coupling capacitance between the first winding part and the second winding part is reduced, and the influence of the coupling capacitance on display is improved.
In the display panel according to the embodiment of the present invention, in the first scanning signal line and the second scanning signal line respectively electrically connected to the first winding portion and the second winding portion: one is a gate signal line, and the other is a light emission control signal line. Optionally, in the display area AA, the gate signal line and the light-emitting control signal line are both located in the gate metal layer M1. When the gate signal line or the wiring portion connected to the light emission control signal line in the first non-display region is connected to the gate signal line, and when the portion where the wiring portion is connected to the scan signal line is not located in the gate metal layer, a corresponding via hole needs to be formed to electrically connect the wiring portion to the scan signal line. Taking the connection between the second scanning signal line and the second winding portion as an example, when the second winding portion is entirely located in the third metal layer, a via hole needs to be formed in the insulating layer between the third metal layer and the gate metal layer, so as to achieve the electrical connection between the second winding portion and the second scanning signal line.
Further, as shown in fig. 6, fig. 6 is a partial schematic view of another alternative implementation of the display panel according to the embodiment of the present invention. The display area AA includes a plurality of data signal lines D extending in the second direction y and arranged in the first direction x, the data signal lines D including a first data signal line D1; the plurality of winding parts include a third winding part R3, and the two first data signal lines D1 located at both sides of the module reserved area Q in the second direction y are electrically connected through the third winding part R3; the first winding portion R1 and at least a part of the third winding portion R3: one located at the gate metal layer M1 and the other located at the capacitor metal layer M2. This embodiment includes the following embodiments: the first winding part R1 is positioned on the gate metal layer M1, and at least part of the third winding part R3 is positioned on the capacitor metal layer M2; at least part of the third winding part R3 is positioned on the gate metal layer M1, and the first winding part R1 is positioned on the capacitor metal layer M2; the first winding part R1 is located on the gate metal layer M1, and all the third winding parts R3 are located on the capacitor metal layer M2; the first winding portion R1 is located on the capacitor metal layer M2, and all the third winding portions are located on the gate metal layer M1.
In this embodiment, the relative positions of the gate metal layer M1, the capacitor metal layer M2 and the third metal layer M3 can be referred to the description of fig. 3 or fig. 4. The first winding part is at least partially arranged on the grid metal layer or the capacitor metal layer, the second winding part is at least partially arranged on the third metal layer, and the adjacent parts in the first winding part and the second winding part are positioned on different layers, so that the reduction of the coupling capacitance between the first winding part and the second winding part is facilitated, and the influence of the coupling capacitance on display is improved. Furthermore, through the wire winding portion of connecting the data signal line and the wire winding portion of connecting the scanning signal line, reasonable rete design is carried out, when setting up the third wire winding portion of connecting the data line in first non-display area, set up the rete that third wire winding portion and first wire winding portion and second wire winding portion all are located the difference, can guarantee the third wire winding portion with the position of first wire winding portion and second wire winding portion overlapping (can refer to and have illustrated regional G in figure 6), can insulate the overlap, guarantee the normal transmission of signal.
In one embodiment, the first winding portion is entirely located on the gate metal layer, the second winding portion is entirely located on the third metal layer, and the third winding portion is located on the capacitor metal layer. Furthermore, all the wire winding parts electrically connected with the data signal wires correspondingly can be arranged on the capacitor metal layer, and the same metal layer is adopted for manufacturing, so that the resistance difference on the data signal wires can be reduced. Under the general condition, the data signal line in the display area is positioned on the source drain metal layer, a through hole can be manufactured on the insulating layer between the capacitance metal layer and the source drain metal layer so as to realize the electric connection between the data signal line and the winding part, and the through hole is arranged in the first non-display area so as to ensure that the display effect of the display area is not influenced.
Further, as shown in fig. 6 with continued reference to the above description, the data signal lines further include a second data signal line D2, the plurality of winding portions include a fourth winding portion R4 adjacent to the third winding portion R3, and two second data signal lines D2 located at both sides of the module reserved area Q in the second direction y are electrically connected through the fourth winding portion R4. Portions of the third and fourth winding portions R3 and R4, which are disposed in the embodiment of the present invention and adjacent in the first direction x, are located at different layers. The display panel also comprises a fourth metal layer positioned on one side of the capacitor metal layer far away from the substrate base plate, the thickness of an insulating layer between the fourth metal layer and the capacitor metal layer is d3, and d1< d 3; at least part of the fourth winding part is positioned on the fourth metal layer. In this embodiment, the third winding portion and the fourth winding portion are each a winding portion electrically connected to the data signal line, and by providing that at least a part of a fourth winding portion adjacent to the third winding portion is located in the fourth metal layer, the parts adjacent to the fourth winding portion and the third winding portion are located in different layers. The third winding part adjacent to the part of the fourth winding part located in the fourth metal layer may be located in the third metal layer, or in the gate metal layer, or in the capacitor metal layer, and no matter which film layer the part of the third winding part is located in, the thickness of the insulating layer of the adjacent part of the third winding part and the fourth winding part is ensured to be greater than d1, and then the coupling capacitance between the adjacent third winding part and the fourth winding part is small. The embodiment can realize that the coupling capacitance between the adjacent first winding part and the second winding part of the first non-display area winding is smaller, the coupling capacitance between the adjacent third winding part and the fourth winding part is smaller, and the influence of the coupling capacitance on display can be improved.
In one embodiment, the first winding portion is located on the gate metal layer, the second winding portion is located on the third metal layer, the third winding portion is located on the capacitor metal layer, and the fourth winding portion is located on the fourth metal layer. Optionally, the first winding portion is electrically connected to a gate scanning line, the second winding portion is electrically connected to a light emission control signal line, all the winding portions electrically connected to the gate scanning line may be disposed on the gate metal layer, and all the winding portions electrically connected to the light emission control signal line may be disposed on the third metal layer.
In another embodiment, the first winding portion is located on the capacitor metal layer, the second winding portion is located on the third metal layer, the third winding portion is located on the gate metal layer, and the fourth winding portion is located on the fourth metal layer. Optionally, the first winding portion is electrically connected to a light emitting control signal line, the second winding portion is electrically connected to a gate scanning line, all the winding portions electrically connected to the light emitting control signal line may be disposed on the gate metal layer, and all the winding portions electrically connected to the gate scanning line may be disposed on the third metal layer.
Specifically, in an embodiment, the third metal layer is a source-drain metal layer, and the fourth metal layer is located on a side of the third metal layer away from the capacitor metal layer. Referring to fig. 7, fig. 7 is a schematic diagram of a film structure of another alternative implementation of a display panel according to an embodiment of the present invention. The fourth metal layer M4 is located on the side of the third metal layer M3 away from the capacitor metal layer M2, the third metal layer M3 is a source-drain metal layer, and the source s and the drain d of the transistor are located on the third metal layer M3. At least part of the fourth winding part R4 is located on the fourth metal layer M4. An insulating layer J2 is arranged between the source drain metal layer (namely the third metal layer M3) and the capacitor metal layer M2, the thickness of the insulating layer J2 is d2, and d1< d 2. An insulating layer J4 is disposed between the fourth metal layer M4 and the third metal layer M3, and the insulating layer between the fourth metal layer M4 and the capacitor metal layer M2 includes an insulating layer J2 and an insulating layer J4, so d3 is the sum of the thickness of the insulating layer J2 and the thickness of the insulating layer J4, and d2< d 3. Since d1< d2, d1< d 3.
Optionally, the insulating layer J4 between the fourth metal layer and the third metal layer (i.e., the source-drain metal layer) may be an organic insulating layer, and since the organic insulating layer and the inorganic insulating layer are manufactured by different processes, the thickness of the organic insulating layer is usually much greater than that of the inorganic insulating layer. The organic insulating layer can be used in a bendable display panel, part of the inorganic insulating layer in a bending area can be excavated, the organic insulating layer is used for filling grooves of the inorganic insulating layer, the flexibility of the organic material is greater than that of the inorganic material, and the organic insulating layer made of the organic material can improve the bending performance of the bending area.
Specifically, in another embodiment, the fourth metal layer is located between the third metal layer and the capacitor metal layer, and optionally, the fourth metal layer is a source-drain metal layer. With continued reference to fig. 8, fig. 8 is a schematic diagram of a film structure of another alternative implementation of the display panel according to the embodiment of the present invention. The fourth metal layer M4 is located between the third metal layer M3 and the capacitor metal layer M2. The fourth metal layer M4 is a source drain metal layer, the source s and the drain d of the transistor are located in the fourth metal layer M4, and at least a portion of the fourth winding portion R4 is located in the fourth metal layer M4. An insulating layer J2 is arranged between the source-drain metal layer (namely the fourth metal layer M4) and the capacitor metal layer M2, the thickness of the insulating layer J2 is d3, d1< d3, in the embodiment, the insulating layer J3 is arranged between the third metal layer M3 and the source-drain metal layer, and the insulating layer between the third metal layer M3 and the capacitor metal layer M2 comprises an insulating layer J2 and an insulating layer J3. In this embodiment, d1< d2< d 3. Optionally, in this embodiment, the insulating layer J3 between the third metal layer and the source-drain metal layer (i.e., the fourth metal layer M4) may be an organic insulating layer, which can improve the bending performance of the bending region of the bendable display panel.
Further, in an embodiment, fig. 9 is a partial schematic view of another alternative implementation of the display panel according to the embodiment of the present invention. Fig. 10 is a schematic cross-sectional view of an alternative embodiment taken at line a-a' of fig. 9. As shown in fig. 9, the third winding portion R3 includes a first sub-portion Z1 and a second sub-portion Z2 connected in series, and the fourth winding portion R4 includes a third sub-portion Z3 and a fourth sub-portion Z4 connected in series, and the first sub-portion Z1 is adjacent to the third sub-portion Z3, and the second sub-portion Z2 is adjacent to the fourth sub-portion Z4 in the first direction x.
As shown in fig. 10, the first sub-portion Z1 and the fourth sub-portion Z4 are located on the gate metal layer M1, and the second sub-portion Z2 and the third sub-portion Z3 are located on the fourth metal layer M4. The first sub-portion Z1 and the second sub-portion Z2 are connected by a via O1, and the third sub-portion Z3 and the fourth sub-portion Z4 are connected by a via O2. In this embodiment, the fourth metal layer M4 is shown to be located on the side of the third metal layer M3 away from the capacitor metal layer M2. The third metal layer M3 is illustrated as a source drain metal layer. In this embodiment, it is further provided that the third winding portion and the fourth winding portion each include two sub-portions connected in series, and adjacent portions of the two winding portions are located on different film layers, and non-adjacent portions are located on the same film layer, so that a difference in resistance between the third winding portion and the fourth winding portion can be reduced, thereby reducing a difference in voltage drop across the data signal line electrically connected to the third winding portion and the fourth winding portion, respectively.
In another embodiment, the first and fourth sub-portions Z1 and Z4 are both located on the gate metal layer M1, and the second and third sub-portions Z2 and Z3 are both located on the fourth metal layer M4, which can achieve a reduction in the resistance difference between the third and fourth winding portions. The fourth metal layer M4 is located between the third metal layer M3 and the capacitor metal layer M2. In this embodiment, the position of the fourth metal layer M4 can be described with reference to the embodiment corresponding to fig. 8.
In another embodiment, the first and fourth sub-portions Z1 and Z4 are both located on the capacitor metal layer M2, and the second and third sub-portions Z2 and Z3 are both located on the fourth metal layer M4, so that the resistance difference between the third and fourth winding portions can be reduced. The fourth metal layer M4 is located on the side of the third metal layer M3 away from the capacitor metal layer M2. In this embodiment, the position of the fourth metal layer M4 can be described with reference to the embodiment corresponding to fig. 7.
In another embodiment, the first and fourth sub-portions Z1 and Z4 are both located on the capacitor metal layer M2, and the second and third sub-portions Z2 and Z3 are both located on the fourth metal layer M4, so that the resistance difference between the third and fourth winding portions can be reduced. The fourth metal layer M4 is located between the third metal layer M3 and the capacitor metal layer M2. In this embodiment, the position of the fourth metal layer M4 can be described with reference to the embodiment corresponding to fig. 8.
Further, fig. 11 is a schematic diagram of another alternative implementation of the display panel according to the embodiment of the present invention. As shown in fig. 11, the first winding portion R1 includes a fifth sub-portion Z5 and a sixth sub-portion Z6 connected in series, the second winding portion R2 includes a seventh sub-portion Z7 and an eighth sub-portion Z8 connected in series, and the fifth sub-portion Z5 is adjacent to the seventh sub-portion Z7, and the sixth sub-portion Z6 is adjacent to the eighth sub-portion Z8 in the second direction y; the fifth sub-portion Z5 and the eighth sub-portion Z8 are located in the same layer and in a different layer from the first sub-portion Z1; the sixth sub-portion Z6 and the seventh sub-portion Z7 are both located on the third metal layer M3, so that the fifth sub-portion Z5 and the sixth sub-portion Z6 need to be connected through a via on an insulating layer, and at the same time, the seventh sub-portion Z7 and the eighth sub-portion Z8 need to be connected through a via on a corresponding insulating layer. The first winding portion and the second winding portion respectively comprise two sub-portions connected in series, adjacent portions of the two winding portions are located on different film layers, and non-adjacent portions are located on the same film layer. According to the embodiment, the resistance difference between the third winding part and the fourth winding part can be reduced, the resistance difference between the first winding part and the second winding part can be further reduced, the thickness of the insulating layer between the adjacent parts of the first winding part and the second winding part is guaranteed to be larger than d1, the coupling capacitance between the first winding part and the second winding part is favorably reduced, and the influence of the coupling capacitance on display is improved.
Further, as shown in fig. 11, among the plurality of winding portions disposed in the first display region, a winding portion electrically connected to the scan signal line is disposed between the adjacent third winding portion R3 and the adjacent fourth winding portion R4, and a winding portion electrically connected to the data signal line is disposed between the adjacent first winding portion R1 and the adjacent second winding portion R2, which can increase the distance between the first winding portion R1 and the second winding portion R2, and can also increase the distance between the third winding portion R3 and the fourth winding portion R4. Therefore, the spacing distance between two adjacent winding parts respectively electrically connected with the grid scanning signal line and the light-emitting control signal line can be further reduced, the coupling capacitance between the two adjacent winding parts simultaneously electrically connected with the data signal line can be further reduced, and the influence of the coupling capacitance on display is obviously improved.
Optionally, when the first sub-portion Z1 is located on the gate metal layer M1, the fifth sub-portion Z5 and the eighth sub-portion Z8 are located on the capacitor metal layer M2, the second sub-portion Z2 and the third sub-portion Z3 are located on the fourth metal layer M4, and the sixth sub-portion Z6 and the seventh sub-portion Z7 are located on the third metal layer M3. The embodiment is equivalent to that the display panel at least comprises four metal layers, and the first winding part and the second winding part are respectively used for changing the wire in the two metal layers to balance the resistance difference between the first winding part and the second winding part. And the third winding portion and the fourth winding portion are respectively changed in the other two metal layers to balance the resistance difference between the third winding portion and the fourth winding portion. The film layer of the winding portion is disposed according to this principle, and detailed description of specific embodiments is omitted here. In one embodiment, FIG. 12 is a schematic cross-sectional view of an alternative embodiment taken at line B-B' of FIG. 1. As shown in fig. 12, the first winding portion R1 includes a ninth sub-portion Z9 and a tenth sub-portion Z10 connected in parallel, the ninth sub-portion Z9 is located on the gate metal layer M1, the tenth sub-portion Z10 is located on the capacitor metal layer M2, the ninth sub-portion Z9 and the tenth sub-portion Z10 need to be connected in parallel through a via O3, and optionally, a plurality of vias O3 may be provided. The second winding portion R2 is located in the third metal layer M3, and only the third metal layer M3 is shown as a source-drain metal layer. In another embodiment, the position of the third metal layer may also refer to the embodiment description corresponding to fig. 4, which is not described herein again.
The resistance value of the ninth sub-part Z9 and the tenth sub-part Z10 connected in parallel is smaller than that of either the ninth sub-part Z9 or the tenth sub-part Z10, and the first winding portion R1 includes two sub-parts connected in parallel, so that the resistance of the first winding portion R1 can be reduced, and the difference in resistance values between the first winding portion R1 and the second winding portion R2 can be balanced.
In one embodiment, with continued reference to fig. 1, the scan signal lines further include a third scan signal line S3; the winding part further comprises a fifth winding part R5, and two third scanning signal lines S3 positioned at two sides of the module reserved area Q in the first direction x are electrically connected through the fifth winding part R5; fig. 13 is a schematic cross-sectional view taken along a tangent line C-C' in fig. 1, and as shown in fig. 13, the first winding portion R1 includes a ninth sub-portion Z9 and a tenth sub-portion Z10 connected in parallel, the ninth sub-portion Z9 is located on the gate metal layer M1, and the tenth sub-portion Z10 is located on the capacitor metal layer M2. The second winding parts R2 are all located on the third metal layer M3; the display panel also comprises a fourth metal layer M4 positioned on the side of the capacitor metal layer M2 far away from the substrate base plate 101, the thickness of an insulating layer between the fourth metal layer M4 and the capacitor metal layer M2 is d3, and d1< d 3; the fifth winding part is located at the fourth metal layer M4. FIG. 13 is only a schematic illustration of the fourth metal layer M4 being located on the side of the third metal layer M3 away from the capacitor metal layer M2. Optionally, the third metal layer M3 is a source-drain metal layer. The description of the position of the film layer and the thickness of the insulating layer between two adjacent metal layers can be understood with reference to the embodiment corresponding to fig. 7.
In the display panel provided in this embodiment, the winding portions electrically connected to the scanning signal lines include a first winding portion, a second winding portion, and a third winding portion, where the second winding portion and the third winding portion are respectively located in the third metal layer and the fourth metal layer, and optionally, the third metal layer and the fourth metal layer may be made of the same material. The first winding portion includes two sub-portions connected in parallel, and after the two sub-portions are connected in parallel, the resistance of the first winding portion can be reduced, so that the difference in resistance among the first winding portion, the second winding portion, and the third winding portion can be reduced. Simultaneously set up three kinds of wire winding portions that are connected with scanning signal line electricity in first non-display area, with wire winding portion dispersion setting in a plurality of metal levels, can further reduce the space that total wire winding portion occupied, be favorable to the narrowing of first non-display area. Meanwhile, the thickness of the insulating layer between the adjacent parts of the adjacent first winding part and the adjacent second winding part is larger than d1, so that the coupling capacitance between the first winding part and the second winding part is reduced, and the influence of the coupling capacitance on display is improved.
Optionally, the fourth metal layer M4 may also be located between the third metal layer M3 and the capacitor metal layer M, and the film position relationship of the metal layers and the thickness of the insulating layer between two adjacent metal layers in this embodiment may refer to the description above in fig. 8, which is not illustrated here.
In an embodiment, fig. 14 is a schematic cross-sectional view of another alternative implementation of the display panel according to the embodiment of the present invention. As shown in fig. 14, the first winding portion R1 includes a ninth sub-portion Z9 and a tenth sub-portion Z10 connected in parallel, and further includes an eleventh sub-portion Z11, and after being connected in parallel with the ninth sub-portion Z9 and the tenth sub-portion Z10, the first winding portion is connected in series with the eleventh sub-portion Z11; as shown in the figure, the display panel further includes a fourth metal layer M4 located on the side of the capacitor metal layer M2 away from the substrate base plate 101, the thickness of the insulating layer between the fourth metal layer M4 and the capacitor metal layer M2 is d3, and d1< d 3; fig. 14 illustrates that the fourth metal layer is located on a side of the third metal layer away from the capacitor metal layer, and the thickness of the insulating layer between the film layers in this embodiment can be understood by referring to the description of the embodiment corresponding to fig. 7, which is not repeated herein. The ninth sub-portion Z9 is located on the fourth metal layer M4; the tenth subsection Z10 and the eleventh subsection Z11 are simultaneously located on the capacitor metal layer M2 for illustration.
Optionally, the gate metal layer and the capacitor metal layer are made of the same material, and the third metal layer and the fourth metal layer are made of the same material. The resistance of the metal line of unit length and unit width made of the gate metal layer is greater than the resistance of the metal line of unit length and unit width made of the third metal layer. In the first winding part, the ninth sub-part and the tenth sub-part are connected in parallel, the resistance after the parallel connection is smaller than that of any one of the ninth sub-part and the tenth sub-part, and then the resistance is connected with the eleventh sub-part in series to compensate a part of the resistance, so that the resistance difference between the first winding part and the second winding part is reduced.
In another embodiment, the tenth and eleventh sub-portions are located at the same time in the gate metal layer.
In another embodiment, the tenth and eleventh subsections: one is located in the gate metal layer and the other is located in the capacitor metal layer.
In one embodiment, the gate metal layer and the capacitor metal layer each comprise a metal molybdenum layer; the grid metal layer and the capacitor metal layer are made of the same material, the grid metal layer and the capacitor metal layer can be used for making signal lines which are connected with a driving chip and a display area in a panel fan-out area, two layers of metal are used for making the space occupied by wiring in the fan-out area, and meanwhile, the metal layers which are made of the same material are used for making the signal lines, so that the resistance difference between the signal lines in the fan-out area can be reduced.
In one embodiment, the third metal layer includes a first metal titanium layer, a metal aluminum layer, and a second metal titanium layer, which are sequentially stacked. The thickness of the metal aluminum layer is larger than that of the first metal titanium layer and larger than that of the second metal titanium layer, and the thickness of the third metal layer is larger than that of the gate metal layer. The resistance of the metal line per unit length and unit width made of the gate metal layer is greater than that of the metal line per unit length and unit width made of the third metal layer.
This embodiment may be combined with any of the embodiments described above. The following description will be made with reference to an embodiment corresponding to fig. 13. In the first winding part, the ninth sub-part is located on the gate metal layer, and the tenth sub-part is located on the capacitor metal layer, so that the resistances of the ninth sub-part and the tenth sub-part are both relatively large, and the resistance of the first winding part can be reduced after the ninth sub-part and the tenth sub-part are connected in parallel. In the embodiment of the invention, the second winding part is at least partially positioned on the third metal layer, so that the resistance difference between the first winding part and the second winding part can be reduced.
Further, in some alternative embodiments, the third metal layer and the fourth metal layer are made of the same material. When the display panel is manufactured, the complexity of material selection can be reduced, the third metal layer and the fourth metal layer are made of the same material, when the film layer where various winding parts are located is designed, the gate metal layer or the capacitor metal layer can be matched with any one of the third metal layer and the fourth metal layer, so that the resistance difference between the winding parts electrically connected with the scanning signal line is reduced, or the resistance difference between the winding parts electrically connected with the data signal line is reduced.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, and fig. 15 is a schematic view of the display device provided in the embodiment of the present invention, and as shown in fig. 15, the display device includes the display panel 100 provided in any embodiment of the present invention. The specific structure of the display panel 100 has been described in detail in the above embodiments, and is not described herein again. Of course, the display device shown in fig. 15 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (12)
1. A display panel is characterized by comprising a module reserved area, a first non-display area and a display area, wherein the first non-display area surrounds the module reserved area, and the display area surrounds the first non-display area;
the display region includes a plurality of scanning signal lines extending in a first direction and arranged in a second direction, the first direction and the second direction intersect, the scanning signal lines include a first scanning signal line and a second scanning signal line, of which: one is a gate signal line, and the other is a light emission control signal line;
the first non-display area comprises a plurality of winding parts which half surround the module reserved area, the plurality of winding parts comprise a first winding part and a second winding part which are adjacent, two first scanning signal lines which are positioned on two sides of the module reserved area in the first direction are electrically connected through the first winding part, and two second scanning signal lines which are positioned on two sides of the module reserved area in the first direction are electrically connected through the second winding part;
the display panel comprises a substrate and a pixel circuit positioned on one side of the substrate, wherein the pixel circuit comprises a capacitor and at least one transistor;
the display panel comprises a grid metal layer and a capacitor metal layer, wherein the capacitor metal layer is positioned on one side of the grid metal layer far away from the substrate; the grid electrode of the transistor is positioned on the grid metal layer, one polar plate of the capacitor is positioned on the capacitor metal layer, and the thickness of an insulating layer between the grid metal layer and the capacitor metal layer is d 1;
the display panel further comprises a third metal layer positioned on one side of the capacitor metal layer far away from the substrate base plate, the thickness of an insulating layer between the third metal layer and the capacitor metal layer is d2, and d1< d 2;
the first winding part is at least partially located in the gate metal layer or the capacitor metal layer, the second winding part is at least partially located in the third metal layer, and adjacent portions of the first winding part and the second winding part in the second direction are located in different layers.
2. The display panel according to claim 1,
the display area comprises a plurality of data signal lines which extend along the second direction and are arranged in the first direction, and the data signal lines comprise first data signal lines;
the plurality of winding parts comprise a third winding part, and two first data signal wires positioned at two sides of the module reserved area in the second direction are electrically connected through the third winding part;
the first winding portion and at least part of the third winding portion: one located at the gate metal layer and the other located at the capacitor metal layer.
3. The display panel according to claim 2, wherein the data signal lines further include a second data signal line, the plurality of winding portions include a fourth winding portion adjacent to the third winding portion, and two of the second data signal lines located on both sides of the module reserved area in the second direction are electrically connected by the fourth winding portion;
the display panel further comprises a fourth metal layer positioned on one side of the capacitor metal layer far away from the substrate base plate, the thickness of an insulating layer between the fourth metal layer and the capacitor metal layer is d3, and d1< d 3;
at least part of the fourth winding part is located in the fourth metal layer, and adjacent parts of the third winding part and the fourth winding part in the first direction are located in different layers.
4. The display panel according to claim 3,
the third winding part includes a first sub-part and a second sub-part connected in series, and the fourth winding part includes a third sub-part and a fourth sub-part connected in series, the first sub-part and the third sub-part being adjacent to each other, and the second sub-part and the fourth sub-part being adjacent to each other along the first direction;
the first sub-portion and the fourth sub-portion are located on the gate metal layer or the capacitor metal layer, and the second sub-portion and the third sub-portion are located on the fourth metal layer.
5. The display panel according to claim 4,
the first winding part includes a fifth sub-part and a sixth sub-part connected in series, the second winding part includes a seventh sub-part and an eighth sub-part connected in series, the fifth sub-part and the seventh sub-part are adjacent to each other, and the sixth sub-part and the eighth sub-part are adjacent to each other along the second direction;
the fifth sub-part and the eighth sub-part are positioned in the same layer and are positioned in different layers from the first sub-part; the sixth subsection and the seventh subsection are both located at the third metal layer.
6. The display panel according to claim 1,
the first winding portion comprises a ninth sub-portion and a tenth sub-portion which are connected in parallel, the ninth sub-portion is located on the gate metal layer, and the tenth sub-portion is located on the capacitor metal layer.
7. The display panel according to claim 6,
the second winding part is entirely positioned on the third metal layer;
the scanning signal lines further include third scanning signal lines;
the wire winding part further comprises a fifth wire winding part, and two third scanning signal wires positioned on two sides of the module reserved area in the first direction are electrically connected through the fifth wire winding part;
the display panel further comprises a fourth metal layer positioned on one side of the capacitor metal layer far away from the substrate base plate, the thickness of an insulating layer between the fourth metal layer and the capacitor metal layer is d3, and d1< d 3;
the fifth winding part is located on the fourth metal layer.
8. The display panel according to claim 1,
the first winding part comprises a ninth sub-part and a tenth sub-part which are connected in parallel, the first winding part also comprises an eleventh sub-part, and the ninth sub-part and the tenth sub-part are connected in parallel and then connected with the eleventh sub-part in series;
the display panel further comprises a fourth metal layer positioned on one side of the capacitor metal layer far away from the substrate base plate, the thickness of an insulating layer between the fourth metal layer and the capacitor metal layer is d3, and d1< d 3;
the ninth sub-portion is located on the fourth metal layer;
the tenth subsection and the eleventh subsection are simultaneously located on the gate metal layer or the capacitance metal layer; or, the tenth subsection and the eleventh subsection: one located at the gate metal layer and the other located at the capacitor metal layer.
9. The display panel according to claim 1,
the grid signal line and the light-emitting control signal line are both located on the grid metal layer.
10. The display panel according to claim 1,
the grid metal layer and the capacitance metal layer both comprise metal molybdenum layers;
the third metal layer comprises a first metal titanium layer, a metal aluminum layer and a second metal titanium layer which are sequentially stacked.
11. The display panel according to any one of claims 3 to 5 and 7 to 8,
the third metal layer and the fourth metal layer are made of the same material.
12. A display device characterized by comprising the display panel according to any one of claims 1 to 10.
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| CN111209896B (en) * | 2020-02-14 | 2022-11-22 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
| CN115136316A (en) * | 2020-02-18 | 2022-09-30 | 谷歌有限责任公司 | Reducing aperture bezel area in a display |
| CN111312074B (en) * | 2020-02-25 | 2022-10-18 | 武汉天马微电子有限公司 | Display panel and display device |
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| CN111402716B (en) * | 2020-03-27 | 2022-02-18 | 昆山国显光电有限公司 | Array substrate, display panel and display device |
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