CN110719026A - Boost converter and control method thereof - Google Patents

Boost converter and control method thereof Download PDF

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Publication number
CN110719026A
CN110719026A CN201910868385.6A CN201910868385A CN110719026A CN 110719026 A CN110719026 A CN 110719026A CN 201910868385 A CN201910868385 A CN 201910868385A CN 110719026 A CN110719026 A CN 110719026A
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time
inductor
voltage
switching tube
tube
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Chinese (zh)
Inventor
卢鹏飞
尹向阳
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Mornsun Guangzhou Science and Technology Ltd
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Mornsun Guangzhou Science and Technology Ltd
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Priority to CN201910868385.6A priority Critical patent/CN110719026A/en
Publication of CN110719026A publication Critical patent/CN110719026A/en
Priority to CN202021241956.8U priority patent/CN212660106U/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a boost converter and a control method thereof, wherein the boost converter comprises an input power supply positive electrode, an output voltage positive electrode, a power supply common ground, a switching tube Q1, a switching tube Q2, a switching tube Q3, a switching tube Q4, an inductor L1, a capacitor C1 and a capacitor C2; the source of the switch tube Q4 and one end of the capacitor C1 are connected to the positive input power supply, the drain of the switch tube Q4 and the source of the switch tube Q3 are connected to one end of the inductor L1, the source of the switch tube Q2 and the drain of the switch tube Q1 are connected to the other end of the inductor L1, the drain of the switch tube Q2 and the drain of the switch tube Q3 are connected to one end of the capacitor C2, which is positive output voltage, and the source of the switch tube Q1 and the other end of the capacitor C1 are connected to the other end of the capacitor C2, which is common ground power supply.

Description

Boost converter and control method thereof
Technical Field
The present invention relates to a switching power supply, and more particularly to a boost converter and a control method thereof.
Background
Fig. 1 is a conventional boost circuit with synchronous rectification function, when the circuit operates in continuous Mode (CCM), a MOS transistor Q1 is a hard switch, and a MOS transistor Q2 has a reverse recovery problem, which results in large loss; the circuit works in a Discontinuous Mode (DCM) only to solve the problem of reverse recovery of the MOS transistor Q2, and the MOS transistor Q1 is still a hard switch; the circuit works in a Forced Continuous mode (FCCM) to realize ZVS turn-on of the MOS transistor Q1 while avoiding reverse recovery of the MOS transistor Q2, a current waveform of the inductor L1 is shown by a dotted line in fig. 2, when a switching frequency is unchanged, a negative current becomes larger when a load current is reduced from Io1 to Io2, as shown by a solid line in fig. 2, resulting in a larger loss increase, and a conventional method is to raise the switching frequency to maintain the negative current substantially unchanged as shown by a solid line in fig. 3, but when the load current is further reduced, the switching frequency becomes higher and higher, resulting in an excessively high switching loss, a driving loss, a core loss and the like, so that the total loss does not decrease or reverse. The loss is increased when the load current is changed due to the change of the input Voltage, so that the efficiency and ZVS (Zero Voltage Switch) cannot be optimized in a compromise way under a larger input Voltage range and a larger load range, and the comprehensive efficiency is low.
Fig. 4 is a drawing of the abstract of the united states patent with application number 13/794,588 entitled "APPARATUS AND METHODS FOR controlling the inverter discharge currents MODE POWER CONVERTERS", the inventive concept of the patent is to clamp the reverse current of an inductor 240 by connecting a unidirectional switch 232 in parallel at two ends of the inductor, AND realize ZVS turn-on of a main MOS transistor Q1 under a large input voltage range AND a large load range. However, when the ratio of the output voltage to the input voltage is greater than 3, the on-time of the MOS transistor Q1 is too long, the freewheeling time of the MOS transistor Q2 is too short, the on-time of the Q1 is increased more during large current output, which makes the frequency of the booster circuit difficult to increase, the conduction loss is large due to a large peak inductor current, and the efficiency is reduced, so that the frequency increase, large current and high efficiency are difficult to realize a compromise in the booster circuit.
Disclosure of Invention
In view of the technical defects of the existing booster circuit, the improved patent circuit and the control mode thereof, the invention aims to provide a booster converter and a control mode thereof, which realize efficiency and compromise optimization of ZVS (zero voltage switching) switching-on of all MOS (metal oxide semiconductor) tubes in a larger input voltage range and a larger load range, and solve the problems that when the ratio of output voltage to input voltage is larger than 3, the switching frequency is reduced, the conduction loss is increased greatly, high frequency is difficult to realize, and compromise between large-current output and high-efficiency work is difficult to realize.
In order to achieve the purpose, the invention adopts the following technical scheme:
a boost converter comprises an input power supply positive electrode, an output voltage positive electrode, a power supply common ground, a switching tube Q1, a switching tube Q2, a switching tube Q3, a switching tube Q4, an inductor L1, a capacitor C1 and a capacitor C2; the source of the switch tube Q4 and one end of the capacitor C1 are connected to the positive input power supply, the drain of the switch tube Q4 and the source of the switch tube Q3 are connected to one end of the inductor L1, the source of the switch tube Q2 and the drain of the switch tube Q1 are connected to the other end of the inductor L1, the drain of the switch tube Q2 and the drain of the switch tube Q3 are connected to one end of the capacitor C2 to be the positive output voltage, and the source of the switch tube Q1 and the other end of the capacitor C1 are connected to the other end of the capacitor C2 to be the common ground power supply.
Preferably, the ratio of the output to the input voltage is greater than 3.
Preferably, one or all of the switching tube Q1, the switching tube Q2, the switching tube Q3 and the switching tube Q4 are MOS tubes, triodes or IGBTs.
Preferably, one or both of the switch tube Q2 and the switch tube Q4 are one-way conduction devices, a cathode of the one-way conduction device is a drain of the switch tube, and an anode of the one-way conduction device is a source of the switch tube.
Preferably, the unidirectional conducting device is a diode, a cathode of the diode is a cathode of the unidirectional conducting device, and an anode of the diode is an anode of the unidirectional conducting device.
The present invention also provides a method for controlling the boost converter, comprising:
each cycle of the converter operation sequentially includes four stages, and the voltage across the inductor L1 in each stage is as follows through the periodic on and off of the switching tube Q1, the switching tube Q2, the switching tube Q3 and the switching tube Q4:
the voltage across the first stage inductor L1 is Vo and lasts for a period of time T1;
the voltage across the second stage inductor L1 is Vin for a time T2;
the voltage across the third stage inductor L1 is Vo-Vin for a time T3;
the fourth stage inductor L1 is shorted across a voltage of 0 for a time T4.
Preferably, the lengths of time T1, time T2, time T3, and time T4 are adjustable.
Further, when the load current decreases to the first set value, the time T1, the time T2, and the time T3 decrease, the time T4 becomes longer, and the total switching period is maintained within the error range.
Further, when the load current further decreases to the second set value, the time T1 decreases to zero, and the driving of the switching tube Q2, the switching tube Q3 and the switching tube Q4 are turned off.
Further, when the load current is further reduced to a third set value, the circuit periodically or aperiodically makes all the switch tubes in the off state in one or more periods.
Preferably, the length of time T4 decreases with increasing load, decreasing input voltage, or both increasing load and decreasing input voltage, until it decreases to zero.
Preferably, at least one of the time T1, the time T2, the time T3, and the time T4 is followed by an energy cycle interval in which the current of the inductor L1 charges or discharges the output capacitance of the corresponding switching tube.
The boost converter can realize bidirectional conversion, the input and the output are interchanged, the buck output is obtained, the forward boost and the reverse buck functions are realized, and the sequence of the four stages in the reverse buck process is just opposite to the sequence of the four stages in the forward boost process.
Specifically, the control method for switching the input power supply voltage and the output voltage of the boost converter is characterized in that:
each cycle of the converter operation sequentially includes four stages, and the voltage across the inductor L1 in each stage is as follows through the periodic on and off of the switching tube Q1, the switching tube Q2, the switching tube Q3 and the switching tube Q4:
the first stage inductor L1 is shorted across voltage 0 for a time T1';
the voltage across the second stage inductor L1 is Vo-Vin for a period of time T2';
the voltage across the third stage inductor L1 is Vin for a time T3';
the voltage across the fourth stage inductor L1 is Vo and lasts for a time T4'.
Description of the meaning of the terms:
a unidirectional conducting device refers to a device in which current can only flow from the anode to the cathode, but cannot flow from the cathode to the anode;
grid electrode of the switching tube: for the MOS tube, a grid electrode is referred, for the triode, a base electrode is referred, for the IGBT, the grid electrode is referred, and other switching tubes can correspond to each other according to the knowledge of a person skilled in the art and are not listed one by one;
drain electrode of the switching tube: for the MOS tube, a drain electrode is referred, for the triode, a collector electrode is referred, for the IGBT, a drain electrode is referred, and other switching tubes can correspond to each other according to the knowledge of a person skilled in the art and are not listed one by one;
source electrode of the switching tube: for the MOS transistor, the source electrode, the emitter electrode, and the source electrode, the other switching transistors may correspond to each other according to the knowledge of those skilled in the art, and are not listed.
The working principle of the invention will be elaborated in detail in the specific embodiments, which are not repeated here, and compared with the prior art, the invention has the following beneficial effects:
1) ZVS turn-on of the switching tube Q1, the switching tube Q2, the switching tube Q3 and the switching tube Q4 is realized in a full input voltage range and a full load range, the negative current of the inductor L1 is small, and high comprehensive efficiency is realized;
2) the current IL of the inductor L1 has two excitation stages with different slopes under the same output power, so that the effective value of the inductive current is reduced, the conduction loss is reduced, the output ripple is reduced, the efficiency is improved, and the large-current output is easy to realize;
3) when the ratio of the output voltage to the input voltage is larger, the conduction of the switching tube Q3 greatly shortens the conduction time of the switching tube Q1, realizes high frequency, and reduces the inductance value and the capacitance value of the capacitor due to the high frequency, thereby reducing the size of a power supply and reducing the cost.
Drawings
FIG. 1 is a schematic diagram of a conventional boost circuit (with synchronous rectification function);
FIG. 2 is a graph comparing inductor current at the same switching frequency and different load currents;
FIG. 3 is a graph comparing the inductor current for the same negative current and different load currents;
FIG. 4 is a schematic diagram of the boost patent application No. 13/794,588;
FIG. 5 is a schematic circuit diagram of a first embodiment of the present invention;
FIG. 6 is a graph of output to input voltage ratio versus switching frequency;
FIG. 7 is a graph comparing the inductance current of the boost circuit of the present invention and the conventional boost circuit at the same switching frequency;
FIG. 8 is a graph comparing the inductance current of the boost circuit of the present invention with that of the conventional boost circuit at the same output load current;
FIG. 9 is a timing diagram illustrating a first operation of the first embodiment of the present invention;
FIG. 10 is a timing diagram illustrating a second operation of the first embodiment of the present invention;
FIG. 11 is a timing chart illustrating the operation of the first embodiment of the present invention in reverse conversion;
FIG. 12 is a schematic circuit diagram of a second embodiment of the present invention;
FIG. 13 is a circuit schematic of a third embodiment of the present invention;
fig. 14 is a schematic circuit diagram of a fourth embodiment of the present invention.
Detailed Description
First embodiment
Fig. 5 is a schematic circuit diagram of a first embodiment of the present invention. The power supply comprises an input power supply positive Vin, an output voltage positive Vo, a power supply common ground GND, a MOS tube Q1, a MOS tube Q2, a MOS tube Q3, a MOS tube Q4, an inductor L1, a capacitor C1 and a capacitor C2; the source of the MOS transistor Q4 and one end of the capacitor C1 are connected to the input power positive Vin, the drain of the MOS transistor Q4 and the source of the MOS transistor Q3 are connected to one end of the inductor L1, the source of the MOS transistor Q2 and the drain of the MOS transistor Q1 are connected to the other end of the inductor L1, the drain of the MOS transistor Q2 and the drain of the MOS transistor Q3 are connected to one end of the capacitor C2 as the output voltage positive Vo, and the source of the MOS transistor Q1 and the other end of the capacitor C1 are connected to the other end of the capacitor C2 as the power common ground GND.
Coss1, Coss2, Coss3 and Coss4 in fig. 5 are output capacitances of the MOS transistor Q1, the MOS transistor Q2, the MOS transistor Q3 and the MOS transistor Q4, respectively, and fig. 5 also shows body diodes of the MOS transistor Q1, the MOS transistor Q2, the MOS transistor Q3 and the MOS transistor Q4.
It should be noted that: it is a common practice for those skilled in the art to replace one or all of the MOS transistors Q1, Q2, Q3 and Q4 with another type of switching transistor such as a transistor or an IGBT.
Fig. 6 shows the waveform of the inductor L1 current IL and the output current Io when the conventional boost circuit is operating in FCCM mode,
Figure BDA0002201973960000041
according to the formula
Figure BDA0002201973960000042
The rising slope of the current IL isThe falling slope of the current IL is
Figure BDA0002201973960000051
The rise and fall times of the current IL are the same, corresponding to a duty cycle T1.
When in use
Figure BDA0002201973960000052
When the output current Io is constant, the rising slope of the current IL is
Figure BDA0002201973960000053
The falling slope of the current IL is
Figure BDA0002201973960000054
The inductance of inductor L1 is changed to make the falling slope of current IL sum
Figure BDA0002201973960000055
The falling slope of the current is the same, the rising time of the current IL is
Figure BDA0002201973960000056
The working period is T2, which is 2 times the rising time of the current IL, and is greater than T1.
When in use
Figure BDA0002201973960000057
When the output current Io is constant, the rising slope of the current IL is
Figure BDA0002201973960000058
The falling slope of the current IL is
Figure BDA0002201973960000059
The inductance of inductor L1 is changed to make the falling slope of current IL sumThe falling slope of the current is the same, the rising time of the current IL is
Figure BDA00022019739600000511
The working period is T3, which is 4 times the rise time of the current IL, and is greater than T2.
Therefore, when the output current Io is constant, the higher the ratio of the output voltage to the input voltage, the larger the corresponding switching period, and the lower the frequency, making it difficult to realize a higher frequency. It is also difficult to realize a high frequency even if the excitation time and the demagnetization time of the inductor L1 increase as the output current Io increases under the condition that other parameters of the circuit are not changed.
Fig. 7 is a graph comparing inductor L1 current IL at the same switching frequency for a conventional boost circuit and the present invention operating in FCCM mode, with the dashed line for the conventional boost circuit and the solid line for the present invention. Assuming that Vin is 10V, Vo is 110V, inductor L1 is 1uH, input voltage Vin of the conventional boost circuit excites inductor L1, and current of inductor L1 is excited from 0 to 10A to store energy in inductor L1 as
Figure BDA00022019739600000512
The excitation process of the inductor L1 of the booster circuit is divided into two stages, the excitation voltage of the first stage is Vo according to a formula
Figure BDA00022019739600000513
The time required for the field current to go from 0 to 10A is 0.0909 times that of the conventional booster circuit. Keeping the period unchanged, the excitation time of the second stage is 0.735 times of that of the traditional booster circuit, and since the excitation voltage is Vin, the excitation voltage is calculated according to the formula
Figure BDA00022019739600000514
The field current will increase from 10A to 17.35A, with inductor L1 storing energy during Vin field phase
Figure BDA00022019739600000515
In the same excitation time, the corresponding input voltage Vin of the invention excites the stored energy E of the inductor L12Is the stored energy E of the excitation of the inductor L1 of the traditional booster circuit1Is/are as follows
Figure BDA00022019739600000516
That means that the energy transferred to the output in the same time period is 2.01 times that of the traditional booster circuit, so that the invention can output larger current under the condition of the same circuit parameters.
Fig. 8 is different from fig. 7 in that the output current Io is the same, the analysis process is similar to fig. 7, and it can be seen from fig. 8 that the switching frequency of the boost circuit of the present invention is about 5 times that of the conventional boost circuit, and high frequency operation can be realized.
Based on the analysis of fig. 7 and 8, when the ratio of the output voltage to the input voltage is greater than 3 or the output current Io is increased, the switching frequency of the conventional boost circuit is reduced more, and high frequency is difficult to realize.
Fig. 9 shows a first operation sequence of the first embodiment for a boost converter with Vin voltage of 48V, Vo voltage of 380V, inductor L1 of 1uH and output current of 5A, which is as follows:
stage T0-T1 (first stage, duration is marked as T1): at time t0, MOS transistor Q1 is turned on, the voltage across inductor L1 is Vo, inductor L1 is excited, current IL of inductor L1 rises, and at time t1, MOS transistor Q3 is turned off;
stage t1 to t2 (energy cycle interval): after the MOS transistor Q3 is turned off, the current IL of the inductor L1 charges the output capacitor Coss3 of the MOS transistor Q3, discharges the output capacitor Coss4 of the MOS transistor Q4, the voltage at one end of the inductor L1 is reduced from Vo to Vin at time t2, and the MOS transistor Q4 realizes ZVS switching on;
stage T2-T3 (second stage, duration is marked as T2): the voltage at the two ends of the inductor L1 is Vin, the inductor L1 is excited, the current IL rises, and the MOS tube Q1 is turned off at the time t 3;
stage t3 to t4 (energy cycle interval): the current IL of the inductor L1 charges an output capacitor Coss1 of the MOS transistor Q1, discharges the output capacitor Coss2 of the MOS transistor Q2, the voltage at the other end of the inductor L1 rises from 0V to Vo at the time of t4, and the MOS transistor Q2 realizes ZVS switching-on;
T4-T5 stage (third stage, duration is recorded as T3): the voltage at the end of the inductor L1 is Vo-Vin, the inductor L1 is demagnetized, the current IL has one phase change, and the MOS tube Q4 is turned off at the time t5 from positive rotation to negative rotation;
stage t5 to t6 (energy cycle interval): the current IL of the inductor L1 charges an output capacitor Coss4 of the MOS transistor Q4, discharges the output capacitor Coss3 of the MOS transistor Q3, the voltage at one end of the inductor L1 rises from Vin to Vo at the time of t6, and the MOS transistor Q3 realizes ZVS switching-on;
T6-T7 stage (fourth stage, duration is marked as T4): the voltage at the two ends of the inductor L1 is Vo, and the voltage difference is zero, so the current IL of the inductor L1 keeps unchanged, and the MOS transistor Q2 is turned off at the time t 7;
T7-T0 + T phase (energy cycle interval): the current IL of the inductor L1 charges an output capacitor Coss2 of the MOS tube Q2, discharges the output capacitor Coss1 of the MOS tube Q1, the voltage at the other end of the inductor L1 is reduced to 0V from Vo at the time of T0+ T, and the ZVS switching-on of the MOS tube Q1 is realized;
the cycle is ended and the next duty cycle is started and the above stages are repeated.
It should be noted that the lengths of the time T1, the time T2, the time T3, and the time T4 in the control sequence are adjustable, so that the output current is changed, and different load requirements are met.
In addition, the control sequence follows an energy cycle interval after the first stage, the second stage, the third stage and the fourth stage, and the current of the inductor L1 charges or discharges the output capacitor of the corresponding switching tube in the energy cycle interval, so as to realize ZVS turn-on of the corresponding MOS tube.
In addition, the length of the period T6-T7 (i.e., the time T4) in the control sequence is reduced with the increase of the load, and finally can be reduced to zero; the length of the t 6-t 7 stage is reduced along with the reduction of the input voltage, and can be finally reduced to zero; the length of the t 6-t 7 phase is reduced along with the increase of the load and the reduction of the input voltage, and finally can be reduced to zero, so as to reduce the effective value of the current IL of the inductor L1, thereby reducing the conduction loss and realizing high-efficiency output.
Since the circuit operates periodically, T in T0+ T means the time length of one cycle.
As shown in fig. 9, after the excitation current IL of the inductor L1 is divided into two stages, i.e., t 0-t 1 and t 2-t 3, under the same output power, compared with the triangular waveform in the prior art, the peak value of the inductance current is reduced, the effective value is reduced, so the conduction loss is reduced, the efficiency is improved, and the formula shows that the conduction loss is reduced, and the efficiency is improvedObtaining L di-N dB Ae, reducing the current peak value to reduce di, and keeping the inductance L, the turn number N and the magnetic core dB unchangedThe effective sectional area Ae of the inductor magnetic core is reduced, so that the size of the magnetic core is reduced; if di is reduced under the same output ripple, the capacitance value of the required filter capacitor is reduced, and the number of the capacitors is reduced; the addition of the stage t 0-t 1 greatly shortens the total excitation time of the inductor L1, realizes high frequency, and further reduces the inductance value and the capacitance value of the capacitor due to the high frequency; the size of the power supply is reduced, and the cost is reduced.
Fig. 10 shows a second operation sequence of the first embodiment, which is a case where the length of T4 mentioned above decreases with the increase of the load, and finally decreases to zero, that is, there is no fourth stage, specifically as follows:
stage T0-T1 (first stage, duration is marked as T1): at time t0, MOS transistor Q1 is turned on, the voltage across inductor L1 is Vo, inductor L1 is excited, current IL of inductor L1 rises, and at time t1, MOS transistor Q3 is turned off;
stage t1 to t2 (energy cycle interval): after the MOS transistor Q3 is turned off, the current IL of the inductor L1 charges the output capacitor Coss3 of the MOS transistor Q3, discharges the output capacitor Coss4 of the MOS transistor Q4, the voltage at one end of the inductor L1 is reduced from Vo to Vin at time t2, and the MOS transistor Q4 realizes ZVS switching on;
stage T2-T3 (second stage, duration is marked as T2): the voltage at the two ends of the inductor L1 is Vin, the inductor L1 is excited, the current IL rises, and the MOS tube Q1 is turned off at the time t 3;
stage t3 to t4 (energy cycle interval): the current IL of the inductor L1 charges an output capacitor Coss1 of the MOS transistor Q1, discharges the output capacitor Coss2 of the MOS transistor Q2, the voltage at the other end of the inductor L1 rises from 0V to Vo at the time of t4, and the MOS transistor Q2 realizes ZVS switching-on;
T4-T5 stage (third stage, duration is marked as T3): the voltage at the two ends of the inductor L1 is Vo-Vin, the inductor L1 is demagnetized, the current IL has one phase change, and the MOS tube Q2 and the MOS tube Q4 are turned off at the same time at t5 from positive to negative, or the MOS tube Q2 of the inductor L1 is turned off in advance of the MOS tube Q4 when the current IL is zero;
stage t5 to t6 (energy cycle interval): the current IL of the inductor L1 charges the output capacitor Coss4 of the MOS transistor Q4, discharges the output capacitor Coss3 of the MOS transistor Q3, charges the output capacitor Coss2 of the MOS transistor Q2, discharges the output capacitor Coss1 of the MOS transistor Q1, the voltage at one end of the inductor L1 rises from Vin to Vo at the time of t6, and the MOS transistor Q3 realizes ZVS switching;
stage T6-T0 + T: at the time T0+ T, the voltage at the other end of the inductor L1 is reduced to 0V from Vo, and the MOS transistor Q1 realizes ZVS switching-on;
the cycle is ended and the next duty cycle is started and the above stages are repeated.
It can be seen from fig. 10 that the excitation current IL of the inductor L1 is divided into two stages, and the object of the present invention is also achieved.
The lengths of the time T1, the time T2, and the time T3 in the control sequence are also adjustable, and an energy cycle interval is followed after at least one stage in the actual implementation process, for the same reason, and are not described again.
It should be noted that, in addition to the boost converter having Vin voltage of 48V, Vo voltage of 380V, inductor L1 of 1uH, and output current of 5A, the boost converter selected with other parameters also has a similar operation timing chart, and the waveform of the excitation current IL of the inductor L1 is divided into two stages, except that the amplitudes at the respective time points are different.
In addition, the two working time sequences can be used in an application scene that the load is fully loaded, and can also be used in a second working time sequence for full loading, and the first working time sequence is switched to when the load is lighter. In practical application occasions, light load and no load occur, and the efficiency of the circuit under light load can be improved by mode switching, wherein the improvement method comprises the following steps:
1. when the load current is reduced to the first set value, the reduction of the T0-T1 stage (i.e., time T1), the reduction of the T2-T3 stage (i.e., time T2) and the reduction of the T4-T5 stage (i.e., time T3) are large, the increase of the T6-T7 stage (i.e., time T4) is large, the total switching period is changed in an error range, the smaller the error range is, the better the performance of the converter is, and ideally, the total switching period is kept unchanged.
2. When the load current is further reduced to a second set value, the effective current IL time is reduced, so that the effective value of the current IL is larger, the conduction loss is larger, the period from T0 to T1 (namely the time T1) is reduced to zero, the drive of the MOS transistor Q2 and the drive of the MOS transistor Q4 are closed, the circuit is changed into a traditional booster circuit, the effective value of the current is reduced under the same output current, and the efficiency is improved;
3. when the load is further reduced to a third set value, even no load, the circuit can periodically or aperiodically enable all the MOS tubes to be in a turn-off state in one or more periods so as to further reduce the loss and improve the efficiency.
The first embodiment can implement bidirectional conversion, interchange of input and output, obtain buck output, and implement forward boost and reverse buck functions, and a specific control timing sequence is shown in fig. 11, which is just opposite to that in fig. 9, and is not described herein again.
Second embodiment
Fig. 12 is a circuit schematic of a second embodiment of the present invention. On the basis of the first embodiment, the MOS transistor Q2 is replaced by a diode D2, the cathode of the diode D2 is connected to the drain of the MOS transistor Q3 and the output voltage positive Vo, and the anode of the diode D2 is connected to the drain of the MOS transistor Q1 and the other end of the inductor L1.
In a medium and small current output scene, the time for the diode D2 to flow current is relatively short, compared with the MOS tube scheme, the conduction loss is not increased too much, one-way floating drive is omitted, the drive loss is reduced, and the drive circuit is simplified.
The ratio of the output voltage to the input voltage of this embodiment is greater than 3, which also can achieve better implementation effect, and the working timing of the second embodiment is similar to that of the first embodiment, and is not repeated.
Third embodiment
Fig. 13 is a circuit schematic of a third embodiment of the present invention. On the basis of the first embodiment, the MOS transistor Q4 is replaced by a diode D4, the cathode of the diode D4 is connected to the source of the MOS transistor Q3 and one end of an inductor L1, and the anode of the diode D4 and one end of a capacitor C1 are connected to the input power supply positive Vin.
In a medium and small current output scene, the time for the diode D4 to flow current is relatively short, compared with the MOS tube scheme, the conduction loss is not increased too much, one-way floating drive is omitted, the drive loss is reduced, and the drive circuit is simplified.
The ratio of the output voltage to the input voltage of this embodiment is greater than 3, which also can achieve better implementation effect, and the working timing of the third embodiment is similar to that of the first embodiment, and is not repeated.
Fourth embodiment
Fig. 14 is a circuit schematic of a fourth embodiment of the present invention. On the basis of the second embodiment, the MOS transistor Q4 is replaced by a diode D4, the cathode of the diode D4 is connected to the source of the MOS transistor Q3 and one end of an inductor L1, and the anode of the diode D4 and one end of a capacitor C1 are connected to the input power supply positive Vin.
In a medium and small current output scene, the time for the diode D2 and the diode D4 to flow current is relatively short, compared with the MOS tube scheme, the conduction loss is not increased too much, two paths of floating ground driving are omitted, the driving loss is reduced, and the driving circuit is simplified.
The ratio of the output voltage to the input voltage of this embodiment is greater than 3, which also can achieve better implementation effect, and the working timing of the fourth embodiment is similar to that of the first embodiment, and is not repeated.
The above embodiments should not be construed as limiting the present invention, and the scope of the present invention should be determined by the scope of the appended claims. It will be apparent to those skilled in the art that many equivalent substitutions, modifications and alterations can be made without departing from the spirit and scope of the invention, such as fine tuning of the circuit by simple series-parallel connection of devices, etc., depending on the application, and such modifications and alterations should also be considered as the scope of the invention.

Claims (13)

1. A boost converter, characterized by: the power supply comprises an input power supply positive electrode, an output voltage positive electrode, a power supply common ground, a switching tube Q1, a switching tube Q2, a switching tube Q3, a switching tube Q4, an inductor L1, a capacitor C1 and a capacitor C2; the source of the switch tube Q4 and one end of the capacitor C1 are connected to the positive input power supply, the drain of the switch tube Q4 and the source of the switch tube Q3 are connected to one end of the inductor L1, the source of the switch tube Q2 and the drain of the switch tube Q1 are connected to the other end of the inductor L1, the drain of the switch tube Q2 and the drain of the switch tube Q3 are connected to one end of the capacitor C2 to be the positive output voltage, and the source of the switch tube Q1 and the other end of the capacitor C1 are connected to the other end of the capacitor C2 to be the common ground power supply.
2. A boost converter according to claim 1, wherein: the ratio of the output voltage to the input voltage is greater than 3.
3. A boost converter according to claim 1, wherein: one or all of the switching tube Q1, the switching tube Q2, the switching tube Q3 and the switching tube Q4 are MOS tubes, triodes or IGBTs.
4. A boost converter according to claim 1, wherein: one or both of the switch tube Q2 and the switch tube Q4 are one-way conduction devices, the cathode of the one-way conduction device is the drain electrode of the switch tube, and the anode of the one-way conduction device is the source electrode of the switch tube.
5. A boost converter according to claim 4, wherein: the unidirectional conducting device is a diode, the cathode of the diode is the cathode of the unidirectional conducting device, and the anode of the diode is the anode of the unidirectional conducting device.
6. A control method of a boost converter according to any one of claims 1 to 5, characterized in that:
each cycle of the converter operation sequentially includes four stages, and the voltage across the inductor L1 in each stage is as follows through the periodic on and off of the switching tube Q1, the switching tube Q2, the switching tube Q3 and the switching tube Q4:
the voltage across the first stage inductor L1 is Vo and lasts for a period of time T1;
the voltage across the second stage inductor L1 is Vin for a time T2;
the voltage across the third stage inductor L1 is Vo-Vin for a time T3;
the fourth stage inductor L1 is shorted across a voltage of 0 for a time T4.
7. The control method according to claim 6, characterized in that: the lengths of time T1, time T2, time T3, and time T4 are adjustable.
8. The control method according to claim 7, characterized in that: when the load current decreases to the first set point, the time T1, the time T2, and the time T3 decrease, the time T4 becomes longer, and the total switching period remains varying within the error range.
9. The control method according to claim 8, characterized in that: when the load current further decreases to the second set point, the time T1 decreases to zero, the switch Q2 is turned off, and the driving of the switch Q3 and the switch Q4 are turned off.
10. The control method according to claim 9, characterized in that: when the load current is further reduced to the third set value, the circuit periodically or aperiodically makes all the switch tubes in the off state in one or more periods.
11. The control method according to claim 6, characterized in that: the length of time T4 decreases with increasing load, decreasing input voltage, or both increasing load and decreasing input voltage, until it decreases to zero.
12. The control method according to claim 6, characterized in that: at least one of time T1, time T2, time T3, and time T4 is followed by an energy cycle interval during which the current of inductor L1 charges or discharges the output capacitance of the corresponding switch tube.
13. A control method of a boost converter according to any one of claims 1 to 5, wherein the input power supply voltage and the output voltage are interchanged, and wherein:
each cycle of the converter operation sequentially includes four stages, and the voltage across the inductor L1 in each stage is as follows through the periodic on and off of the switching tube Q1, the switching tube Q2, the switching tube Q3 and the switching tube Q4:
the first stage inductor L1 is shorted across voltage 0 for a time T1';
the voltage across the second stage inductor L1 is Vo-Vin for a period of time T2';
the voltage across the third stage inductor L1 is Vin for a time T3';
the voltage across the fourth stage inductor L1 is Vo and lasts for a time T4'.
CN201910868385.6A 2019-09-11 2019-09-11 Boost converter and control method thereof Withdrawn CN110719026A (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007016039A1 (en) * 2007-03-29 2008-10-02 Volkswagen Ag Inductive load i.e. electromagnetic valve train, controlling device for motor vehicle, has H-bridge circuit connected to side of bridge over switch with voltage level that is smaller or larger than voltage level produced by generator
CN107359791A (en) * 2017-07-25 2017-11-17 华域汽车电动系统有限公司 A kind of DC/DC translation circuits
CN110011537A (en) * 2019-05-09 2019-07-12 广州金升阳科技有限公司 A kind of switch converters and its control method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007016039A1 (en) * 2007-03-29 2008-10-02 Volkswagen Ag Inductive load i.e. electromagnetic valve train, controlling device for motor vehicle, has H-bridge circuit connected to side of bridge over switch with voltage level that is smaller or larger than voltage level produced by generator
CN107359791A (en) * 2017-07-25 2017-11-17 华域汽车电动系统有限公司 A kind of DC/DC translation circuits
CN110011537A (en) * 2019-05-09 2019-07-12 广州金升阳科技有限公司 A kind of switch converters and its control method

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