CN110706650A - 像素驱动电路 - Google Patents
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Abstract
一种像素驱动电路,包括驱动薄膜晶体管;稳压电容,所述稳压电容的第一端连接于所述驱动薄膜晶体管的控制端,所述稳压电容的第二端连接于所述驱动薄膜晶体管的第一端;第一电容,所述第一电容的第一端连接于所述驱动薄膜晶体管的所述控制端,所述第一电容的第二端连接于所述驱动薄膜晶体管的第二端;以及发光器件,所述发光器件的第一端连接于所述驱动薄膜晶体管的所述第二端,所述发光器件的第二端接地。所述像素驱动电路在驱动薄膜晶体管的栅极增加稳压电容,能够降低穿通效应造成的电压损失,提高面板的显示均匀性。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种像素驱动电路。
背景技术
OLED(organic light-emitting diode,有机发光二极管)显示面板与LCD(Liquidcrystal display,液晶显示器)相比具有自发光的独特优势,且具有能耗小、对比度高、色域广以及可折叠等具有竞争力的优点,已经成为目前的主流显示面板。
但是,现有的像素驱动电路在完成充电过程后,栅极薄膜晶体管关闭时,电压的迅速变化会造成严重的穿通(feedthrough)效应,导致面板显示均匀性下降,并且对低灰阶下的均匀性影响更为突出。
发明内容
本发明提供一种像素驱动电路,以解决现有的像素驱动电路,由于穿通效应导致面板显示均匀性下降的技术问题。
为解决上述问题,本发明提供的技术方案如下:
本发明提供一种像素驱动电路,包括驱动薄膜晶体管;稳压电容,所述稳压电容的第一端连接于所述驱动薄膜晶体管的控制端,所述稳压电容的第二端连接于所述驱动薄膜晶体管的第一端;第一电容,所述第一电容的第一端连接于所述驱动薄膜晶体管的所述控制端,所述第一电容的第二端连接于所述驱动薄膜晶体管的第二端;以及发光器件,所述发光器件的第一端连接于所述驱动薄膜晶体管的所述第二端,所述发光器件的第二端接地。
在本发明的至少一种实施例中,所述像素驱动电路还包括第一开关,所述第一开关的第一端连接于第一信号端,所述第一开关的第二端连接于所述驱动薄膜晶体管的所述控制端。
在本发明的至少一种实施例中,所述像素驱动电路还包括第二开关,所述第二开关的第一端连接于所述驱动薄膜晶体管的所述第二端,所述第二开关的第二端连接于第二信号端。
在本发明的至少一种实施例中,所述所述第一开关与所述第二开关为薄膜晶体管。
在本发明的至少一种实施例中,所述驱动薄膜晶体管、所述第一开关以及所述第二开关为N型金氧半场效晶体管。
在本发明的至少一种实施例中,所述第一开关为栅极薄膜晶体管。
在本发明的至少一种实施例中,所述第二开关为感测薄膜晶体管。
在本发明的至少一种实施例中,所述发光器件为有机发光二级管。
在本发明的至少一种实施例中,所述第一信号端为资料信号端。
在本发明的至少一种实施例中,所述第一电容为锁存电容。
本发明的有益效果为:本发明提供的像素驱动电路,在驱动薄膜晶体管的栅极增加稳压电容,并且将稳压电容的一端连接到高电位的VDD进行稳压,在第一开关关闭时能够降低穿通效应造成的电压损失,从而达到面板中不同位置的驱动薄膜晶体管的Vgs大致相同,流经发光器件的电流差异减小,提高面板的显示均匀性。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明实施例像素驱动电路的电路图;
具体实施方式
以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。
本发明针对现有的像素驱动电路,由于穿通效应导致面板显示均匀性下降的技术问题,本实施例能够解决该缺陷。
图1为本发明实施例像素驱动电路的电路图,所述像素驱动电路包括驱动薄膜晶体管T1;稳压电容Cgd,所述稳压电容Cgd的第一端连接于所述驱动薄膜晶体管T1的控制端,所述稳压电容Cgd的第二端连接于所述驱动薄膜晶体管T1的第一端;第一电容Cgs,所述第一电容Cgs的第一端连接于所述驱动薄膜晶体管T1的所述控制端,所述第一电容Cgs的第二端连接于所述驱动薄膜晶体管T1的第二端;以及发光器件D,所述发光器件D的第一端连接于所述驱动薄膜晶体管T1的所述第二端,所述发光器件D的第二端接地。所述第一电容Cgs为锁存电容。所述像素驱动电路还包括第一开关T2,所述第一开关T2的第一端连接于第一信号端S1,所述第一开关T2的第二端连接于所述驱动薄膜晶体管T1的所述控制端,所述第一开关T2为栅极薄膜晶体管,所述第一信号端S1为资料信号端。所述像素驱动电路还包括第二开关T3,所述第二开关T3的第一端连接于所述驱动薄膜晶体管T1的所述第二端,所述第二开关T3的第二端连接于第二信号端S2,所述第二开关T3为感测薄膜晶体管。所述驱动薄膜晶体管T1、所述第一开关T2以及所述第二开关T3为N型金氧半场效晶体管。所述发光器件D为有机发光二级管。
由于面板中不同位置的电阻电容(RC)时间常数不同,在现有的像素驱动电路中,第一开关T2关闭时会带来不同程度的穿通效应,导致发光过程中对应不同像素的g点电压不同,面板中不同位置的驱动薄膜晶体管T1的Vgs不同,因此流经发光器件D(例如有机发光二级管)的电流大小不同,最终使得面板的显示均匀性较差。
如图1所示,本发明实施例的像素驱动电路在驱动薄膜晶体管T1的栅极增加稳压电容Cgd,并且将稳压电容Cgd的一端连接到高电位的VDD进行稳压,在第一开关T2关闭时能够降低穿通效应对g点造成的电压损失,从而达到面板中不同位置的驱动薄膜晶体管T1的Vgs大致相同,流经发光器件D的电流差异减小,提高面板的显示均匀性。
表1为现有的像素驱动电路,在高灰阶与低灰阶时显示不均匀性的数据。在低灰阶时,由于电压较小,像素驱动电路受到穿通效应的影响更为明显,不均匀性高达76.13%,且不同灰阶时不均匀性的差异也较大。
表1
不均匀性 | Max Vg_FT | |
高灰阶 | 10.26% | 0.578V |
低灰阶 | 76.13% | 0.804V |
表2为本发明实施例的像素驱动电路,在高灰阶与低灰阶时显示不均匀性的数据。由于稳压电容Cgd对g点电压的维持效果,像素驱动电路受到穿通效应的影响较小,高灰阶与低灰阶时的显示均匀性均得到了大幅度的提升,且不同灰阶时不均匀性的差异也降低。其中Max Vg_FT为g点充电电压与第一开关T2关闭后g点电压下降至最低点的差值,在面板中不同位置的最大值。
表2
不均匀性 | Max Vg_FT | |
高灰阶 | 3.6% | 0.28V |
低灰阶 | 24.82% | 0.356V |
有益效果:本发明提供的像素驱动电路,在驱动薄膜晶体管T1的栅极增加稳压电容Cgd,并且将稳压电容Cgd的一端连接到高电位的VDD进行稳压,在第一开关T2关闭时能够降低穿通效应对g点造成的电压损失,从而达到面板中不同位置的驱动薄膜晶体管T1的Vgs大致相同,流经发光器件D的电流差异减小,提高面板的显示均匀性。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。
Claims (10)
1.一种像素驱动电路,其特征在于,包括:
驱动薄膜晶体管;
稳压电容,所述稳压电容的第一端连接于所述驱动薄膜晶体管的控制端,所述稳压电容的第二端连接于所述驱动薄膜晶体管的第一端;
第一电容,所述第一电容的第一端连接于所述驱动薄膜晶体管的所述控制端,所述第一电容的第二端连接于所述驱动薄膜晶体管的第二端;以及
发光器件,所述发光器件的第一端连接于所述驱动薄膜晶体管的所述第二端,所述发光器件的第二端接地。
2.根据权利要求1所述的像素驱动电路,其特征在于,还包括第一开关,所述第一开关的第一端连接于第一信号端,所述第一开关的第二端连接于所述驱动薄膜晶体管的所述控制端。
3.根据权利要求2所述的像素驱动电路,其特征在于,还包括第二开关,所述第二开关的第一端连接于所述驱动薄膜晶体管的所述第二端,所述第二开关的第二端连接于第二信号端。
4.根据权利要求3所述的像素驱动电路,其特征在于,所述第一开关与所述第二开关为薄膜晶体管。
5.根据权利要求4所述的像素驱动电路,其特征在于,所述驱动薄膜晶体管、所述第一开关以及所述第二开关为N型金氧半场效晶体管。
6.根据权利要求4所述的像素驱动电路,其特征在于,所述第一开关为栅极薄膜晶体管。
7.根据权利要求4所述的像素驱动电路,其特征在于,所述第二开关为感测薄膜晶体管。
8.根据权利要求5所述的像素驱动电路,其特征在于,所述发光器件为有机发光二级管。
9.根据权利要求2所述的像素驱动电路,其特征在于,所述第一信号端为资料信号端。
10.根据权利要求1所述的像素驱动电路,其特征在于,所述第一电容为锁存电容。
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