CN110706537A - Digital circuit training platform based on virtual chip and wireless management and application method - Google Patents
Digital circuit training platform based on virtual chip and wireless management and application method Download PDFInfo
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
- G09B9/00—Simulators for teaching or training purposes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
- G09B23/00—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes
- G09B23/06—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics
- G09B23/18—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism
- G09B23/183—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits
- G09B23/186—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits for digital electronics; for computers, e.g. microprocessors
Abstract
The digital circuit training platform based on the virtual chip and the wireless management comprises a management server, a plurality of experimental boxes and a training student client; each experiment box comprises a single chip microcomputer, a plurality of storage chips, a plurality of FPGA chips, a plurality of liquid crystal modules, a wireless serial port transmission module and an experiment box serial number setting switch; the management server comprises a USB port-to-serial port module and a wireless serial port transmission module; the practical training student client is a mobile phone of a practical training student. In the application method, a platform writes a plurality of FPGA programs with different contents and stores the FPGA programs in a management server in a centralized manner, the management server in the application can authorize a specified experimental box and change the model of the virtual chip, and students can also assist in using the mobile phone to independently change the model of the virtual chip after being authorized. The invention does not need electrical connection or plug-in the whole process, reduces the damage probability, has convenient equipment installation and high data transmission stability, can simulate more digital chips with different functions, and has good effect, low cost, strong function and high flexibility.
Description
Technical Field
The invention relates to the technical field of teaching and training platforms, in particular to a digital circuit training platform based on a virtual chip and wireless management and an application method.
Background
The teaching course of the digital circuit is a basic course of the major of electronics, information, control and the like of colleges and universities, and has strong practicability. The existing digital circuit practical training equipment has the following defects due to structure limitation, namely: because each test bed and the test box thereof can only realize one function and have single function, the chip needs to be prepared for each test bed and the test box thereof again when the test subject is replaced each time, the workload of the experiment preparation is large, the utilization rate of the experiment equipment is low, and the investment cost of the test bed and the test box can be increased; II, secondly: during practical training, a practical training person needs to electrically connect peripheral pins of the experimental chip by using a plurality of wires, so that the operation is troublesome, and the pins and the like of the experimental chip are easily damaged; thirdly, the method comprises the following steps: when the experiment questions are replaced, different experiment chips need to be inserted into and pulled out of the chip base jacks, and the pins are easy to bend, break and the like; fourthly, the method comprises the following steps: because the variety of the chips for practical training is small and the functions are single, the practical training effect can be influenced.
An FPGA (Field-Programmable Gate Array), which is a product of further development based on Programmable devices such as PAL, GAL, CPLD, etc. The circuit is a semi-custom circuit in the field of Application Specific Integrated Circuits (ASIC), not only overcomes the defects of the custom circuit, but also overcomes the defect that the number of gate circuits of the original programmable device is limited. Based on the above, the digital circuit practical training platform and the application method provided based on the FPGA technology can be applied to the teaching course of the digital circuit, and overcome various defects of practical training equipment used in the teaching course of the digital circuit due to the structural limitation.
Disclosure of Invention
In order to overcome various defects caused by the limited structure of the existing practical training equipment used in the teaching course of 'digital circuit', the invention provides a practical training device based on FPGA technology, wherein FPGA is used as a virtual chip of a plurality of experimental boxes in an application collection, a plurality of programs with different functions required by the FPGA are stored in a server, information transmission between the server and the experimental boxes is realized in a wireless mode, in the practical training, a management server can authorize a specified experimental box and change the model of the virtual chip, students can also assist to use a mobile phone to autonomously change the model of the virtual chip after authorization, so that each experimental box can achieve different functions, the virtual chip of the experimental box can simulate an interface connector, the model is displayed by a liquid crystal display, so that the virtual chip has the amplified DIP16 (direct-insert 16 pin) packaging appearance and has the same sense effect as the real chip, therefore, the digital circuit practical training platform and the application method have the advantages that the whole process is achieved, the electric connection or the plugging is not needed, the damage probability is reduced, the equipment installation is convenient, the data transmission stability is high, more digital chips with different functions can be simulated, the practical training effect is good, the experimental box is low in cost, strong in function and high in flexibility, and the digital circuit practical training platform is based on the virtual chip and the wireless management.
The technical scheme adopted by the invention for solving the technical problems is as follows:
the digital circuit training platform based on the virtual chip and the wireless management is characterized by comprising a management server, a plurality of experimental boxes and a training student client; each experimental box comprises a single chip microcomputer, a plurality of storage chips, a plurality of FPGA chips, a plurality of liquid crystal modules, a wireless serial port transmission module and an experimental box number setting switch; the plurality of storage chips, the plurality of FPGA chips, the plurality of liquid crystal modules, the wireless serial port transmission module, the experiment box serial number setting switch and the singlechip are connected through wires; the management server comprises a USB port-to-serial port module and a wireless serial port transmission module; the serial port of the USB port-to-serial port module is connected with the serial port of the wireless serial port transmission module through a wire, and the USB socket of the USB port-to-serial port module is inserted into the USB socket of the server; the server and the plurality of test boxes realize information data interaction through the server wireless serial port transmission module and the wireless serial port transmission modules in the plurality of test boxes; the practical training student client is a mobile phone of a practical training student.
Further, the memory chip is 256kbit serial Electrically Erasable Programmable Read Only Memory (EEPROM) manufactured by ATMEL company, and the model of the FPGA is EP4CE6E22C 8.
The digital circuit training platform application method based on the virtual chip and the wireless management comprises the following steps that firstly, according to the functions of the traditional experimental chip, a plurality of FPGA programs with different contents are compiled by the platform, different FPGA program files are stored in a management server in a centralized manner, and the management server can manage the virtual chips of a plurality of experimental boxes in a centralized manner; when the chip model of the test box needs to be changed in the application, the corresponding program file is sent to a storage chip in the test box from the management server; after the corresponding program file is sent into a storage chip in the test box from the management server, the FPGA in the test box is configured in a PS mode, the single chip reads configuration data from an external storage component storage chip firstly in the PS mode, then the data is written into the FPGA to realize on-line programming of the FPGA, the FPGA chip in the test box reads the configuration file into a random access memory after being electrified and started again, so that the FPGA in the corresponding test box has the same function as the corresponding digital chip, and further the function of the virtual digital chip is realized corresponding to the FPGA in the test box.
Furthermore, in the platform for compiling the FPGA programs of a plurality of models, Quartus II software is used for compiling the FPGA program, the I/O pin function of the FPGA is configured according to the function of the experimental chip, and the FPGA program is compiled to form a file in the rbf format and stored in the server; the management server software is developed by using C # language in Microsoft NET development environment, the generated software can be used after being directly installed, a teacher can select the function of the practical training platform chip on the server, the server can send an FPGA program to the experimental box, and the server can collect the use information of the practical training platform.
Further, in the application, in which the model of the chip of the experimental box needs to be changed, the management server may authorize the specified experimental box and change the model of the virtual chip, and the student may also assist in autonomously changing the model of the virtual chip using the mobile phone after being authorized, the steps are as follows: the management server is provided with an IIS assembly, so that the computer has a web service function and a web website is established; b, establishing a text file s.txt under a website root directory; c: the mobile phone is wirelessly connected with a local area network, and a browser address bar inputs an IP (Internet protocol) of a management server to log in a web site; d: selecting a chip model on a browser and sending a command to an s.txt file; e: the server computer detects the modification date of the s.txt file, judges whether a mobile phone command exists or not, and sends the FPGA configuration file to the experimental box if the mobile phone command exists and is authorized by the server; f: and restarting the experimental box once to complete the replacement of the virtual chip.
Furthermore, the single chip microcomputer reads and writes the memory chip in an SPI bus mode, when the FPGA adopts a PS configuration mode, pins MSEL 1-MSEL 3 of the FPGA are connected with low level, and 5I/O ports of the single chip microcomputer are respectively connected with pins DATA0, DCLK, nCONFIG, nSTATUS and CONF _ DONE of the FPGA through 5 signal lines.
Furthermore, each FPGA of the experimental box is provided with 16I/O pins which are connected to a connector of a virtual chip, the pins are connected through a K2 wire and a banana socket, an interface connector can be simulated, the chip model of the virtual chip can be displayed by using a liquid crystal display module, the virtual chip has an amplified DIP16 (direct-insert 16 pins) packaging appearance, the model of a driving chip of the display module is SSD1306, and each FPGA is provided with 2I/O pins to simulate an IIC interface to read and write liquid crystal.
Furthermore, the model of the server wireless serial port transmission module and the wireless serial port transmission modules in the test boxes is CC1110, information interaction is achieved through an SPI interface mode, the single chip microcomputer controls attribute configuration of the CC1110 and achieving of functions of sending, receiving, interrupting and the like through API instructions, and the model of the server USB port-to-serial port module is CH 340G.
Furthermore, the information transmission between the management server and the experimental boxes adopts half-duplex mode communication, a time control token protocol is used, the server is a main control end during communication, the server circularly sends commands to the experimental boxes, the experimental boxes passively execute the commands and return execution results to the server, each experimental box is provided with a number, a dial switch is arranged on a single chip microcomputer unit, the experimental box numbers are set through setting the dial switches, and the management server can send data to the experimental boxes with the designated numbers.
Further, the single chip microcomputer in each experiment box has the following functions, A: communicating with a management server in a wireless mode, judging that the number of the test box is consistent with that of the test box if server command information is received, storing an FPGA configuration file of the server into a storage chip, and sending a practical training state of a corresponding test box to the management server; b: when the FPGA of the test box is started, reading the configuration file and loading the configuration file to a random storage chip of the FPGA; c: when the test box is started, the model of the virtual chip transmitted by the server is displayed through the liquid crystal module; d: reading the state of a coding switch and determining the number of the experimental box; e: and if the FPGA fails to be configured, returning a fault signal.
The invention has the beneficial effects that: the invention is based on FPGA technology, a plurality of test boxes can be adopted to provide support for training of a plurality of students, and the functions of the virtual chips in each test box can be the same or different. The FPGA is used as a virtual chip in a plurality of experimental boxes in application, a plurality of programs with different functions required by the FPGA are stored in the server, the management server can authorize a specified experimental box and change the model of the virtual chip, and students can also assist the mobile phone to independently change the model of the virtual chip after being authorized, so that each experimental box can achieve different functions. In the invention, the virtual chip of the experimental box can simulate an interface connector, the model is displayed by using the liquid crystal module, so that the virtual chip has the amplified DIP16 (direct-insert 16-pin) packaging appearance and has the same sensory effect as that of using a real chip. The invention does not need electrical connection or plug-in the whole process, reduces the damage probability, is convenient for equipment installation, has high data transmission stability, can simulate more digital chips with different functions, and has good practical training effect, low experimental box cost, strong function and high flexibility. Based on the above, the invention has good application prospect.
Drawings
FIG. 1 is a schematic diagram of the present invention.
Fig. 2 is a schematic block diagram of the present invention.
Fig. 3 is a circuit diagram of the present invention.
FIG. 4 is a schematic flow chart of the single chip microcomputer operation of the invention.
Detailed Description
As shown in fig. 1, 2 and 3, the digital circuit practical training platform based on virtual chip and wireless management includes a management server, a plurality of experimental boxes and practical training student clients; each experimental box comprises an STM32 model single chip microcomputer, 4M 25P16 model storage chips, 4 FPGA chips, 4 0.91 inch liquid crystal modules, a wireless serial port transmission module and an experimental box number setting switch; the 4M 25P16 storage chips, the 4 FPGA chips, the 4 0.91-inch liquid crystal modules, the wireless serial port transmission module, the experiment box number setting switch and the STM32 singlechip are connected through leads; the management server comprises a USB port-to-serial port module and a wireless serial port transmission module; the serial port of the USB port-to-serial port module is connected with the serial port of the wireless serial port transmission module, and the USB socket of the USB port-to-serial port module is inserted into the USB socket of the server; the server and the plurality of test boxes realize information data interaction through the server wireless serial port transmission module and the wireless serial port transmission modules in the plurality of test boxes; the practical training student client is a mobile phone of a practical training student.
As shown in fig. 1, 2, and 3, the memory chip M25P16 is a 256kbit serial electrically erasable programmable read only memory (eeprom) manufactured by ATMEL corporation, the number of times of erasing and writing is about 100 ten thousand, the FPGA model is EP4CE6E22C8, which is a Cyclone IV series product manufactured by Altera corporation, and the memory chip M25P16 has stored configuration data that is not lost after power failure.
As shown in fig. 1, 2, 3, and 4, in the method for applying a digital circuit training platform based on virtual chips and wireless management, according to the functions of a conventional experimental chip, a platform writes a plurality of FPGA programs with different contents, and stores different FPGA program files in a management server in a centralized manner, and the management server can manage the virtual chips of a plurality of experimental boxes in a centralized manner; when the model of the chip of the test box needs to be changed in the application, the corresponding program file is sent to the M25P16 storage chip in the test box from the management server; after the corresponding program file is sent to the M25P16 storage chip in the test box from the management server, the FPGA in the test box is configured in a PS mode (passive configuration mode), the single chip reads configuration data from the M25P16 storage chip of the external storage component in the PS mode, the data are written into the FPGA to realize on-line programming of the FPGA, the FPGA chip in the test box is powered on and started again to read the configuration file into an SRAM (random access memory), so that the FPGA in the corresponding test box has the same function as a corresponding digital chip, and further the FPGA in the corresponding test box realizes the function of a virtual digital chip. In the platform writing of FPGA programs of a plurality of models, Quartus II software is used for writing the FPGA program, the I/O (input/output) pin function of the FPGA is configured according to the function of an experimental chip, and a file in an rbf format is compiled and stored in a server; the management server software selects Microsoft NET development environment, is developed by using C # language, the generated software can be directly installed and used, a teacher can select the function of a chip of a practical training platform (test box) on the server, the server can send an FPGA program to the test box, and the server can collect the use information of the practical training platform. The single chip microcomputer reads and writes M25P16 in an SPI bus mode, wherein a pin Q of M25P16 is output serial data, a pin D is input serial data, a pin C is input serial clock signals, a pin S is chip selection, the single chip microcomputer simulates an SPI bus by using pins PA 0-PA 2, and pins PA 3-PA 7 select 4 FPGA chips. When the FPGA adopts a PS configuration mode, pins MSEL 1-MSEL 3 of the FPGA are connected with a low level, 5I/O ports of the single chip microcomputer are respectively connected with pins DATA0, DCLK, nCONFIG, nSTATUS and CONF _ DONE of the FPGA through 5 signal lines, an nCE pin of the FPGA is a chip selection signal pin, 4 FPGA chips are selected by the single chip microcomputers PB 0-PB 3, and the single chip microcomputer of the experimental box can generate 5 paths of adjustable pulse frequency by using an internal timer and respectively output the pulse frequency to pins PB 4-PB 8 of the single chip microcomputer. Each FPGA of the experimental box is provided with 16I/O pins which are connected to a connector of a virtual chip, the pins are connected through a K2 line and a banana socket, an interface connector can be simulated, the chip model of the virtual chip can be displayed by using a liquid crystal display module, the virtual chip has amplified DIP16 (directly inserted 16 pins) packaging appearance and has the same sensory effect as the real chip, the model of a driving chip of the display module is SSD1306, and each FPGA is provided with 2I/O pins to simulate an IIC interface to read and write the liquid crystal display module. The model of the wireless serial port transmission module of the server and the wireless serial port transmission modules in the plurality of test boxes is CC1110, the wireless serial port transmission modules work at 433MHz frequency, the transmission distance can reach 200 meters, information interaction is realized through an SPI interface mode, the single chip microcomputer controls attribute configuration of the CC1110 and realization of various functions such as sending, receiving and interruption through API instructions, and the model of the server-side USB port-to-serial port module is CH 340G. The information transmission between a management server (located in a laboratory) and the experimental boxes adopts half-duplex mode communication, a time-controlled token protocol (time-token protocol) is used, the server is a master control end during communication, commands are circularly sent to all the experimental boxes, all the experimental boxes passively execute the commands and return execution results to the server, and the data format of the commands sent by the server is that (0xaacc) + address (1byte) + command category (1byte) + verification (2 byte); the format of the returned data of the experimental box is that the starting (0xaadd) + the address (1byte) + the command type (1byte) + the number of data (1byte) + the data check (2 byte); each experimental box is provided with a number, a 7-bit dial switch is arranged on the single chip unit, the experimental box number is set by setting the dial switch, the experimental box number can be 1-127, the broadcast address number is 0, and the management server can send data to the experimental box with the designated number. The single chip microcomputer in each experimental box has the following functions A: communicating with a management server in a wireless mode, judging that the number of the test box is consistent with that of the test box if server command information is received, storing an FPGA configuration file of the server into a storage chip, and sending a practical training state of a corresponding test box to the management server; b: when the FPGA of the test box is started, reading the configuration file and loading the configuration file to the SRAM of the FPGA; c: when the test box is started, the model of the virtual chip transmitted by the server is displayed through the liquid crystal module; d: reading the state of a coding switch and determining the number of the experimental box; e: and if the FPGA fails to be configured, returning a fault signal.
As shown in fig. 1, 2, and 3, in the application of the present invention, in which the model of the chip of the experiment box needs to be changed, the management server can authorize a specific experiment box and change the model of the virtual chip, and students can also assist in autonomously changing the model of the virtual chip using the mobile phone after being authorized. The method comprises the following steps: the management personnel management server is provided with an IIS component, so that the computer has a web service function and a web website is established; b, establishing a text file s.txt under a website root directory, compiling a plurality of FPGA programs with different contents by a platform according to the functions of a traditional experiment chip, and intensively storing different FPGA program files in a management server; c: the training students are wirelessly connected with a local area network through mobile phones, input a management server IP in a browser address bar and log in a web site; d: selecting different functional chips of a server on a browser and sending a command to an s.txt file; e: the server computer detects the modification date of the s.txt file, judges whether a mobile phone command exists or not, and sends the FPGA configuration file to the experimental box if the mobile phone command exists and is authorized by the server; f: and restarting the test box once corresponding to the test box to complete the replacement of the virtual chip.
As shown in fig. 1, 2 and 3, the invention is based on the FPGA technology, and can provide support for training of a plurality of students by using a plurality of test boxes, and the functions of the virtual chips in each test box can be the same or different. The FPGA is used as a virtual chip in a plurality of experimental boxes in application, a plurality of programs with different functions required by the FPGA are stored in the server, the management server can authorize a specified experimental box and change the model of the virtual chip, and students can also assist the mobile phone to independently change the model of the virtual chip after being authorized, so that each experimental box can achieve different functions. In the invention, the virtual chip of the experimental box can simulate an interface connector, the model is displayed by using the liquid crystal module, so that the virtual chip has the amplified DIP16 (direct-insert 16-pin) packaging appearance and has the same sensory effect as that of using a real chip. The invention does not need electrical connection or plug-in the whole process, reduces the damage probability, is convenient for equipment installation, has high data transmission stability, can simulate more digital chips with different functions, and has good practical training effect, low experimental box cost, strong function and high flexibility.
While there have been shown and described what are at present considered the fundamental principles and essential features of the invention and its advantages, it will be apparent to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, but is capable of other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (10)
1. The digital circuit training platform based on the virtual chip and the wireless management is characterized by comprising a management server, a plurality of experimental boxes and a training student client; each experimental box comprises a single chip microcomputer, a plurality of storage chips, a plurality of FPGA chips, a plurality of liquid crystal modules, a wireless serial port transmission module and an experimental box number setting switch; the plurality of storage chips, the plurality of FPGA chips, the plurality of liquid crystal modules, the wireless serial port transmission module, the experiment box serial number setting switch and the singlechip are connected through wires; the management server comprises a USB port-to-serial port module and a wireless serial port transmission module; the serial port of the USB port-to-serial port module is connected with the serial port of the wireless serial port transmission module through a wire, and the USB socket of the USB port-to-serial port module is inserted into the USB socket of the server; the server and the plurality of test boxes realize information data interaction through the server wireless serial port transmission module and the wireless serial port transmission modules in the plurality of test boxes; the practical training student client is a mobile phone of a practical training student.
2. The virtual chip and wireless management based digital circuit practical training platform as claimed in claim 1, wherein the memory chip is a 256kbit serial electrically erasable programmable read only memory (eeprom) available from ATMEL corporation, and the FPGA model is EP4CE6E22C 8.
3. The virtual chip and wireless management based digital circuit practical training platform according to claim 1, wherein the application method comprises the steps of firstly writing a plurality of FPGA programs with different contents according to the functions of the traditional experimental chips, and storing different FPGA program files in a management server in a centralized manner, wherein the management server can manage the virtual chips of a plurality of experimental boxes in a centralized manner; when the chip model of the test box needs to be changed in the application, the corresponding program file is sent to a storage chip in the test box from the management server; after the corresponding program file is sent into a storage chip in the test box from the management server, the FPGA in the test box is configured in a PS mode, the single chip reads configuration data from an external storage component storage chip firstly in the PS mode, then the data is written into the FPGA to realize on-line programming of the FPGA, the FPGA chip in the test box reads the configuration file into a random access memory after being electrified and started again, so that the FPGA in the corresponding test box has the same function as the corresponding digital chip, and further the function of the virtual digital chip is realized corresponding to the FPGA in the test box.
4. The virtual chip and wireless management based digital circuit practical training platform application method as claimed in claim 3, wherein the platform writes several types of FPGA programs, uses Quartus II software to write the FPGA program, configures the I/O pin function of the FPGA according to the function of the experimental chip, compiles to form a file in rbf format, and stores in the server; the management server software is developed by using C # language in Microsoft NET development environment, the generated software can be directly installed for use, a teacher can select the function of the practical training platform chip on the server, the server can send the FPGA program to the experimental box, and the server can collect the use information of the practical training platform.
5. The virtual chip and wireless management based digital circuit practical training platform application method according to claim 3, wherein in the application, in the need of changing the chip model of the experimental box, the management server can authorize the specified experimental box and change the virtual chip model, and students can also assist the mobile phone to autonomously change the model of the virtual chip after being authorized, the steps are as follows: the management server is provided with an IIS assembly, so that the computer has a web service function and a web website is established; b, establishing a text file s.txt under a website root directory; c: the mobile phone is wirelessly connected with a local area network, and a browser address bar inputs an IP (Internet protocol) of a management server to log in a web site; d: selecting a chip model on a browser and sending a command to an s.txt file; e: the server computer detects the modification date of the s.txt file, judges whether a mobile phone command exists or not, and sends the FPGA configuration file to the experimental box if the mobile phone command exists and is authorized by the server; f: and restarting the experimental box once to complete the replacement of the virtual chip.
6. The practical training platform application method for the digital circuit based on the virtual chip and the wireless management as claimed in claim 3, wherein the single chip microcomputer reads and writes the memory chip in a way of SPI bus, when the FPGA adopts the PS configuration mode, the MSEL 1-MSEL 3 pins are connected with low level, and 5I/O ports of the single chip microcomputer are respectively connected with the DATA0, DCLK, nCONFIG, nSTATUS, CONF _ DONE pins of the FPGA through 5 signal lines.
7. The practical training platform application method of the digital circuit based on the virtual chip and the wireless management as claimed in claim 3, wherein each FPGA of the experimental box is configured with 16I/O pins, the pins are connected to the connector of the virtual chip, the pins are connected through a K2 line and a banana socket, an interface connector can be simulated, the chip model of the interface connector can be displayed by using a liquid crystal display module, the virtual chip is enabled to have an amplified DIP16 (in-line 16 pins) package appearance, the driving chip model of the display module is SSD1306, and each FPGA is configured with 2I/O pins to simulate an IIC interface to read and write liquid crystal.
8. The virtual chip and wireless management based digital circuit practical training platform application method as claimed in claim 3, wherein the model of the server wireless serial port transmission module and the wireless serial port transmission modules in the plurality of test boxes is CC1110, the model is interacted with implementation information through an SPI interface mode, the single chip microcomputer controls the attribute configuration of the CC1110 and the implementation of various functions such as sending, receiving and interruption through API commands, and the model of the server-side USB port-to-serial port module is CH 340G.
9. The practical training platform application method of the digital circuit based on the virtual chip and the wireless management as claimed in claim 3, wherein the information transmission between the management server and the experimental boxes adopts half-duplex mode communication, a time control token protocol is used, the server is a master control end during communication, the server circularly sends out commands to each experimental box, each experimental box passively executes the commands and returns execution results to the server, each experimental box has a number, the single chip unit is provided with a dial switch, the experimental box number is set through setting the dial switch, and the management server can send data to the experimental box with the designated number.
10. The virtual chip and wireless management based digital circuit practical training platform application method according to claim 3, wherein the single chip microcomputer in each experimental box has the following functions, A: communicating with a management server in a wireless mode, judging that the number of the test box is consistent with that of the test box if server command information is received, storing an FPGA configuration file of the server into a storage chip, and sending a practical training state of a corresponding test box to the management server; b: when the FPGA of the test box is started, reading the configuration file and loading the configuration file to a random storage chip of the FPGA; c: when the test box is started, the model of the virtual chip transmitted by the server is displayed through the liquid crystal module; d: reading the state of a coding switch and determining the number of the experimental box; e: and if the FPGA fails to be configured, returning a fault signal.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114898639B (en) * | 2022-05-06 | 2024-05-03 | 南京红松信息技术有限公司 | College experiment box with automatic judging function and method |
| CN115963388A (en) * | 2022-12-22 | 2023-04-14 | 广东高云半导体科技股份有限公司 | System for realizing circuit debugging, field programmable logic gate array and upper computer |
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