KR100273852B1 - Training kits of digital circuit design and application - Google Patents

Abstract

PURPOSE: A training kit for designing and applying a digital circuit is provided for a user to confirm a test of an operation of a circuit using an FPGA design tool of a MAX+PLUS II. CONSTITUTION: An input unit receives a circuit in order to provide the circuit designed by a user using a PLD(Programmable Logic Device) design tool to a logic block. A logic design block(1) performs a function such as a circuit, which forms a digital related communication system, and the like is composed of a real circuit. A download and clock control block(9) selects an input mode of the input unit and a clock frequency. A control block(2) performs a switching between the logic design block(1) and an input/output device. A RAM(4) embodies a logic, which needs a database and a large quantity of memories. An input switch block(10) inputs a circuit formed by the logic design block(1). A display block(11) outputs the circuit to the outside. A connector uses external input/output.

Description

Training kits of digital circuit design and application

The present invention relates to a training kit for designing and utilizing digital circuits, which makes it possible to easily learn a digital circuit designing method and application through practice without configuring an actual circuit.

With the development of semiconductor technology, as a large number of transistors are integrated on one chip and the operation of the chip is highly developed, it is important to judge the normal operation of the chip on the actual system after designing the digital circuit. It is important to determine the actual operation of the chip in advance when it is expensive to make ASIC (Application Spectific Integrated Circuit).

Therefore, instead of simply satisfying the simulation on the circuit design tool, the designed logic is actually hardwareized to check the operation. For this purpose, hardware emulator or FPGA (Field Programmable) Gate Array).

However, hardware emulator equipment is expensive and not readily available, while FPGAs can be used to verify ASICs at the lab level for a fraction of the cost.

The use of FPGAs is a new type of ASIC that allows electronic circuit designers to design and implement integrated circuits directly in the field, which makes it difficult to implement general purpose circuits and has a small capacity. It solves the disadvantages of Programmable Logic Device and the disadvantage of ASIC, which is expensive to manufacture.

However, because FPGAs have significantly lower operating speeds and densities than ASICs, applications in which FPGAs are primarily used are used for fast verification and short-cycle ASIC replacement of designed ASICs.

There are many types of FPGAs currently available, including Xilinx, ALTERA, Actel, and Quick Logic, and the types of processors include Intel's 8051, 8751, Zylolog's Z80, and many of the same series of processors. Among the FPGAs, ALTERA's products have a market share of more than 50% in Korea, and the processors are the most common among Intel's 8051 series and Zylog's Z80.

Through the effective digital design practice using ALTERA's products, learning about digital circuit design and utilization in university courses, small and medium-sized companies, research institutes, etc. can be more easily configured through training kits to practice and verify this digital circuit. The purpose is to develop training kits for design and use.

According to the present invention, a beginner who learns digital circuit design at a university, a general company, a research institute, and the like, according to the purpose of using TTL or logic circuits, an application circuit of a processor, and a digital signal processor (DSP) without directly manufacturing ALTERA MAX + PLUSII's FPGA design tool makes it easy to understand and acquire digital design methods.It is an interface circuit for 10 to 15 digital application circuits as well as 100 digital example circuits that are taught in digital practice courses in university courses. It is possible to practice the circuit designed according to the user's purpose.

The present invention is a design circuit input means for inputting after designing a peripheral interface circuit for individually using or utilizing a circuit designed by a user with an FPGA design tool of MAX + PLUSII, a kind of PLD (Programmable Logic Device), and from the input means. Logic design block which plays the same role as the input TTL level and digital circuit as real circuit, control block for selecting input mode and design clock frequency of design circuit input means, and circuit configured in logic design block And an input / output switching block for applying the use selection input to the logic design block.

1 is a block diagram of the present invention

<Explanation of symbols for main parts of drawing>

1: Logic Design Block 2: Control Block

3: input / output switching block 4: RAM

5: RS232 port (port for serial communication with computer)

6: Byte Blaster 7: EPROM

8: PROM 9: download and clock control block

10: input switch block 11: display block

12: PS / 2 port (port that connects to the keyboard or mouse of the computer)

13: VGA port (the port that connects to your computer's monitor)

14: external expansion port

The present invention relates to a logic design block (1) that uses a circuit design designed by a user using the FPGA design tool of ALTERA's MAX + PLUSII to perform a role such as configuring a TTL level or a digital logic processor and an application circuit into a real circuit. ,

A control block (2) for transmitting a circuit designed by the user to the logic design block (1) and selecting a clock frequency to be used;

An input switch block 10 for applying a user input for input / output of a circuit entered into the logic design block 1,

An input / output switching block 3 for setting data and address lines;

RAM (4) used when logic such as database related logic or look up table is implemented when using logic design block (1),

Byte Blaster (6), which transmits the circuit designed by the user through the personal computer to the logic design block (1),

EPROM (7) used in parallel control to transfer the circuit designed by the user to the logic design block (1) without a personal computer;

With PROM (8) which is exclusive ROM of ALTERA company,

A download and clock control block 9 for setting a switch for selecting a control mode of the control block 2 and selecting a clock;

A display block 11 for outputting a user circuit entered into the logic design block 1,

In the logic design block (1), PS / 2 port (12) and VGA port (13) for external input and external monitor output,

This is accomplished by providing an external expansion port 14 that extends the input and output of the logic design block 1.

In addition, the present invention includes a power switch for selecting power on / off along with a power jack for receiving power from a power adapter, and RS232C 12 for bidirectional communication and interface with a personal computer.

In the present invention, the logic design block (1) is the most important block in which a user-written program is executed using the FPGA design tool of MAX + PLUSII. The EPF10K100GC503-3 is capable of accommodating about 100,000 XOR gate logics. It is mounted.

The control block 2 selects the transmission mode of the design circuit by transmitting the circuit designed by the user to the logic design block 1 and selecting the clock frequency to be used.

Here, the clock frequency selection of the control block 2 is selected by the download and clock control block 9, and the download and clock control block 9 uses an 80 MHz oscillator, which is adapted to the needs of the user by a switch operation. Frequency generation and external clock frequency (CLK-EXT) can be selected and used.

An example of such clock frequency selection is as follows.

SELECT MODE: INT SELECT MODE: INT 0 80 MHz 8 2.5 MHz One 40 MHz 9 2 MHz 2 20 MHz A 1.25 MHz 3 16 MHz B 1 MHz 4 10 MHz C 100 MHz 5 8 MHz D 10 MHz 6 5 MHz E 100 ㎐ 7 4 MHz F CLK-EXT

The operation mode of the training kit for designing and utilizing the digital circuit of the present invention is a byte blaster mode when directly controlled by a personal computer, a passive parallel synchronous mode (PPS) when controlled by parallel ROM, and a built-in ROM. PS (Passive Serial) mode is controlled by the control block.

First, the byte blaster mode is a mode that implements a circuit designed on the ALTERA exclusive tool MAX + PLUSII directly to the logic design block (1) through the byte blaster (6). This is the quickest and easiest way to implement.

However, this method cannot be used without the personal computer since the personal computer must be connected to the byte blaster 6.

Next, the PPS mode is implemented by transferring data stored in the EPROM 7 in parallel to the logic design block 1, and can be implemented with the EPROM 7 without a personal computer. It is inconvenient to have a ROM writer that can store one data.

In addition, PS mode requires a ROM writer that stores data in ALTERA's dedicated ROM, PROM (8). ) Has the advantage of easy operation.

The control block 2 selectively controls the byte blaster 6, the EPROM 7, and the PROM 8 in accordance with the input of the download and clock control block 9 so that the user-designed digital circuits can be controlled. ) Selects the clock frequency while implementing it like a real circuit.

The logic design block (1) uses embedded RAM to implement a user-designed digital circuit, but uses the RAM (4) when a large amount of database related logic or lookup table is implemented.

The logic design block 1 can also interface and interface with the personal computer via the RS232C 5.

The output of the circuit designed by the user in the logic design block 1 is applied to the display block 11 through the input / output switching block 3 and displayed. The display block 11 is composed of a graphic LCD, a 7-segment, and an LED. .

The graphic LCD, 7-segment, LED of the display block 11 are previously selected as an output device.

The input switch block 10 is a block for inputting the logic design block 1 by the user, and the external expansion port 14 is a display block 11 or an input switch block in which a circuit designed by the user is embedded. It is used when it does not meet 10) or when a separate interface board is manufactured.

In the present invention, when designing a circuit using a text editor or graphic editor of MAX + PLUSII and using it in the byte blaster mode, the design circuit is loaded into the logic design block (1) through the byte blaster (6), and in the PPS mode. When used, the design circuit is stored in the EPROM 7 using the ROM writer. When used in the PS mode, the design circuit is stored in the PROM 8 using the ROM writer.

The byte blaster mode, the PPS mode, and the PS mode are set by operating a mode selection switch of the download and clock control block 9 as previously set.

The logic design block 1 functions as if the circuit designed by the user is configured as an actual circuit, and displays the result through the display block 11 according to the setting of the input / output switch block 10.

The present invention can verify the design circuit without actually configuring the circuit designed by the user. Especially, the design and processor of various digital circuits using the CD provided separately with the implementation of about 100 digital example circuits learned in university courses It is an effective invention to confirm the educational performance because it can verify the understanding, control, and utilization.

Claims (7)

(Correction) input means for receiving input to embed user designed circuit into logic block with PLD design tool, A logic design block (1) that performs the same function as the actual T circuits of the input TTL level and digital logic circuit, digital signal processing processor, ASIC replacement circuit, and digital related communication system; A download and clock control block 9 for selecting an input mode of the design circuit input means and a clock frequency used; A control block (2) for switching between the logic design block and the input / output device, Databases like lookup tables, RAM for logic implementations that require large amounts of memory, and An input switch block 10 that is an input of a circuit configured in the logic design block 1 and a display block 11 for outputting the output to the outside; Training kit for the design and use of digital circuits, characterized by having a connector that can use external input and output. 2. The circuit according to claim 1, wherein the design circuit input means comprises: a byte blaster 6 for receiving a circuit designed by a personal computer; EPROM 7 in which user-designed circuits are stored; Training kit for digital circuit design and utilization consisting of PROM (8), a dedicated ROM in logic design block (1). In the first paragraph, the logic design block 1 and the RAM 4, the input switch block 10, the external expansion port 14, the VGA port 13, and the PS / 2 port 12 are interchanged. Training kit for designing and utilizing digital circuits configured using dedicated switching devices. The method according to claim 1, wherein the input mode of the design circuit input means is selected by setting the download and clock control block 9, while the clock frequency of the download and clock control block 9 is freely selected to use the clock frequency. Training kit for designing and utilizing configured digital circuits. (Correction) In claim 1, the logic design block 1 is a training kit for designing and utilizing a digital circuit configured to input and output the display block 11 and the input switch block 10 through the input and output switching block (3) . (Correction) The logic design block (1) is characterized in that the logic design block (1) is provided with an external RAM (4) and an external expansion port (14), and an RS232C (5) for interface with a personal computer and bidirectional communication. Training kit for designing and utilizing digital circuits. The training kit of claim 1, wherein the connector comprises a PS / 2 port (12) for an external input and a VGA port (13) for an external monitor output.