CN110660678A - Chip structure assembling method and chip structure - Google Patents
Chip structure assembling method and chip structure Download PDFInfo
- Publication number
- CN110660678A CN110660678A CN201910965208.XA CN201910965208A CN110660678A CN 110660678 A CN110660678 A CN 110660678A CN 201910965208 A CN201910965208 A CN 201910965208A CN 110660678 A CN110660678 A CN 110660678A
- Authority
- CN
- China
- Prior art keywords
- tin
- chip
- lead
- chip carrier
- silver solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 47
- 229910000679 solder Inorganic materials 0.000 claims abstract description 91
- OLXNZDBHNLWCNK-UHFFFAOYSA-N [Pb].[Sn].[Ag] Chemical compound [Pb].[Sn].[Ag] OLXNZDBHNLWCNK-UHFFFAOYSA-N 0.000 claims abstract description 84
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 49
- 238000004806 packaging method and process Methods 0.000 claims abstract description 39
- 238000007747 plating Methods 0.000 claims abstract description 22
- 238000000576 coating method Methods 0.000 claims abstract description 21
- 239000011248 coating agent Substances 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims description 31
- 238000007790 scraping Methods 0.000 claims description 21
- 230000005496 eutectics Effects 0.000 claims description 10
- 230000001680 brushing effect Effects 0.000 claims description 8
- 238000001816 cooling Methods 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 238000003466 welding Methods 0.000 abstract description 31
- 230000000694 effects Effects 0.000 abstract description 14
- 238000005245 sintering Methods 0.000 abstract description 8
- 230000017525 heat dissipation Effects 0.000 abstract description 4
- 239000011800 void material Substances 0.000 abstract description 3
- 239000003795 chemical substances by application Substances 0.000 abstract 1
- 239000000463 material Substances 0.000 description 21
- 238000005476 soldering Methods 0.000 description 20
- 238000002844 melting Methods 0.000 description 13
- 230000008018 melting Effects 0.000 description 13
- 239000007788 liquid Substances 0.000 description 11
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 7
- 230000004907 flux Effects 0.000 description 6
- 239000002893 slag Substances 0.000 description 6
- 239000012876 carrier material Substances 0.000 description 5
- 238000004140 cleaning Methods 0.000 description 5
- 229910000881 Cu alloy Inorganic materials 0.000 description 4
- 230000006378 damage Effects 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 238000009825 accumulation Methods 0.000 description 3
- 238000004534 enameling Methods 0.000 description 3
- 238000009434 installation Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 3
- 229910001887 tin oxide Inorganic materials 0.000 description 3
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 2
- BLNMQJJBQZSYTO-UHFFFAOYSA-N copper molybdenum Chemical compound [Cu][Mo][Cu] BLNMQJJBQZSYTO-UHFFFAOYSA-N 0.000 description 2
- WUUZKBJEUBFVMV-UHFFFAOYSA-N copper molybdenum Chemical compound [Cu].[Mo] WUUZKBJEUBFVMV-UHFFFAOYSA-N 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 description 2
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 238000004506 ultrasonic cleaning Methods 0.000 description 2
- 238000009736 wetting Methods 0.000 description 2
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 1
- 239000011149 active material Substances 0.000 description 1
- 239000013543 active substance Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- UBOXGVDOUJQMTN-UHFFFAOYSA-N trichloroethylene Natural products ClCC(Cl)Cl UBOXGVDOUJQMTN-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4817—Conductive parts for containers, e.g. caps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention discloses a chip structure assembling method and a chip structure, and relates to the technical field of chip micro-assembly. The chip structure assembling method comprises the following steps: tin is enameled on the mounting part of the packaging shell and the chip carrier respectively by using tin-lead-silver solder; and placing the chip carrier after tin plating on the mounting part after tin plating, and after the tin-lead-silver solder is fully melted, fixing the chip carrier on the mounting part in a friction manner. The chip structure is assembled by using the chip structure assembling method. The tin-lead-silver fluxing-free agent type solder is adopted for sintering and welding the chip carrier and the packaging shell, and the problem of incomplete performance of a power type chip product due to poor heat dissipation is effectively solved by utilizing the characteristic of high relative heat conductivity coefficient of the tin-lead-silver solder. In addition, because the chip carrier and the packaging shell are subjected to tin coating treatment, the sintering of the chip carrier and the packaging shell is tight and seamless, the void ratio is extremely low, and a better chip carrier assembling effect is realized.
Description
Technical Field
The invention relates to the technical field of chip micro-assembly, in particular to a chip structure assembly method and a chip structure.
Background
In the semiconductor microwave communication industry, in order to meet the application requirements of high performance, high reliability and miniaturization of products, the design of a bare chip micro-assembly process for integrating a multifunctional multi-core device is carried out at the same time, and the assembly of a chip carrier is a key step of the chip micro-assembly process.
The existing chip structure assembly mode needs to weld the bare chip to the packaging shell in a high-temperature eutectic way, but because the bare chip has small volume and is extremely thin, the phenomenon of expansion with heat and contraction with cold is easy to occur at high temperature, the thermal expansion coefficient of the packaging shell for bearing the bare chip is required to be close to that of the silicon-based material of the bare chip, the packaging shell has larger relative volume and large design and processing difficulty, and the packaging shell is made of the high-performance matching material with higher cost.
In order to reduce the cost, a carrier material is introduced as an intermediate medium, and a chip carrier is adhered to the packaging shell by conductive silver paste after the bare chip is subjected to high-temperature eutectic crystallization to the carrier. However, the conductive silver paste has poor thermal conductivity, so that the heat dissipation requirement of the power type chip cannot be met, and the performance of the high-power type chip product is limited, so that the chip assembled by the method has obvious defects.
Accordingly, there is a need for a chip structure assembly method and a chip to solve the above problems.
Disclosure of Invention
The invention aims to provide a chip structure assembling method, which can realize seamless welding of chips, effectively solve the problem of incomplete performance of the power type chip product and improve the chip assembling effect.
In order to achieve the purpose, the invention adopts the following technical scheme:
a method of assembling a chip structure, comprising:
tin is enameled on the mounting part of the packaging shell and the chip carrier respectively by using tin-lead-silver solder;
and placing the chip carrier after tin plating on the mounting part after tin plating, and after the tin-lead-silver solder is fully melted, fixing the chip carrier on the mounting part in a friction manner.
The tin-lead-silver solder comprises, by mass, 62% of tin, 36% of lead and the balance of silver.
Wherein, the tin coating specifically comprises:
preheating a to-be-tinned piece and/or a substrate for bearing the tin-lead-silver solder, wherein the to-be-tinned piece comprises the mounting part and the chip carrier;
after covering the tin-lead-silver solder on the designated surface of the piece to be tin-lined, scraping the tin-lead-silver solder on the designated surface; or coating the tin-lead-silver solder on the surface of the substrate in a contact friction mode on the designated surface.
Wherein, the installation department sets up to the mounting groove is warded off tin and specifically includes:
preheating the packaging shell;
brushing the tin-lead-silver solder in the mounting groove;
and scraping the tin-lead-silver solder on the surface of the mounting groove.
Wherein, the tin coating on the chip carrier specifically comprises the following steps:
preheating the substrate;
brushing the tin-lead-silver solder on the surface of the substrate;
scraping the tin-lead-silver solder on the surface of the substrate;
contacting the assembling surface of the chip carrier with the tin-lead-silver solder on the surface of the substrate, and plating a layer of the tin-lead-silver solder on the assembling surface of the chip carrier in a friction mode;
and cooling the chip carrier in air for standby.
Wherein the temperature of preheating is set to be 190-200 ℃.
In the step of tin coating of the chip carrier, the substrate is a silver-plated copper block.
Wherein the chip carrier is made by eutectic of carrier and bare chip.
The steps of the chip structure assembling method are all carried out under a microscope.
Another object of the present invention is to provide a chip structure fabricated by the above chip structure assembly method, which has good solderability and low void ratio.
In order to achieve the purpose, the invention adopts the following technical scheme:
a chip structure is assembled by the chip structure assembling method.
The invention has the beneficial effects that:
the invention provides a chip structure assembly method and a chip structure, wherein tin-lead-silver fluxing agent-free solder is adopted for sintering and welding a chip carrier and a packaging shell, and the problem of incomplete performance of a power chip product due to poor heat dissipation is effectively solved by utilizing the characteristic of high relative heat conductivity coefficient of the tin-lead-silver solder. In addition, because the mounting parts of the chip carrier and the packaging shell are subjected to tin coating treatment, the sintering of the chip carrier and the packaging shell is tight and seamless, the void ratio is low, and a better chip structure assembling effect is realized.
In addition, the tin-lead-silver solder is scraped to remove the oxide on the surface of the tin-lead-silver solder, so that the soldering wettability of the tin-lead-silver solder is improved, and because no soldering flux active substances are used, the sintered module does not need to be cleaned, the damage and harm to devices caused by cleaning are avoided, and the reliability requirement and the safe process requirement of the chip module are better met.
Drawings
FIG. 1 is a basic flow chart of a chip structure assembly method according to an embodiment of the present invention;
FIG. 2 is a flow chart of tin coating of a chip carrier according to an embodiment of the present invention;
FIG. 3 is a flow chart of tin-coating of the mounting part according to the embodiment of the invention;
fig. 4 is a specific flowchart of a chip structure assembly method according to an embodiment of the invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
In the description of the present invention, unless otherwise expressly specified or limited, the terms "connected," "connected," and "fixed" are to be construed broadly, e.g., as meaning a fixed connection, a removable connection, a mechanical connection, an electrical connection, a direct connection, an indirect connection via an intermediary, a connection between two elements, or an interaction between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the description of the present invention, unless otherwise expressly specified or limited, the first feature "on" or "under" the second feature may include the first feature and the second feature being in direct contact, or may include the first feature and the second feature being in contact not directly but with another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The technical scheme of the invention is further explained by the specific implementation mode in combination with the attached drawings.
The embodiment of the invention provides a chip structure assembling method which can realize seamless welding of chips, effectively solve the problem that the performance of a power type chip product is not completely exerted and improve the assembling effect of the chips.
In order to ensure that the chip does not deform with the packaging shell when the chip expands with heat and contracts with cold and reduce the cost, the chip structure assembly method usually introduces a carrier material as an intermediate medium, and a bare chip is subjected to high-temperature eutectic crystallization to a carrier, so that the eutectic chip carrier is adhered to the packaging shell.
In the embodiment of the invention, the chip carrier is made by eutectic of the carrier and the bare chip, and considering that when the chip is eutectic-welded to the carrier at high temperature, the carrier has good thermal conductivity and the thermal expansion coefficient of the carrier is similar to that of the silicon-based material of the bare chip as much as possible, the carrier is made of molybdenum-copper alloy or copper-molybdenum-copper alloy. The carrier is subjected to ultrasonic cleaning by adopting trichloroethylene and isopropanol before eutectic in the bare chip, the carrier is cleaned more comprehensively in an ultrasonic cleaning mode, meanwhile, the carrier does not need to be in contact with cleaning liquid manually, heavy and dangerous physical labor is avoided, the corrosion of the cleaning liquid to a workpiece can also be avoided, and the cleaning effect is improved.
The carrier is eutectic with the bare chip to form the chip carrier, usually, gold-tin solder is selected, and the solder has the characteristics of good wettability and difficult oxidation, so the solder is suitable for being evenly paved on the surface of the carrier, but no low-temperature material with excellent performance similar to the gold-tin solder is used for carrying out secondary welding on the chip carrier. In the prior art, conductive silver paste is adopted as a solder when the secondary welding of a chip carrier is carried out, but the heat conductivity of the conductive silver paste is poor, so that the heat dissipation requirement of a power type chip cannot be met, the performance of a high-power type chip product is limited, and the chip structure assembled by the mode has obvious defects.
In order to solve the problems, the invention selects a plurality of materials to test the melting point, the thermal conductivity and the thermal expansion coefficient of the material so as to investigate whether the material can be evenly paved on the surface of a carrier and has good welding effect when welding under the condition that the thermal conductivity meets the requirements, and the test comparison results of different materials are shown in table 1. As can be seen from table 1, the original tin-lead material has good thermal conductivity, but when soldering is performed, if no soldering flux is added, the soldering wettability is poor and cannot meet the requirements of a soldering process, if the soldering flux is added, a chip is polluted, oxidation slag is easily generated, the voidage is increased, and the soldering effect is poor, so that the chip structure assembly process does not allow the use of soldering flux or any other substances with pollution corrosion, and the original tin-lead material is not suitable for the secondary soldering of a chip carrier; other materials are difficult to meet the requirements of high thermal conductivity, proper melting point and good wettability at the same time. Compared with the prior art, the tin-lead-silver material has higher melting point, meets the requirements on both heat conductivity and wettability, and can effectively meet the heat consumption requirement of a power consumption device chip. Meanwhile, no soldering flux can be added during welding, so that the cleanliness of the welding surface of the chip is improved, the welding effect is improved, and the voidage is reduced. Therefore, the invention selects tin-lead-silver material as the solder for welding the chip carrier to the packaging shell.
Specifically, the mass percent of tin in the selected tin-lead-silver material is 62%, the mass percent of lead is 36%, and the balance is silver. The test result shows that various parameters of the tin-lead-silver material with the proportion meet the requirements, and the excellent welding effect can be realized.
TABLE 1
The invention selects tin-lead-silver material as solder and provides a chip structure assembly method, as shown in figure 1, a chip carrier is assembled on a packaging shell: firstly, tin-lead-silver solder is used for enameling tin on a mounting part of a packaging shell and a chip carrier respectively; and secondly, placing the chip carrier after tin coating on the mounting part after tin coating, and after the tin-lead-silver solder is fully melted, fixing the chip carrier on the mounting part in a friction manner.
Specifically, the installation department can set up to the mounting groove, and the form through the mounting groove is counterpointed the welding with the chip carrier and is gone up on the encapsulation casing, has guaranteed chip carrier welding position's accuracy, can also make the tin lead silver solder who uses all take in the mounting groove simultaneously for its welding is more pleasing to the eye. In addition, corresponding to it, the encapsulation carrier also can set up to a tube sealing shell, through set up the mounting groove on tube shell surface, guarantees that the chip carrier can level and smooth tight real welding on tube shell.
Preferably, the steps of the chip structure assembling method are all performed under a microscope, so that on one hand, the chip carrier can be accurately and unmistakably placed in the mounting part of the packaging shell, on the other hand, the tin-lead-silver material can be fully melted, and the accuracy and the welding effect of the chip structure assembling are ensured.
In the embodiment of the invention, the tin coating refers to a process of wetting a lead or a conductive part of a component to be soldered with tin in advance so as to facilitate soldering. Therefore, the step of tin coating the mounting parts of the chip carrier and the packaging shell in the first step specifically comprises the following steps of: preheating a to-be-tinned piece and/or a matrix for bearing tin-lead-silver solder, wherein the to-be-tinned piece comprises an installation part and a chip carrier; covering a layer of tin-lead-silver solder on the appointed surface of the piece to be tin-plated, and scraping the tin-lead-silver solder on the appointed surface; or the tin-lead-silver solder on the surface of the substrate is coated on the designated surface of the piece to be tin-lined in a contact friction mode.
Preferably, the temperature for preheating in the tin-coating process is set to 190-200 ℃, which is compared with the melting point of the tin-lead-silver material of 179 ℃, and has a perfect safe temperature difference distance from the melting point of the solder in the above processes of eutectic of the bare chip and the carrier, i.e. 248 ℃, and is suitable for multi-carrier or longer-time sintering. In this embodiment, the carrier material is made of molybdenum-copper alloy or copper-molybdenum-copper alloy, and the melting point of the carrier material is 1300 ℃ or higher, which is much higher than the preheating temperature, so that the preheating temperature of 190-200 ℃ is higher than the melting point of the tin-lead-silver material, which can ensure the tin-lead-silver material to be completely melted, and the temperature is lower than the melting points of the carrier material and the solder in the foregoing process, and has a certain temperature difference distance, which can place the chip carrier at the temperature for a long time, thereby ensuring the tin-coating of the chip carrier. Meanwhile, tests show that the tin-lead-silver material has a more prominent melting effect in the temperature range.
Specifically, a layer of tin-lead-silver solder is required to cover the back surface of the chip carrier and the mounting part of the packaging shell. When the solder is directly brushed on the surface of the piece to be enameled, the wettability of the solder is poor, so that the solder on the surface of the piece to be enameled is in a state of a plurality of small piles, and the flatness and firmness of the chip structure welding are affected. Considering that the area of the chip carrier is small, the mode of directly brushing a layer of tin-lead-silver solder on the surface of the chip carrier to remove the oxide on the surface of the solder is not feasible, so that the embodiment of the invention is provided with a substrate, the tin-lead-silver solder is fully wetted on the surface of the substrate, and then the assembling surface of the chip carrier is rubbed against the surface of the substrate to realize tin coating of the chip carrier.
In the embodiment of the present invention, as shown in fig. 2, the tin-plating on the chip carrier specifically includes: firstly, preheating a substrate to ensure the rapid melting of the tin-lead-silver solder and improve the welding efficiency; the tin-lead-silver solder is coated on the surface of the substrate, the tin-lead-silver solder on the surface of the substrate is sufficiently scraped, oxides on the surface of the solder are removed, the surface of the substrate is sufficiently wetted, and tin liquor on the surface of the tin-lead-silver solder is uniform, namely, the surface has no tin oxide slag, no tin accumulation phenomenon and no tin liquor shrinkage phenomenon, so that the soldering wettability of the tin-lead-silver solder is improved, and the soldering effect of a chip carrier and a mounting part is further improved; then clamping two sides of the chip carrier by using tweezers, contacting the assembly surface of the chip carrier with the tin-lead-silver solder on the surface of the substrate, plating a layer of tin-lead-silver solder on the assembly surface of the chip carrier in a friction mode, fully and uniformly welding the surface of the chip carrier, and finally cooling the chip carrier at intervals and putting the chip carrier into a clean antistatic box for later use.
In the chip carrier assembly method according to the embodiment of the invention, when the chip carrier is soldered to the mounting portion of the package case by using the tin-lead-silver solder, the solder surface wettability can be improved and the solder surface oxide can be removed by only scraping by utilizing the characteristics of the tin-lead-silver material without using a flux-type active material. Because no soldering flux is used for welding, the sintered module does not need to be cleaned, thereby avoiding the damage and harm to devices caused by cleaning and better meeting the reliability requirement and the safe process requirement of chip modules.
Preferably, the substrate is provided as a silver-plated copper block, the size of the substrate can be set according to the area of the chip carrier, the size of the substrate is more than 2 times of the area of the chip carrier, the size of the substrate is not more than 500 x 500mm, and the size of the substrate is set to 200 x 2mm in the embodiment. In addition, the tin lead silver solder can be scraped by using a tin scraping sheet, the tin scraping sheet can be set as a single-sided gold plating sheet of a ceramic material, the size of the tin scraping sheet can be set according to the width of the chip carrier, the size of the tin scraping sheet is 40-80% of the width of the chip carrier, and the size of the tin scraping sheet is set to 10 × 0.1mm in the embodiment.
Specifically, in the step of plating a layer of tin-lead-silver solder on the chip carrier assembly surface in a friction mode, the chip carrier assembly surface is ensured to quickly rub the surface of the substrate for multiple directions and times, so that the carrier assembly surface can be uniformly and fully covered with a layer of thin tin liquid, and better fusion sintering can be ensured during subsequent welding of the chip carrier and the packaging shell.
In the embodiment of the present invention, as shown in fig. 3, similarly to the above, the tin-plating on the package housing mounting portion specifically includes: firstly, preheating a packaging shell to ensure the rapid melting of tin-lead-silver solder and improve the welding efficiency; further brushing tin-lead-silver solder on the mounting part of the packaging shell, scraping the tin-lead-silver solder on the surface of the mounting part, improving the soldering wettability of the tin-lead-silver solder, and continuously removing oxidation slag to fully wet tin at all parts; and finally, a thin layer of welding liquid is left on the mounting part, so that the mounting part is fully covered with a layer of welding liquid, and further, when the chip carrier is placed on the mounting part, the chip carrier and the mounting part are completely attached by the welding liquid, and the welding effect of the chip carrier and the mounting part is improved.
Preferably, when the mounting part is set as the mounting groove, the tin-coating in the mounting groove specifically comprises: preheating the packaging shell; brushing the tin-lead-silver solder in the mounting groove; and scraping tin-lead-silver solder on the surface of the mounting groove. The tin-lead-silver solder coated on the surface of the packaging shell is contained in the mounting groove, so that the solder is prevented from splashing or flowing to other positions of the packaging shell in the scraping process, and the attractiveness and the safety of welding are improved.
Specifically, the method for scraping the tin-lead-silver solder on the surface of the mounting part of the packaging shell is the same as the method for scraping the tin-lead-silver solder on the surface of the substrate, and the method is required to ensure that the tin-lead-silver soldering liquid on the surface is uniform, namely, the surface has no tin oxide slag, no tin accumulation phenomenon and no tin liquid shrinkage phenomenon, and a layer of uniform thin soldering liquid is left on the mounting part.
In the embodiment of the invention, as shown in fig. 4, after the chip carrier and the mounting part of the packaging shell are tin-plated, the chip carrier after tin-plating is clamped by tweezers and is placed on the mounting part after tin-plating, after the back surface of the carrier is molten by tin plating for one to two seconds, the chip carrier and the mounting part are clamped by the tweezers and are rapidly rubbed to be fixed in a multi-direction and multi-time manner, so that the chip carrier and the mounting part are fully molten into a whole, and seamless welding sintering is formed. Because the chip carrier and the packaging shell are subjected to tin coating treatment, and oxides on the surface of the tin-lead-silver solder are removed by scraping the tin-lead-silver solder, the soldering wettability of the tin-lead-silver solder is improved, the chip carrier and the packaging shell are tightly and seamlessly sintered, the voidage is extremely low, the voidage can be controlled within 5% even if the chip carrier and the packaging shell are sintered in a non-vacuum environment, the voidage is far superior to 25% of the traditional conductive silver paste, and the better chip carrier assembling effect is realized.
In the embodiment of the present invention, as shown in fig. 1 to 4, the following steps may be taken to assemble the chip structure:
the method comprises the following steps of firstly, tin-lead-silver solder is used for enameling tin on a packaging shell mounting part and a chip carrier respectively, wherein the step of enameling tin on the chip carrier is as follows:
preheating a substrate at the temperature of 190-.
Clamping two sides of a chip carrier by using tweezers, contacting an assembly surface of the chip carrier with tin-lead-silver solder on the surface of a base body, clamping the assembly surface of the chip carrier, rapidly rubbing the surface of the base body for multiple directions and times, plating a layer of tin-lead-silver solder on the assembly surface of the chip carrier, cooling the chip carrier at intervals, and putting the chip carrier into a clean antistatic box for standby.
The steps of tin coating the packaging shell are as follows:
the method comprises the steps of pre-heating and packaging a shell at the temperature of 190 plus materials and 200 ℃, brushing tin-lead-silver solder on a mounting part of the packaging shell, scraping the tin-lead-silver solder on the surface of the mounting part by using a tin scraping sheet, continuously removing oxidized slag on the surface of the solder, fully wetting the solder at each part, namely, the surface has no tin oxide slag, no tin accumulation phenomenon and no tin liquid shrinkage phenomenon, and finally leaving a thin layer of soldering liquid on the part.
And secondly, clamping the chip carrier after tin plating at the temperature of 190-200 ℃ by using tweezers, putting the chip carrier into the mounting part after tin plating, after the back surface of the carrier is subjected to tin plating melting for one to two seconds, clamping the chip carrier and the mounting part by using the tweezers, rapidly rubbing the chip carrier and the mounting part for multiple times in multiple directions to be fixed, fully melting the chip carrier and the mounting part into a whole, and forming seamless welding sintering.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A method of assembling a chip structure, comprising:
tin is enameled on the mounting part of the packaging shell and the chip carrier respectively by using tin-lead-silver solder;
and placing the chip carrier after tin plating on the mounting part after tin plating, and after the tin-lead-silver solder is fully melted, fixing the chip carrier on the mounting part in a friction manner.
2. The method for assembling a chip structure according to claim 1, wherein the tin-lead-silver solder comprises 62% by mass of tin, 36% by mass of lead and the balance of silver.
3. The chip structure assembly method according to claim 1 or 2, wherein the tin-coating specifically comprises:
preheating a to-be-tin-plated part and/or a substrate for bearing the tin-lead-silver solder, wherein the to-be-tin-plated part comprises the mounting part and the chip carrier;
after covering the tin-lead-silver solder on the designated surface of the piece to be tin-lined, scraping the tin-lead-silver solder on the designated surface; or coating the tin-lead-silver solder on the surface of the substrate in a contact friction mode on the designated surface.
4. The chip structure assembling method according to claim 3, wherein the mounting portion is provided as a mounting groove, and the tin-plating in the mounting groove specifically comprises:
preheating the packaging shell;
brushing the tin-lead-silver solder in the mounting groove;
and scraping the tin-lead-silver solder on the surface of the mounting groove.
5. The chip structure assembly method according to claim 3, wherein the tin-coating on the chip carrier specifically comprises:
preheating the substrate;
brushing the tin-lead-silver solder on the surface of the substrate;
scraping the tin-lead-silver solder on the surface of the substrate;
contacting the assembling surface of the chip carrier with the tin-lead-silver solder on the surface of the substrate, and plating a layer of the tin-lead-silver solder on the assembling surface of the chip carrier in a friction mode;
and cooling the chip carrier in air for standby.
6. The chip structure assembly method according to claim 3, wherein the temperature of the preheating is set to 190 ℃ -200 ℃.
7. The method for assembling a chip structure according to claim 5, wherein in the step of tin-plating the chip carrier, the substrate is a silver-plated copper block.
8. The method of claim 1 or 2, wherein the chip carrier is made of a carrier eutectic with a bare chip.
9. The chip structure assembly method according to claim 1 or 2, wherein the steps of the chip structure assembly method are performed under a microscope.
10. A chip structure assembled using the chip structure assembly method according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910965208.XA CN110660678A (en) | 2019-10-11 | 2019-10-11 | Chip structure assembling method and chip structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910965208.XA CN110660678A (en) | 2019-10-11 | 2019-10-11 | Chip structure assembling method and chip structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110660678A true CN110660678A (en) | 2020-01-07 |
Family
ID=69040693
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910965208.XA Pending CN110660678A (en) | 2019-10-11 | 2019-10-11 | Chip structure assembling method and chip structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110660678A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112216675A (en) * | 2020-09-11 | 2021-01-12 | 中国电子科技集团公司第十三研究所 | Micro-assembly substrate structure and chip micro-assembly method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1929950A (en) * | 2004-03-09 | 2007-03-14 | 德州仪器公司 | Method of semiconductor device assembly including fatigue-resistant ternary solder alloy |
| CN103752970A (en) * | 2013-12-24 | 2014-04-30 | 广州金升阳科技有限公司 | Lead frame soldering method |
| CN104269386A (en) * | 2014-08-28 | 2015-01-07 | 西安电子科技大学 | Multi-chip packaging bonding layer heat-conducting tooth structure |
| CN208675599U (en) * | 2018-05-31 | 2019-03-29 | 深圳市硕凯电子股份有限公司 | A kind of novel mono-/multi- chip patch-type electronic device |
-
2019
- 2019-10-11 CN CN201910965208.XA patent/CN110660678A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1929950A (en) * | 2004-03-09 | 2007-03-14 | 德州仪器公司 | Method of semiconductor device assembly including fatigue-resistant ternary solder alloy |
| CN103752970A (en) * | 2013-12-24 | 2014-04-30 | 广州金升阳科技有限公司 | Lead frame soldering method |
| CN104269386A (en) * | 2014-08-28 | 2015-01-07 | 西安电子科技大学 | Multi-chip packaging bonding layer heat-conducting tooth structure |
| CN208675599U (en) * | 2018-05-31 | 2019-03-29 | 深圳市硕凯电子股份有限公司 | A kind of novel mono-/multi- chip patch-type electronic device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112216675A (en) * | 2020-09-11 | 2021-01-12 | 中国电子科技集团公司第十三研究所 | Micro-assembly substrate structure and chip micro-assembly method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102459745B1 (en) | Copper/ceramic bonded body, insulated circuit board, and copper/ceramic bonded body manufacturing method, insulated circuit board manufacturing method | |
| US9871179B2 (en) | Thermoelectric power module | |
| US3436818A (en) | Method of fabricating a bonded joint | |
| JP5636720B2 (en) | Semiconductor device manufacturing method and joining jig | |
| JP2007110001A (en) | Semiconductor device | |
| KR102154373B1 (en) | Power module | |
| KR102336484B1 (en) | Assembly, power-module substrate provided with heat sink, heat sink, method for manufacturing assembly, method for manufacturing power-module substrate provided with heat sink, and method for manufacturing heat sink | |
| JP2006286996A (en) | Terminal box for solar panel | |
| JP4765098B2 (en) | Semiconductor device and manufacturing method thereof | |
| CN110660678A (en) | Chip structure assembling method and chip structure | |
| JP2006066716A (en) | Semiconductor device | |
| KR101778041B1 (en) | Thermoelectric module exposing electrodes of low temperature and fabrication method thereof | |
| US8941234B2 (en) | Manufacturing process and heat dissipating device for forming interface for electronic component | |
| JP2008277335A (en) | Semiconductor device and its manufacturing process | |
| RU2528392C1 (en) | Ic cooling device | |
| JP5579148B2 (en) | Power semiconductor device | |
| JP2010109054A (en) | Thermoelectric conversion module and cooler, generator and temperature controller | |
| JP2004119944A (en) | Semiconductor module and mounting substrate | |
| CN114759007A (en) | DBC substrate capable of reducing warping caused by heating | |
| JP2001168252A (en) | Semiconductor device and manufacturing method thereof | |
| JP6011410B2 (en) | Semiconductor device assembly, power module substrate and power module | |
| KR100946755B1 (en) | Heat spreader with junction layer by brazing and manufacturing method thereof | |
| JP2017168635A (en) | Substrate for power module and manufacturing method of power module | |
| JP2006041363A (en) | Resin-sealed semiconductor device | |
| CN216528873U (en) | Circuit substrate and insulated gate bipolar transistor module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200107 |