CN110634958B - Semiconductor thin film field effect transistor made of unstable two-dimensional material and preparation method thereof - Google Patents
Semiconductor thin film field effect transistor made of unstable two-dimensional material and preparation method thereof Download PDFInfo
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/2633—Bombardment with radiation with high-energy radiation for etching, e.g. sputteretching
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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Abstract
The invention relates to a semiconductor thin film field effect transistor made of an unstable two-dimensional material and a preparation method thereof. The invention can obtain unstable two-dimensional materials in air and solvent by a simpler method, and can obtain small-sized electronic devices by a micro-nano processing technology. Meanwhile, the field effect mobility can reach the level of a hard mask process, and the yield is higher. For InSe films, the highest field effect mobility exceeds 550cm2Vs. The device channel is simultaneously protected by an encapsulation buffer layer, and the performance of the device channel can not be reduced in an air environment for 60 days. The aluminum oxide packaging buffer layer is stable and transparent, and can be applied to further manufacturing of photoelectric micro-nano devices. The electrical hysteresis is small (< 1V).
Description
Technical Field
The invention relates to a semiconductor thin film field effect transistor made of an unstable two-dimensional material and a preparation method thereof, belonging to the technical field of semiconductor processes.
Background
Starting from the discovery of graphene, the research on two-dimensional layered materials has raised a hot tide. To date, a large number of high-quality two-dimensional layered semiconductor materials have been developed and researched, mainly including three types: transition metal sulfides, black phosphorus, and group iii-vi selenides.
Among many two-dimensional materials, black phosphorus, indium selenide and the like, which have high theoretical mobility, have the disadvantage of unstable properties in air and solvent environments. Because of the lone pair of electrons on the phosphorus atom of the fifth main group, the black phosphorus is rapidly degraded when meeting water or oxygen to form a phosphoric acid substance. The high mobility of the two-dimensional black phosphorus nanosheet is greatly inhibited, and the electrical properties of the device are not easy to maintain. The structure of black phosphorus (black phosphorus) is shown in fig. 1.
Indium selenide, InSe, is a binary compound of indium atoms (In) and selenium atoms (Se), four atoms thick, In the atomic arrangement order Se-In-Se. In 2013, scientists stripped atomic thin films from InSe layered crystals for the first time, 2016, and studiedThe optical and electrical properties of the material with the thickness from 1 nanometer to a few nanometers are researched. InSe has a small effective electron mass (m ═ 0.143 m)0) The electron mobility at room temperature can reach 1000cm2(vi)/vs, with electron mobility much higher than that of silicon, and layered disulfides. Furthermore, as the thickness of the material decreases from the bulk layer to the bilayer, its bandgap increases by more than 0.5 eV. The structure of InSe is shown in FIG. 2.
Most methods for producing a two-dimensional material semiconductor device are a mechanical peeling method (see [ 1 ] d.a.bandurin, a.v.tyurin, g.l.yu, a.mishechnko, v.zolyomi, s.v.morozov, r.k.kumar, r.v.gorbachev, z.r.kudynskyi, s.pezzini, z.d.kovalyuk, u.zeiler, k.s.novoselov, a.patane, l.eaves, i.v.griigoria, v.i.f. factory' ko, a.k.im gel, and y.cao, "High electron mobility, a.l electron mobility, a.e. electron mobility and tissue optics, and m.k.m. and m.m.p.t.m.t.m.t.m. 1, n.p.m. n.t.m. n.p.t.m. 1, m. n.m. n.p. n.m. n. k.m. n. n. Two-dimensional material nano-flakes are transferred onto a substrate from bulk material or physical vapor deposition to fabricate electronic devices. InSe is researched on the basis of a sample prepared by a mechanical stripping method, and the material obtained by the method has the advantages of few defects, smooth surface and high mobility. Most high mobility two-dimensional material devices are obtained by mechanical lift-off. However, the mechanical stripping method has disadvantages: the thickness of the nanosheet obtained by stripping and the distribution position of the nanosheet on the substrate are very random, the position cannot be controlled, and the yield of the manufactured device is low.
InSe is much better than black phosphorus in stability in atmospheric environment, but is still influenced by oxygen and water, so that mobility is reduced irreversibly, and application of the material is greatly limited. In the manufacturing process of the device, the surface of the InSe material is inevitably exposed to the atmosphere, and if the process is longer, the field effect mobility of the device is definitely greatly reduced. To avoid this, researchers at Manchester university have made InSe devices (see reference [ 1 ]) in a glove box under argon atmosphere while covering the InSe skin with BN (see reference [ 1 ]) or PMMA (see reference [ 3 ] W.Feng, W.Zheng, W.Cao, and P.Hu, "Back gated multilayer InSe semiconductors with enhanced carrier mobility via the coating of carrier scattering from a dielectric interface," Adv Mater, vol.26, pp.6587-93, Oct, doi:10.1002/adma.201402427.) to isolate air contact, which are complex processes and require special equipment.
In the micro-nano processing of a two-dimensional material semiconductor device, the material needs to be patterned, and common methods include a hard mask and ultraviolet exposure (electron beam exposure).
The hard mask is generally made of a stainless steel sheet by laser etching, and can be used for manufacturing a field effect transistor with the minimum size of 60 microns of channel length. The hard mask structure is shown in fig. 3. Many subjects adopt this method to prepare High Mobility two-dimensional material field effect tubes (see [ 4 ] M.J.Li, C.Y.Lin, S.H.Yang, Y.M.Chang, J.K.Chang, F.S.Yang, C.R.ZHong, W.B.Jian, C.H.Lien, C.H.Ho, H.J.Liu, R.Huang, W.W.Li, Y.F.Lin, and J.H.Chu, "High Mobilities in layer Ine Transistors with Indium-insulation-Induced Surface Charge Doping," Advanced Materials, 30, Nov 22018, doi: ARTN 180369010.1002/adobe.800. and [ 5.H.107 ] H.H.Chang, H.H.0332, C.H.H.67, Robj.S.H.52, C.H.31, and No. Cheng, N.H.31, H.31, H.III, H.H.H.III, H.III, C.III, H.III, III. The method can be used for preparing the product quickly, has short exposure time in the air, and does not contact other chemical reagents in the process. However, this method has many disadvantages corresponding to the mechanical peeling method: the two-dimensional material film transferred by the mechanical stripping method has randomness, and the thickness, the size and the position can not be accurately controlled. The pattern of the hard mask is fixed, and generally only one film with a larger area can be selected on the substrate to be manufactured. Large scale fabrication and device repeatability are low. Meanwhile, the thickness of the two-dimensional material obtained by the mechanical stripping method depends on the stripping times, the thickness is thinner as the stripping times are larger, but the area obtained at the same time is smaller, so that the method using the hard mask is more and more difficult.
The photoetching method can adopt maskless laser direct-writing ultraviolet exposure or electron beam exposure according to different requirements. By adopting the method, accurate positioning and simultaneous exposure can be realized, and several to dozens of devices can be simultaneously manufactured on one substrate, or even more (according to the two-dimensional material layout of the lift-off transfer). The channel length of the device can reach 3 micrometers (ultraviolet exposure) and even less than 100 nanometers (electron beam exposure). And an overlay technique may be used to fabricate devices of multilayer structure. This is not possible with hard masks. However, the photolithography process requires spin-coating of a photoresist (e-beam resist), a developing solution, a stripping solution (etching solution), and other chemical agents during the fabrication process. For chemically unstable materials, especially two-dimensional materials as thin as tens of layers or even multiple or single layers. Materials and interfaces are difficult to avoid, resulting in irreversible device performance degradation. Mainly reflects the changes of field effect mobility reduction, serious electric hysteresis phenomenon and even bipolar. This reflects that both the energy level of the material and the defect state of the interface are severely affected.
For two-dimensional material devices that are air unstable, there is a significant performance degradation as the time of placement increases. Part of the subject groups used various ways to cover the InSe material: (1) spin coating PMMA thin films (see literature [ 3 "); (2) two-dimensional layered BN using mechanical exfoliation (see document [ 1 "); (3) oxidized InSe surfaces (see literature [ 5 ]); (4) a discontinuous In island-like thin film is evaporated on the InSe surface (see document [ 4 ]). However, these methods all have different disadvantages: (1) PMMA is incompatible with photoetching technology and can be dissolved when encountering organic solvents. The contact of the electrode with the probe is also affected during the test due to the need to spin-coat the positive sample. (2) The BN slice is used for covering, the process difficulty is high, the alignment difficulty is high, the success rate is low, the process is usually finished in a glove box, and the efficiency is low. (3) Oxidizing the surface of the InSe to change the surface of the InSe into InOxThe controllability of the oxidation process is low and cannot be applied to thin-layer InSe materials. InO of surfacexThe research on the material characteristics of InSe can also generate interference, and the InSe is not suitable for manufacturing photoelectric devices. The devices reported in the literature are also fabricated using hard masks. (4) The method for evaporating In has low controllability, and the effective channel length of the device can be reduced by being difficult to measure, thereby causing errors on the extraction of intrinsic parameters of the device and materials. It is not suitable for the manufacture of photoelectric devices.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a semiconductor thin film field effect transistor made of an unstable two-dimensional material;
the invention also provides a preparation method of the semiconductor thin film field effect transistor made of the unstable two-dimensional material;
the technical scheme of the invention is as follows:
a semiconductor thin film field effect transistor made of an unstable two-dimensional material sequentially comprises a silicon wafer substrate, the unstable two-dimensional material, an aluminum oxide thin film, a source electrode and a drain electrode from bottom to top.
Preferably according to the invention, the labile two-dimensional material is indium selenide (InSe), black phosphorus, a transition metal sulfide or a group iii-iii compound.
Preferably, according to the invention, the thickness of the aluminum oxide film is 20 to 40 nm.
More preferably, the thickness of the alumina thin film is 30 nm. The 30nm aluminum oxide can play a good isolation role, so that the influence of a process solvent and air on a semiconductor material is small, and meanwhile, the problem that the electrode is difficult to strip due to the fact that too much photoresist is etched because etching selection is small in rear etching is avoided.
Preferably, according to the invention, the thickness of the unstable two-dimensional material is 20-80 nm.
The preparation method of the semiconductor thin film field effect transistor made of the unstable two-dimensional material comprises the following steps:
(1) manufacturing a silicon wafer substrate with an alignment mark as a transfer substrate;
(2) transferring the two-dimensional material with the thickness of 20-80nm onto a silicon wafer substrate; namely: tearing a high-quality mother sheet material prepared by a Bridgman method for multiple times by using an adhesive tape to ensure that the thickness of the randomly distributed InSe nanosheets reaches 20-80nm, and transferring the two-dimensional material on the adhesive tape onto a silicon wafer substrate;
(3) placing the device obtained in the step (2) into an atomic layer deposition device (ALD), and depositing an alumina film on the surface of the device obtained in the step (2);
the alumina film is an encapsulation layer, and the gases adsorbed in a short time after stripping can be volatilized again in a vacuum environment due to the heating in the deposition process in ALD. The carrier gas for ALD is high purity nitrogen, which is chemically inert and does not affect InSe. The residual water molecules after volatilization are reacted in the reaction deposition mode of ALD, the growth process of ALD is to purge once water vapor to be adsorbed by the surface of a sample, and then purge once aluminum source to react with water molecules to generate alumina, and the part is designed specifically.
The alumina film plays a role in coating a semiconductor material and isolating air and a process solvent in a later micro-nano processing process. And after the device is prepared, the property of the material is further protected by taking the aluminum oxide film on the channel of the device as a buffer layer, so that the performance of the device can be stable for a long time. Meanwhile, the aluminum oxide film manufactured by ALD has high quality, large forbidden band width and large light transmission spectrum range, and is suitable for manufacturing photoelectric devices.
(4) The appropriate InSe nanosheets are searched under a microscope, and the positioning data are recorded, which can reach tens of minutes. And designing the layout according to the positioning data. Spin-coating photoresist, baking the photoresist, and using ultraviolet exposure or electron beam exposure to manufacture a source electrode pattern and a drain electrode pattern;
(5) placing the device manufactured in the step (4) into an inductively coupled reactive ion etcher (ICP) for etching, and etching the alumina film to expose an unstable two-dimensional material;
(6) placing the etched sample into electron beam evaporation equipment, and depositing a Ti/Au metal film;
(7) placing the device in acetone for lift-off treatment;
(8) and (5) annealing the device prepared in the step (7) for 1h by a hot plate in air at the temperature of 150-200 ℃ to obtain the device. Annealing is used to enhance the electrode ohmic contact.
Preferably, according to the present invention, in the step (3), the deposition temperature is 130-180 ℃.
Further preferably, the deposition temperature is 150 ℃. The alumina film has high film forming quality at 150 ℃.
Preferably, in the step (3), the device obtained in the step (2) is placed in an atomic layer deposition device (ALD), and an alumina film is deposited on the surface of the device obtained in the step (2); the carrier gas of the atomic layer deposition equipment is high-purity nitrogen with the purity of more than 99.999 percent. The high-purity nitrogen is taken as a carrier gas to carry two reaction driving bodies of an aluminum source and water into the cavity, and the high-purity nitrogen does not participate in the reaction.
Preferably, in step (3), the thickness of the alumina thin film is 20-40 nm.
More preferably, the thickness of the alumina thin film is 30 nm. The 30nm aluminum oxide can play a good isolation role, so that the influence of a process solvent and air on a semiconductor material is small, and meanwhile, the problem that the electrode is difficult to strip due to the fact that too much photoresist is etched because etching selection is small in rear etching is avoided.
Preferably, according to the present invention, before step (5) is performed, the following operations are performed: the device was placed in an oxygen plasma cleaner for 30 s. The oxygen plasma cleaning machine is a low-power (output power is about 18W) photoresist removing device, can further oxidize and ash a small amount of residual photoresist after development, and can treat an ICP etching surface cleanly to ensure that the ICP etching surface is smooth and uniform.
Preferably, in the step (5), the device manufactured in the step (4) is placed in an inductively coupled reactive ion etcher (ICP) for etching, and the etching gas is BCl3The flow of the etching gas is 15sccm, the power of the inductively coupled reactive ion etching machine is 100W, the radio frequency power is 50W, the etching time is 3min, and the etching thickness is 30 nm.
The flow of the etching gas, the power of the inductively coupled reactive ion etcher, the radio frequency power, the etching time and the etching thickness are selected, so that the physical etching process and the chemical etching process are reasonable in proportion, and the etching speed is proper. But also can keep the shape of the photoresist during etching, so that the photoresist is suitable for the following metal evaporation stripping process.
According to the invention, in the step (1), a silicon wafer substrate with an alignment mark is manufactured by adopting a photoetching method.
According to the invention, in the step (2), a mechanical stripping method is adopted, and the two-dimensional InSe material with the thickness of 20-80nm is prepared by stripping with an adhesive tape for several times.
Preferably, in the step (7), the device is immersed in acetone at 40 ℃ for 1h until the photoresist is dissolved and the Ti/Au metal film is completely peeled off to form the source electrode and the drain electrode.
The invention has the beneficial effects that:
1. the invention obtains unstable two-dimensional materials in air and solvent by a simple method, and can obtain small-sized electronic devices by a micro-nano processing technology. The field effect mobility of the semiconductor thin film field effect transistor prepared by the invention can reach the level of a hard mask process, and the yield is higher. For example, for InSe, the highest field effect mobility exceeds 550cm2Vs. The device channel is simultaneously protected by an encapsulation buffer layer, and the performance of the device channel can not be reduced in an air environment for 60 days. The aluminum oxide packaging buffer layer is stable and transparent, and can be applied to further manufacturing of photoelectric micro-nano devices. The electrical hysteresis is small (< 1V).
2. Compared with the PMMA packaging process, the invention is compatible with the photoetching process, and the performance of the manufactured device reaches or even exceeds that of a hard mask method. By using the photoetching process, the minimum line width of the device can reach 3 mu m (limit of a photoetching machine).
3. The aluminum oxide covered on the surface of the channel has higher band gap and high light transmittance, and the high-transparency aluminum oxide film ensures that the energy attenuation is very small when a light source irradiates the channel, so that the aluminum oxide film is suitable for further research and development of photoelectric devices.
4. The existing hard mask method can only manufacture one device on one substrate and cannot be used for overlay. The invention has large output, and a plurality of devices can be manufactured by transferring one substrate at a time. 30-50 devices can be simultaneously manufactured on the same substrate, and alignment can be carried out.
5. Compared with a BN film packaging process, the manufacturing process disclosed by the invention is low in difficulty, short in exposure time of the material in the environment, free of the support of complex equipment such as a glove box and the like, and compatible with a conventional micro-nano processing method.
6. The micro-nano processing technology can be compatible, the expandability of the type of the manufactured device is strong, and the yield is higher.
Drawings
FIG. 1 is a schematic view of a black phosphorus (black phosphorus) structure;
FIG. 2 is a schematic view of the structure of InSe;
FIG. 3 is a schematic view of a hard mask;
FIG. 4 is a schematic flow chart of a method for manufacturing a semiconductor thin film FET using an unstable two-dimensional material according to the present invention;
FIG. 5(a) is a schematic diagram of an output curve of a semiconductor thin film FET made of an unstable two-dimensional material according to the present invention;
FIG. 5(b) is a schematic diagram of the linear region transfer curve of the unstable two-dimensional semiconductor thin film FET prepared by the present invention
FIG. 6(a) is a graph showing the output curve of a semiconductor thin film FET made of an unstable two-dimensional material according to the present invention after 60 days;
FIG. 6(b) is a diagram showing the linear region transfer curve of the unstable two-dimensional semiconductor thin film FET prepared by the present invention after 60 days;
fig. 7 is a graph showing the variation of mobility of the unstable two-dimensional semiconductor thin film fet just prepared and its device after 60 days.
Detailed Description
The invention is further defined in the following, but not limited to, the figures and examples in the description.
Example 1
A semiconductor thin film field effect transistor made of an unstable two-dimensional material sequentially comprises a silicon wafer substrate, the unstable two-dimensional material, an aluminum oxide thin film, a source electrode and a drain electrode from bottom to top.
The unstable two-dimensional material is indium selenide (InSe), black phosphorus, transition metal sulfide or a III-VI compound. The thickness of the unstable two-dimensional material is 20-80 nm. The thickness of the alumina film was 20 nm.
Example 2
The unstable two-dimensional material semiconductor thin film field effect transistor of embodiment 1, which is different from the first embodiment: the thickness of the alumina film was 40 nm.
Example 3
The unstable two-dimensional material semiconductor thin film field effect transistor of embodiment 1, which is different from the first embodiment: the thickness of the alumina film was 30 nm. The 30nm aluminum oxide can play a good isolation role, so that the influence of a process solvent and air on a semiconductor material is small, and meanwhile, the problem that the electrode is difficult to strip due to the fact that too much photoresist is etched because etching selection is small in rear etching is avoided.
Example 4
The method for manufacturing the unstable semiconductor thin film fet of two-dimensional material according to any one of embodiments 1 to 3, as shown in fig. 4, includes the following steps:
(1) manufacturing a silicon wafer substrate with an alignment mark by adopting a photoetching method, and taking the silicon wafer substrate as a transfer substrate;
(2) and (3) preparing the two-dimensional InSe material with the thickness of 20-80nm by adopting a mechanical stripping method and using an adhesive tape for stripping for a plurality of times. Transferring the two-dimensional material with the thickness of 20-80nm onto a silicon wafer substrate; namely: tearing a high-quality mother sheet material prepared by a Bridgman method for multiple times by using an adhesive tape to ensure that the thickness of the randomly distributed InSe nanosheets reaches 20-80nm, and transferring the two-dimensional material on the adhesive tape onto a silicon wafer substrate;
(3) placing the device obtained in the step (2) into atomic layer deposition equipment (ALD), and depositing an alumina film with the thickness of 20-40nm on the surface of the device obtained in the step (2) under the temperature condition of 130-180 ℃;
the alumina film is an encapsulation layer, and the gases adsorbed in a short time after stripping can be volatilized again in a vacuum environment due to the heating in the deposition process in ALD. The carrier gas for ALD is high purity nitrogen, which is chemically inert and does not affect InSe. The residual water molecules after volatilization are reacted in the reaction deposition mode of ALD, the growth process of ALD is to purge once water vapor to be adsorbed by the surface of a sample, and then purge once aluminum source to react with water molecules to generate alumina, and the part is designed specifically.
The alumina film plays a role in coating a semiconductor material and isolating air and a process solvent in a later micro-nano processing process. And after the device is prepared, the property of the material is further protected by taking the aluminum oxide film on the channel of the device as a buffer layer, so that the performance of the device can be stable for a long time. Meanwhile, the aluminum oxide film manufactured by ALD has high quality, large forbidden band width and large light transmission spectrum range, and is suitable for manufacturing photoelectric devices.
(4) The appropriate InSe nanosheets are searched under a microscope, and the positioning data are recorded, which can reach tens of minutes. And designing the layout according to the positioning data. Spin-coating photoresist, baking the photoresist, and using ultraviolet exposure or electron beam exposure to manufacture a source electrode pattern and a drain electrode pattern;
(5) placing the device manufactured in the step (4) into an inductively coupled reactive ion etcher (ICP) for etching, and etching the alumina film to expose an unstable two-dimensional material;
(6) placing the etched sample into electron beam evaporation equipment, and depositing a Ti/Au metal film;
(7) placing the device in acetone for lift-off treatment; namely: and immersing the device in acetone for 1h at the temperature of 40 ℃ until the photoresist is dissolved and the Ti/Au metal film is completely peeled off to form a source electrode and a drain electrode.
(8) And (5) annealing the device prepared in the step (7) for 1h by a hot plate in air at the temperature of 150-200 ℃ to obtain the device. Annealing is used to enhance the electrode ohmic contact.
Example 5
The method for manufacturing the unstable semiconductor thin film field effect transistor of the two-dimensional material according to the embodiment 4 is different from the following steps:
in the step (3), the deposition temperature is 150 ℃. The alumina film has high film forming quality at 150 ℃. The carrier gas of the atomic layer deposition equipment is high-purity nitrogen with the purity of more than 99.999 percent. The high-purity nitrogen is taken as a carrier gas to carry two reaction driving bodies of an aluminum source and water into the cavity, and the high-purity nitrogen does not participate in the reaction. The thickness of the deposited alumina film was 30 nm. The 30nm aluminum oxide can play a good isolation role, so that the influence of a process solvent and air on a semiconductor material is small, and meanwhile, the problem that the electrode is difficult to strip due to the fact that too much photoresist is etched because etching selection is small in rear etching is avoided.
Before the step (5) is executed, the following operations are carried out: the device was placed in an oxygen plasma cleaner for 30 s. The oxygen plasma cleaning machine is a low-power (output power is about 18W) photoresist removing device, can further oxidize and ash a small amount of residual photoresist after development, and can treat an ICP etching surface cleanly to ensure that the ICP etching surface is smooth and uniform.
In the step (5), the device manufactured in the step (4) is placed into an inductively coupled reactive ion etcher (ICP) for etching, and the etching gas is BCl3The flow of the etching gas is 15sccm, the power of the inductively coupled reactive ion etching machine is 100W, the radio frequency power is 50W, the etching time is 3min, and the etching thickness is 30 nm.
The flow of the etching gas, the power of the inductively coupled reactive ion etcher, the radio frequency power, the etching time and the etching thickness are selected, so that the physical etching process and the chemical etching process are reasonable in proportion, and the etching speed is proper. But also can keep the shape of the photoresist during etching, so that the photoresist is suitable for the following metal evaporation stripping process.
FIG. 5(a) is a graph showing an output curve of the unstable two-dimensional semiconductor thin film FET prepared in this example; vDIs the drain voltage, vertical axis IDIs the leakage current. In the figure, the uppermost line is VGThe second line is 80V, then 20V apart, until the last line is-100V, 100V. VG-100V to 100V, step 20V. By aligning the devices at VGThe output curve obtained when the voltage is-100V to 100V, leakage current IDWith the modulation of the grid voltage, the maximum current is about 7 mA.
FIG. 5(b) is a diagram illustrating a linear region transfer curve of the unstable two-dimensional semiconductor thin film FET prepared in this example; vGIs a gate voltage, IDIs the leakage current. By aligning the devices at VDThe linear mobility can reach 560cm by a linear zone test when the voltage is equal to 0.1V2Vs, threshold voltage of-10V, electrical hysteresis<1V。
FIG. 6(a) is a graph showing the output curve of the unstable two-dimensional semiconductor thin film FET prepared in this example after 60 days; vDIs a drain voltage, IDIs the leakage current. The uppermost line in the figure is VGThe second line is 80V, then 20V apart, until the last line is-100V, 100V. VG-100V to 100V, step 20V. By aligning the devices at VGThe output curve obtained when the voltage is-100V to 100V, leakage current IDWith the modulation of the grid voltage, the maximum current is about 7 mA. The device has no performance degradation phenomenon in an air atmosphere for 60 days.
FIG. 6(b) is a diagram showing the linear region transfer curve of the unstable two-dimensional semiconductor thin film FET prepared in this example after 60 days; vGIs a gate voltage, IDIs the leakage current. After the device was left in air atmosphere for 60 days, at VDLinear region transfer curve test at 0.1V and linear mobility of 680cm2and/Vs, the threshold voltage is 4V, and the electrical hysteresis is from 2.3V. Due to the adoption of the structure and the process, the device performance degradation phenomenon of the unstable two-dimensional material is effectively inhibited.
Fig. 7 is a schematic diagram of the semiconductor thin film fet of the unstabilized two-dimensional material just prepared and the change in device mobility after 60 days in this example. VGIs a gate voltage, IDIs the leakage current. By aligning the devices at VDThe linear region test is carried out when the voltage is 0.1V, the comparison device is initially compared with a transfer curve which is placed in an air atmosphere for 60 days, and the linear mobility is from 560cm2Vs was changed to 680cm2Vs, threshold voltage from-10V to 4V, electrical hysteresis from<1V to 2.3V. Due to the adoption of the structure and the process, the device performance degradation phenomenon of the unstable two-dimensional material is effectively inhibited.
Claims (11)
1. The semiconductor thin film field effect transistor made of the unstable two-dimensional material is characterized by sequentially comprising a silicon wafer substrate, the unstable two-dimensional material, an aluminum oxide thin film, a source electrode and a drain electrode from bottom to top;
the semiconductor thin film field effect transistor is prepared by the following method, comprising the following steps:
(1) manufacturing a silicon wafer substrate with an alignment mark as a transfer substrate;
(2) transferring the two-dimensional material with the thickness of 20-80nm onto a silicon wafer substrate;
(3) depositing an alumina film on the surface of the device obtained in the step (2);
(4) spin-coating photoresist, baking the photoresist, and using ultraviolet exposure or electron beam exposure to manufacture a source electrode pattern and a drain electrode pattern;
(5) etching the device manufactured in the step (4), and etching the aluminum oxide film to expose the unstable two-dimensional material;
(6) depositing a Ti/Au metal film;
(7) placing the device in acetone for stripping treatment;
(8) and (4) annealing the device prepared in the step (7) for 1h at the temperature of 150-200 ℃ to obtain the semiconductor device.
2. The unstable two-dimensional material semiconductor thin film field effect transistor of claim 1, wherein the unstable two-dimensional material is indium selenide, black phosphorus, a transition metal sulfide, or a group iii-iii compound.
3. The unstable two-dimensional material semiconductor thin film field effect transistor according to claim 1, wherein the thickness of the aluminum oxide thin film is 20nm to 40 nm; the thickness of the unstable two-dimensional material is 20-80 nm.
4. The unstable two-dimensional material semiconductor thin film field effect transistor according to claim 1, wherein the thickness of the aluminum oxide film is 30 nm.
5. The two-dimensional unstable semiconductor thin film transistor as claimed in claim 1, wherein the deposition temperature in step (3) is 130-180 ℃.
6. The unstable two-dimensional material semiconductor thin film field effect transistor of claim 1, wherein in step (3), the deposition temperature is 150 ℃.
7. The unstable semiconductor thin film field effect transistor of two-dimensional material as claimed in claim 1, wherein in the step (3), the device obtained in the step (2) is placed in an atomic layer deposition device, and an alumina thin film is deposited on the surface of the device obtained in the step (2); the carrier gas of the atomic layer deposition equipment is high-purity nitrogen with the purity of more than 99.999 percent.
8. The unstable two-dimensional material semiconductor thin film field effect transistor of claim 1, wherein step (5) is preceded by the following operations: the device was placed in an oxygen plasma cleaner for 30 s.
9. The unstable semiconductor thin film field effect transistor made of two-dimensional material according to claim 1, wherein in the step (5), the device manufactured in the step (4) is placed in an inductively coupled reactive ion etcher for etching, and the etching gas is BCl3The flow of the etching gas is 15sccm, the power of the inductively coupled reactive ion etching machine is 100W, the radio frequency power is 50W, the etching time is 3min, and the etching thickness is 30 nm.
10. The unstable semiconductor thin film field effect transistor made of two-dimensional material according to claim 1, wherein in the step (1), a silicon wafer substrate with an alignment mark is manufactured by a photolithography etching method;
in the step (2), a mechanical stripping method is adopted, and the two-dimensional InSe material with the thickness of 20-80nm is prepared by stripping with an adhesive tape for several times.
11. The unstable semiconductor thin film field effect transistor of two-dimensional material as claimed in claim 1, wherein in the step (7), the device is immersed in acetone at 40 ℃ for 1h until the photoresist is dissolved and the Ti/Au metal film thereon is completely peeled off to form the source and the drain.
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| CN105742345A (en) * | 2016-03-09 | 2016-07-06 | 复旦大学 | Tunneling field-effect transistor and preparation method therefor |
| CN108690953A (en) * | 2017-04-07 | 2018-10-23 | 财团法人交大思源基金会 | Method for manufacturing two-dimensional material |
| CN108831928A (en) * | 2018-06-20 | 2018-11-16 | 北京大学 | A kind of two-dimensional semiconductor material negative capacitance field effect transistor and preparation method |
| US10381506B1 (en) * | 2018-05-23 | 2019-08-13 | United States Of America As Represented By The Secretary Of The Navy | Voltage-tunable wavelength-agile 2D material-based light-emitting transistors |
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| CN105742345A (en) * | 2016-03-09 | 2016-07-06 | 复旦大学 | Tunneling field-effect transistor and preparation method therefor |
| CN108690953A (en) * | 2017-04-07 | 2018-10-23 | 财团法人交大思源基金会 | Method for manufacturing two-dimensional material |
| US10381506B1 (en) * | 2018-05-23 | 2019-08-13 | United States Of America As Represented By The Secretary Of The Navy | Voltage-tunable wavelength-agile 2D material-based light-emitting transistors |
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