CN110620712A - Method for realizing real-time EtherCAT master station of Window platform - Google Patents

Method for realizing real-time EtherCAT master station of Window platform Download PDF

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Publication number
CN110620712A
CN110620712A CN201910828722.9A CN201910828722A CN110620712A CN 110620712 A CN110620712 A CN 110620712A CN 201910828722 A CN201910828722 A CN 201910828722A CN 110620712 A CN110620712 A CN 110620712A
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data
real
ethercat
time
master station
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CN110620712B (en
Inventor
刘雄
占颂
王昌杰
熊烁
陈天航
周向东
凡文涛
聂文强
宋宝
唐小琦
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Wuhan Long Intelligent Technology Co Ltd
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Wuhan Long Intelligent Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40143Bus networks involving priority mechanisms
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40143Bus networks involving priority mechanisms
    • H04L12/4015Bus networks involving priority mechanisms by scheduling the transmission of messages at the communication node
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/403Bus networks with centralised control, e.g. polling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40208Bus networks characterized by the use of a particular bus standard
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/4026Bus for use in automation systems

Abstract

The invention belongs to the technical field of bus networks and discloses a real-time EtherCAT master station implementation method of a Window platform.A application program interface module provides an interface for operating an EtherCAT master station protocol stack for an application program; the EtherCAT master station protocol stack module runs in a window kernel, realizes the EtherCAT protocol and provides the communication function of periodic process data and non-periodic data; the real-time optimization module provides a high-precision timing period for periodic process data communication, and improves the real-time performance of the periodic communication task. The invention realizes an EtherCAT protocol stack under a window kernel; the DPC timer is adopted to realize the timer with higher timing precision, and the receiving, the transmitting and the real-time processing of the EtherCAT periodic message are carried out; and the data is directly transmitted and received by using the driving interface of the physical network port, so that the delay time of the data is reduced.

Description

Method for realizing real-time EtherCAT master station of Window platform
Technical Field
The invention belongs to the technical field of bus networks, and particularly relates to a real-time EtherCAT master station implementation method of a Window platform.
Background
Currently, the closest prior art: the intelligent manufacturing promotes the development of industrial control systems to the direction of digitization and networking, and the EtherCAT field bus with real-time performance, high speed and high precision is widely applied to industrial control systems in various fields. The continuous improvement of the industrial automation level puts higher requirements on the easy operability and development agility of the industrial control system, and the Windows system with a good graphical user interface and a perfect software development tool is gradually applied to the field of industrial control. Therefore, the combination of the Windows system and the EtherCAT fieldbus becomes a new research hotspot in the industrial control field.
With the continuous promotion of industrial technology to the automation direction, the industrial control task becomes increasingly complex, which puts higher requirements on the stability of an industrial control system and the functionality, operation experience and development efficiency of industrial control software; the Windows system gradually becomes a new direction for developing the industrial control system by virtue of the advantages of abundant software development tools, good graphical user interfaces, simple operation experience and the like. The development of the EtherCAT master station based on the Windows system can combine the advantages of high speed and high precision of the EtherCAT field bus with the advantages of stability, easy use and contribution to development of the Windows system, and develops an industrial control system with powerful functions, simplicity and easy use, which has positive pushing action on the engineering application of the EtherCAT bus and has important influence on the industrial application of the Windows system.
The research of the EtherCAT master station at home and abroad is gradually shifted to secondary development based on IGH and SOEM of the open source master station by commercialized TwinCAT and KPA EtherCAT. The EtherCAT master station function can be cut, perfected and optimized by carrying out secondary development based on IGH and SOEM, so that the EtherCAT master station is more suitable for specific industrial field environment, and the development process is simplified. The Windows system becomes an important choice of the master station system with good graphical user interface, rich software development tools and complete software support. But at present, the Windows real-time is optimized by mainly adopting RTX and INtime commercialized real-time extension software, and the cost is higher.
In summary, the problems of the prior art are as follows:
at present, an EtherCAT master station under windows has 2 schemes:
the Window platform runs the SOEM open source master station, and has no real-time performance due to running in a user mode.
The Windows platform, the commercial real-time module and the EtherCAT master station have real-time performance, the scheme is not public, and the real-time scheme adopts a virtual core mode and is high in cost.
The difficulty of solving the technical problems is as follows: the Windows system is a typical non-real-time operating system, which mainly focuses on fair scheduling of each system task, emphasizes the overall superior performance of the system without considering real-time response of the real-time task, and the characteristic is derived from the fact that mechanisms such as virtual memory, interruption, multitask and the like are adopted in the Windows system design process, and the mechanisms increase uncertainty and unpredictability for the execution condition of the system task, and finally the Windows system has real-time defects.
The significance of solving the technical problems is as follows: the real-time performance of the Windows system directly affects the communication quality of the EtherCAT master station for carrying out periodic process data communication, and once the real-time performance does not meet the requirement, the performance of the EtherCAT bus communication technology is seriously affected.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a method for realizing a real-time EtherCAT master station of a Window platform.
The invention is realized in this way, a real-time EtherCAT master station implementation system of a Window platform, the real-time EtherCAT master station implementation system of the Window platform includes:
an application program interface module: the Ethernet control and maintenance platform is connected with an EtherCAT master station protocol stack module; the method comprises the steps of managing and operating interfaces of slave stations and application programs and a data interaction interface of a master station; the interface is used for providing an interface for operating an EtherCAT master station protocol stack for an application program;
EtherCAT master station protocol stack module: the real-time optimization module is connected with the application program interface module, the real-time optimization module and the bottom layer data transceiver module; the method is implemented by using an open source SOEM protocol stack under a window kernel, and is used for packing data of an application program into an EtherCAT protocol data frame, sending the EtherCAT protocol data frame to a slave station, and simultaneously analyzing the slave station data and transmitting the slave station data to the application program;
the bottom network data transceiver module: the Ethernet control automation system is connected with an EtherCAT master station protocol stack module and a real-time optimization module; the network card is used for driving to transmit data based on the NDIS protocol;
a real-time optimization module: the system is connected with a bottom network data transceiver module and linked with the periodic process data communication of an EtherCAT master station protocol stack; for providing a highly accurate timing cycle for periodic process data communication.
Furthermore, the application program and master station driving data interaction interface is also used for configuration, starting, stopping, state switching of a bus, setting and acquiring of periodic data, and setting and reading of non-periodic data.
Further, the application program interface module realizes network data receiving and sending by calling the ndis interface.
Further, the protocol stack of the EtherCAT master station protocol stack module is realized under a windows kernel.
Further, the EtherCAT master station protocol stack module includes:
the data identification and analysis unit is used for encapsulating the EtherCAT data message and sending an EtherCAT data frame; receiving an EtherCAT data frame, and identifying and analyzing an EtherCAT data message;
the management unit is used for managing the slave station state machine and the state configuration, switching and maintenance of the slave station state machine;
the configuration unit is used for carrying out aperiodic mailbox data communication and finishing the configuration of the system parameters of the slave station;
the slave station control unit is used for carrying out periodic process data communication, periodically interacting PDO data with the slave station, and finishing control and monitoring related functions of the slave station through the operation of the PDO;
the bottom network data transceiver module further comprises:
a network card data receiving and transmitting unit: directly using an NDIS protocol driving interface to control the transceiving of the network port data; receiving data, transmitting the received data frame to a protocol stack for processing, and sending out the data frame processed by the protocol stack;
and the physical network card driving unit is used for receiving the Ethernet data frame from the network card and transmitting the Ethernet data frame to the EtherCAT master station protocol stack.
The invention also aims to provide a method for realizing the real-time EtherCAT master station of the Window platform, which comprises the following steps:
(1) creating and maintaining a DPC object by using the DPC timer, wherein the DPC object is bound with a DPC timer routine, the DPC object is initialized, and a CPU core for executing a real-time task can be designated when the DPC object is initialized; filling KDPC structure;
(2) starting a timer, and improving the resolution of a system clock by using an ExSetTimeResolution routine;
(3) real-time tasks are performed in the DPC timer routine.
Further, in step (1), the KDPC structure includes:
the KDPC structure comprises 9 structure members, Number members, and is used for specifying the DPC object to be added into the DPC queue of which CPU, the default value is 0, namely the DPC object created by default is inserted into the DPC queue of the CPU0, and the CPU0 is a real-time CPU core;
and the Importance member is used for representing the Importance of the DPC object, is defined in a KDPC _ IMPORTANCE enumeration type, has a default value of MediumImportance which is 1, and changes the sequence of the DPC object in the DPC queue by modifying the value so as to modify the real-time task execution sequence.
Further, in step (2), the increasing the resolution of the system clock by using the exsettimerrresolution routine includes:
1) if and only if the set resolution is less than the current resolution, taking effect;
2) if the resolution set by the kernel driver is greater than the current resolution, maintaining the current resolution without modification;
3) and when the resolution set by the kernel driver is smaller than the minimum resolution which can be supported by the system clock, adopting the minimum resolution which can be supported by the system.
In step (3), the real-time task execution method based on the DPC timer comprises the following steps:
the DPC timer routine is inserted into a DPC queue of the real-time CPU core when the timing of the DPC timer is finished, and requests an interrupt of DISPATCH _ LEVEL, the real-time CPU core does not receive the hardware interrupt, and the task in the upper LEVEL IRQL which can be received by the task in the DPC queue of the DISPATCH _ LEVEL LEVEL preferentially executes the task in the DPC queue.
The invention also aims to provide an information data processing terminal for realizing the real-time EtherCAT master station development method based on the Windows platform.
Another object of the present invention is to provide a computer-readable storage medium, which includes instructions, when the computer-readable storage medium is run on a computer, the computer is caused to execute the real-time EtherCAT master station development method based on the Windows platform.
In summary, the advantages and positive effects of the invention are: the invention designs and develops the EtherCAT master station system based on the Windows platform, and provides an implementation scheme with low cost, simple structure, complete functions and excellent performance for the research and development of the EtherCAT master station control system of the Windows platform. The master station designed by the invention not only realizes complete functions and has better real-time performance, but also can complete multi-axis motion control function and realize good control performance.
The invention modifies the programmable redirection table of the I/O APIC, so that each received external interrupt is redirected to the CPU1, the response of the external interrupt is carried out by the CPU1 in a unified way, and the CPU0 is used as a real-time CPU core and only used for processing real-time tasks; through the scheme, the CPU0 which is a CPU core for processing the real-time task independently can be obtained, the adverse effect of uncertain interruption on the real-time performance of the real-time task is avoided, the load of the CPU is reduced, and the delay of the real-time task is reduced.
The invention uses the ExSetTimerresolution routine to improve the system clock resolution, further improves the timing precision of the DPC timer, and provides a stable and reliable timing period for periodic tasks in the industrial control process. The clock resolution is set to be 100ns by using the ExSetTimeResolution routine, and because the value is the minimum value which can be set by the ExSetTimeResolution routine, the resolution which can be supported by different platforms can only be larger than or equal to the value, no matter which platform the kernel driver runs on, the DPC timer can be ensured to use the highest-precision resolution of the platform for timing, thereby shielding the influence of the platform on the timing precision and enhancing the compatibility of the invention.
The invention loads the driver program into the non-paged memory and only applies and uses the non-paged memory in the driver program, thereby avoiding the generation of page fault interruption in the real-time task execution process and influencing the real-time response of the program. The invention adopts the protocol drive to realize data receiving and sending, and the protocol drive can realize the data receiving and sending with higher efficiency and also can give consideration to the universality of the whole system. The invention utilizes the protocol driver provided by the Windows driver development package to develop, the protocol driver does not carry out any encapsulation and processing, the upper part directly sends out the received data through the small port driver, and the lower part directly sends the data received from the small port driver to the upper layer driver, thereby realizing high-efficiency data transmission.
The invention realizes an EtherCAT protocol stack under a window kernel; the DPC timer is adopted to realize the timer with higher timing precision, and the receiving, the transmitting and the real-time processing of the EtherCAT periodic message are carried out in the timing task. And the data is directly transmitted and received by using the driving interface of the physical network port, so that the delay time of the data is reduced.
Drawings
Fig. 1 is a schematic structural diagram of a real-time EtherCAT master station implementation system of a Window platform according to an embodiment of the present invention;
in the figure: 1. an application program interface module; 2. an EtherCAT master station protocol stack module; 3. the bottom network data transceiver module; 4. and a real-time optimization module.
Fig. 2 is a schematic diagram of the general architecture of the Windows platform EtherCAT master station provided in the embodiment of the present invention.
Fig. 3 is a schematic diagram of the EtherCAT master station user mode kernel-mode data interaction design provided by the embodiment of the present invention.
Fig. 4 is a schematic diagram of aperiodic communication design of an EtherCAT master station according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a design of periodic process data communication of an EtherCAT master station according to an embodiment of the present invention.
FIG. 6 is a diagram of a method for partitioning a real-time CPU core based on I/O APIC according to an embodiment of the present invention.
Fig. 7 is a schematic diagram of a DPC timer-based loading and running real-time task scheme according to an embodiment of the present invention.
Fig. 8 is a schematic diagram of a DPC timer-based real-time task execution method according to an embodiment of the present invention.
Fig. 9 is a schematic diagram of a KDPC structure provided in an embodiment of the present invention.
Fig. 10 is a schematic diagram of a program execution flow of the Windows system according to an embodiment of the present invention.
FIG. 11 is a diagram of a Windows interrupt request level according to an embodiment of the present invention.
Fig. 12 is a schematic diagram of a running state of a Windows task according to an embodiment of the present invention.
Fig. 13 is a schematic diagram of priority inversion provided by the embodiment of the present invention.
Fig. 14 is a schematic memory mapping diagram according to an embodiment of the present invention.
FIG. 15 is a schematic diagram of a Windows real-time optimization experiment test provided by an embodiment of the present invention.
FIG. 16 is a schematic diagram of an SOEM master station architecture provided by the embodiment of the invention.
FIG. 17 is a diagram of a default hardware abstraction layer architecture of the SOEM master station according to an embodiment of the present invention.
Fig. 18 is a schematic diagram of a generic network transmission architecture according to an embodiment of the present invention.
Fig. 19 is a schematic diagram of a data transmission and reception scheme of EtherCAT according to an embodiment of the present invention.
Fig. 20 is a flowchart illustrating an inter-driver call technique according to an embodiment of the present invention.
Fig. 21 is a schematic diagram of an execution process of ec _ create _ ndisprot according to an embodiment of the present invention.
Fig. 22 is a schematic diagram of an implementation process of ec _ close _ ndisprot according to an embodiment of the present invention.
Fig. 23 is a schematic diagram of an ec _ writepacket implementation process according to an embodiment of the present invention.
Fig. 24 is a schematic diagram of an ec _ readpacket execution process according to an embodiment of the present invention.
Fig. 25 is a schematic diagram illustrating size-end endian parsing according to an embodiment of the present invention.
Fig. 26 is a schematic diagram of determining a hardware platform size end mode according to an embodiment of the present invention.
Fig. 27 is a schematic diagram of a dependency relationship of a time correlation function according to an embodiment of the present invention.
Fig. 28 is a schematic diagram of user thread creation and kernel thread creation according to an embodiment of the present invention.
Fig. 29 is a schematic diagram of a master station managing a slave station according to an embodiment of the present invention.
FIG. 30 is a graph illustrating variation curves of the commanded position value and the actual position value of the shaft according to the embodiment of the present invention.
FIG. 31 is a graph illustrating a variation curve of an axial two-instruction position value and an actual position value according to an embodiment of the present invention.
Fig. 32 is a schematic diagram of a variation curve of the three-axis command position value and the actual position value according to the embodiment of the present invention.
Fig. 33 is a schematic diagram of a variation curve of the four-axis command position value and the actual position value according to the embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The industrial application of the Windows system is insufficient in real-time performance, and at present, the real-time performance of Windows is optimized mainly by adopting RTX and INtime commercialized real-time expansion software, so that the cost is high.
To solve the above problems, the present invention will be described in detail with reference to the accompanying drawings.
As shown in fig. 1-2, the system for implementing the real-time EtherCAT master station of the Window platform according to the embodiment of the present invention includes:
application interface module 1: and is connected with an EtherCAT master station protocol stack module 2. The method comprises an interface for managing and operating the slave station and an interface for interacting application programs and master station data. The interface for operating the EtherCAT master station protocol stack is provided for the application program, and the development of the application program is facilitated.
EtherCAT master station protocol stack module 2: and the system is connected with an application program interface module 1, a real-time optimization module 3 and a bottom layer data transceiver module 4. The method is realized by using an open source SOEM protocol stack and is used for migration development of a master station hardware abstraction layer and an operating system abstraction layer and functions of master station aperiodic communication and periodic communication.
The bottom network data transceiver module 3: and the protocol stack module 2 of the EtherCAT main station and the real-time optimization module 4 are connected. The network card is used for transmitting data based on the NDIS protocol driver.
The real-time optimization module 4: and the data transceiver module 3 is connected with the underlying network data transceiver module and is communicated with the periodic process data of the EtherCAT master station protocol stack. For providing a higher accuracy timing cycle for periodic process data communication while improving the real-time nature of the periodic communication task.
The interface for managing and operating the slave station provided by the embodiment of the invention comprises:
extracting general management operation interfaces and attributes from different types of slave stations (servo drivers and IO) to form a general module, and respectively packaging the unique operation interfaces and attributes of the servo drivers and the IO into independent modules. And then embedding the two encapsulated modules into a universal module through the union to form a complete slave station management operation module.
The general management operation module of the slave station mainly comprises a general operation interface and attribute information of the slave station, wherein the management operation interface comprises a state switching interface, a state checking interface, an acquisition state interface, a starting interface, a configuration interface, a data updating interface and the like of the slave station, and the attribute information comprises slave station names, IDs, numbers, TXPDO mapping numbers, RXPDO mapping numbers and the like.
A servo special operation interface is designed for a servo slave station, and the servo special operation interface mainly comprises a slave station position instruction value setting, a speed instruction value setting, a control word setting, an operation mode setting, an actual position value obtaining, an actual speed value obtaining and a state word obtaining. The servo driver is provided with a servo driver interface, a servo driver interface and a control information interface.
And designing an IO special operation interface for the IO slave station, wherein the IO special operation interface mainly comprises the steps of obtaining the number of IO groups, reading and writing IO information and the like, and the management and the operation of the IO slave station are completed.
As shown in fig. 3, the interface for interaction between an application program and master station driving data provided in the embodiment of the present invention specifically includes:
(1) and the application program completes tasks such as trajectory planning, interpolation and the like, and then calculates corresponding instruction values according to the operation mode configured by the slave station: if the slave station operation mode is the periodic synchronous position mode, the position instruction value needs to be calculated. If the slave station operation mode is the periodic synchronous speed mode, the speed instruction value needs to be calculated. If the slave station operation mode is the periodic synchronous torque mode, a torque command value needs to be calculated.
(2) A structural body for storing instruction data is designed, redundancy is set, and the structural body is used for temporarily storing the calculated instruction value.
The command data are sent to a master station driver by calling an interface for sending the command data, the master station driver stores the data into a command data buffer queue, and the master station takes out the command data from the command data buffer queue and fills an RXPDO mapping when carrying out periodic process data communication.
(3) When the RXPDO mapping is updated, feedback information of the slave station is stored in the TXPDO mapping, and the master station extracts the feedback information. And the master station stores the extracted feedback data in a feedback data structure form and inserts the feedback data into a feedback data queue, and waits for a user program to read the data into a user state through an interface for reading the feedback data.
(4) After updating the RXPDO mapping and buffering the TXPDO mapping information, the PDO mapping can be encapsulated by a protocol stack and then sent to the slave station by an NDIS protocol driver, and process data communication of one period is completed.
The EtherCAT master station protocol stack module 2 provided by the embodiment of the invention comprises:
and transplanting the master station protocol stack into a kernel state, compiling the master station protocol stack into a kernel module, loading the kernel module into the Windows system kernel, and running the kernel module. The method is used for the non-periodic communication and the periodic communication function of the master station.
And the EtherCAT master station protocol stack module is used for encapsulating the EtherCAT data message and sending the EtherCAT data frame. And receiving the EtherCAT data frame, and identifying and analyzing the EtherCAT data message. And the management slave station state machine is responsible for the state configuration, switching and maintenance of the slave station state machine. And carrying out aperiodic mailbox data communication to complete the configuration of the system parameters of the slave station. And carrying out periodic process Data communication, periodically interacting PDO (Process Data object) Data with the slave station, and finishing control and monitoring related functions of the slave station through the operation of the PDO.
As shown in fig. 4, the aperiodic communication of the primary station provided in the embodiment of the present invention specifically includes:
the said non-periodic communication of the primary station is used to complete the scanning and configuration of the secondary station, and the secondary station enters into the state of being able to carry out actual motion control. The aperiodic communication of the master station mainly comprises the switching and maintenance of a slave station state machine and COE mailbox communication.
The main station aperiodic communication mainly comprises the following steps:
and the state machine management and COE mailbox communication related aperiodic communication module in the protocol stack transfers the data sending task to the bottom NDIS protocol driver by calling a data sending interface provided by the hardware abstraction layer and a time related interface provided by the operating system abstraction layer.
And the bottom NDIS protocol driver transmits data from the network card to the slave station.
The bottom NDIS protocol driver returns the data received by the network card to the upper protocol stack, and the protocol stack completes the analysis and processing of the received data.
As shown in fig. 5, the periodic communication includes the steps of:
the protocol stack process data communication module creates a DPC object by calling a DPC timer operation interface in the real-time module, starts a timer, inserts a data sending task into a DPC queue of a real-time CPU core after timing is finished, processes the sending task by the real-time CPU core, and calls a bottom NDIS protocol driver to send the data to a slave station through a network card. After the sending task is responded, the execution of the receiving task is triggered, the protocol stack sends the receiving task to the NDIS protocol driver, the protocol driver returns the data received by the network card to the protocol stack, and the protocol stack receives the returned data and analyzes and processes the data.
The underlying network data transceiver module 3 provided by the embodiment of the present invention specifically includes:
(1) and processing the data encapsulated by the EtherCAT master station protocol stack through a network card driver and then sending the data to the slave station from the network card.
(2) And receiving the EtherCAT return data frame from the network card and transmitting the EtherCAT return data frame to the EtherCAT master station protocol stack.
The real-time optimization method of the real-time optimization module 4 provided by the embodiment of the invention comprises the following steps:
the real-time optimization method comprises the following steps: the method comprises a real-time CPU core dividing method based on I/O APIC, a real-time task executing method based on DPC timer, and a missing page interrupt eliminating method based on non-paged memory.
The real-time CPU core dividing method based on the I/O APIC comprises the following steps: and an I/O APIC is adopted to redirect external interrupt to independently obtain a real-time CPU core.
The real-time task execution method based on the DPC timer comprises the following steps: and inserting the real-time task into a DPC queue of the real-time CPU core by using a DPC timer for execution.
The method for eliminating missing page interruption based on the non-paged memory comprises the following steps: the driver program is all non-paged memory.
As shown in fig. 6, the method for partitioning a real-time CPU core based on I/O APIC according to an embodiment of the present invention specifically includes:
modifying the programmable redirection table for the I/O APIC redirects each external interrupt received to the CPU1, unifying the response of the external interrupts by the CPU 1. While taking CPU0 as a separate, stand-alone CPU core for processing real-time tasks.
As shown in fig. 7-8, the DPC timer-based real-time task execution method provided by the embodiment of the present invention specifically includes:
(1) the DPC timer is used for creating and maintaining a DPC object, the DPC object is bound with a DPC timer routine, the DPC object is initialized, and a CPU core for executing real-time tasks can be designated when the DPC object is initialized. The work of populating the KDPC structure at the same time.
(2) The timer is started and the exsettimerrresolution routine is used to increase the system clock resolution.
(3) The real-time tasks are executed in a DPC timer routine, which is inserted into the DPC queue of the real-time CPU core at the end of the DPC timer timing and requests a DISPATCH _ LEVEL LEVEL interrupt.
As shown in fig. 9, in step (1), the KDPC structure provided by the embodiment of the present invention includes:
the KDPC structure contains 9 structural members. Wherein Number member is used to specify which DPC object is added to the DPC queue of the CPU, the default value is 0, i.e., the DPC object created by default will be inserted into the DPC queue of CPU0, and CPU0 is a real-time CPU core. And the Importance member is used for representing the Importance of the DPC object, is defined in a KDPC _ IMPORTANCE enumeration type, has a default value of MediumImportance which is 1, and can change the sequence of the DPC object in the DPC queue by modifying the value so as to modify the real-time task execution sequence.
In step (2), the method for improving the resolution of the system clock by using the exsettimerrsolution routine provided by the embodiment of the present invention includes:
resolution enhancement is based on the following characteristics of the exsettimerrresolution routine:
(1) the setting will take effect if and only if the set resolution is less than the current resolution.
(2) And if the resolution set by the kernel driver is greater than the current resolution, maintaining the current resolution without modification.
(3) And if the resolution set by the kernel driver is less than the minimum resolution which can be supported by the system clock, adopting the minimum resolution which can be supported by the system.
The method for eliminating missing page interruption based on the non-paged memory provided by the embodiment of the invention specifically comprises the following steps:
the driver is loaded into non-paged memory using the pre-processing instruction # pragma code _ seg (). The ExallocatePool WithQuotaTag function is used for both the application and the use of non-paged memory of the NonPagedPool type.
The PoolType of the function specifies the type of the applied memory, and the value is assigned as non PagedPoolMustSurceed, namely the non-paged memory is applied and must be successfully used, so that the normal use of the non-paged memory is ensured. In addition, a Tag with four bytes can be allocated when applying for the memory by setting the Tag, and the Tag is used for detecting whether the applied memory is released or not, so that the stability of the kernel program is ensured.
The technical solution and the technical principle of the present invention are further explained with reference to the specific embodiments.
Example 1:
1. EtherCAT main station overall scheme design based on Windows platform
1) EtherCAT master station protocol stack selection
The open source EtherCAT Master station protocol stacks widely used in the industry at present are SOEM and IGH EtherCAT Master.
2) EtherCAT main station overall architecture design
The overall architecture shown in fig. 2 is designed by combining Windows platform EtherCAT master station requirement analysis and master station protocol stack selection. The invention is divided into four parts in total, which are respectively an application program interface module, an EtherCAT master station protocol stack module, an underlying network data transceiver module and a real-time module.
Due to the characteristics of the Windows operating system, the program in the kernel mode does not carry out context switching, and shorter running delay can be realized. Because the bottom network card driver and the real-time module are kernel mode modules, in order to enable the master station protocol stack to more efficiently utilize the bottom network card driver to receive and transmit data and to more conveniently utilize the real-time module to perform periodic data communication, the master station protocol stack is transplanted into the kernel mode, and is compiled into a kernel module to be loaded into the Windows system kernel to run.
The application program interface module has the main function of providing an interface for operating an EtherCAT master station protocol stack for an application program, and is convenient for application program development.
The EtherCAT main station protocol stack is a main functional module of the EtherCAT main station, is realized by using an open source SOEM protocol stack, and has the main functions of:
a. and encapsulating the EtherCAT data message and sending the EtherCAT data frame.
b. And receiving the EtherCAT data frame, and identifying and analyzing the EtherCAT data message.
c. And the management slave station state machine is responsible for the state configuration, switching and maintenance of the slave station state machine.
d. And carrying out aperiodic mailbox data communication to complete the configuration of the system parameters of the slave station.
e. And carrying out periodic process Data communication, periodically interacting PDO (Process Data object) Data with the slave station, and finishing functions of controlling and monitoring the slave station and the like through the operation of the PDO.
The bottom layer data transceiver module realizes the function of transmitting data by using the network card, and mainly comprises:
a. and processing the data encapsulated by the EtherCAT master station protocol stack through a network card driver and then sending the data to the slave station from the network card.
b. And receiving the EtherCAT return data frame from the network card and transmitting the EtherCAT return data frame to the EtherCAT master station protocol stack.
The real-time module is linked with the periodic process data communication of the EtherCAT master station protocol stack, provides a high-precision timing cycle for the periodic process data communication, can improve the real-time performance of the periodic communication task, provides functional support for the master station to perform the periodic process data communication, and is an important part for realizing the function of the EtherCAT master station.
2. Real-time optimization method for Windows system
The real-time performance of the Windows system directly affects the communication quality of the EtherCAT master station for periodic process data communication, and once the real-time performance does not meet the requirement, the performance of the EtherCAT bus communication technology is seriously affected. The invention provides a real-time optimization method based on the analysis of a general Windows system, and the method is designed, realized and experimentally analyzed.
(1) Windows system real-time optimization necessity analysis
The Windows system is a typical non-real-time operating system, which mainly focuses on fair scheduling of each system task, emphasizes the overall superior performance of the system without considering real-time response of the real-time task, and the characteristic is derived from the fact that mechanisms such as virtual memory, interruption, multitask and the like are adopted in the design process of the Windows system, and the mechanisms increase uncertainty and unpredictability for the execution condition of the system task, and finally the Windows system has real-time defects.
1) Windows system interrupt processing flow
In a general PC based on an Intel hardware platform, hardware is generally configured with an advanced Programmable Interrupt controller APIC (advanced Programmable Interrupt controller), where the APIC can support 24 Interrupt requests at most, and for convenience of management, a Windows system proposes a concept of an Interrupt ReQuest level irql (Interrupt ReQuest level), which defines 32 Interrupt ReQuest levels, where the level 0-2 is a soft Interrupt level, the level 3-31 is a hard Interrupt level, and 24 external interrupts correspond to the level 3-26, and as shown in fig. 11, the larger the number of levels is, the higher the Interrupt priority level is.
In the running process of the system, if an external hardware interrupt triggers, the operating system will raise the IRQL to the IRQL level of the interrupt, thus all interrupts with lower priority than the interrupt can be shielded, then an interrupt Service routine ISR (interrupt Service routine) of the interrupt is executed, only the operation with time-critical is executed in the interrupt Service routine, in order to not influence the overall performance of the operating system, the time-consuming and labor-consuming work is inserted into the DPC queue to be executed, if no interrupt with higher priority triggers at this time, the interrupt routine in the DPC queue is executed. Although ISRs are processed according to the interrupt priority, the subsequent response of the interrupt is executed according to the sequence of inserting the DPC queue, so that the response sequence of the interrupt task is influenced by the interrupt occurrence sequence, and the real-time task is not favorably executed.
2) Multithreading scheduling mechanism of Windows system
Each thread executing in the Windows system goes through the stages of set-up, ready, execute, block, terminate, etc., each corresponding to a state, as shown in fig. 12. Under the scheduling of the Windows kernel, each thread circularly changes in the states of ready, execution and blocking until the task is finally completed and terminated or the task is withdrawn.
The Windows system performs multi-threaded task scheduling based on thread priority, which provides 32 thread priorities, where 16-31 levels are real-time levels, 1-15 are variable levels, and 0 is system level. Although the thread scheduling mechanism of Windows improves the system performance, it has a problem of priority inversion, as shown in fig. 13, in the process of executing the low-priority thread 2, critical resources of the high-priority thread 1 are applied, and when the thread 1 occupies the thread 2, since the resources required by the thread 1 are occupied by the thread 2, the thread can only be executed after being suspended and waiting for the thread 2 with low priority to execute and release the critical resources, which results in a problem of priority inversion that the low-priority thread executes preferentially than the high-priority thread, and the priority inversion is not allowed in the process of executing the real-time task.
3) Windows system memory management strategy
Since the memory management policy is related to the number of bits of the operating system and the hardware architecture, only the memory management policy under the 32-bit Windows system adopted by the present invention is analyzed here. The maximum addressing space of a 32-bit operating system is 4GB, however, the physical memory of some computer system configurations is less than 4 GB. To compensate for this deficiency, the operating system and the memory Management unit mmu (memory Management unit) introduce the concept of virtual memory to the user.
The Windows system will indicate PG position 1 of CR0 register in CPU to allow paging, while Windows DDK (Driver Developer Kit) specifies page size of 4KB, so 4GB of virtual memory is divided into 1M small paging units, and MMU manages mapping of these paging units, as shown in fig. 14, and some paging units will map to physical memory and some will be mapped to files on disk and marked as Dirty (Dirty). When the system accesses the virtual memory, because the memory map of the block is not physical memory, the system will generate a page fault interrupt (page fault exception), during the processing of the page fault interrupt, the disk file mapped by the block will be read into the memory, at the same time, the MMU updates the mapping relation of the block, sets the flag of the block as dirty, and then continues the program execution.
Due to the management strategy of the virtual memory, the real-time task can also generate page fault interruption in the execution process, which seriously influences the execution time of the real-time task.
(2) Windows real-time optimization design and implementation
The interrupt processing mechanism, the multi-task processing mechanism and the memory management mechanism of the Windows system can increase the uncertainty and unpredictability of task execution and influence the real-time performance of the task execution, so the real-time performance optimization of the Windows system is required.
1) Real-time CPU core dividing method based on I/O APIC
Computers of the X86 architecture are basically equipped with an advanced programmable interrupt controller APIC, which plays an important role in Windows interrupt handling. APIC is mainly composed of three parts: local APIC, I/O APIC, and APIC bus, wherein the APIC bus is used to transfer interrupt information between the Local APIC and the I/O APIC. Local APICs are interrupt controllers inherent to each CPU that are capable of receiving and processing Local interrupts, as well as receiving and processing interrupt information from the APIC bus, and are further capable of sending inter-processor core interrupts to enable communication between multiple CPUs. The I/O APIC is an essential component in a multi-CPU computer system and is mainly responsible for receiving external interrupt signals, converting interrupt requests of peripheral equipment into interrupt request information and then sending the information to a Local APIC of a target CPU for processing through an APIC bus. Through the deep analysis of the general PC hardware platform and the operating system, the invention provides a real-time CPU core dividing method based on I/O APIC as shown in figure 6.
The I/O APIC passes external interrupts to the CPU for execution through a programmable redirection table, each entry of which may be individually programmed, wherein the specified interrupt vector and interrupt priority, the target processor to handle the interrupt, and the manner in which the processor is selected (static or dynamic) may be programmed. The present invention unifies the response of external interrupts by CPU1 by modifying the programmable redirection table of the I/O APIC to redirect each received external interrupt to CPU1, while CPU0 acts as a real-time CPU core, only handling real-time tasks. Through the scheme, the CPU0 which is a CPU core for processing the real-time task independently can be obtained, the adverse effect of uncertain interruption on the real-time performance of the real-time task is avoided, the load of the CPU is reduced, and the delay of the real-time task is reduced.
The I/O APIC can receive and manage 24 external interrupts, so that the I/O APIC has 24 64-bit redirection tables which respectively correspond to the 24 external interrupts, wherein the 56 th bit to the 63 th bit in the 64-bit redirection table is used for determining a target CPU, the eight bit binary bits indicate 8 CPU cores in bit, and the corresponding binary bit is 1, namely the LocalAPIC which sends the interrupt to the CPU is used for processing. In the Windows system, the memory address of the default mapping of I/O APIC is 0xFEC00000, 24 redirection tables can be accessed and traversed through by the address, and the 56 th to 63 th bits in each redirection table are modified according to the above method, so that the CPU can be responsible for processing all external interrupts, for example, 57 position 1, that is, the CPU1 is set as a non-real-time core, and is responsible for receiving and processing all external interrupts in the present invention.
2) DPC timer-based real-time task execution method
The present invention designs a scheme for loading and running real-time tasks using DPC timers, as shown in fig. 7.
The DPC timer routine is inserted into the DPC queue of the real-time CPU core when the timing of the DPC timer is finished, and an interrupt of DISPATCH _ LEVEL is requested.
The DPC timer can realize timing at any time theoretically, and can be used in control tasks with periodic requirements in an industrial control process.
The invention uses the ExSetTimerresolution routine to improve the system clock resolution, further improves the timing precision of the DPC timer, and provides a stable and reliable timing period for periodic tasks in the industrial control process. The invention is designed according to the following characteristics of the routine:
(1) the setting will take effect if and only if the set resolution is less than the current resolution.
(2) And if the resolution set by the kernel driver is greater than the current resolution, maintaining the current resolution without modification.
(3) And if the resolution set by the kernel driver is less than the minimum resolution which can be supported by the system clock, adopting the minimum resolution which can be supported by the system.
The clock resolution is set to 100ns by using the ExSetTimerresolution routine, and because the value is the minimum value which can be set by the ExSetTimerresolution routine, the resolution which can be supported by different platforms can only be larger than or equal to the value, the DPC timer can be ensured to use the highest-precision resolution of the platform for timing no matter which platform the kernel driver runs on, so that the influence of the platform on the timing precision is shielded, and the compatibility of the invention is enhanced.
3) Method for eliminating missing page interruption based on non-paged memory
In a Windows system, virtual memory pages are divided into two types, one type can be exchanged into files, the memory pages are called as paged memories, and the memories may generate page missing interruption, influence program execution timeliness and be not beneficial to real-time task use. Another type of virtual memory is never swapped into a file, and this type of memory is referred to as non-paged memory. Non-paging memory is used in the program development of the real-time task, so that page missing interruption can not be generated, and the real-time task execution is facilitated.
In the development of the kernel driver, the memory loaded by the program and the memory dynamically applied in the program execution process are two major memory costs of the driver, and aiming at the two major memory costs, the method realizes that the non-paged memory of the NonPagedPool type is completely adopted when the kernel program is loaded to the non-paged memory and the kernel memory is simultaneously applied and used.
The present invention loads a driver into non-paged memory using the pre-processing instruction # pragma code _ seg ().
The invention applies for and uses non-paged memory by using an ExallocatePool WithQuotatag function, and the function prototype is as follows:
1) the PoolType of the parameter of the function is used for designating the type of the applied memory, and the value is assigned as non PagedPoolMustSurceed, namely the non-paged memory is applied and must be successfully used, so that the normal use of the non-paged memory is ensured. In addition, a Tag can be set to distribute a four-byte Tag when applying for the memory, and the Tag can be used for detecting whether the applied memory is released or not, so that the stability of the kernel program is ensured.
2) By the two methods, the driver can be loaded into the non-paged memory, and only the non-paged memory is applied and used in the driver, so that the problem that the real-time response of the program is influenced due to page fault interruption in the real-time task execution process is avoided.
3) Windows real-time optimization performance test
In the EtherCAT master station development project based on the Windows platform, the real-time optimization of Windows is very important, so that the staged performance test of the Windows real-time optimization performance is necessary.
The experimental equipment is mainly one universal IPC, and comprises a mouse, a keyboard, a display and other peripherals, a drive loading software monitor and a drive debugging tool Dbgview.
The periodic task response time is an important standard for measuring the real-time performance of the system, and the experiment is designed and developed on the basis of the principle. The experiment is carried out by inserting a timing task into the DPC queue of the real-time CPU core at the timing of every 1ms, and the real-time task has the function of printing a piece of core information DPC _ Timer route! ", and then captures this information via the Dbgview software.
Experimental data As shown in FIG. 15, a record of real-time job printing information, including a timestamp and a prompt statement printed at the time of execution of the real-time job, may be captured by Dbgview. Because the prompt statement is printed when the real-time task is executed every time, and the real-time task is inserted into the DPC queue every 1ms, the real-time task execution time efficiency can be reflected and the real-time performance of the system can be reflected by counting and calculating the time interval of the printing information.
Through repeated tests, the timestamp of the captured data is counted each time, the maximum error and the corresponding error ratio are calculated, the experimental result is shown in the following table 1, and the experimental result shows that the maximum error of the time interval of two real-time task executions is about 36us, so that the real-time performance of the Windows is greatly improved, and the real-time performance of the Windows meets most industrial control occasions of industrial fields.
TABLE 1 Windows real-time optimization Performance test results
3. EtherCAT main station overall function development based on Windows platform
The invention develops the general function of the EtherCAT master station by using an SOEM (System on Ethernet) open source protocol stack, mainly completes the transplantation of a hardware abstraction layer and an operating system abstraction layer, and designs and realizes the periodic process data communication of the master station by combining a real-time module.
(1) EtherCAT main station architecture analysis based on Windows platform
In order to realize the complete function of the EtherCAT master station and meet the requirement of agile development, the SOEM open-source master station is used as the EtherCAT master station protocol stack. The SOEM master station is an open source EtherCAT master station protocol stack developed by RT-LAB in Sweden, has complete functions, provides support for COE, SOE and FOE of several mainstream application layer protocols of EtherCAT, and supports a distributed clock. Besides, the method has excellent compatibility, supports operating systems such as Windows, Linux, RTK and INtime and the like, and can be very conveniently transplanted to different platforms. The invention adopts SOEM1.3.1 version to develop the overall function of the EtherCAT master station, and the basic function of the SOEM master station is shown in Table 2.
Table 32 SOEM master station module and function
The SOEM is mainly composed of an application program, a protocol stack body, an abstraction layer and the like, wherein the abstraction layer is divided into an operating system abstraction layer and a hardware abstraction layer. The overall software architecture of the protocol stack is shown in fig. 20, wherein the application program is application software developed by using an interface provided by the protocol stack body and is responsible for executing actual control tasks. The protocol stack body provides the function realization of the EtherCAT protocol. The operating system abstraction layer and the hardware abstraction layer are the cores of the SOEM protocol stack supporting a plurality of operating systems and hardware platforms, abstract the concrete operating system and hardware platform, provide a uniform interface for the protocol stack, shield the influence of different operating systems and hardware platforms on the protocol stack, and enable the SOEM theory to be transplanted to any operating system and hardware platform.
The SOEM version 1.3.1 master supports Windows systems by default, but as can be seen from fig. 16, the master is a user mode master which uses the timesett event () function in the Windows user mode to start a real-time thread for periodic process data transmission. The method can not ensure the accuracy and stability of the communication period in the EtherCAT communication process, so that the master station can not work stably and normally for a long time.
In order to enable the master station to have higher execution efficiency and enable the master station to more directly use the real-time optimization module developed by the invention, the invention designs a method for transplanting the SOEM master station into a kernel module, and the method mainly works as the transplanting development of a master station hardware abstract layer and an operating system abstract layer and the design and implementation of master station aperiodic communication and periodic communication functions.
(2) EtherCAT main station hardware abstraction layer development based on Windows platform
1) EtherCAT master station hardware abstraction layer analysis
The main functions of the Windows version hardware abstraction layer of the SOEM master station are to realize the big-small end conversion between the native byte order and the network byte order and provide an interface for data transmission for the protocol stack body, and the following briefly analyzes the data.
The hardware platform based on the X86 CPU usually adopts a small-end endian, that is, data low bytes are stored in a memory low address, data high bytes are stored in a memory high address, and data is transmitted on the network by adopting a large-end endian, which makes the SOEM master station have to perform large-end and small-end conversion of data during data transmission, so when a hardware abstraction layer is transplanted, a data endian conversion related module needs to be transplanted.
Another important function of the hardware abstraction layer is to connect the protocol stack body and the network card to complete data transmission, specifically, to send data transmitted by the protocol stack to the slave station through the network card and to upload the slave station feedback data received by the network card to the protocol stack for processing. The architecture of the data transceiver module is shown in fig. 17, and the data transceiver module relies on a wincap (windows packet tcp) software, since the wincap is a piece of software that provides access to the underlying network data for an application program, and the interface provided by the wincap cannot be used in a kernel mode, the data transceiver module needs to be completely rewritten and implemented.
Through the analysis of the winpcap software architecture, the bottom layer uses an NPF (network Packet Filter) Driver, which is a protocol layer Driver in an NDIS (network Driver Interface specification) network Driver, so that the invention adopts the NDIS protocol Driver to realize the function of the data receiving and transmitting module.
2) Realization of bottom layer data transceiving based on NDIS protocol driver
A modern general network transmission architecture is shown in fig. 18, wherein the NDIS network driver module is a ring which is developed from top to bottom, and provides services for implementing an api (application Programming interface) interface for the network, and converts data into bit signals for transmitting on a transmission medium for operating physical hardware. The NDIS network driving module mainly comprises three parts: a portlet driver, a middle tier driver, and a protocol driver. The NDIS miniport driver is a network card driver, and directly operates the network card to provide an interface for receiving and sending data packets for a protocol layer. The NDIS protocol driver may then complete sending and receiving ethernet packets through the binding portlet driver. The middle layer driver is a layer driver embedded between the protocol driver and the small port driver, and shows the functions of the small port driver on the upper part and the protocol driver on the lower part, and the main function of the middle layer driver is data filtering.
The most direct method for completing data transceiving is to adopt a small port drive because the small port drive is closest to physical hardware, and the fastest speed and the highest efficiency can be achieved by directly transceiving data through the small port drive, however, the network card drive under a Windows platform is generally not open, time and labor are wasted if the network card drive is independently developed, and in addition, if the specific network card drive is adopted for data transceiving, the EtherCAT main station depends on the specific network card, which is not favorable for the transplantation, popularization and wide industrial application of the main station. Therefore, the invention designs the scheme shown in fig. 19 to realize the transmission and reception of EtherCAT data on the network, adopts the protocol driver to realize the data transceiving, and can realize the data transceiving with higher efficiency and the universality of the whole system by using the protocol driver. The invention utilizes the protocol driver provided by the Windows driver development kit to develop, the protocol driver does not carry out any encapsulation and processing, the upper part directly sends out the received data through the small port driver, and the lower part directly sends the data received from the small port driver to the upper layer driver, and the processing mode can realize high-efficiency data transmission.
As shown in table 3, the SOEM master station Windows version hardware abstraction layer abstracts four interfaces ecx _ setup nic, ecx _ closed, ecx _ outframe and ecx _ revpkt, respectively provides functions of connecting and starting a network card, closing the network card, sending data through the network card and receiving data through the network card, and the concrete implementation of the interfaces is respectively realized through function functions pcap _ open, pcap _ close, pcap _ sendpack and pcap _ next _ ex provided by wincap software.
TABLE 3 hardware abstraction layer Primary function comparison and rewriting
Since the SOEM master station is transplanted to the kernel mode to become a kernel module, the NDIS protocol driver is a kernel module, and the communication between the two needs to use a calling technology between the drivers. Microsoft provides a plurality of methods for realizing the inter-driver calling technology for Windows driver developers, and the method shown in FIG. 20 is used in the invention.
The function of ec _ create _ NDISPROT is to establish a connection with an NDIS protocol driver, and provide a basis for implementing a data transceiving function, and the function is specifically implemented as shown in fig. 21, where an IoGetDeviceObjectPointer is used to obtain a device pointer of the NDIS protocol driver, then an IRP (I/O Request Packet) Request Packet with an IO control code IOCTL _ NDISPROT _ BIND _ WAIT is created through iobuildddeviceiocontrolrequest, and is filled in, and an iocalpredriver is used to send the IRP to the NDIS protocol driver for execution, and the IRP has a main function of completing binding of a protocol driver and a network card, and once the binding is successful, data received by the network card is sent to the driver, and the network card driver can also send data. After binding is completed, an IRP request packet with an IO control code of IOCTL _ NDISPROT _ OPEN _ DEVICE is created again, the IRP is filled in the same way, then the IRP is sent to an NDIS protocol driver for execution by using an IoCalldriver, and the main function of the IRP is to OPEN a network card DEVICE and prepare pad preparation for sending and receiving data.
The function of ec _ close _ ndisprot is exactly opposite to ec _ create _ ndisprot, and is used to disconnect from NDIS protocol driver for the convenience of the next reconnection, and is embodied as shown in fig. 22, which mainly uses the objectreferenceobject to delete the object obtained by the IoGetDeviceObjectPointer, and then it will perform some cleaning reset work to prepare for the next reconnection with NDIS protocol driver.
The function of the ec _ writesett is to simply encapsulate the received data and then call the NDIS protocol driver to send out the data, and the function is specifically implemented as shown in fig. 23, and the function encapsulates the incoming data first, then uses IoAllocateIrp to create IRP _ MJ _ IRP, and finally uses IoCallDriver to send the IRP to the NDIS protocol driver, so as to complete data sending.
The function of the ec _ readpacket is to READ a returned data frame received by the network card, and the function is specifically implemented as shown in fig. 24, and it uses iobuildsynchronous fsdrquest to create an IRP of IRP _ MJ _ READ, then uses IoCallDriver to send the IRP to NDIS protocol driver, i.e. data can be READ, and the obtained data is processed to meet the format and size of the EtherCAT returned frame, and finally copied to a specified buffer area for call function analysis processing.
3) Realization of data size end conversion function
In the hardware abstraction layer transplanting process, the data size end conversion function must be realized again. The big-end and small-end conversion of data is mainly to complete the conversion task between the storage sequence of data in the local computer and the transmission sequence in the network, and the byte sequence adopted by the network transmission is always in a big-end mode, and the storage sequence of data in the local computer is often related to a hardware platform and the setting carried out. Therefore, it is important to identify the native endian mode and perform the big-end and small-end conversion of data according to the difference between the native endian mode and the network endian mode. The big-end mode and the small-end mode are generated by different storage modes of data in the memory, as shown in fig. 25.
The key for performing the big-end and small-end conversion is to judge the native byte order, the native byte order can be obtained through a native hardware platform architecture, the native byte order is obtained in a software mode as shown in fig. 26, and on the basis, the conversion of the native byte order and the network byte order is completed according to the following modes:
a. if the native endian is big-end mode, then there is no need to do big-end conversion to the data.
b. If the local byte order is in a small-end mode, two functions of htons and ntohs need to be realized in a kernel mode through bit operation and shift operation.
(3) EtherCAT main station operating system abstract layer development based on Windows platform
The SOEM master station transmits and receives data frames in a polling mode, namely, the data frames are immediately received after being transmitted. In the receiving process of the data frame, a 'time-out mechanism' is adopted, and the mechanism uses a time-related function API such as a system clock, and the function is provided by an operating system abstraction layer. In addition, functions related to thread creation are also provided by the operating system abstraction layer. Thus, migration to the operating system abstraction layer primarily involves modification or rewriting of time-dependent and thread-dependent functions.
Through analysis of the operating system abstraction layer time correlation function, it is found that the osal _ current _ time, the osal _ time _ diff, the osal _ timer _ start, and the osal _ timer _ is _ expect are all implemented by the dependent osal _ gettimeoffset function, and the dependency relationship is shown in fig. 27. Therefore, the migration of the time-dependent function is mainly the rewriting and implementation of the osal _ gettimeoffday function, and the function is to obtain the local timestamp, and the function is used in the protocol stack mainly for obtaining the timestamp and for timing or timing. The KeQuerySystemTime is used for rewriting the function, the function can obtain a system time, the system time refers to the timing from 1 month 1 to the present of 1601, the unit is 100ns, and the function can provide high-precision time stamp, timing or timing functions for a protocol stack and completely meets the requirements of the protocol stack.
The Windows operating system provides rich interface functions for kernel program development, and provides corresponding thread creating functions for a kernel mode for creating threads, as shown in fig. 28, the invention adopts a pscreatesystemstem mthread function to create kernel threads, and can complete the migration of thread-related programs in an operating system abstraction layer based on the function.
(4) EtherCAT main station overall function design and implementation based on Windows platform
The EtherCAT master station overall function is realized by an SOEM protocol stack body, and mainly completes the transplantation of the part and the design of overall data communication, wherein the design comprises aperiodic data communication and periodic process data communication.
4. EtherCAT main station interface design and implementation based on Windows platform
The EtherCAT master station developed by the invention is a kernel driving module, and in order to enable an application program to conveniently use the function of the master station, an application program interface is developed for the EtherCAT master station, and the EtherCAT master station mainly comprises an interface for managing and operating a slave station and a data interaction interface of the application program and the master station.
(1) Management and operation slave station interface design and implementation
The EtherCAT bus communication protocol determines that EtherCAT is a "master-slave" operating mode, a master station can connect a plurality of slave stations, and more typical slave station devices include: servo drivers and IO. For the master station, it is not enough to realize that the master station has the functions of identifying, configuring and driving the slave stations, but it should also have the capability of managing different numbers and different types of slave station devices, and a management module should be created and maintained in the master station for each slave station, and the management module contains an operation interface for the slave station and attribute information of each slave station.
The present invention devises a flow of creating and maintaining a slave station management operation module as shown in fig. 29. Firstly, registering the slave stations supported by the module in the SOEM kernel driver by using two mark information of eep _ man and eep _ id of the slave stations and a function for creating the slave station management module as registration information, wherein the eep _ man and the eep _ id are two parameters in a structural body ec _ slave used for managing scanned slave stations in the SOEM master station and are used for matching the slave stations. The function of creating a management module creates a management module for the successfully matched slave station.
When the SOEM master station starts to work, the slave station scanning and initializing operations are executed, and the scanned slave station information is stored in the ec _ slave array, so that the subsequent use of a protocol stack is facilitated.
And mainly matching two mark information, namely eep _ man and eep _ id, by traversing the slave station information scanned in the ec _ slave array. And if the matching is available, returning to the creation function for creating the slave station management module. If the matching fails, the master station generates an error report of unsuccessful matching for problem troubleshooting.
And creating a management module for managing the successfully matched slave station by using the function returned by successful matching, and putting the management module into the _ master _ drvs array for unified management.
After the creation of the slave station management module is completed, the slave station needs to be configured by using the management module and the state machine switching of the slave station Init-Pre-OP-Safe-OP is completed. The primary station then periodically updates the PDO mapping, and performs periodic process data communication with the secondary station to perform control tasks.
Because the slave station devices are various in types and the operation interfaces and the attribute information are different, the invention extracts the universal management operation interfaces and the attributes from the slave stations (servo drivers and IOs) of different types to form a universal module, and respectively encapsulates the unique operation interfaces and the unique attributes of the servo drivers and the IOs into independent modules. And then the two modules are embedded into a universal module through the units to form a complete slave station management operation module. The general management operation module of the slave station mainly comprises a general operation interface and attribute information of the slave station, wherein the management operation interface comprises a state switching interface, a state checking interface, an acquisition state interface, a starting interface, a configuration interface, a data updating interface and the like of the slave station, and the attribute information comprises slave station names, IDs, numbers, TXPDO mapping numbers, RXPDO mapping numbers and the like.
A servo special operation interface is designed for a servo slave station, and the servo special operation interface mainly comprises a slave station position instruction value setting, a speed instruction value setting, a control word setting, an operation mode setting, an actual position value obtaining, an actual speed value obtaining and a state word obtaining. The servo driver is provided with a servo driver interface, a servo driver interface and a control information interface.
For the IO slave station, an IO special operation interface is designed, which mainly comprises the steps of obtaining the number of IO groups, reading and writing IO information and the like, and the management and the operation of the IO slave station are completed.
(2) Design and implementation of application program and master station drive data interaction interface
In the actual motion control process, operations such as motion trajectory planning and interpolation are completed by an application program, then corresponding instruction values are calculated according to the operation modes of the slave stations, the instruction values are sent to an EtherCAT master station, the master station sends the instruction values to the slave stations periodically through periodic process data communication, and therefore control tasks are completed, and return data of the slave stations are often important information for monitoring the actual operation states of the slave stations. Through the analysis, a large amount of data interaction needs to be performed between the application program running in the user mode and the master station driver running in the kernel mode, so that designing an interface for data interaction between the user mode and the kernel mode is also the key point of the part.
The invention designs an interface scheme for data interaction between an application program and an EtherCAT master station driver as shown in fig. 3, and the interface scheme is specifically described by taking a servo driver as a slave station device.
Firstly, an application program completes tasks such as trajectory planning, interpolation and the like, and then a corresponding instruction value is calculated according to an operation mode configured by a slave station: if the slave station operation mode is the periodic synchronous position mode, the position command value is calculated. If the slave station operation mode is the periodic synchronous speed mode, the speed instruction value needs to be calculated. If the slave station operation mode is the periodic synchronous torque mode, a torque command value needs to be calculated.
A structure is designed to store instruction data, redundancy is set here in order to enable the multiplexing of the instruction data structure, and the calculated instruction value is temporarily stored by using the structure. The command data is sent to a master station driver by calling an interface for sending the command data, the master station driver stores the data into a command data buffer queue, and the master station takes out the command data from the command data buffer queue and fills RXPDO mapping when carrying out periodic process data communication.
The invention designs a feedback data structure body for temporarily storing the feedback data, wherein the main station stores the extracted feedback data in a feedback data structure body form and inserts the feedback data into a feedback data queue, and a user program waits for reading the data into a user state through an interface for reading the feedback data.
After updating the RXPDO mapping and buffering the TXPDO mapping information, the PDO mapping can be encapsulated by a protocol stack and then sent to the slave station by an NDIS protocol driver, so that process data communication of one period is completed.
The periodic process data communication is to periodically perform the above process, complete data interaction and execute control tasks.
5. EtherCAT main station test and analysis based on Windows platform
The EtherCAT master station developed by the invention is used, a self-made servo developed in a laboratory is used as slave station equipment, an experiment is designed to test and analyze the function and performance of the master station, and finally, a multi-axis servo drive system application test is carried out to further test and analyze the master station.
(1) Experimental test platform construction
The experimental platform is based on the EtherCAT master station developed by the invention, and is combined with a servo driver supporting the EtherCAT bus and a Mige motor which are self-developed in a laboratory to build an EtherCAT control system, and meanwhile, the function and performance test of the EtherCAT master station is assisted by matching with test tools such as a network analyzer and the like.
(2) EtherCAT main station function test based on Windows platform
And respectively testing the EtherCAT state machine, the aperiodic mailbox communication and the periodic process data communication on the established experimental platform. The test items correspond to the research key points of the invention. The slave station configuration, state machine switching and management are all main body functions of an EtherCAT protocol stack, and the slave station state switching, checking and obtaining are all realized by respectively adopting the req _ state, chk _ state and get _ state interfaces of the management and operation slave station modules developed by the invention. The aperiodic mailbox communication is also the main function of the EtherCAT protocol stack, and is realized by using a configuration interface for managing and operating the slave station module when the aperiodic mailbox communication is used for configuring the bus communication cycle, the operation mode and the like of the slave station. The periodic process data communication is also the main function of an EtherCAT protocol stack, in addition, the accuracy and the stability of the communication period are controlled by adopting the Windows real-time optimization module developed by the invention, in addition, the command data which is calculated by the application program needs to be transmitted into the kernel state through the data interaction interface in the periodic communication process, then the command data is updated to the PDO through the update interface of the management slave station module, and meanwhile, the feedback data also needs to be transmitted to the application program through the data interaction module.
The experiment completes an actual industrial control task by compiling an application program. In the program, the master station scans, identifies and configures the slave station and switches a state machine of the slave station to enable the slave station to complete the process of gradually passing through a Pre-OP state and a Safe-OP state from an Init state and finally entering the OP state, wherein when the slave station is in the Pre-OP state, an EtherCAT bus communication period, a slave station operation mode and PDO mapping are configured through aperiodic mailbox communication. And after the slave station is switched to the OP state, the master station periodically updates the instruction value issued by the user state into the PDO mapping, simultaneously extracts and stores feedback data in the PDO mapping, reads the feedback data by an application program, periodically executes the process to perform periodic process data communication, and finally completes the control task of driving the motor to move.
1) EtherCAT master station management slave station state machine test
In the complete EtherCAT bus communication process, it is very important for the master station to identify and configure the slave stations and to switch and manage the slave station state machines. The process that the master station gradually switches the slave station from the Init state to the OP state is completed by executing the written application program, and the data message in the communication process of the master station and the slave station is captured by the network analyzer and the Wireshark software, so that the transition process of the slave station state is analyzed.
In the experiment, a servo driver self-developed in a laboratory is used as a slave station, the default state of the servo is an Init state after the servo is powered on, the state value can be inquired through a key on the servo driver, the servo state is 1 at the moment, and the value represents the Init state.
Analyzing messages captured in the communication process through Wireshark software, and screening data messages through a filtering condition of ecat.ado ═ 0x0130, wherein ecat.ado ═ 0x0130 represents the data messages for inquiring the offset address of the ESC as a register value of 0x130, and the register of 0x130 represents the state of the slave station. The state change of the slave station in the bus communication process can be analyzed through the screened messages.
Finally, the current state is inquired through a key on the servo, the configuration result is further verified, the current servo state is 8, and the value represents the OP state. Through the test, the configuration of the master station to the slave station and the switching management function of the state machine can be obtained to be normal.
2) EtherCAT master station aperiodic data communication test
EtherCAT aperiodic communication mainly accomplishes some system configurations. In the experiment, the bus communication period, the slave station operation mode and the like are configured by using aperiodic mailbox communication, and the data message of the aperiodic mailbox communication in the bus communication process is captured and analyzed by a network analyzer and Wireshark software.
By inquiring a servo program, the servo default EtherCAT bus communication period is 1ms, in order to verify that the master station can configure the EtherCAT bus communication period through non-periodic communication, the communication period is set to be 4ms in the experiment, and periodic process data communication is carried out according to the period.
The captured data is analyzed by Wireshark software, wherein "COE" indicates that the bus application layer protocol adopts COE protocol, "initial Download" indicates that the frame is a configuration frame written below, "Index" and "SubIndex" indicate indexes and sub-indexes defined by COE protocol, wherein the Index is 0x1c32, and the sub-Index is 0x02, which means configuration cycle time. Data represents the cycle size of the configuration, the unit is ns, 0x003d0900 corresponds to the decimal number 4000000, and the communication cycle of the aperiodic communication is configured to be 4 ms.
In order to further verify the correctness of the configuration of the communication period, the communication period of the periodic process data communication between the master station and the slave station can be directly observed, data frames of partial periodic process data communication are intercepted, and the communication period of the experimental periodic process data communication at this time can be calculated to be 4ms by comparing the time stamps of each data frame.
The setting of the operation mode of the servo driver is an important step in the motion control process, the common operation modes of the servo driver comprise a periodic synchronous position mode, a periodic synchronous speed mode and a periodic synchronous torque mode, and the operation modes are selected according to different industrial control scenes. The operation mode can be configured through aperiodic mailbox communication, before the experiment, the operation mode is set to be a periodic synchronous speed mode through a servo key, in the experiment process, the operation mode is set to be a periodic synchronous position mode through aperiodic communication, the configuration process is analyzed through data messages captured by a network analyzer and Wireshark software, and meanwhile, the operation mode before and after the servo configuration is checked through the key to further verify the configuration process.
The setting of the operation mode is similar to that of the communication cycle except that the data object to be configured is a sub-index 0x00 of index 0x6060, which is configured as "0 x 08", and "0 x 08" indicates a periodic synchronization position pattern according to the definition in the CiA402 line. The secondary station operation mode can be configured into a periodic synchronous position mode through the configuration. In order to further verify the configuration condition of the operation mode, the operation mode is inquired through a servo key before and after the experiment, and the operation mode can be verified to be successfully configured by comparing the change of the operation mode before and after the experiment.
3) EtherCAT master station periodic process data communication test
During the periodic process data communication between the master station and the slave station, the master station copies the position instruction values (the slave station is in a periodic synchronous position mode) sent by the application program into the 0x607a data object in the PDO mapping, and the motor can be driven to move by periodically changing the values of the 0x607a data object, so that the periodic process data communication is completed. Meanwhile, the master station can also read the feedback information of the slave station in the PDO mapping and store the feedback information into a feedback data queue, and the application program can read the feedback data into a user state through a reading interface for further analysis and processing.
In the experiment, an application program simulates an industrial control scene, namely the position instruction value is increased by 200 every other period and then is sent to a kernel master station for driving a motor to move, and meanwhile, the master station can call a reading interface to read feedback data of the slave station.
For the convenience of subsequent analysis of experimental data, the PDO mapping of data communication in the experimental process is listed here.
(3) EtherCAT main station performance test based on Windows platform
Through the experiment of the previous paragraph, the function of EtherCAT main website has been tested, has verified that the main website can control and communicate servo driver and then control the complete function of motor motion. The part is used for testing the performance of the main station and mainly testing the real-time performance of the main station.
The accuracy and stability of the communication period of the periodic process data communication between the master station and the slave station are directly influenced by the real-time performance of the master station, the accurate determination and stability of the communication period further influence the actual control precision, the reason for optimizing the real-time performance of the Windows system is also the reason for optimizing the real-time performance of the Windows system, and the communication period of the periodic process data communication in the actual control process is tested, calculated and analyzed.
In order to increase the accuracy of the captured EtherCAT data message, a network analyzer is connected with another PC, and is matched with Wireshark software to capture the record of the EtherCAT data message sent from the network analyzer and the record of the EtherCAT data message returned from the network analyzer, and then the cycle time is calculated by analyzing the timestamp. In the experiment, the communication periods are set to be 1ms and 4ms respectively, 30000 frame data are captured and analyzed respectively, wherein the maximum period is 1.085ms and the minimum period is 0.93ms for the 1ms timing period. Aiming at the 4ms timing period, the maximum period is 4.104ms, the minimum period is 3.895ms, the timing error is obviously improved compared with the error of the general Windows platform 150-.
(4) Multi-axis bus type servo drive system application test and analysis
The system is based on the EtherCAT master station developed by the invention, and is combined with 4 laboratory self-developed servo drivers and 4 Mige motors to build a four-axis control system, so that actual engineering application tests are carried out, and further tests are carried out on the functions and the performances of the master station.
The test case is compiled in the experiment to realize the following functions: scanning the slave station, configuring the slave station, setting the operation mode of the slave station to be a periodic synchronous position mode, wherein the communication period is 1ms, then configuring and switching the state of the slave station to be an OP state, setting each axis to generate a position instruction value according to a function rule of 60000sin (pi/4000 count), wherein the count is period count, then transmitting the position instruction value to an instruction data queue of a kernel state through a transmission instruction data interface, the master station and the slave station perform periodic process data communication, periodically taking out data from the instruction data queue, and transmitting the instruction data to a 0x607A data object of each axis in a PDO mapping for driving a motor to move. Meanwhile, the master station can read the feedback data of the slave station and store the feedback data into a feedback data queue, and the application program reads the feedback data of the slave station to a user mode through a receiving feedback data interface to complete data interaction.
In the experiment, the function and the control effect of the main station are analyzed by comparing the sent position instruction value with the received actual position value. The application program is operated, the position instruction value of each axis and the fed-back actual position value are respectively obtained, due to synchronous motion of the four axes, in order to better represent the motion state of each axis, the position data of each slave station at different moments are intercepted through experiments, and the experiment results are shown in fig. 30 to 33.
Through the change curve of the actual position and the feedback position of each axis, the position tracking of the sine rule of each axis according to the sent position instruction value can be obtained, and the position tracking effect is good.
The EtherCAT main station has strict requirements on the stability in engineering application, and in order to test the stability of the main station, the four-axis control system is used for continuous 24-hour testing. The test result shows that the bus communication of the master station is normal in the process of continuously operating for 24 hours, the servo work is normal and no alarm or error is given. By combining the experimental analysis, the master station has the capability of controlling multi-axis motion for a long time and has practical engineering application value.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims (10)

1. The utility model provides a real-time etherCAT main website implementation system of Window platform which characterized in that, real-time etherCAT main website implementation system of Window platform includes:
an application program interface module: the Ethernet control and maintenance platform is connected with an EtherCAT master station protocol stack module; the method comprises the steps of managing and operating an interface of a slave station and an application program and master station data interaction interface; the interface is used for providing an interface for operating an EtherCAT master station protocol stack for an application program;
EtherCAT master station protocol stack module: the real-time optimization module is connected with the application program interface module, the real-time optimization module and the bottom layer data transceiver module; the method is implemented by using an open source SOEM protocol stack under a window kernel, and is used for packing data of an application program into an EtherCAT protocol data frame, sending the EtherCAT protocol data frame to a slave station, and simultaneously analyzing the slave station data and transmitting the slave station data to the application program;
the bottom network data transceiver module: the Ethernet control automation system is connected with an EtherCAT master station protocol stack module and a real-time optimization module; the network card is used for transmitting data based on NDIS protocol drive;
a real-time optimization module: the data transceiver module is connected with the underlying network data transceiver module and is communicated with the periodic process data of the EtherCAT master station protocol stack; for providing a highly accurate timing cycle for periodic process data communication.
2. The system of claim 1, wherein the application program and master station driver data interaction interface is further configured to configure, start, stop, switch states of a bus, set and acquire periodic data, and set and read non-periodic data.
3. The system of claim 1, wherein the application program interface module is configured to enable network data transceiving by invoking an ndis interface.
4. The system of claim 1, wherein the protocol stack of the EtherCAT master protocol stack module is implemented under a windows kernel.
5. The system of claim 1, wherein the EtherCAT master protocol stack module comprises:
the data identification and analysis unit is used for encapsulating the EtherCAT data message and sending an EtherCAT data frame; receiving an EtherCAT data frame, and identifying and analyzing an EtherCAT data message;
the management unit is used for managing the slave station state machine and the state configuration, switching and maintenance of the slave station state machine;
the configuration unit is used for carrying out aperiodic mailbox data communication and finishing the configuration of the system parameters of the slave station;
the slave station control unit is used for carrying out periodic process data communication, periodically interacting PDO data with the slave station, and finishing control and monitoring related functions of the slave station through PDO operation;
the bottom network data transceiver module further comprises:
a network card data receiving and transmitting unit: directly using an NDIS protocol driving interface to control the transceiving of the network port data; receiving data, transmitting the received data frame to a protocol stack for processing, and sending out the data frame processed by the protocol stack;
and the physical network card driving unit is used for receiving the Ethernet data frame from the network card and transmitting the Ethernet data frame to the EtherCAT master station protocol stack.
6. The method for implementing the real-time EtherCAT master station of the windows platform of the system for implementing the real-time EtherCAT master station of the windows platform according to claim 1, wherein the method for implementing the real-time EtherCAT master station of the windows platform comprises the following steps:
(1) creating and maintaining a DPC object by using the DPC timer, wherein the DPC object is bound with a DPC timer routine, the DPC object is initialized, and a CPU core for executing a real-time task can be designated when the DPC object is initialized; filling KDPC structure;
(2) starting a timer, and improving the resolution of a system clock by using an ExSetTimeResolution routine;
(3) real-time tasks are performed in the DPC timer routine.
7. The method for implementing the real-time EtherCAT master station of the Window platform as claimed in claim 6, wherein in the step (1), the KDPC structure comprises:
the KDPC structure comprises 9 structure members, Number members, and is used for specifying the DPC object to be added into the DPC queue of which CPU, the default value is 0, namely the DPC object created by default is inserted into the DPC queue of the CPU0, and the CPU0 is a real-time CPU core;
and the Import member is used for representing the Importance of the DPC object, is defined in a KDPC _ IMPORTANCE enumeration type, has a default value of MediumImport of 1, and changes the sequence of the DPC object in the DPC queue by modifying the value so as to modify the real-time task execution sequence.
8. The method for implementing the real-time EtherCAT master station of the Window platform as claimed in claim 6, wherein in the step (2), the using the exsettimerrresolution routine to improve the system clock resolution comprises:
1) if and only if the set resolution is less than the current resolution, taking effect;
2) if the resolution set by the kernel driver is greater than the current resolution, maintaining the current resolution without modification;
3) and when the resolution set by the kernel driver is smaller than the minimum resolution which can be supported by the system clock, adopting the minimum resolution which can be supported by the system.
In step (3), the real-time task execution method based on the DPC timer comprises the following steps:
the DPC timer routine is inserted into a DPC queue of the real-time CPU core when the timing of the DPC timer is finished, and requests an interrupt of DISPATCH _ LEVEL, the real-time CPU core does not receive the hardware interrupt, and the task in the upper LEVEL IRQL which can be received by the task in the DPC queue of the DISPATCH _ LEVEL LEVEL preferentially executes the task in the DPC queue.
9. An information data processing terminal for realizing the real-time EtherCAT master station development method based on the Windows platform according to any one of claims 6 to 8.
10. A computer readable storage medium comprising instructions which, when run on a computer, cause the computer to perform the Windows platform based real-time EtherCAT master station development method of any of claims 6 to 8.
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