CN105429836A - Real-time EtherCAT master station system - Google Patents
Real-time EtherCAT master station system Download PDFInfo
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- CN105429836A CN105429836A CN201510934286.5A CN201510934286A CN105429836A CN 105429836 A CN105429836 A CN 105429836A CN 201510934286 A CN201510934286 A CN 201510934286A CN 105429836 A CN105429836 A CN 105429836A
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- 238000004891 communication Methods 0.000 claims description 19
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- 230000004044 response Effects 0.000 abstract description 7
- 238000013500 data storage Methods 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 4
- 101100059544 Arabidopsis thaliana CDC5 gene Proteins 0.000 description 3
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40019—Details regarding a bus master
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/403—Bus networks with centralised control, e.g. polling
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Abstract
The invention belongs to the field of EtherCAT, and relates to a real-time EtherCAT master station system. The EtherCAT master station system comprises a microprocessor, a master station module, an Ethernet controller, a program storage and a data storage. The microprocessor is connected with the master station module, the Ethernet controller, the program storage and the data storage through a data bus. The real-time EtherCAT master station system adopts a special EtherCAT industrial Ethernet module to analyze an EtherCAT master station protocol, promotes master station response real-time from the aspect of hardware, and solves the problem that due to the utilization of soft protocol stacks of general-purpose operating systems such as Windows, Linux and Android, an EtherCAT bus response bottleneck that real-time of the master station is influenced is formed in the prior art.
Description
Technical Field
The invention belongs to the field of EtherCAT (Ethernet control automation technology), and particularly relates to an industrial real-time Ethernet EtherCAT master station system.
Background
EtherCAT is proposed by the company beifu in germany, and has been widely used at present due to its characteristics of high network real-time performance, flexible topological structure, simple system configuration, etc. EtherCAT adopts a master-slave mode structure, and a master station can be a common PC. The control period is sent from the master station, which sends downlink telegrams. The data frame traverses all the slave station devices, each device analyzes a message addressed to a local machine when the data frame passes through, reads data or writes data into a specified position in the message according to a command in a message header, and the slave station hardware adds 1 to a working counter of the message to indicate that the data is processed. After accessing the last slave station located in the logical position of the whole system, the slave station directly transmits the processed data frame to the master station as an uplink telegram. And after receiving the uplink telegram, the master station processes the return data and finishes one-time communication.
At present, the EtherCAT master station is mainly implemented by adopting a solution based on a PC under a Windows operating system by germany befort corporation, and certainly, an embedded solution based on a Linux operating system and an Android operating system is also available. EtherCAT is used as an industrial field bus, and has the remarkable characteristic of response real-time performance, but if a main station adopts a soft protocol stack on a general operating system (such as Windows, Linux and Android), the protocol analysis process of the EtherCAT needs to be called by the operating system, the real-time performance of the EtherCAT is influenced, and the EtherCAT bus response bottleneck is also formed.
Disclosure of Invention
In order to solve the problem of response bottleneck of an EtherCAT bus in the prior art, the invention provides a real-time Ethernet EtherCAT master station system.
In order to achieve the purpose, the invention adopts the following technical scheme:
a real-time Ethernet EtherCAT master station system comprises: the system comprises a microprocessor, a master station module, an Ethernet controller, a program memory and a data memory; and the microprocessor is connected with the master station module, the Ethernet controller, the program memory and the data memory through a data bus. Wherein,
the microprocessor realizes control calling of the EtherCAT main station, and comprises communication between the EtherCAT main station and upper computer network configuration software, initialization of the main station module according to instructions of the upper computer network configuration software, and network configuration.
The main station module provides a dual-port RAM which is used as an external RAM of the microprocessor, and the communication function of the EtherCAT main station system is realized.
And the Ethernet controller provides a communication interface between the microprocessor and the upper computer.
The program memory is used for storing a master station control call and an upper computer communication function code, and storing network configuration data (XML file) for the master station module to use.
And the data memory is used for storing data of the master station control calling program and the operation of the upper computer communication function program.
Further, the microprocessor adopts a SPARCV832 bit CPU.
Further, the program memory adopts FLASH.
Further, the data memory adopts SDRAM.
Further, the master station module adopts an industrial Ethernet module COMX100 CN-RE.
Furthermore, the master station module provides a diagnosis interface for inter-protocol firmware downloading and factory diagnosis.
Compared with the prior art, the invention has the following beneficial effects:
the invention adopts the special EtherCAT industrial Ethernet module to analyze the EtherCAT master station protocol, improves the response real-time performance of the master station from hardware, and solves the problem that the real-time performance of the master station in the prior art is influenced to become the response bottleneck of the EtherCAT bus because the master station adopts the soft protocol stack of general operating systems such as Windows, Linux, Android and the like.
Drawings
FIG. 1 is a block diagram of a real-time Ethernet EtherCAT master station system;
FIG. 2 is a wiring diagram of the microprocessor and master station module of an embodiment.
Detailed Description
The invention is further illustrated with reference to the following figures and examples.
A real-time ethernet EtherCAT master station system, whose composition block diagram is shown in fig. 1, includes: the system comprises a microprocessor, a master station module, an Ethernet controller, a program memory and a data memory; and the microprocessor is connected with the main station module, the Ethernet controller, the program memory and the data memory through data lines.
The microprocessor realizes control calling of the EtherCAT master station, and comprises functions of communication between the master station and upper computer network configuration software, initialization of an EtherCAT master station module according to instructions of the upper computer network configuration software, network configuration and the like. The microprocessor adopts domestic SPARCV 832-bit CPU, and its main frequency can be up to 100MHZAnd the external data line can have 32-bit and 16-bit modes, and the storage space and the IO space can be set independently, so that the plate-level memories all adopt the 32-bit mode.
The main station module provides a dual-port RAM, and realizes the main station protocol communication function of the EtherCAT main station system. The master station module adopts a German Helouvern industry Ethernet module COMX100 CN-RE. The COMX100CN-RE module is connected with a microprocessor SPARCV8 to realize the function of an EtherCAT master station. The connection diagram of the COMX100CN-RE module and the SPARCV8 is shown in FIG. 2. The COMX100CN-RE module provides a main device interface which is DPM (Dual Port Memery) and realizes an application program interface of EtherCAT main station related communication through the DPM. The master station module acts as an external RAM to the microprocessor to which it is connected in hardware. In addition, the COMX100CN-RE module provides a diagnostic interface for inter-protocol firmware download (with corresponding WINDOWS software) and factory diagnostics. The diagnostic interface hardware provides a UART interface and a USB interface. The embodiment adopts a UART mode and can realize RS232 mode communication through 1 path of RS232 transceivers. The microprocessor and the COMX100CN-RE module are hung in an IO area of the microprocessor through a DPM interface, a 16-bit mode is adopted, the microprocessor is a large-end mode U, when the microprocessor is connected with a small-end peripheral COMX, the hardware is connected with high and low eight-bit exchange of data lines, and the chip selection is IO chip selection after IOCS is expanded. Since the COMX read-write timing requires the use of the active BRDYN signal at low level, and the IOBUSY signal external to the microprocessor SPARCV8 is active at high level, the two signals need to be logically matched through a NOT gate.
The Ethernet controller adopts 2 Ethernet control chips MAC0 and MAC1 for providing a communication interface with an upper computer so as to realize the communication configuration management related to the EtherCAT master station.
The program memory is used for storing the main station control call and the upper computer communication function codes and storing network configuration data (XML files) for the main station module to use; the data memory is used for storing data of the master station control calling program and the upper computer communication function program. The program memory ROM adopts FLASH; the data memory RAM adopts SDRAM. In order to maximize the ROM space, 32 bit wide external expansion ROM spliced by two groups of 2 pieces of 16 bit wide FLASH is respectively connected to two ROM address spaces of ROMSN0 and ROMSN1 of a microprocessor. The microprocessor supports 32-bit SDRAM, therefore, the external RAM is also designed to be spliced into 32-bit SDARM by two pieces of 16-bit SDRAM.
The embodiment needs to be extended with 3 peripherals: two ethernet controllers MAC0 and MAC1, one COMX. Since the microprocessor selected by this embodiment has only 1 channel of IO chip select signal IOSN, the IO chip select signal needs to be extended to implement the function of managing 3 IO peripherals. The IOSN signal of the microprocessor gated by the 2-4 decoder is controlled by two address lines A24 and A25 of the CPU, so that 4 chip selection extensions are realized, the first two extension IO chip selections are allocated to MAC0 and MAC1, and the third extension IO chip selection is allocated to COMX.
The present invention is not limited to the above-described embodiments, and any obvious modifications or alterations to the above-described embodiments may be made by those skilled in the art without departing from the spirit of the present invention and the scope of the appended claims.
Claims (6)
1. The utility model provides a real-time ethernet etherCAT master station system, its characterized in that etherCAT master station system includes: the system comprises a microprocessor, a master station module, an Ethernet controller, a program memory and a data memory; the microprocessor is connected with the master station module, the Ethernet controller, the program memory and the data memory through a data bus; wherein,
the microprocessor realizes control calling of the EtherCAT master station, and comprises communication between the EtherCAT master station system and upper computer network configuration software, initialization of the master station module according to instructions of the upper computer network configuration software, and network configuration;
the main station module provides a dual-port RAM which is used as an external RAM of the microprocessor to realize the communication function of the EtherCAT main station system;
the Ethernet controller provides a communication interface between the microprocessor and the upper computer;
the program memory is used for storing a master station control call and an upper computer communication function code, and storing network configuration data for the master station module to use;
and the data memory is used for storing data of the master station control calling program and the operation of the upper computer communication function program.
2. The real-time ethernet EtherCAT master station system of claim 1, wherein said microprocessor employs a SPARCV832 bit CPU.
3. The real-time ethernet EtherCAT master station system according to claim 1, wherein said program memory employs FLASH.
4. The real-time ethernet EtherCAT master station system according to claim 1, characterized in that said data memory is SDRAM.
5. The real-time ethernet EtherCAT master station system of claim 1, wherein the master station module employs an industrial ethernet module COMX100 CN-RE.
6. The real-time ethernet EtherCAT master station system of claim 1, wherein the master station module provides a diagnostic interface for inter-protocol firmware download and factory diagnostics.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106059877A (en) * | 2016-07-18 | 2016-10-26 | 中国电子信息产业集团有限公司第六研究所 | EtherCAT master station module based on SPARC architecture CPU |
| CN106506303A (en) * | 2016-10-11 | 2017-03-15 | 西安电子科技大学 | A kind of main station system of controller real-time ethernet EtherCAT |
| CN110620712A (en) * | 2019-09-03 | 2019-12-27 | 武汉久同智能科技有限公司 | Method for realizing real-time EtherCAT master station of Window platform |
| CN111711476A (en) * | 2020-04-26 | 2020-09-25 | 四川润泽经伟信息技术有限公司 | Real-time frame synchronization system and method based on satellite communication countermeasure system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106059877A (en) * | 2016-07-18 | 2016-10-26 | 中国电子信息产业集团有限公司第六研究所 | EtherCAT master station module based on SPARC architecture CPU |
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| CN106506303A (en) * | 2016-10-11 | 2017-03-15 | 西安电子科技大学 | A kind of main station system of controller real-time ethernet EtherCAT |
| CN110620712A (en) * | 2019-09-03 | 2019-12-27 | 武汉久同智能科技有限公司 | Method for realizing real-time EtherCAT master station of Window platform |
| CN110620712B (en) * | 2019-09-03 | 2021-08-20 | 武汉久同智能科技有限公司 | Method for realizing real-time EtherCAT master station of Window platform |
| CN111711476A (en) * | 2020-04-26 | 2020-09-25 | 四川润泽经伟信息技术有限公司 | Real-time frame synchronization system and method based on satellite communication countermeasure system |
| CN111711476B (en) * | 2020-04-26 | 2022-04-19 | 四川润泽经伟信息技术有限公司 | Real-time frame synchronization system and method based on satellite communication countermeasure system |
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Effective date of registration: 20190710 Address after: 102209 Room 622, Building A, China Electronic Information Security Industry Base, Southern Science City, Changping District, Beijing Co-patentee after: CHINA ELECTRONICS CORPORATION 6TH Research Institute Patentee after: CEC INTELLIGENT TECHNOLOGY Co.,Ltd. Address before: No. 25 Tsinghua East Road, Haidian District, Beijing 100085 Patentee before: CHINA ELECTRONICS CORPORATION 6TH Research Institute |
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Inventor after: Song Liding Inventor after: Huang Bing Inventor after: Fan Wenbin Inventor after: Song Dong Inventor after: Dong Min Inventor before: Huang Bing Inventor before: Fan Wenbin Inventor before: Song Dong Inventor before: Dong Min |
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Effective date of registration: 20240902 Address after: 102200 room 622, building a, China electronic information security industry base, South District, future science city, Changping District, Beijing Patentee after: CEC INTELLIGENT TECHNOLOGY Co.,Ltd. Country or region after: China Address before: 102209 room 622, building a, China electronic information security industry base, South District, future science city, Changping District, Beijing Patentee before: CEC INTELLIGENT TECHNOLOGY Co.,Ltd. Country or region before: China Patentee before: CHINA ELECTRONICS CORPORATION 6TH Research Institute |