CN114168271A

CN114168271A - Task scheduling method, electronic device and storage medium

Info

Publication number: CN114168271A
Application number: CN202111640930.XA
Authority: CN
Inventors: 郭建川; 李燕
Original assignee: Kedong Guangzhou Software Technology Co Ltd
Current assignee: Kedong Guangzhou Software Technology Co Ltd
Priority date: 2021-12-29
Filing date: 2021-12-29
Publication date: 2022-03-11
Anticipated expiration: 2041-12-29
Also published as: CN114168271B

Abstract

The embodiment of the invention discloses a task scheduling method, electronic equipment and a storage medium, wherein the task scheduling method comprises the following steps: determining target virtual cores to be scheduled of each physical core from multiple virtual cores in a multi-virtual machine according to a preset virtual core scheduling strategy; the virtual machines are configured in a user mode environment, each virtual machine comprises at least one virtual core, and each virtual core is bound with one physical core; configuring virtual core task configuration data of a target virtual core through a hardware register; the virtual core task configuration data comprises a global interrupt enabling mask state; determining a target task to be processed scheduled by each target virtual core according to a multi-task multi-core real-time scheduling strategy; and executing the target task to be processed through the target virtual core according to the virtual core task configuration data. The technical scheme of the embodiment of the invention can realize the dispatching processing of the multiple tasks in the user state environment, thereby improving the utilization rate of the physical core resources of the multi-core processor and the real-time performance of the task dispatching processing.

Description

Task scheduling method, electronic device and storage medium

Technical Field

The embodiment of the invention relates to the technical field of computers, in particular to a task scheduling method and device, electronic equipment and a storage medium.

Background

The multi-core technology is that a processor chip contains a plurality of execution cores, which can also be called physical cores, so that the processor chip can thoroughly and completely execute a plurality of tasks of a program in a concurrent manner. From the perspective of an operating system, a multi-core processor is just like a plurality of processors, and each physical core of the multi-core processor is regarded as a single typical processor with all relevant resources, and processing tasks can be scheduled independently.

When a multi-core processor is required to schedule and process multiple tasks, the tasks can be specified to run on any one physical core, and can also be bound to run on a specified physical core. Since the task can be run on any one physical core, in order to ensure the mutual exclusivity of the multi-task to access the global resource under the multi-core environment, the index number of the physical core needs to be acquired to access the global resource under the condition that the current physical core is prohibited from global interruption. Because the switch of the physical core global interrupt can only be accessed in the core state, the user state cannot be directly accessed, and in order to ensure the performance of the system, the current multi-core processor executes the multi-task multi-core real-time scheduling algorithm under the core state environment.

In the process of implementing the invention, the inventor finds that the prior art has the following defects: the multi-core processor is used for scheduling and executing the multi-tasks in the core state environment, in the task scheduling and executing process, the user state needs to be switched to the core state environment, physical core resources need to be consumed in the switching operation, and certain time delay can be generated, so that the utilization rate of the physical core resources of the multi-core processor and the real-time performance of task scheduling processing can be reduced.

Disclosure of Invention

Embodiments of the present invention provide a task scheduling method and apparatus, an electronic device, and a storage medium, which can implement scheduling processing of multiple tasks in a user-mode environment, thereby improving the utilization rate of physical core resources of a multi-core processor and the real-time performance of task scheduling processing.

In a first aspect, an embodiment of the present invention provides a task scheduling method, including:

determining target virtual cores to be scheduled of each physical core from multiple virtual cores in a multi-virtual machine according to a preset virtual core scheduling strategy; the virtual machines are configured in a user mode environment, each virtual machine comprises at least one virtual core, and each virtual core is correspondingly bound with one physical core;

configuring virtual core task configuration data of the target virtual core through a hardware register; wherein the virtual core task configuration data comprises a global interrupt enable mask state;

determining a target task to be processed scheduled by each target virtual core according to a multi-task multi-core real-time scheduling strategy;

and executing the target task to be processed according to the virtual core task configuration data through the target virtual core.

In a second aspect, an embodiment of the present invention further provides a task scheduling apparatus, including:

the target virtual core determining module is used for determining a target virtual core to be scheduled of each physical core from multiple virtual cores in the multi-virtual machine according to a preset virtual core scheduling strategy; the virtual machines are configured in a user mode environment, each virtual machine comprises at least one virtual core, and each virtual core is correspondingly bound with one physical core;

the virtual core task configuration data configuration module is used for configuring the virtual core task configuration data of the target virtual core through a hardware register; wherein the virtual core task configuration data comprises a global interrupt enable mask state;

the target to-be-processed task determining module is used for determining a target to-be-processed task scheduled by each target virtual core according to a multi-task multi-core real-time scheduling strategy;

and the target task to be processed execution module is used for executing the target task to be processed through the target virtual core according to the virtual core task configuration data.

In a third aspect, an embodiment of the present invention further provides an electronic device, where the electronic device includes:

one or more processors;

storage means for storing one or more programs;

when the one or more programs are executed by the one or more processors, the one or more processors implement the task scheduling method provided by any embodiment of the invention.

In a fourth aspect, an embodiment of the present invention further provides a computer storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the task scheduling method provided in any embodiment of the present invention.

The embodiment of the invention determines the target virtual core to be scheduled of each physical core from the multiple virtual cores in the multiple virtual machines configured in the user state environment according to the preset virtual core scheduling strategy, configuring virtual core task configuration data such as global interrupt enabling mask state of a target virtual core through a hardware register, and determines the target tasks to be processed scheduled by each target virtual core according to the multi-task multi-core real-time scheduling strategy, by executing the target tasks to be processed according to the configured virtual core task configuration data through each target virtual core, the multi-core processor can be prevented from scheduling and executing the multi-tasks in the core state environment, the problems of low physical core resource utilization rate and low real-time performance of task scheduling processing and the like caused by the multi-core processor scheduling and executing the multi-tasks in the core state environment are solved, the multi-tasks are scheduled and processed in the user state environment, therefore, the utilization rate of physical core resources of the multi-core processor and the real-time performance of task scheduling processing are improved.

Drawings

Fig. 1 is a flowchart of a task scheduling method according to an embodiment of the present invention;

fig. 2 is a schematic diagram illustrating an effect of a binding relationship between a virtual machine and a physical core according to an embodiment of the present invention;

fig. 3 is a flowchart of a task scheduling method according to a second embodiment of the present invention;

fig. 4 is a schematic flowchart of scheduling and executing tasks based on a multi-virtual machine multi-core real-time scheduling algorithm in a multi-core system according to a second embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a time schedule in which a physical core may operate according to a second embodiment of the present invention;

FIG. 6 is a schematic structural diagram of a time schedule in which multiple physical cores may operate according to a second embodiment of the present invention;

FIG. 7 is a diagram illustrating an effect of a priority management bitmap according to a second embodiment of the present invention;

fig. 8 is a schematic diagram illustrating the effect of a private task queue and a global task queue according to a second embodiment of the present invention;

fig. 9 is a schematic diagram of a task scheduling apparatus according to a third embodiment of the present invention;

fig. 10 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention.

It should be further noted that, for the convenience of description, only some but not all of the relevant aspects of the present invention are shown in the drawings. Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the operations (or steps) as a sequential process, many of the operations can be performed in parallel, concurrently or simultaneously. In addition, the order of the operations may be re-arranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, and the like.

The terms "first" and "second," and the like in the description and claims of embodiments of the invention and in the drawings, are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not set forth for a listed step or element but may include steps or elements not listed.

Example one

Fig. 1 is a flowchart of a task scheduling method provided in an embodiment of the present invention, where this embodiment is applicable to a case where a multi-core processor schedules and executes multiple tasks in a user-mode environment, and the method may be executed by a task scheduling apparatus, where the apparatus may be implemented by software and/or hardware, and may be generally integrated in an electronic device, where the electronic device may be a terminal device or a server device, and the embodiment of the present invention does not limit a specific device type of the electronic device. Accordingly, as shown in fig. 1, the method comprises the following operations:

s110, determining target virtual cores to be scheduled of each physical core from multiple virtual cores in a multiple virtual machine according to a preset virtual core scheduling strategy; the virtual machines are configured in a user mode environment, each virtual machine comprises at least one virtual core, and each virtual core is correspondingly bound with one physical core.

The virtual machine is an abstraction of a relatively independent space, time and device resource, forming an entity as close as possible to the real independent computer resource, and is configured in a user-mode environment (an execution mode of the processor). The virtual machines are isolated from each other through the microkernel, so that space, time, interrupt resources and the like are isolated. A virtual machine may run on multiple physical cores of the same processor at the same time. The virtual core refers to a system-level virtualization technology, and the core of the system-level virtualization is to construct a virtual machine, then create a virtual core on the virtual machine, and place an operating system which directly runs on an actual hardware platform in the virtual machine for running. The virtual core is abstracted into a running unit and has the properties of state, priority, scheduling strategy, running context and the like. A plurality of virtual cores can be operated on a single physical machine through the virtual machines, and the virtual cores have better isolation and expansibility when operated among applications of each virtual machine. The preset virtual core scheduling policy may be a policy for determining a virtual core scheduled by a physical core from virtual cores in a virtual machine, and may be any available virtual machine scheduling policy, such as a scheduling policy based on priority or a scheduling policy based on a schedule, as long as the scheduling of a target virtual core can be completed, and the embodiment of the present invention does not limit the specific policy content of the preset virtual core scheduling policy. The target virtual core is also the virtual core that the physical core needs to be scheduled.

First, the technical solution of the present embodiment is mainly applicable to such an application scenario: the virtual machine multi-core supports that a virtual machine can run on a plurality of physical cores through virtual core technology. Fig. 2 is a schematic diagram illustrating an effect of a binding relationship between a virtual machine and a physical core according to an embodiment of the present invention. In a specific example, as shown in fig. 2, when a virtual machine (referred to as VM, VM1 represents virtual machine 1) is bound to run on n physical cores, the virtual machine includes n virtual cores, and one virtual core can only be bound to run on one physical core, for example, a master virtual core runs on CPU (Central Processing Unit/Processor) 0, a slave virtual core 1 runs on CPU2, and the like. The n virtual cores of the virtual machine comprise a main virtual core and n-1 auxiliary virtual cores, so that the multi-core in the virtual machine is supported. All virtual machines include at least one primary virtual core. The main virtual core is bound to run on a physical core with a minimum index number of a running set of the physical cores of the virtual machine, namely the main physical core of the virtual machine; the slave virtual core is bound to run on other physical cores in turn, namely the slave physical core of the virtual machine. When the virtual machine is started, the main virtual core is always started first, and the auxiliary virtual core is started by the application program in the virtual machine.

The method for configuring the physical core set of the virtual machine operation in the virtual machine attribute, namely the physical core affinity attribute, includes the following two conditions: (1) the virtual machine is bound to run on a physical core; (2) virtual machine bindings run on multiple physical cores.

When a virtual machine is configured to run on multiple physical cores in an affinity manner, and an operating system microkernel is initialized, 1 master virtual core and (the number of physical cores running in an affinity manner is reduced by 1) slave virtual cores need to be created for the virtual machine. The slave virtual core and the master virtual core may use the same virtual machine name, virtual machine ID, address space, scheduling type, scheduling priority, and time slice. The slave virtual core and the master virtual core participate in virtual machine scheduling, and the slave virtual core and the master virtual core have independent physical core index numbers, virtual core index numbers, system stacks and virtual core states in binding operation. The index number of the physical core is the index number of the physical core bound and operated by the virtual core. The virtual core index number is an index number of a virtual core in the virtual core group, the virtual core index number of the master virtual core can be 0, and the virtual core index number of the slave virtual core is 1, 2, 3, and the number of physical cores run by the virtual machine in an affinity manner is reduced by 1.

For a multi-core operating environment in a virtual machine, each virtual core is a processor core, the processor core is a virtual core of the virtual machine, and an index number of the processor core in the virtual machine is a virtual core index number. The entry code of all virtual cores in the same virtual machine is the same, and whether the current virtual core is a master virtual core or a slave virtual core is distinguished at the entry code according to the index number of the virtual core. This provides multi-core support for a multi-core operating environment within the virtual machine. The first running virtual core is a master core for a multi-core operating system in the partition, and the slave virtual core is a slave core. And if the virtual core is the master virtual core, finishing the initialization of the related functions of the multi-core operating environment in the virtual machine and starting the slave virtual core.

In the embodiment of the invention, the physical core in the core state (kernel state) can schedule and execute tasks in a multi-virtual machine multi-core real-time scheduling mode, and the virtual core of the virtual machine runs in the user state, so that the multi-task scheduling and execution can be realized in the user state environment, the multi-task scheduling and execution by the multi-core processor in the core state environment can be avoided, and the switching flow from the user state to the core state is reduced. Specifically, when the physical cores schedule tasks by using the multi-virtual machine multi-core real-time scheduling method, a target virtual core that each physical core can schedule may be determined from the multiple virtual cores in the multi-virtual machine according to a preset virtual core scheduling policy, so that the tasks that need to be scheduled and processed are executed in a user-state environment through the target virtual core. It is understood that a virtual core can only be scheduled by one physical core.

S120, configuring virtual core task configuration data of the target virtual core through a hardware register; wherein the virtual core task configuration data includes a global interrupt enable mask state.

The virtual core task configuration data may be configured for the target virtual core through a hardware register, and is used to support the target virtual core to schedule the relevant data of the processing task in the user-mode environment. The value of the global interrupt enable mask state, that is, the global interrupt enable mask, may be an enable state or a disable state.

In order to solve the problem that the switch of the physical core global interrupt can only be accessed in the core mode and the user mode cannot be directly accessed, the embodiment of the invention introduces the switch of the hardware register which is matched with the user mode to access the global interrupt. That is, the virtual core task configuration data of the target virtual core may be configured through the hardware register, specifically, the global interrupt enable mask state of the target virtual core may be configured, so that when the target virtual core processes a task, the global interrupt switch may be accessed through the global interrupt enable mask state configured by the hardware register in the user state environment, that is, the hardware register is directly used to disable and enable the global interrupt in the user state environment of the virtual machine, thereby implementing the multi-core processor to execute the multi-task multi-core real-time scheduling policy in the user state environment.

In the embodiment of the present invention, not all hardware registers can be used, and optionally, the selected hardware registers need to satisfy the following requirements: (1) the toolchain does not use this hardware register with assembly code that translates C language under current systems. (2) Hardware registers that are not used in current system-under-assembly languages.

And S130, determining the target to-be-processed task scheduled by each target virtual core according to the multi-task multi-core real-time scheduling strategy.

The multi-task multi-core real-time scheduling policy is also a policy for scheduling and processing a plurality of tasks through a plurality of virtual cores. The target pending task may be a task that the target virtual core may currently schedule for processing. The tasks may be various types of tasks that the processor can process, and the embodiment of the present invention does not limit the types of tasks that the processor schedules to process.

Correspondingly, after the target virtual core which can be scheduled by each physical core is determined, the target to-be-processed task which can be scheduled and processed by each target virtual core can be further determined according to the multi-task multi-core real-time scheduling strategy. It is understood that a target virtual core may currently process a target pending task.

The multi-task multi-core real-time scheduling policy may be any available task scheduling policy, and the task scheduling policy may use different policies to achieve corresponding scheduling targets, for example, scheduling policies such as, but not limited to, time slice scheduling, non-preemptive priority scheduling, and preemptive priority scheduling algorithm, etc.

And S140, executing the target task to be processed through the target virtual core according to the virtual core task configuration data.

Correspondingly, when it is determined that each target virtual core can schedule a processed target task to be processed, each target virtual core can execute the matched target task to be processed according to virtual core task configuration data such as a global interrupt enable mask state configured by a hardware register, and the like, and finally, a multi-core and multi-task processing flow under a user state environment is realized.

Example two

Fig. 3 is a flowchart of a task scheduling method according to a second embodiment of the present invention, which is embodied based on the second embodiment, and in this embodiment, multiple specific optional implementation manners for determining a target virtual core to be scheduled for each physical core from multiple virtual cores in a multi-virtual machine according to a preset virtual core scheduling policy and determining a target task to be processed for each target virtual core to be scheduled according to a multi-task multi-core real-time scheduling policy are provided. Accordingly, as shown in fig. 3, the method of the present embodiment may include:

s210, determining target virtual cores to be scheduled of each physical core from multiple virtual cores in the multiple virtual machines according to a preset virtual core scheduling strategy.

Fig. 4 is a schematic flowchart of scheduling and executing tasks by a multi-core system based on a multi-virtual machine multi-core real-time scheduling algorithm according to a second embodiment of the present invention. In a specific example, as shown in fig. 4, each virtual machine may configure a binding relationship corresponding to a physical core, so as to automatically obtain the binding relationship between the virtual core and the physical core according to the binding relationship between the virtual machine and the physical core. The number of virtual machines is at least one, and the number of virtual cores in the virtual machines can also be at least one. Wherein virtual core 1 represents a master virtual core and virtual cores 2 through n represent slave virtual cores. When creating tasks, the multi-core system needs to configure the virtual core on which it runs for each task, for example, task 1 runs on virtual core 1, task 2 runs on virtual core 3, and so on.

Optionally, the preset virtual core scheduling policy may include a schedule scheduling policy, and the schedule scheduling policy may be applicable to a case where a plurality of virtual machines are configured.

The schedule scheduling policy is also a policy for determining a target virtual core to be scheduled by each physical core according to a time schedule configured by the virtual cores. The schedule scheduling strategy can set a plurality of timers, wherein the duration of a first timer is the main frame time, a second timer is started successively according to the front and back sequence of a plurality of time windows in the main frame time, and the duration of the second timer is successively the same as the duration of each time window; and starting a first timer and a second timer by taking the main frame time as a period, scheduling a control program according to the setting of a time schedule, scheduling a next control program once the timing of the second timer is reached, and starting the next period once the timing of the first timer is reached, wherein the time schedule comprises the starting and stopping time of a plurality of time windows and the control program corresponding to each time window.

Correspondingly, determining a target virtual core to be scheduled of each physical core from multiple virtual cores in the multiple virtual machines according to a preset virtual core scheduling policy may include: determining a time schedule configured in advance by each physical core; determining preset virtual cores matched with the physical cores in the current time window in each time scheduling table; and determining the preset virtual core matched with the current time window as a target virtual core to be scheduled of each physical core.

The time schedule may be a list of virtual cores scheduled by each physical core in a respective time window. The preset virtual core may be a virtual core configured to be set for each time window in the time schedule.

In the embodiment of the invention, if a target virtual core to be scheduled of each physical core needs to be determined from multiple virtual cores in a multiple virtual machine by using a schedule scheduling strategy, a time schedule needs to be configured in advance for each physical core. One physical core may configure multiple time schedules, and if the physical core configures multiple time schedules to be started, the system starts only the last configured time schedule to be started, and at most one time schedule on each physical core participates in the scheduling at any time. The configuration attributes of the time schedule may include, but are not limited to, the name of the time schedule, the maximum allowed time scheduling window number of the time schedule, the primary frame time, and whether to auto-start. Time windows are required to be configured in the time schedule, one time window corresponds to the running time of one virtual core, and the attributes of the time window can include, but are not limited to, the virtual core running in the current time window, the starting time of the time window and the length of the time window.

Fig. 5 is a schematic structural diagram of a time schedule in which a physical core may operate according to a second embodiment of the present invention. In a specific example, as shown in fig. 5, a plurality of time windows may be configured in one time schedule, but the total time window cannot be greater than the maximum number of windows in the time schedule, and the time lengths of all the time windows cannot be greater than the primary frame time length. The time scheduling table of the virtual core is scheduled according to the configured time scheduling table, the time scheduling table is configured according to the time of the main frame, the same main frame is repeatedly executed during scheduling, and one virtual core can have a plurality of time windows in the main frame. Only one virtual core of the same virtual machine can be configured in one time scheduling table. The virtual machines configured in the uniform time window in the time scheduling table are the same, but the scheduled virtual cores are different.

Fig. 6 is a schematic structural diagram of a time schedule in which multiple physical cores may operate according to a second embodiment of the present invention. In a specific example, as shown in FIG. 6, assume that there are two physical cores, namely, physical core 0 (master physical core) and physical core 1 (slave physical core), wherein the time schedule of physical core 0 is shown in the sub-graph labeled (1) in FIG. 6, and the time schedule of physical core 1 is shown in the sub-graph labeled (2) in FIG. 6. The two physical cores need to match current window time according to respective running time scheduling tables to determine preset virtual cores matched with the physical cores in the current time windows, and determine the preset virtual cores matched with the current time windows as target virtual cores to be scheduled of the physical cores. For example, as shown in fig. 6, assuming that the current time window is the first time window in the time schedule, physical core 0 may schedule virtual core 0 of virtual machine 1 as the target virtual core in the current time window, and physical core 1 may schedule virtual core 1 of virtual machine 1 as the target virtual core in the current time window.

Optionally, the preset virtual core scheduling policy may further include a priority scheduling policy, and the priority scheduling policy may be applicable to a case where a single virtual machine is configured.

The schedule scheduling policy is also a policy for determining a target virtual core to be scheduled for each physical core according to the priority configured by the virtual cores.

Correspondingly, determining a target virtual core to be scheduled of each physical core from multiple virtual cores in the multiple virtual machines according to a preset virtual core scheduling policy may include: acquiring a priority management bitmap; determining the main index number with the highest priority according to the priority main index number bitmap; determining a secondary index number of the highest priority according to the priority secondary index number bitmap and the primary index number of the highest priority; and determining a target virtual core to be scheduled of each physical core according to the primary index number with the highest priority and the secondary index number with the highest priority.

Wherein the priority management bitmap includes a priority primary index number bitmap and a priority secondary index number bitmap.

The priority primary index number bitmap and the priority secondary index number bitmap can be index number bitmaps in two different forms, the priority primary index number bitmap can be used for determining the bitmap line number to be processed by the priority secondary index number bitmap, and the priority secondary index number bitmap can be used for determining the target virtual core to be scheduled of each physical core.

In the embodiment of the present invention, when a priority scheduling policy is used to determine a target virtual core to be scheduled for each physical core from multiple virtual cores in a multiple virtual machine, a corresponding priority may be configured for each virtual core. The target virtual core to be scheduled for each physical core determined based on the priority scheduling policy may be the virtual core with the highest priority to be scheduled for each physical core. Optionally, the priority range may be 0-255, with 0 being the highest and 255 being the lowest. The priority scheduling of the virtual core may use 256 ready chain tables to manage the ready virtual cores performing the priority scheduling, each priority virtual core may be configured with one ready chain table correspondingly, when the virtual core configures the task to be processed, the task to be processed may be added to the ready chain table of the virtual core, and the virtual core may be referred to as a ready virtual core. Meanwhile, whether ready virtual cores exist on each ready linked list can be recorded in an 8x32 bitmap mode, so that the ready virtual cores with the highest priority of priority scheduling cannot be increased due to the increase of the number of the virtual cores when the ready virtual cores are selected, and the virtual cores with the same priority in the priority queue can be rotated in a time slice mode.

Fig. 7 is a schematic diagram illustrating an effect of a priority management bitmap according to a second embodiment of the present invention, as shown in fig. 7, a priority primary index number bitmap in the priority management bitmap may be a one-dimensional 8-bit index map, a priority secondary index number bitmap may be a 256-bit index map, and the priority primary index number bitmap and the priority secondary index number bitmap may be collectively referred to as an 8 × 32 priority management bitmap. In the 8 × 32 priority management bitmap, the priority can be represented in an 8-bit binary manner, a value 0-7 of the right-shifted 5 bits of the priority is used as a priority primary index number, a value 0-31 of the low-significant 5 bits of the priority is used as a priority secondary index number, an 8 bitmap is used as a priority primary index number bitmap, 8 groups of 32 bitmaps are used as secondary index number bitmaps corresponding to 8 primary index numbers of the priority, the priority secondary index number bitmap is a 32 bitmap corresponding to the first primary index number group, and the index number of the corresponding bit in the bitmap is the primary index number or the secondary index number of the priority.

Accordingly, when the virtual core scheduled based on the priority becomes the ready state, the position bit 1 corresponding to the priority primary index number may be added to the priority primary index number bitmap, the position bit 1 corresponding to the priority secondary index number may be added to the priority ready linked list corresponding to the priority secondary index number bitmap, and the ready virtual core may be added to the priority ready linked list corresponding to the priority secondary index number. And when the ready virtual core scheduled based on the priority level becomes a non-ready state, deleting the non-ready virtual core from the ready linked list of the corresponding priority level. And if the non-ready virtual core does not have a virtual core on the ready linked list corresponding to the priority, clearing the bit corresponding to the priority index number in the priority index number bitmap. If each bit value in the priority secondary index number bitmap is 0, clearing the bit corresponding to the priority primary index number in the priority primary index number bitmap.

Specifically, when the highest priority ready virtual core of the priority scheduling virtual core is obtained, the highest priority primary index number may be determined according to the priority primary index number bitmap. If each bit value in the priority master index number bitmap is 0, all the virtual cores scheduled by the priority abandon the scheduling. Otherwise, the lowest bit index number with the bit value of 1 is obtained in the priority primary index number bitmap and is used as the primary index number with the highest priority, the row position of the ready virtual core currently existing in the highest priority secondary index number bitmap is further determined according to the primary index number with the highest priority, and the bit position with the median value of 1 in the highest priority secondary index number bitmap is determined according to the row position of the ready virtual core currently existing in the highest priority secondary index number bitmap. Optionally, the lowest-order index number with a bit value of 1 may be obtained in the highest-priority-order index number bitmap as the highest-priority-order index number. When the target virtual core to be scheduled of each physical core is determined according to the primary index number of the highest priority and the secondary index number of the highest priority, the value obtained by shifting the primary index number of the highest priority by 5 bits to the left is added to the secondary index number of the highest priority to obtain the highest priority, and the first virtual core on the ready chain table of the highest priority virtual core is further obtained to be the highest priority ready virtual core participating in priority scheduling, namely the target virtual core to be scheduled of the physical core.

In a specific example, as shown in fig. 7, the 1 st bit value in the priority primary index bitmap is 1, indicating that the primary index of the highest priority is 1, which represents that there is a bit with a value of 1 in the 1 st row of the priority secondary index bitmap. Further, the lowest order index number with the bit value of 1 is obtained in the 1 st row of the priority order index number bitmap and is used as the highest priority order index number, and the lowest order index number is converted into a decimal place which is the ready virtual core with the 42 th priority, so that the ready virtual core with the priority of 42 can be determined as the target virtual core.

In the embodiment of the invention, the ready virtual cores of the priority scheduling are managed by adopting the 8x32 priority management bitmap, and the highest-priority ready virtual core can be selected quickly and reliably. The priority management bitmap is only specific to the virtual core adopting the priority scheduling strategy, and the virtual core adopting the time scheduling table scheduling does not cause the operation on the priority management bitmap when the virtual core is ready. When the virtual core adopting the priority scheduling strategy is ready, the corresponding priority position 1 in the priority bitmap is subjected to priority management, and when the virtual core is waiting, hanging or sleeping, if no other ready virtual core exists on the corresponding priority queue, the corresponding priority position 0 in the priority bitmap is subjected to priority management.

In this embodiment of the present invention, optionally, the preset virtual core scheduling policy may further include a schedule scheduling policy and a priority scheduling policy at the same time, and correspondingly, the determining, according to the preset virtual core scheduling policy, a target virtual core to be scheduled for each physical core from multiple virtual cores in the multiple virtual machines may include: determining a first alternative virtual core to be scheduled of each physical core from multiple virtual cores in a multi-virtual machine according to the schedule scheduling strategy; determining second alternative virtual cores to be scheduled of each physical core from multiple virtual cores in the multi-virtual machine according to the priority scheduling strategy; and determining a target virtual core to be scheduled of each physical core according to the priority of the first alternative virtual core and the core priority of the second alternative virtual core.

The first candidate virtual core may be a virtual core to be scheduled by each physical core determined from multiple virtual cores in the multiple virtual machines according to a schedule scheduling policy. The second alternative virtual core may be a virtual core to be scheduled for each physical core determined from multiple virtual cores in the multiple virtual machines according to the priority scheduling policy.

In the embodiment of the present invention, when the preset virtual core scheduling policy includes both the schedule scheduling policy and the priority scheduling policy, a first alternative virtual core to be scheduled for each physical core may be determined from multiple virtual cores in the multi-virtual machine according to the schedule scheduling policy, and a second alternative virtual core to be scheduled for each physical core may be determined from multiple virtual cores in the multi-virtual machine according to the priority scheduling policy. After the first candidate virtual core and the second candidate virtual core are determined, the priority of the first candidate virtual core and the priority of the second candidate virtual core may be respectively determined, and the candidate virtual core with the highest priority may be determined as the target virtual core. For example, assuming that the priority of the first candidate virtual core determined by the physical core 0 is 12, and the priority of the second candidate virtual core determined by the physical core 0 is 42, the first candidate virtual core is determined as the target virtual core of the physical core 0. Optionally, if the priorities of the first candidate virtual core and the second candidate virtual core are equal, the first candidate virtual core may be preferentially determined as the target virtual core.

And S220, configuring the virtual core task configuration data of the target virtual core through a hardware register.

The virtual core task configuration data can also comprise a virtual core index number; configuring virtual core task configuration data of the target virtual core through a hardware register; the method can comprise the following steps: under the condition that the physical core is determined to be switched from a first target virtual core to a second target virtual core, storing a current virtual core index number and a current global interrupt enabling mask state of the first target virtual core in context configuration information of the first target virtual core through the hardware register; and under the condition that the physical core is determined to be switched to the first target virtual core again, acquiring a current virtual core index number and a current global interrupt enable mask state of the first target virtual core through the hardware register according to the context configuration information of the first target virtual core.

The first target virtual core and the second target virtual core may be target virtual cores scheduled by the physical core in different time windows. The current global interrupt enable mask state, that is, the value of the current global interrupt enable mask, may be an enable state or a disable state.

In the embodiment of the present invention, when the virtual core task configuration data of the target virtual core is configured through the hardware register, the current virtual core index number of the target virtual core in the virtual machine may be specifically obtained through the hardware register. When a target virtual core is started in a core state, a hardware register is initialized to store the current virtual core index number and the current global interrupt enable mask state of the target virtual core, and the index number of each virtual core in a virtual machine is unique. When the physical core switches the target virtual core, the cut-off context configuration information of the target virtual core needs to store the current virtual core index number and the global interrupt enable mask state stored in the hardware register, and the cut-in target virtual core needs to restore the current virtual core index number and the global interrupt enable mask state in the cut-in context configuration information of the target virtual core to the hardware register, so that the index number and the global interrupt enable mask state of each target virtual core are independent.

Specifically, if the physical core is switched from the first target virtual core to the second target virtual core, the current virtual core index number and the current global interrupt enable mask state of the first target virtual core, which are stored in the hardware register, may be stored in the context configuration information of the first target virtual core. If the physical core is switched to the first target virtual core again, the current virtual core index number and the current global interrupt enable mask state of the first target virtual core can be obtained according to the context configuration information of the first target virtual core, and the first target virtual core is continuously scheduled.

For example, it is assumed that virtual machine 1 runs on physical core 1, physical core 2, and physical core 3 in a bound manner, that is, virtual machine 1 includes virtual core 1 (including physical core 1), virtual core 2 (including physical core 2), and virtual core 3 (including physical core 3). Virtual machine 2 runs bound to physical core 2, physical core 3, and physical core 4. That is, virtual machine 2 includes virtual core 1 (including physical core 2), virtual core 2 (including physical core 3), and virtual core 3 (including physical core 4). While physical core 2 is running, virtual core 2 of virtual machine 1 and virtual core 1 of virtual machine 2 may be scheduled. When the physical core 2 schedules the virtual core 2 (i.e. the first target virtual core) of the virtual machine 1, the current virtual core index number of the first target virtual core stored by the hardware register is 2, and the current global interrupt enable mask state is a state in which global interrupt is prohibited. When the physical core 2 is switched to the virtual core 1 (i.e., the second target virtual core) of the virtual machine 2, the current virtual core index number 2 stored in the hardware register and the state of prohibiting the global interrupt need to be stored in the context configuration information of the virtual core 2 of the virtual machine 1. At this time, the current virtual core index number stored in the hardware register is updated to 1, and is updated to the current global interrupt enable mask state of the virtual core 1 of the virtual machine 2. When the physical core 2 is switched back to the virtual core 2 of the virtual machine 1 again, the hardware register obtains that the current virtual core index number is 2 from the context configuration information of the virtual core 2 of the virtual machine 1, and determines that the current global interrupt enable mask state of the virtual core 2 of the virtual machine 1 is the global interrupt forbidding.

Correspondingly, when the current target virtual core has an interrupt pending and returns to the user mode from the core mode, if the global interrupt enable mask state stored in the hardware register of the current target virtual core is the global interrupt forbidden state, the interrupt on the current target virtual core is not delivered to the current target virtual core, otherwise, the interrupt on the current target virtual core is delivered to the current target virtual core. By the mechanism, the global interrupt enable mask state stored in the hardware register can control whether the target virtual core processes the interrupt, so that the mutual exclusion access of global resources in a multi-task multi-core real-time scheduling algorithm of the user-state virtual machine of the multi-core architecture is ensured.

And S230, determining the private task queue of the target virtual core and the global task queue of each virtual core.

The private task queue can be used for storing the private tasks to be processed by each virtual core in a message queue manner. The global task queue may be used to store global tasks that all virtual cores wait to process in a message queue.

In the embodiment of the invention, when the multi-core system creates the task, the task can be configured to be specified to run on any one CPU, and the task can also be bound to run on a specified CPU. Under the default condition of the system, all CPUs are unreserved, and the reserved CPUs only can run tasks bound to the CPUs and cannot run the tasks which are not bound to the CPUs. The user may invoke an interface in the code to dynamically change the CPU that needs to be reserved, the main CPU cannot be reserved. Therefore, each physical core can correspondingly generate a private task queue, and all the tasks to be processed in the private task queue are the tasks which are specified to run by the physical core. Meanwhile, all the physical cores may also correspondingly generate a global task queue, and all the tasks to be processed in the global task queue may be tasks that can be run on any physical core. Because each virtual core should be bound with one physical core, each virtual core also has a corresponding matched private task queue, and all virtual cores have a corresponding global task queue.

S240, determining the target to-be-processed task scheduled by each target virtual core according to the private task queue and the global task queue.

The target to-be-processed task may be a task that is determined by the target virtual core according to the private task queue and the global task queue and currently needs to be scheduled and processed.

Specifically, when determining the target to-be-processed task scheduled by each target virtual core, the private task queue of each target virtual core and the global task queue of each virtual core may be determined, and the target to-be-processed task scheduled by each target virtual core is further determined according to the private task queue and the global task queue of each target virtual core based on the queues.

In an optional embodiment of the present invention, the determining, according to the private task queue and the global task queue, the target to-be-processed task scheduled by each target virtual core may include: acquiring a target-priority to-be-processed private task from the private task queue according to the priority of the to-be-processed private task; acquiring a target priority to-be-processed global task from the global task queue according to the priority of the to-be-processed global task; comparing the priority of the target priority to-be-processed private task with the priority of the target priority to-be-processed global task; and screening the target to-be-processed task from the target priority to-be-processed private task and the target priority to-be-processed global task according to the priority comparison result of the private task priority and the target priority to-be-processed global task.

The to-be-processed private tasks may be respective private tasks to be processed in the private task queue. The target priority pending private task may be a private task that the target virtual core may currently process, as determined from the private task queue. The target priority pending global task may be a global task currently available for processing by the target virtual core determined according to the global task queue.

It will be appreciated that there is a scheduling priority between different tasks. Illustratively, task 1 has a priority of 1 and task 2 has a priority of 3, and task 1 has a priority higher than task 2, indicating that task 1 needs to be processed preferentially. Therefore, the to-be-processed private task with the highest priority can be obtained from the private task queue as the target-priority to-be-processed private task according to the priority of the to-be-processed private task, and the to-be-processed global task with the highest priority can be obtained from the global task queue as the target-priority to-be-processed global task according to the priority of the to-be-processed global task. After the target-priority to-be-processed private task and the target-priority to-be-processed global task are screened out from the task queue, the priority of the target-priority to-be-processed private task and the priority of the target-priority to-be-processed global task can be further compared, and the task with the highest priority is screened out and determined as the final target to-be-processed task.

Fig. 8 is a schematic diagram illustrating effects of a private task queue and a global task queue according to a second embodiment of the present invention. In a specific example, as shown in fig. 8, a target virtual core is specifically illustrated as virtual core 0: when determining the target to-be-processed task of the virtual core 0, a to-be-processed private task with the highest priority may be obtained from the private task queue 1 as the target priority to-be-processed private task, and a to-be-processed global task with the highest priority may be obtained from the global task queue as the target priority to-be-processed global task. And if the priority of the target priority to-be-processed private task is higher than that of the target priority to-be-processed global task, taking the target priority to-be-processed private task as a target to-be-processed task. If the priority of the target priority to-be-processed private task is the same as the priority of the target priority to-be-processed global task, round-robin scheduling may be performed on a time slice basis.

And S250, executing the target task to be processed through the target virtual core according to the virtual core task configuration data.

In an optional embodiment of the present invention, executing, by the target virtual core, the target task to be processed according to the virtual core task configuration data may include: determining a global interrupt prohibition trigger event of the target virtual core in the process of executing the target task to be processed through the target virtual core; under the condition that each target virtual core is determined to trigger the global interrupt prohibiting trigger event, prohibiting global interrupt for the target virtual core triggering the global interrupt prohibiting trigger event; wherein the global interrupt disable event comprises at least one of a first launch virtual core event and an access global resource event.

Wherein the global interrupt disable triggering event may be an event that can disable the virtual core global interrupt.

It will be appreciated that if the virtual core is enabled by a global interrupt, i.e. the global interrupt is on, the virtual core only needs to check whether there is an interrupt per instruction executed by the virtual core. The presence of an interrupt requires the execution of the interrupt, which has the highest priority. In order to ensure atomicity of accessing virtual core resources, if a global interrupt prohibition trigger event is triggered in the process of scheduling and executing a task by a target virtual core, such as starting a virtual core event for the first time or accessing a global resource event, the target virtual core triggering the global interrupt prohibition trigger event needs to be prohibited from global interrupt, so as to avoid virtual core resource access errors.

Specifically, when the scheduling target virtual core is started in the core mode for the first time, the global interrupt enable mask stored in the hardware register may be initialized to be the current target virtual core for which global interrupts are prohibited. Wherein the global interrupt enable mask is used to determine a state of the global interrupt. Illustratively, when the global interrupt enable mask takes a value of 0, the global interrupt is identified to be closed; and when the value of the global interrupt enable mask is 1, identifying the global interrupt enable. Correspondingly, when the target virtual core enters task scheduling after being started for the first time, the global interrupt enabling mask stored in the hardware register can be set as the current target virtual core enables global interrupt. In the process of scheduling the task, if the target virtual core needs to access the global resources, the global interrupt enable mask stored in the hardware register can be set again to be that the current target virtual core is prohibited from global virtual interrupt, and if the accessed global resources are private to each virtual core, the global interrupt enable is prohibited, and meanwhile, the current virtual core index number stored in the hardware register needs to be acquired, so that the state before switching can be kept when the target virtual core is switched, and resource access errors are avoided. After the access of the global resources is completed, the global interrupt enable mask of the current target virtual core stored by the hardware register needs to be restored in time to enable the global interrupt. The utilization rate and the real-time performance of the user-state multitask on the physical core resources can be greatly improved by directly forbidding and enabling the global interruption of the current target virtual core and acquiring the index number of the current virtual core through the hardware register.

According to the technical scheme, the target virtual cores to be scheduled of the physical cores are determined from the multiple virtual cores in the multi-virtual machine according to different preset virtual core scheduling strategies in the user-state virtual machine environment, the target tasks to be processed scheduled by the target virtual cores are determined according to the private task queues and the global task queues of the target virtual cores, and the target tasks to be processed are executed through the target virtual cores, so that the multi-task and multi-core real-time scheduling based on the user state can be realized, and the resource utilization rate and the real-time performance of the multi-task physical cores can be better coordinated.

It should be noted that any permutation and combination between the technical features in the above embodiments also belong to the scope of the present invention.

EXAMPLE III

Fig. 9 is a schematic diagram of a task scheduling apparatus according to a third embodiment of the present invention, and as shown in fig. 9, the apparatus includes: a target virtual core determining module 310, a virtual core task configuration data configuring module 320, a target to-be-processed task determining module 330, and a target to-be-processed task executing module 340, wherein:

a target virtual core determining module 310, configured to determine a target virtual core to be scheduled for each physical core from multiple virtual cores in the multiple virtual machines according to a preset virtual core scheduling policy; the virtual machines are configured in a user mode environment, each virtual machine comprises at least one virtual core, and each virtual core is correspondingly bound with one physical core;

a virtual core task configuration data configuration module 320, configured to configure the virtual core task configuration data of the target virtual core through a hardware register; wherein the virtual core task configuration data comprises a global interrupt enable mask state;

a target to-be-processed task determining module 330, configured to determine, according to a multi-task multi-core real-time scheduling policy, a target to-be-processed task scheduled by each target virtual core;

and a target to-be-processed task executing module 340, configured to execute, by the target virtual core, the target to-be-processed task according to the virtual core task configuration data.

Optionally, the virtual core task configuration data further includes a virtual core index number; the virtual core task configuration data configuration module 320 is specifically configured to: under the condition that the physical core is determined to be switched from a first target virtual core to a second target virtual core, storing a current virtual core index number and a current global interrupt enabling mask state of the first target virtual core in context configuration information of the first target virtual core through the hardware register; and under the condition that the physical core is determined to be switched to the first target virtual core again, acquiring a current virtual core index number and a current global interrupt enable mask state of the first target virtual core through the hardware register according to the context configuration information of the first target virtual core.

Optionally, the target to-be-processed task execution module 340 is specifically configured to: determining a global interrupt prohibition trigger event of the target virtual core in the process of executing the target task to be processed through the target virtual core; under the condition that each target virtual core is determined to trigger the global interrupt prohibiting trigger event, prohibiting global interrupt for the target virtual core triggering the global interrupt prohibiting trigger event; wherein the global interrupt disable event comprises at least one of a first launch virtual core event and an access global resource event.

Optionally, the preset virtual core scheduling policy includes a schedule scheduling policy; the target virtual core determining module 310 is specifically configured to: determining a time schedule configured in advance by each physical core; determining preset virtual cores matched with the physical cores in the current time window in each time scheduling table; and determining the preset virtual core matched with the current time window as a target virtual core to be scheduled of each physical core.

Optionally, the preset virtual core scheduling policy includes a priority scheduling policy; the target virtual core determining module 310 is specifically configured to: acquiring a priority management bitmap; the priority management bitmap comprises a priority main index number bitmap and a priority secondary index number bitmap; determining the main index number with the highest priority according to the priority main index number bitmap; determining a secondary index number of the highest priority according to the priority secondary index number bitmap and the primary index number of the highest priority; and determining a target virtual core to be scheduled of each physical core according to the primary index number with the highest priority and the secondary index number with the highest priority.

Optionally, the preset virtual core scheduling policy includes a schedule scheduling policy and a priority scheduling policy; the target virtual core determining module 310 is specifically configured to: determining a first alternative virtual core to be scheduled of each physical core from multiple virtual cores in a multi-virtual machine according to the schedule scheduling strategy; determining second alternative virtual cores to be scheduled of each physical core from multiple virtual cores in the multi-virtual machine according to the priority scheduling strategy; and determining a target virtual core to be scheduled of each physical core according to the priority of the first alternative virtual core and the core priority of the second alternative virtual core.

Optionally, the target to-be-processed task determining module 320 is specifically configured to: determining a private task queue of the target virtual core and a global task queue of each virtual core; and determining the target to-be-processed task scheduled by each target virtual core according to the private task queue and the global task queue.

Optionally, the target to-be-processed task determining module 320 is specifically configured to: acquiring a target-priority to-be-processed private task from the private task queue according to the priority of the to-be-processed private task; acquiring a target priority to-be-processed global task from the global task queue according to the priority of the to-be-processed global task; comparing the priority of the target priority to-be-processed private task with the priority of the target priority to-be-processed global task; and screening the target to-be-processed task from the target priority to-be-processed private task and the target priority to-be-processed global task according to the priority comparison result of the private task priority and the target priority to-be-processed global task.

The task scheduling device can execute the task scheduling method provided by any embodiment of the invention, and has corresponding functional modules and beneficial effects of the execution method. For details of the task scheduling method provided in any embodiment of the present invention, reference may be made to the technical details not described in detail in this embodiment.

Since the task scheduling device described above is a device capable of executing the task scheduling method in the embodiment of the present invention, based on the task scheduling method described in the embodiment of the present invention, those skilled in the art can understand the specific implementation manner of the task scheduling device in the embodiment and various variations thereof, and therefore, how the task scheduling device implements the task scheduling method in the embodiment of the present invention is not described in detail herein. The scope of the present application is intended to be covered by the claims as long as those skilled in the art implement the apparatus used in the task scheduling method in the embodiments of the present invention.

Example four

Fig. 10 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present invention. FIG. 10 illustrates a block diagram of an exemplary electronic device 12 suitable for use in implementing embodiments of the present invention. The electronic device 12 shown in fig. 10 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiment of the present invention.

As shown in FIG. 10, electronic device 12 is embodied in the form of a general purpose computing device. The components of electronic device 12 may include, but are not limited to: one or more processors 16, a memory 28, and a bus 18 that connects the various system components (including the memory 28 and the processors 16).

Bus 18 represents one or more of any of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, and a processor or local bus using any of a variety of bus architectures. By way of example, such architectures include, but are not limited to, an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MCA) bus, an enhanced ISA bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus.

Electronic device 12 typically includes a variety of computer system readable media. Such media may be any available media that is accessible by electronic device 12 and includes both volatile and nonvolatile media, removable and non-removable media.

Memory 28 may include computer system readable media in the form of volatile Memory, such as Random Access Memory (RAM) 30 and/or cache Memory 32. The electronic device 12 may further include other removable/non-removable, volatile/nonvolatile computer system storage media. By way of example only, storage system 34 may be used to read from and write to non-removable, nonvolatile magnetic media (not shown in FIG. 10, and commonly referred to as a "hard drive"). Although not shown in FIG. 10, a magnetic disk drive for reading from and writing to a removable, nonvolatile magnetic disk (e.g., a "floppy disk") and an optical disk drive for reading from or writing to a removable, nonvolatile optical disk (e.g., a Compact disk-Read Only Memory (CD-ROM), a Digital Video disk (DVD-ROM), or other optical media) may be provided. In these cases, each drive may be connected to bus 18 by one or more data media interfaces. Memory 28 may include at least one program product having a set (e.g., at least one) of program modules that are configured to carry out the functions of embodiments of the invention.

A program/utility 40 having a set (at least one) of program modules 42 may be stored, for example, in memory 28, such program modules 42 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each of which examples or some combination thereof may comprise an implementation of a network environment. Program modules 42 generally carry out the functions and/or methodologies of the described embodiments of the invention.

Electronic device 12 may also communicate with one or more external devices 14 (e.g., keyboard, pointing device, display 24, etc.), with one or more devices that enable a user to interact with electronic device 12, and/or with any devices (e.g., network card, modem, etc.) that enable electronic device 12 to communicate with one or more other computing devices. Such communication may be through an Input/Output (I/O) interface 22. Also, the electronic device 12 may communicate with one or more networks (e.g., a Local Area Network (LAN), Wide Area Network (WAN), and/or a public Network such as the internet) via the Network adapter 20. As shown, the network adapter 20 communicates with other modules of the electronic device 12 via the bus 18. It should be appreciated that although not shown in FIG. 10, other hardware and/or software modules may be used in conjunction with electronic device 12, including but not limited to: microcode, device drivers, Redundant processing units, external disk drive Arrays, (Redundant Arrays of Independent Disks, RAID) systems, tape drives, and data backup storage systems, to name a few.

The processor 16 executes various functional applications and data processing by running the program stored in the memory 28, so as to implement the task scheduling method provided by the embodiment of the present invention: determining target virtual cores to be scheduled of each physical core from multiple virtual cores in a multi-virtual machine according to a preset virtual core scheduling strategy; the virtual machines are configured in a user mode environment, each virtual machine comprises at least one virtual core, and each virtual core is correspondingly bound with one physical core; configuring virtual core task configuration data of the target virtual core through a hardware register; wherein the virtual core task configuration data comprises a global interrupt enable mask state; determining a target task to be processed scheduled by each target virtual core according to a multi-task multi-core real-time scheduling strategy; and executing the target task to be processed according to the virtual core task configuration data through the target virtual core.

EXAMPLE five

An embodiment five of the present invention further provides a computer storage medium storing a computer program, where the computer program is used to execute the task scheduling method according to any one of the above embodiments of the present invention when executed by a computer processor: determining target virtual cores to be scheduled of each physical core from multiple virtual cores in a multi-virtual machine according to a preset virtual core scheduling strategy; the virtual machines are configured in a user mode environment, each virtual machine comprises at least one virtual core, and each virtual core is correspondingly bound with one physical core; configuring virtual core task configuration data of the target virtual core through a hardware register; wherein the virtual core task configuration data comprises a global interrupt enable mask state; determining a target task to be processed scheduled by each target virtual core according to a multi-task multi-core real-time scheduling strategy; and executing the target task to be processed according to the virtual core task configuration data through the target virtual core.

Computer storage media for embodiments of the invention may employ any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a Read Only Memory (ROM), an Erasable Programmable Read Only Memory (EPROM, or flash Memory), an optical fiber, a portable compact disc Read Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.

Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, Radio Frequency (RF), etc., or any suitable combination of the foregoing.

Computer program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A method for task scheduling, comprising:

2. The method of claim 1, wherein the virtual core task configuration data further comprises a virtual core index number;

configuring virtual core task configuration data of the target virtual core through a hardware register; the method comprises the following steps:

under the condition that the physical core is determined to be switched from a first target virtual core to a second target virtual core, storing a current virtual core index number and a current global interrupt enabling mask state of the first target virtual core in context configuration information of the first target virtual core through the hardware register;

and under the condition that the physical core is determined to be switched to the first target virtual core again, acquiring a current virtual core index number and a current global interrupt enable mask state of the first target virtual core through the hardware register according to the context configuration information of the first target virtual core.

3. The method of claim 1, wherein the executing, by the target virtual core, the target task to be processed according to the virtual core task configuration data comprises:

determining a global interrupt prohibition trigger event of the target virtual core in the process of executing the target task to be processed through the target virtual core;

under the condition that each target virtual core is determined to trigger the global interrupt prohibiting trigger event, prohibiting global interrupt for the target virtual core triggering the global interrupt prohibiting trigger event;

wherein the global interrupt disable event comprises at least one of a first launch virtual core event and an access global resource event.

4. The method of claim 1, wherein the predetermined virtual core scheduling policy comprises a schedule scheduling policy;

the method for determining the target virtual core to be scheduled of each physical core from the multiple virtual cores in the multiple virtual machines according to the preset virtual core scheduling strategy comprises the following steps:

determining a time schedule configured in advance by each physical core;

determining preset virtual cores matched with the physical cores in the current time window in each time scheduling table;

and determining the preset virtual core matched with the current time window as a target virtual core to be scheduled of each physical core.

5. The method of claim 1, wherein the predetermined virtual core scheduling policy comprises a priority scheduling policy;

acquiring a priority management bitmap; the priority management bitmap comprises a priority main index number bitmap and a priority secondary index number bitmap;

determining the main index number with the highest priority according to the priority main index number bitmap;

determining a secondary index number of the highest priority according to the priority secondary index number bitmap and the primary index number of the highest priority;

and determining a target virtual core to be scheduled of each physical core according to the primary index number with the highest priority and the secondary index number with the highest priority.

6. The method of claim 1, wherein the predetermined virtual core scheduling policy comprises a schedule scheduling policy and a priority scheduling policy;

determining a first alternative virtual core to be scheduled of each physical core from multiple virtual cores in a multi-virtual machine according to the schedule scheduling strategy;

determining second alternative virtual cores to be scheduled of each physical core from multiple virtual cores in the multi-virtual machine according to the priority scheduling strategy;

and determining a target virtual core to be scheduled of each physical core according to the priority of the first alternative virtual core and the core priority of the second alternative virtual core.

7. The method of claim 1, wherein the determining the target to-be-processed task scheduled by each target virtual core according to the multi-task multi-core real-time scheduling policy comprises:

determining a private task queue of the target virtual core and a global task queue of each virtual core;

and determining the target to-be-processed task scheduled by each target virtual core according to the private task queue and the global task queue.

8. The method of claim 7, wherein determining the target pending task scheduled by each of the target virtual cores according to the private task queue and the global task queue comprises:

acquiring a target-priority to-be-processed private task from the private task queue according to the priority of the to-be-processed private task;

acquiring a target priority to-be-processed global task from the global task queue according to the priority of the to-be-processed global task;

comparing the priority of the target priority to-be-processed private task with the priority of the target priority to-be-processed global task;

and screening the target to-be-processed task from the target priority to-be-processed private task and the target priority to-be-processed global task according to the priority comparison result of the private task priority and the target priority to-be-processed global task.

9. An electronic device, characterized in that the electronic device comprises:

one or more processors;

storage means for storing one or more computer programs;

the task scheduling method according to any of claims 1-8, when executed by the one or more computer programs, such that the one or more processors execute the computer programs.

10. A computer storage medium on which a computer program is stored, which computer program, when being executed by a processor, carries out the method for task scheduling according to any one of claims 1 to 8.