CN110658751B - Implementation method of EtherCAT field bus control system - Google Patents

Implementation method of EtherCAT field bus control system Download PDF

Info

Publication number
CN110658751B
CN110658751B CN201910870007.1A CN201910870007A CN110658751B CN 110658751 B CN110658751 B CN 110658751B CN 201910870007 A CN201910870007 A CN 201910870007A CN 110658751 B CN110658751 B CN 110658751B
Authority
CN
China
Prior art keywords
ethercat
data
dpc
driver
ndis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910870007.1A
Other languages
Chinese (zh)
Other versions
CN110658751A (en
Inventor
叶伯生
饶阿龙
陶婕妤
张文彬
谢鹏
谭朝
帅思远
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huazhong University of Science and Technology
Original Assignee
Huazhong University of Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huazhong University of Science and Technology filed Critical Huazhong University of Science and Technology
Priority to CN201910870007.1A priority Critical patent/CN110658751B/en
Publication of CN110658751A publication Critical patent/CN110658751A/en
Application granted granted Critical
Publication of CN110658751B publication Critical patent/CN110658751B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0421Multiprocessor system
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/22Pc multi processor system
    • G05B2219/2231Master slave

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Communication Control (AREA)

Abstract

The invention belongs to the technical field of industrial automation control, and discloses an implementation method of an EtherCAT field bus control system, which comprises the following steps: (1) modifying a programmable redirection table of the I/O APIC to redirect each external interrupt received by the I/O APIC to a CPU1, taking the CPU0 as a real-time CPU core (2), taking a SOEM EtherCAT open source master station as an EtherCAT master station protocol stack, and compiling the SOEM EtherCAT open source protocol stack into a kernel driving module; (3) adopting NDIS protocol drive to send and receive data of SOEM EtherCAT open source protocol stack; (4) and a DPC timer is adopted to provide timing interruption to realize communication between the EtherCAT master station and the slave station. The invention reduces the cost and the development period, has strong applicability and is beneficial to popularization and application.

Description

Implementation method of EtherCAT field bus control system
Technical Field
The invention belongs to the technical field related to industrial automation control, and particularly relates to an implementation method of an EtherCAT field bus control system.
Background
To maintain market competitiveness, many enterprises are gradually adopting advanced industrial automation technologies to maximize productivity, economic scale, and product quality. The emergence of real-time industrial Ethernet creates new power for the development of the automation industry. EtherCAT is a novel real-time industrial Ethernet field bus, has incomparable advantages of the traditional field bus in the aspects of instantaneity, reliability, certainty and the like, is assisted by the characteristics of flexible topology, easy realization and the like, and is widely applied to the field of industrial automation. Motion control is an important technology in the field of automation, and EtherCAT not only can provide high-speed real-time data communication for the motion control, but also can obviously reduce production and operation costs. The real-time performance is one of important technical indexes of the motion control system, the real-time performance of the motion control system is improved, and the communication delay in the industrial Ethernet data transmission process is effectively reduced, so that the precision in the control process is improved.
Real-time applications in the field of industrial automation have always been a field requiring expensive dedicated hardware. The existing EtherCAT master station control system is almost completely built based on a Linux system, a hardware platform is mostly an ARM or ARM + FPGA framework, the scheme relates to design and development of the hardware platform, system transplantation of the Linux system and development or transplantation of drive, the whole workload is complex and large, the Linux system is mostly operated by a command line, and the learning cost and time of operation workers on the control system are increased. Accordingly, there is a need in the art to develop a method for implementing a low-cost EtherCAT fieldbus control system.
Disclosure of Invention
Aiming at the defects or improvement requirements in the prior art, the invention provides an implementation method of an EtherCAT field bus control system, which is researched and designed based on the characteristics of the existing real-time industrial Ethernet field bus control system. The implementation method is based on a Windows system, the development of EtherCAT master station of the Windows platform can centralize the development of software required by industrial control, such as control software, an operation interface and the like, to the Windows platform, abundant development tools and good graphic operation experience provided by the Windows system are fully exerted, and the complex operation of cross-platform development and cross-compilation is saved; the development process is simplified, the development tools are enriched, the development period is shortened, meanwhile, the Windows system can also provide a good operation interface for industrial field operators, the labor intensity of workers is reduced, the operation and learning cost is reduced, and the method has a profound significance for the development of the field of industrial automation.
In order to achieve the above object, the present invention provides an implementation method of an EtherCAT fieldbus control system, including the following steps:
(1) the method comprises the steps of optimizing and expanding the real-time performance of the Windows system by adopting a DPC timer, wherein each external interrupt received by an I/O APIC is redirected to a CPU1 by modifying a programmable redirection table of the I/O APIC, and the CPU0 is used as a real-time CPU core; simultaneously, a DPC timer is adopted to load and run a real-time task;
(2) the SOEM EtherCAT open source master station is used as an EtherCAT master station protocol stack, and the SOEM EtherCAT open source protocol stack is compiled into a kernel driver module according to a Windows system kernel framework;
(3) the NDIS protocol driver is used for sending and receiving data of an SOEM EtherCAT open source protocol stack, the NDIS protocol driver directly sends the received data out through the miniport driver from the upper part, and directly sends the data received from the miniport driver to the upper layer driver from the lower part;
(4) periodic process data communication between the EtherCAT master station and the slave station is achieved by adopting a DPC timer to provide timing interruption.
Further, in step (1), a DPC object is created and maintained by using the DPC, the DPC object is bound with a DPC timer routine, the real-time task is executed in the DPC timer routine, and the DPC timer routine is inserted into the DPC queue of the real-time CPU core when the timing of the DPC timer is finished, and requests an interrupt of a DISPATCH _ LEVEL.
Further, an ExSetTimerResolution routine is employed to determine the resolution, wherein the set system clock resolution will take effect if and only if the set system clock resolution is less than the current system clock resolution; if the system clock resolution set by the kernel driver is greater than the current system clock resolution, maintaining the current system clock resolution without modification; and if the system clock resolution set by the kernel driver is less than the minimum resolution which can be supported by the system clock, adopting the minimum resolution which can be supported by the system.
Further, the clock resolution is set to 100ns using the exsettimerrresolution routine.
Further, the timer object KTIMER is used inside the DPC timer, when the timer is set to a time interval, the operating system inserts a DPC routine into the DPC queue every other time interval, and when the operating system reads the DPC queue, the corresponding DPC routine is executed.
Further, in the step (2), all functions using the user mode library in the SOEM EtherCAT open source protocol stack are realized by using the bottom kernel function, and if the function does not have the corresponding kernel function, the function consistent with the original function is written.
Further, the four interfaces ecx _ setup, ecx _ closed, ecx _ outframe and ecx _ recvpkt abstracted by the hardware abstraction layer of the SOEM master station are replaced by ec _ create _ ndispat, ec _ close _ ndispat, ec _ writeack and ec _ readpacket, respectively; the ec _ create _ ndisprot is used for establishing a connection with the NDIS protocol driver so as to provide a basis for realizing a data transceiving function; the ec _ close _ ndisprot is used for disconnecting the connection with the NDIS protocol drive, so that the reconnection is convenient to carry out next time; the ec _ writepacket is used for simply packaging the received data and calling an NDIS protocol driver to send out the data; and the ec _ readpacket is used for reading a return data frame received by the network card.
Further, in the step (4), the protocol stack process data communication module creates a DPC object by calling a DPC timer operation interface in the real-time module, starts a timer, inserts a data sending task into a DPC queue of the real-time CPU core after the timing is finished, the real-time CPU core processes the sending task, and calls a bottom-layer NDIS protocol driver to send the data to the slave station through the network card; and triggering the execution of the receiving task after the sending task is responded, sending the receiving task to the NDIS protocol driver by the protocol stack, returning the data received by the network card to the protocol stack by the NDIS protocol driver, and analyzing and processing the data after the protocol stack receives the returned data.
Further, in the step (4), the state machine management and mailbox communication in the protocol stack transfers the data sending task to the bottom NDIS protocol driver by calling the data sending interface provided by the hardware abstraction layer and the time correlation interface provided by the operating system abstraction layer, and the bottom NDIS protocol driver sends the data from the network card to the slave station; the data frame is returned to the master station after being processed by the slave station, the protocol stack calls a receiving interface provided by a hardware abstraction layer and a timeout function provided by an operating system abstraction layer to send a request for receiving data to an NDIS protocol driver, the NDIS protocol driver returns the data received by the network card to an upper protocol stack, and the upper protocol stack completes analysis and processing of the received data, so that one-time aperiodic communication is completed.
Further, the IRP used in step (4) is constructed using IoAllocateIrp.
Generally speaking, compared with the prior art, the implementation method of the EtherCAT fieldbus control system provided by the invention mainly has the following beneficial effects:
1. the DPC timer is used for real-time expansion of the Windows system, the performance is good and stable, the implementation method is simple, and the real-time requirement under a simple scene can be met.
2. The EtherCAT master station is realized on a Windows system platform, and an excellent and powerful graphical user interface can be developed by using the advantages of a Windows system, so that the EtherCAT bus can be applied in the industrial field more simply and conveniently, and meanwhile, the operation and learning cost of technicians in the industrial control field on the EtherCAT bus can be reduced, and the labor intensity of the workers can be reduced.
3. By modifying the programmable redirection table of the I/O APIC, each external interrupt received by the I/O APIC is redirected to the CPU1, the response of the external interrupt is unified by the CPU1, and the CPU0 is used as a real-time CPU core and is only used for processing a real-time task, so that a real-time CPU core, namely the CPU0, which is used for processing the real-time task independently can be provided, the adverse effect of uncertain interrupt on the real-time performance of the real-time task on the real-time CPU core is avoided, the load of the CPU is reduced, and the delay of the real-time task is reduced.
4. Because the real-time CPU core can not receive the hardware interrupt, the task in the DPC queue at DISPATCH _ LEVEL LEVEL is the task of the highest IRQL which can be received by the real-time CPU core, so that the operating system can always preferentially execute the task in the DPC queue, and the real-time running of the real-time task is ensured.
5. The ExSetTimerresolution routine can improve the system clock resolution, further improve the timing precision of the DPC timer, and provide a stable and reliable timing period for periodic tasks in the industrial control process.
6.100ns is the minimum value that the ExSetTimerresolution routine can set, and the resolution that different platforms can support can only be greater than or equal to this value, so no matter what kind of platform the kernel driver runs on, always can guarantee DPC timer use this platform highest precision resolution timing, like this, has shielded the influence of the platform to the timing precision, has strengthened the compatibility.
Drawings
Fig. 1 is a general schematic diagram related to an implementation method of an EtherCAT fieldbus control system provided by the invention;
FIG. 2 is a schematic diagram of Windows real-time optimization related to the implementation method of the EtherCAT field bus control system in FIG. 1;
fig. 3 is a schematic flow chart of loading and running real-time tasks by using a DPC timer, which is involved in the implementation method of the EtherCAT fieldbus control system in fig. 1;
fig. 4 is a schematic diagram of a KDPC structural body related to an implementation method of the EtherCAT fieldbus control system in fig. 1;
FIG. 5 is a schematic diagram of a SOME Master station architecture;
FIG. 6 is a schematic diagram of a modern general network transport architecture;
fig. 7 is a schematic flow chart of EtherCAT data transmission and reception related to the implementation method of the EtherCAT fieldbus control system in fig. 1;
fig. 8 is a schematic diagram of a call flow between drivers related to an implementation method of the EtherCAT fieldbus control system in fig. 1;
fig. 9 is a schematic diagram of an ec _ create _ ndisprot execution process involved in the implementation method of the EtherCAT fieldbus control system in fig. 1;
fig. 10 is a schematic diagram of an ec _ close _ ndisprot execution process involved in the implementation method of the EtherCAT fieldbus control system in fig. 1;
fig. 11 is a schematic diagram of an ec _ writepacket execution process involved in the implementation method of the EtherCAT fieldbus control system in fig. 1;
fig. 12 is a schematic diagram of an ec _ readpacket execution process involved in the implementation method of the EtherCAT fieldbus control system in fig. 1;
fig. 13 is a schematic flow chart of aperiodic communication of an EtherCAT master station related to the implementation method of the EtherCAT fieldbus control system in fig. 1;
fig. 14 is a schematic flow chart of periodic process data communication of an EtherCAT master station related to the implementation method of the EtherCAT fieldbus control system in fig. 1.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1 and fig. 2, the implementation method of the EtherCAT fieldbus control system provided by the present invention is developed by using microsoft official tools, meets the development specifications, shortens the development period, and has the advantages of superior and stable EtherCAT master station performance, simple installation and convenient use; therefore, the powerful GUI function of the Windows system can be fully exerted, and the operation and learning cost and the operation burden of industrial control workers are reduced.
The implementation method mainly comprises the following steps:
step one, a DPC timer is adopted to optimize and expand the real-time performance of the Windows system, wherein each external interrupt received by the I/O APIC is redirected to the CPU1 by modifying a programmable redirection table of the I/O APIC, and the CPU0 is used as a real-time CPU core; and simultaneously, a DPC timer is adopted to load and run a real-time task.
Specifically, referring to fig. 3 and 4, the computers of the X86 architecture are basically equipped with an advanced programmable interrupt controller APIC, which plays an important role in Windows interrupt handling. Wherein, APIC mainly comprises three parts: local APIC, I/O APIC and APIC bus, APIC bus is used to transmit interrupt information between Local APIC and I/O APIC; local APICs are inherent interrupt controllers on each CPU that are capable of receiving and processing Local interrupts, while also being capable of receiving and processing interrupt information from the APIC bus. In addition, the Local APIC can also send inter-processor core interrupts to enable communication between multiple CPUs. The I/O APIC is an essential component in a multi-CPU computer system and is mainly responsible for receiving an external interrupt signal, converting an interrupt request of a peripheral into interrupt request information and then sending the interrupt request information to a Local APIC of a target CPU for processing through an APIC bus.
The I/O APIC passes external interrupts to the CPU for execution through a programmable redirection table, each entry of which may be individually programmed, wherein the specified interrupt vector and interrupt priority, the target processor to handle the interrupt, and the manner in which the processor is selected (static or dynamic) may be programmed.
In this embodiment, the programmable redirection table of the I/O APIC is modified, so that each external interrupt received by the I/O APIC is redirected to the CPU1, and the response of the external interrupt is unified by the CPU1, and the CPU0 is used as a real-time CPU core and is only used for processing a real-time task, so that a real-time CPU core, namely the CPU0, which is used for processing the real-time task independently can be provided, thereby preventing the real-time CPU core from being adversely affected by uncertain interrupts on the real-time performance of the real-time task, reducing the load of the CPU, and reducing the delay of the real-time task.
The method adopts the DPC timer to load and run the real-time task, specifically, the DPC is used to create and maintain a DPC object, the DPC object is bound with a DPC timer routine, the real-time task is executed in the DPC timer routine, the DPC timer routine is inserted into the DPC queue of the real-time CPU core when the timing of the DPC timer is finished, and an interrupt of DISPATCH _ LEVEL LEVEL is requested. Because the real-time CPU core does not receive the hardware interrupt, the task in the DPC queue at the DISPATCH _ LEVEL will be the task of the highest LEVEL IRQL that the real-time CPU core can receive, so that the operating system can always preferentially execute the task in the DPC queue, and the real-time operation of the real-time task is ensured.
The initialization of the DPC object is important, initialization operation is carried out on a plurality of attributes of the DPC object in the initialization process, and the KDPC structural body is created and filled after the initialization of the DPC object is completed. Referring to fig. 4, the KDPC structure includes 9 structure members, where the Number member is used to specify which CPU DPC queue this DPC object is added to, the value is default to 0, that is, the default DPC object is to be inserted into the DPC queue of CPU0, and CPU0 is the real-time CPU core, that is, the DPC object is initialized in a default manner; in addition, the Importance member represents the Importance of the DPC object, which is defined in the KDPC _ innovative enumeration type, and the default value is mediam Importance ═ 1, and the real-time task execution order can be modified by modifying the value to change the order of the DPC object in the DPC queue. In addition, the DPC timer can realize timing at any time theoretically, and can be used for control tasks with periodic requirements in an industrial control process.
In addition, in the embodiment, an exsettimerrresolution routine (that is, an exsettimerrresolution function) is adopted to improve the system clock resolution, so that the timing accuracy of the DPC timer is improved, and a stable and reliable timing period is provided for a periodic task in an industrial control process, specifically: if and only if the set system clock resolution is less than the current system clock resolution, the set system clock resolution will take effect; if the system clock resolution set by the kernel driver is greater than the current system clock resolution, maintaining the current system clock resolution without modification; and if the system clock resolution set by the kernel driver is less than the minimum resolution which can be supported by the system clock, adopting the minimum resolution which can be supported by the system.
The clock resolution is set to be 100ns by using an ExSetTimerResolution routine (the function is timed by taking 100ns as a unit), and because the value is the minimum value which can be set by the ExSetTimerResolution routine, the resolution which can be supported by different platforms can only be larger than or equal to the value, no matter which platform the kernel driver runs on, the DPC timer can be ensured to be timed by using the highest-precision resolution of the platform, so that the influence of the platform on the timing precision is shielded, and the compatibility is enhanced.
The DPC timer can time at any interval, a timer object KTIMER is used in the DPC timer, after the timer is set to a time interval, the operating system inserts a DPC routine into the DPC queue every other time interval, and when the operating system reads the DPC queue, the corresponding DPC routine is executed. The DPC task runs at DISPATCH _ LEVEL of Windows system, which is the interrupt of highest LEVEL of soft interrupt, if the real-time task to be executed is put into the service program of DPC object, the real-time performance of task can be improved, timing accuracy of ms LEVEL precision can be realized, and abundant kernel function in DDK document provided by Microsoft can be used for development, so that good realizability and stability are achieved.
And step two, using the SOEM EtherCAT open source master station as an EtherCAT master station protocol stack, and compiling the SOEM EtherCAT open source protocol stack into a kernel drive module according to a Windows system kernel framework.
Specifically, referring to fig. 5, the SOEM EtherCAT open source master is used as the EtherCAT master protocol stack. The SOME master station is an open source EtherCAT master station protocol stack, has perfect functions, and not only provides support for COE, SOE and FOE of EtherCAT mainstream application layer protocols, but also supports a distributed clock; in addition, the method has excellent compatibility, and supports operating systems such as Windows, Linux, RTK, INtime and the like, so that the method can be very conveniently transplanted to different platforms. In the embodiment, the SOEM 1.3.1 version is adopted to carry out the overall function development and design of the EtherCAT master station, and the basic functions of the SOME master station are shown in Table 1.
Table 1SOEM master station module and function
Figure BDA0002202505570000091
Figure BDA0002202505570000101
The SOEM mainly comprises an application program, a protocol stack body, an abstract layer and the like, wherein the abstract layer is divided into an operating system abstract layer and a hardware abstract layer; the application program is application software developed by utilizing an interface provided by the protocol stack main body and is responsible for executing an actual control task; the protocol stack main body provides function realization of an EtherCAT protocol; the operating system abstraction layer and the hardware abstraction layer are the core of the SOEM protocol stack supporting a plurality of operating systems and hardware platforms, abstract the concrete operating system and hardware platform, provide a uniform interface for the protocol stack, shield the influence of different operating systems and hardware platforms on the protocol stack, and enable the SOEM to be theoretically transplanted to any operating system and hardware platform.
The master station of the SOEM 1.3.1 version supports a Windows system by default, the master station is a user mode master station, a real-time thread is started by using a timeSetEvent () function in a Windows user mode for transmitting periodic process data, and the accuracy and the stability of a communication cycle in the EtherCAT communication process cannot be ensured by the mode, so that the master station cannot work stably and normally for a long time.
In order to enable the master station to have higher execution efficiency and complete the development of the periodic communication function of the master station by using a Windows real-time optimization module, a method for transplanting the SOEM master station into a kernel module is designed. Compiling the SOEM EtherCAT open source protocol stack into a kernel driver module according to a Windows system kernel framework, which specifically comprises the following steps: all functions using a user mode library in the SOEM EtherCAT open source protocol stack (namely, the functions can only be used in the user mode and are transplanted to a kernel mode to cause that compiling is not passed or function is abnormal) are realized by using a bottom kernel function, if the functions do not have corresponding kernel functions, the functions consistent with the functions of the original functions need to be written by the functions; for example: the SOEM EtherCAT open source protocol stack bottom layer data is sent and received by using a Winpcap tool, the Winpcap tool is a library formed by multiple components (wpcap.dll, packet.dll and bottom layer NPF drivers), after the SOEM EtherCAT open source protocol stack is transplanted to a kernel state, library functions related to Winpcap cannot be used, a protocol stack data sending and receiving module needs to be independently developed, and the NDIS protocol driver is used for carrying out data sending and receiving work of the SOEM EtherCAT open source protocol stack.
And step three, adopting an NDIS protocol driver to send and receive data of the SOEM EtherCAT open source protocol stack, wherein the NDIS protocol driver directly sends the received data out through the small port driver from the upper part and directly sends the data received from the small port driver to the upper layer driver from the lower part.
Specifically, referring to fig. 6, fig. 7, fig. 8, fig. 9, fig. 10, fig. 11 and fig. 12, in the modern general network transmission architecture, the NDIS network driver module is a ring starting from the top, which provides services for implementing the network API interface, and converts data into bit signals for transmission on the transmission medium for the lower management hardware. The NDIS network driving module mainly comprises three parts: the NDIS miniport driver is a network card driver, directly operates the network card and provides an interface for receiving and sending data packets for the protocol layer; the NDIS protocol driver can complete sending and receiving Ethernet packets by binding the small port driver; the middle layer driver is a layer of driver embedded between the protocol driver and the small port driver, and shows the function of the small port driver on the upper part and the function of the protocol driver on the lower part, and the main function of the middle layer driver is data filtering.
The most direct method for completing data transceiving is to operate and modify the small port drive, the small port drive is close to physical hardware, and the fastest speed and the highest efficiency can be achieved by directly carrying out data transceiving through the small port drive. However, the network card driver under the Windows platform is generally not open source, and it is time-consuming and labor-consuming if it is developed autonomously, and in addition, if a specific network card driver is used for data transceiving, the EtherCAT master station will depend on a specific network card, which is not favorable for the transplantation, popularization and wide industrial application of the master station. In order to avoid the above problems, in the present embodiment, a protocol driver is used to implement transmission and reception of EtherCAT data on a network, and the protocol driver can be used to implement both data transmission and reception with high efficiency and give consideration to the universality of the entire system.
The embodiment adopts the protocol driver provided by the Windows driver development kit for development, the protocol driver does not carry out any encapsulation and any processing, the upper part directly sends out the received data through the small port driver, and the lower part directly sends the data received from the small port driver to the upper layer driver, and the processing mode can realize high-efficiency data transmission.
As shown in table 2, the SOEM master station Windows version hardware abstraction layer abstracts four interfaces ecx _ setup, ecx _ closed, ecx _ outframe and ecx _ revpkt, respectively provides functions of connecting and starting a network card, closing the network card, sending data through the network card and receiving data through the network card, and the concrete implementation of the interfaces is implemented by function functions pcap _ open, pcap _ close, pcap _ sendpack and pcap _ next _ ex provided by winpcap software, respectively.
TABLE 2 hardware abstraction layer Primary function comparison and rewriting
Figure BDA0002202505570000121
The SOME master station is transplanted to the kernel mode to become a kernel module, and the NDIS protocol driver is a kernel module, so that the communication between the two modules needs to use an inter-driver calling technology, and the inter-driver calling technology adopted by the embodiment is shown in fig. 8.
The method comprises the steps that an ec _ create _ NDISPROT function is in contact with an NDIS protocol driver, and provides a basis for realizing a data transceiving function, an IoGetDeviceObjectPointer is used for obtaining a device pointer of the NDIS protocol driver, an IO control code is created through an IoBuildDeviceIoControlRequest to be an IRP (I/O Request Packet) Request Packet of an IOCTL _ NDISPROT _ BIND _ WAIT, the IRP is filled, the IRP is sent to the NDIS protocol driver to be executed through an IoCallDriver, the main function of the IRP is to finish the binding of the protocol driver and a network card, once the binding is successful, data received by the network card is sent to the driver, and the driver can also send the data through the network card driver; after binding is completed, an IRP request packet with an IO control code of IOCTL _ NDISPROT _ OPEN _ DEVICE is created again, the IRP is filled in the same way, then the IRP is sent to an NDIS protocol driver for execution by using an IoCalldriver, and the main function of the IRP is to OPEN a network card DEVICE and prepare pad preparation for sending and receiving data.
The function of ec _ close _ ndisprot is the opposite of the function of ec _ create _ ndisprot, which is used to disconnect the link with NDIS protocol driver to facilitate the next reconnection, and ec _ close _ ndisprot mainly uses objectreferenceobject to delete the object obtained by IoGetDeviceObjectPointer, after which it will perform some clear-up-reset work to prepare for the next reconnection with NDIS protocol driver.
The ec _ writesett has the function of simply encapsulating received data and calling the NDIS protocol driver to send the data out, firstly encapsulating the incoming data, then creating an IRP of IRP _ MJ _ WRITE by using IoAllocatieIrp, and finally sending the IRP to the NDIS protocol driver by using IoCalldriver to finish data sending.
The ec _ readpacket has the function of reading a return data frame received by a network card, an IRP of IRP _ MJ _ READ is created by using IoBuildSynchronousFsdRequest, the IRP is sent to an NDIS protocol driver by using IoCallDriver to READ data, the obtained data is simply processed to meet the format and size of an EtherCAT return frame, and then the data is copied to a specified cache region for calling function analysis processing.
Through the replacement of the related function of the hardware abstraction layer, the sending and receiving of the bottom layer data of the main station can be realized, and the original place of the hardware abstraction layer where the winpcap interface is used in advance needs to be completely rewritten into the interface function designed by the embodiment, so that the function of the part can be completed.
In another embodiment, NDISPROT protocol driver is developed by using NDIS network driver framework provided by Microsoft official, and the NDISPROT.sys driver is generated by compiling the following files \ src \ network \ NDIS \ ndisj NDISPROT \5x under the Microsoft WDK installation directory; the SOEM EtherCAT protocol stack calls functions of creating NDIS equipment, opening the NDIS equipment, sending data, receiving data, closing the NDIS equipment and the like in ndisprot.sys drive by using an inter-drive calling technology, and data sending and receiving between the SOEM EtherCAT protocol stack and the NDIS protocol drive are completed. The specific calling process is as follows:
obtaining a device pointer of a bottom layer device ndisprot by using a kernel function IoGetDeviceObjectPointer;
and secondly, manually creating an IRP, and creating the IRP by using an IoAllocatieIrp kernel function, wherein parameters of an input buffer area, an output buffer area, a synchronous event and the like of the IRP are not in a parameter list of the IoAllocatieIrp function, so that the parameters need to be manually configured.
Constructing IO stacks of IRPs;
invoking an IoCallDriver kernel function, and invoking a dispatch function of the bottom-layer equipment object ndisprot inside the IoCallDriver kernel function.
Step four, a DPC timer is adopted to provide timing interruption to realize the periodic process data communication between the EtherCAT master station and the slave station,
specifically, referring to fig. 13 and 14, the aperiodic communication of the SOEM master station mainly completes the scanning and configuration of the slave station, so that the slave station enters a state capable of performing actual motion control, which mainly includes the switching and maintenance of the slave station state machine and the COE mailbox communication.
The aperiodic communication mode of the EtherCAT master station adopted by the embodiment is as follows: a non-periodic communication module such as state machine management and mailbox communication in a protocol stack transfers a data sending task to a bottom NDIS protocol driver by calling a data sending interface provided by a hardware abstraction layer and a time correlation interface provided by an operating system abstraction layer, and the bottom NDIS protocol driver sends data to a slave station from a network card; the data frame is processed by the slave station and then returned to the master station, the protocol stack calls a receiving interface provided by a hardware abstraction layer and a 'timeout' function provided by an operating system abstraction layer to send a request for receiving data to an NDIS protocol driver, the driver returns the data received by the network card to an upper protocol stack, and the protocol stack completes analysis and processing of the received data, so that one-time aperiodic communication is completed.
The periodic process data communication is different from the aperiodic communication, and in the periodic communication process, high requirements are put on the accuracy and stability of the real-time performance and the period of a system, and the periodic process data communication adopted by the embodiment mainly comprises the following steps: the protocol stack process data communication module creates a DPC object by calling a DPC timer operation interface in the real-time module, starts a timer, inserts a data sending task into a DPC queue of a real-time CPU core after the timing is finished, processes the sending task by the real-time CPU core, and calls a bottom-layer NDIS protocol driver to send the data to a slave station through a network card; after the sending task is responded, the execution of the receiving task is triggered, the protocol stack sends the receiving task to the NDIS protocol driver, the protocol driver returns the data received by the network card to the protocol stack, and the protocol stack receives the returned data and analyzes and processes the data.
Since the DPC queue runs at the DISPATCH _ LEVEL priority, it is not possible to construct IRP using iobuildschronousfsdrequest when sending IRP to NDIS protocol driver, because the iobuildschronousfsdrequest kernel function does not support running at the DISPATCH _ LEVEL priority, and therefore this embodiment constructs IRP using IoAllocateIrp because the function is lower and supports running at higher priority. In addition, since the DISPATCH _ LEVEL priority does not support the execution of the delay operation, the receiving task cannot be directly inserted into the DPC queue, and the receiving task is placed in a callback function triggered after the sending function is executed.
In another embodiment, the periodic process data communication of the EtherCAT master station needs high real-time performance, namely the protocol stack needs to send EtherCAT data frames at every determined time, and the real-time control is realized by using a DPC timer. Specifically, the method comprises the following steps: the control program calls a protocol stack function to transmit the calculated control data to a protocol stack, the protocol stack encapsulates the data, and then calls a bottom NDIS protocol driver through a call technology between drivers to transmit the data to an EtherCAT bus through a network card; when the master station switches the slave station to the OP state, the master station performs periodic process data communication with the slave station, a DPC object is created at the moment, then a function needing to periodically send data is put into a DPC callback function, and then a DPC timer is started again in the callback function, so that the periodic execution of the sending function is realized, the EtherCAT master station periodically sends the data to the slave station, and a control task is completed.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (9)

1. An implementation method of an EtherCAT field bus control system is characterized by comprising the following steps:
(1) the method comprises the steps of optimizing and expanding the real-time performance of the Windows system by adopting a DPC timer, wherein each external interrupt received by an I/O APIC is redirected to a CPU1 by modifying a programmable redirection table of the I/O APIC, and the CPU0 is used as a real-time CPU core; simultaneously, a DPC timer is adopted to load and run a real-time task;
(2) the SOEM EtherCAT open source master station is used as an EtherCAT master station protocol stack, and the SOEM EtherCAT open source protocol stack is compiled into a kernel driver module according to a Windows system kernel framework;
(3) the NDIS protocol driver is used for sending and receiving data of an SOEM EtherCAT open source protocol stack, the NDIS protocol driver directly sends the received data out through the miniport driver from the upper part, and directly sends the data received from the miniport driver to the upper layer driver from the lower part;
(4) a DPC timer is adopted to provide timing interruption to realize the periodic process data communication between the EtherCAT master station and the slave station;
the method comprises the following steps of developing an NDISPROT protocol driver by using an NDIS network driver framework provided by Microsoft official, and compiling and generating an ndisPROT.sys driver by compiling the following files \ src \ network \ NDIS \ ndiswrite \5x under a Microsoft WDK installation directory; the SOEM EtherCAT protocol stack calls a function for creating the NDIS equipment, a function for opening the NDIS equipment, a function for sending data, a function for receiving data and a function for closing the NDIS equipment in ndisprot.sys drive by using an inter-drive calling technology so as to finish data sending and receiving between the SOEM EtherCAT protocol stack and the NDIS protocol drive;
in the step (2), all functions using the user mode library in the SOEM EtherCAT open source protocol stack are realized by using a bottom kernel function, and if the function does not have a kernel function corresponding to the function, a function consistent with the original function is written.
2. The implementation method of the EtherCAT fieldbus control system of claim 1, further comprising: in the step (1), a DPC object is created and maintained by using the DPC, the DPC object is bound with a DPC timer routine, real-time tasks are executed in the DPC timer routine, the DPC timer routine is inserted into a DPC queue of a real-time CPU core when the timing of the DPC timer is finished, and an interrupt of DISPATCH _ LEVEL LEVEL is requested.
3. The implementation method of the EtherCAT fieldbus control system of claim 1, further comprising: determining a resolution using an ExSetTimerResolution routine, wherein the set system clock resolution will take effect if and only if the set system clock resolution is less than the current system clock resolution; if the system clock resolution set by the kernel driver is greater than the current system clock resolution, maintaining the current system clock resolution without modification; and if the system clock resolution set by the kernel driver is less than the minimum resolution which can be supported by the system clock, adopting the minimum resolution which can be supported by the system.
4. The implementation method of the EtherCAT fieldbus control system of claim 1, further comprising: the clock resolution is set to 100ns using the exsettimerrresolution routine.
5. The implementation method of the EtherCAT fieldbus control system of claim 1, further comprising: the DPC timer internally uses a timer object KTIMER, when the timer is set to a time interval, the operating system inserts a DPC routine into the DPC queue every other time interval, and when the operating system reads the DPC queue, the corresponding DPC routine is executed.
6. The implementation method of the EtherCAT fieldbus control system of any of claims 1 to 5, further comprising: the four interfaces ecx _ setup, ecx _ closed, ecx _ outframe and ecx _ recvpkt abstracted by the hardware abstraction layer of the SOEM master station are replaced by ec _ create _ ndispat, ec _ close _ ndispat, ec _ writepacket and ec _ readpacket respectively; the ec _ create _ ndisprot is used for establishing a connection with the NDIS protocol driver so as to provide a basis for realizing a data transceiving function; the ec _ close _ ndisprot is used for disconnecting the connection with the NDIS protocol drive, so that the reconnection is convenient to carry out next time; the ec _ writepacket is used for simply packaging the received data and calling an NDIS protocol driver to send out the data; and the ec _ readpacket is used for reading a return data frame received by the network card.
7. The implementation method of the EtherCAT fieldbus control system of any of claims 1 to 5, further comprising: in the step (4), the protocol stack process data communication module creates a DPC object by calling a DPC timer operation interface in the real-time module, starts a timer, inserts a data sending task into a DPC queue of a real-time CPU core after the timing is finished, processes the sending task by the real-time CPU core, and calls a bottom-layer NDIS protocol driver to send the data to a slave station through a network card; and triggering the execution of the receiving task after the sending task is responded, sending the receiving task to the NDIS protocol driver by the protocol stack, returning the data received by the network card to the protocol stack by the NDIS protocol driver, and analyzing and processing the data after the protocol stack receives the returned data.
8. The implementation method of the EtherCAT fieldbus control system of any of claims 1 to 5, further comprising: in the step (4), state machine management and mailbox communication in a protocol stack transfer a data sending task to a bottom NDIS protocol driver by calling a data sending interface provided by a hardware abstraction layer and a time correlation interface provided by an operating system abstraction layer, and the bottom NDIS protocol driver sends data to a slave station from a network card; the data frame is returned to the master station after being processed by the slave station, the protocol stack calls a receiving interface provided by a hardware abstraction layer and a timeout function provided by an operating system abstraction layer to send a request for receiving data to an NDIS protocol driver, the NDIS protocol driver returns the data received by the network card to an upper protocol stack, and the upper protocol stack completes analysis and processing of the received data, so that one-time aperiodic communication is completed.
9. The implementation method of the EtherCAT fieldbus control system of any of claims 1 to 5, further comprising: the IRP used in the step (4) is constructed by IoAllocateIrp.
CN201910870007.1A 2019-09-16 2019-09-16 Implementation method of EtherCAT field bus control system Active CN110658751B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910870007.1A CN110658751B (en) 2019-09-16 2019-09-16 Implementation method of EtherCAT field bus control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910870007.1A CN110658751B (en) 2019-09-16 2019-09-16 Implementation method of EtherCAT field bus control system

Publications (2)

Publication Number Publication Date
CN110658751A CN110658751A (en) 2020-01-07
CN110658751B true CN110658751B (en) 2021-02-09

Family

ID=69037350

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910870007.1A Active CN110658751B (en) 2019-09-16 2019-09-16 Implementation method of EtherCAT field bus control system

Country Status (1)

Country Link
CN (1) CN110658751B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114268539B (en) * 2021-12-22 2023-09-12 中国长江三峡集团有限公司 Preprocessing method and system for automatically issuing and monitoring Powerlink master station configuration
CN114039810B (en) * 2022-01-10 2022-07-12 至新自动化(北京)有限公司 Flexible automatic control system based on Ethernet
CN114691178B (en) * 2022-05-31 2022-09-06 深圳市杰美康机电有限公司 Firmware upgrading method and device based on EtherCAT communication driver
CN115460024B (en) * 2022-09-02 2024-05-28 鹏城实验室 Network card drive optimization method, device, equipment and storage medium

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102709949A (en) * 2012-06-15 2012-10-03 中国电力科学研究院 Micro-grid coordinated control system
CN106506303A (en) * 2016-10-11 2017-03-15 西安电子科技大学 A kind of main station system of controller real-time ethernet EtherCAT
CN106802689A (en) * 2016-12-14 2017-06-06 西北工业大学 The implementation method of adjustable speed timer under Windows operating system environment
CN108924027A (en) * 2018-09-19 2018-11-30 武汉库迪智能技术有限公司 A kind of EtherCAT main station controller based on ARM kernel
CN110087037A (en) * 2019-04-30 2019-08-02 南京工程学院 A kind of the EtherCAT main website and working method of integrated camera
CN110620712A (en) * 2019-09-03 2019-12-27 武汉久同智能科技有限公司 Method for realizing real-time EtherCAT master station of Window platform

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130173868A1 (en) * 2011-12-29 2013-07-04 Texas Instruments Incorporated Generation of Activation List for Memory Translation and Memory Access Protection in Industrial Ethernet Standard
KR102225329B1 (en) * 2014-03-03 2021-03-09 삼성전자주식회사 EtherCAT CONTROL DEVICE AND FACTORY AUTOMATION SYSTEM HAVING THE SAME
CN104702474B (en) * 2015-03-11 2018-02-23 华中科技大学 A kind of EtherCAT master station devices based on FPGA
CN109947539A (en) * 2017-12-20 2019-06-28 广州中国科学院先进技术研究所 A kind of robot controller
CN108089539A (en) * 2017-12-22 2018-05-29 安徽杰智智能科技有限公司 A kind of intelligent controller suitable for multioperation platform

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102709949A (en) * 2012-06-15 2012-10-03 中国电力科学研究院 Micro-grid coordinated control system
CN106506303A (en) * 2016-10-11 2017-03-15 西安电子科技大学 A kind of main station system of controller real-time ethernet EtherCAT
CN106802689A (en) * 2016-12-14 2017-06-06 西北工业大学 The implementation method of adjustable speed timer under Windows operating system environment
CN108924027A (en) * 2018-09-19 2018-11-30 武汉库迪智能技术有限公司 A kind of EtherCAT main station controller based on ARM kernel
CN110087037A (en) * 2019-04-30 2019-08-02 南京工程学院 A kind of the EtherCAT main website and working method of integrated camera
CN110620712A (en) * 2019-09-03 2019-12-27 武汉久同智能科技有限公司 Method for realizing real-time EtherCAT master station of Window platform

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
《EtherCAT在实时系统下的实现》;吴丽菲;《中国优秀硕士学位论文全文数据库信息科技辑》;20150115;全文 *
《基于EtherCAT现场总线的集散控制系统设计》;宫凤明;《中国优秀硕士学位论文全文数据库信息科技辑》;20150715;全文 *
龚强.《 高速高精度多通道数控系统中基于FPGA的现场总线技术研究》.《中国优秀硕士学位论文全文数据库工程科技I辑》.2014, *

Also Published As

Publication number Publication date
CN110658751A (en) 2020-01-07

Similar Documents

Publication Publication Date Title
CN110658751B (en) Implementation method of EtherCAT field bus control system
CN111745651B (en) Intelligent robot operating system structure and operating method thereof
CN110620712B (en) Method for realizing real-time EtherCAT master station of Window platform
CN109347884B (en) Method and device for converting real-time Ethernet to field bus and storage medium
CN111666242B (en) Multi-channel communication system based on FT platform LPC bus
CN103150279B (en) Method allowing host and baseboard management controller to share device
US20080086575A1 (en) Network interface techniques
JP7310924B2 (en) In-server delay control device, server, in-server delay control method and program
WO2011020353A1 (en) Emulation method and system
CN103714026A (en) Memorizer access method and device supporting original-address data exchange
CN110519138A (en) A kind of realization method and system of Profibus-DP master station protocol
WO2024011825A1 (en) System, method and apparatus for introducing applet into third-party app, and medium
CN113778706B (en) Inter-core communication method of operation system based on AMP architecture
JP3651573B2 (en) Control method for factory automation system, central controller for factory automation system
CN117667781A (en) EtherCAT master station design and real-time optimization method based on AM64x
CN109361653B (en) POWERLINK main station
CN110430110B (en) On-site bus gateway and protocol conversion method thereof
CN116819992A (en) STM32 EtherCAT-based embedded numerical control system
Vorapojpisut Model-based design of IoT/WSN nodes: Device driver implementation
CN210129113U (en) EtherCAT control structure with main line control and independent control
CN114064153A (en) Embedded dynamic module loading method and device based on multi-core processor
CN102004667A (en) SOPC (system on programmable chip) software and hardware cooperative system based on Linux
CN111988113A (en) EtherCAT protocol and ASI protocol communication system and method
CN114513382B (en) Real-time Ethernet field bus network data packet processing method based on network card
Xu et al. Design and implementation of mechatrolink-iii bus slave station based on sopc

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant