CN110620146A - Field plate structure and semiconductor device - Google Patents

Abstract

The invention provides a field plate structure and a semiconductor device, relating to the technical field of semiconductor devices, comprising a connected first insulating dielectric layer and a second insulating dielectric layer, wherein the bottom end of the second insulating dielectric layer is provided with a wall bottom A field plate, a vertical wall conductor is inserted into the upper surface of the second insulating dielectric layer, and the vertical wall conductor and the field plate at the bottom of the wall form a collection cavity for collecting charges, and the upper surface of the second insulating dielectric layer is also provided with a Guided field plate introduced into the collection chamber. The invention can effectively improve the stability of semiconductor devices.

Description

Field Plate Structure and Semiconductor Devices

technical field

The invention relates to the technical field of semiconductor devices, in particular to a field plate structure and a semiconductor device.

Background technique

In the prior art, the terminal structure at the edge of the semiconductor device chip usually adopts a field plate structure to stabilize the charge on the surface of the semiconductor device and block the entry of external mobile charges. However, the inventors have found through research that there are gaps between the field plates in the prior art field plate structure. When there is a potential difference between the two ends of the field plate, the movable charges will not be shielded, and in the gap, along the high potential to the low potential The direction of free movement, and finally into the field plate structure, with the accumulation of time, will reduce the stability of semiconductor devices.

Contents of the invention

The purpose of the present invention is to provide a field plate structure and a semiconductor device, which can effectively improve the stability of the semiconductor device.

In a first aspect, the present invention provides a field plate structure, which includes a connected first insulating dielectric layer and a second insulating dielectric layer, and the bottom end of the second insulating dielectric layer is provided with a wall bottom field plate, so A vertical wall conductor is inserted into the upper surface of the second insulating dielectric layer, and the vertical wall conductor and the field plate at the bottom of the wall form a collection cavity for collecting charges, and the upper surface of the second insulating dielectric layer is further provided with There are guided field plates for introducing charge into the collection cavity.

Further, the guide field plate and the vertical wall conductors are arranged at a first preset interval on the upper surface of the second insulating dielectric layer.

Further, the overlapping length of the guide field plate and the wall bottom field plate in the vertical direction is less than or equal to twice the thickness of the second insulating dielectric layer.

Further, the guiding field plate includes a first conductive plate and a second conductive plate, and a conductor post connecting the first conductive plate and the second conductive plate.

Further, the first conductive plate is arranged on the upper surface of the second insulating dielectric layer;

The first conductive plate and the vertical wall conductors are arranged on the upper surface of the second insulating dielectric layer according to a second preset interval, wherein the second preset interval is greater than that of the second insulating dielectric layer twice the thickness;

The second conductive plate is disposed on the bottom end of the second insulating dielectric layer.

Further, one end of the guided field plate is connected to the field plate at the bottom of the wall through a conductor post, and the horizontal distance between the other end of the guided field plate and the conductor post is greater than or equal to that of the second insulating dielectric layer thickness.

Further, the guide field plate is arranged on one side or both sides of the vertical wall conductor.

Further, the vertical wall conductors include T-shaped vertical wall conductors and/or I-shaped vertical wall conductors;

The material of the vertical wall conductors includes polysilicon material and/or metal material.

Further, both the first insulating dielectric layer and the second insulating dielectric layer include an oxide dielectric layer;

The material of the oxidized dielectric layer in the first insulating dielectric layer includes silicon dioxide material;

The material of the oxidized dielectric layer in the second insulating dielectric layer includes borophosphosilicate material or polyimide material.

In a second aspect, the present invention provides a semiconductor device, which includes a lateral variable doping termination device and a field limiting ring termination device;

Both the lateral variable doping termination device and the field limiting ring termination device adopt the field plate structure described in the first aspect.

Embodiments of the present invention bring the following beneficial effects:

The invention provides a field plate structure and a semiconductor device, comprising a first insulating dielectric layer and a second insulating dielectric layer connected, wherein, the bottom end of the second insulating dielectric layer is provided with a field plate at the bottom of the wall, and the second insulating dielectric layer The upper surface of the layer is inserted with a vertical wall conductor, and the vertical wall conductor and the field plate at the bottom of the wall form a collection cavity for collecting charges, and the upper surface of the second insulating dielectric layer is also provided with a guide field plate for introducing charges into the collection cavity . In the above method provided by this embodiment, the second insulating dielectric layer encloses a collection cavity for collecting charges by the vertical wall conductors and the field at the bottom of the wall, and then the guiding field arranged on the upper surface of the second insulating dielectric layer The plate introduces the charge into the collection chamber, and the above method can collect the charge in the collection chamber. Compared with the prior art that the charge can move freely between the field plate gaps, this embodiment stabilizes the charge in the collection chamber through the collection chamber, which can Effectively improve the stability of semiconductor devices.

Description of drawings

In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the accompanying drawings that need to be used in the description of the specific embodiments or prior art. Obviously, the accompanying drawings in the following description The drawings show some implementations of the present invention, and those skilled in the art can also obtain other drawings based on these drawings without creative work.

FIG. 1 is a schematic diagram of a field plate structure provided by Embodiment 1 of the present invention;

Fig. 2 is a schematic diagram of the first structure of the guide field plate provided on the side of the vertical wall conductor provided by the first embodiment of the present invention;

Fig. 3 is a schematic diagram of the first structure in which the guide field plate is arranged on both sides of the vertical wall conductor provided by the first embodiment of the present invention;

Fig. 4 is a schematic diagram of the second structure in which the guided field plate is arranged on the side of the vertical wall conductor provided by Embodiment 1 of the present invention;

Fig. 5 is a schematic diagram of the second structure in which the guide field plate is arranged on both sides of the vertical wall conductor provided by the first embodiment of the present invention;

Fig. 6 is a schematic diagram of a third structure in which the guided field plate is arranged on the side of the vertical wall conductor provided by Embodiment 1 of the present invention;

7 is a schematic diagram of a fourth structure in which the guide field plate is arranged on both sides of the vertical wall conductor provided by Embodiment 1 of the present invention;

FIG. 8 is a schematic diagram of a semiconductor device provided by Embodiment 2 of the present invention;

FIG. 9 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 10 is a schematic structural diagram of a field plate structure applied to a lateral variable doping terminal device provided by Embodiment 2 of the present invention;

FIG. 11 is a schematic structural diagram of a field plate structure applied to a laterally variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 12 is a schematic structural diagram of a field plate structure applied to a laterally variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 13 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 14 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 15 is a schematic structural diagram of a field plate structure provided in Embodiment 2 of the present invention applied to a field limiting ring terminal device;

FIG. 16 is a schematic structural diagram of a field plate structure applied to a field limiting ring terminal device provided by Embodiment 2 of the present invention;

Fig. 17 is a schematic structural diagram of a field plate structure provided in Embodiment 2 of the present invention applied to a field limiting ring terminal device;

FIG. 18 is a schematic structural diagram of a field plate structure applied to a field limiting ring terminal device provided by Embodiment 2 of the present invention;

FIG. 19 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device provided by Embodiment 2 of the present invention;

FIG. 20 is a schematic structural diagram of a field plate structure applied to a field limiting ring terminal device provided by Embodiment 2 of the present invention;

FIG. 21 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

22 is a schematic structural diagram of a field plate structure applied to a laterally variable doping terminal device provided by Embodiment 2 of the present invention;

FIG. 23 is a schematic structural diagram of a field plate structure applied to a laterally variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 24 is a schematic structural diagram of a field plate structure applied to a laterally variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 25 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 26 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 27 is a schematic structural diagram of a field plate structure applied to a laterally variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 28 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 29 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 30 is a schematic structural diagram of a field plate structure applied to a laterally variable doping termination device provided by Embodiment 2 of the present invention;

Fig. 31 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device according to Embodiment 2 of the present invention;

Fig. 32 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device according to Embodiment 2 of the present invention;

Fig. 33 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device according to Embodiment 2 of the present invention;

Fig. 34 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device according to Embodiment 2 of the present invention;

FIG. 35 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device according to Embodiment 2 of the present invention;

FIG. 36 is a schematic structural diagram of a field plate structure applied to a field limiting ring terminal device according to Embodiment 2 of the present invention;

FIG. 37 is a schematic structural diagram of a field plate structure applied to a lateral variable doping terminal device provided by Embodiment 2 of the present invention;

FIG. 38 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 39 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 40 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

FIG. 41 is a schematic structural diagram of a field plate structure applied to a lateral variable doping termination device provided by Embodiment 2 of the present invention;

Fig. 42 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device according to Embodiment 2 of the present invention;

FIG. 43 is a schematic structural diagram of a field plate structure applied to a field limiting ring terminal device according to Embodiment 2 of the present invention;

Fig. 44 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device according to Embodiment 2 of the present invention;

Fig. 45 is a schematic structural diagram of a field plate structure applied in a field limiting ring terminal device according to Embodiment 2 of the present invention;

FIG. 46 is a schematic structural diagram of a field plate structure provided in Embodiment 2 of the present invention applied to a field limiting ring terminal device.

Icons: 1-semiconductor; 2-first insulating dielectric layer; 3-second insulating dielectric layer; 4-wall bottom field plate; 5-vertical wall conductor; 6-guided field plate; 7-collection cavity; 8-diffusion zone ; 9-P+ region; 10-first conductive plate; 11-field limiting ring; 12-field plate; 13-insulating dielectric layer; 14-coupling field plate; 15-second conductive plate; Lateral variable doping termination device; 300-field limiting ring termination device; 400-field plate structure.

Detailed ways

The technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

In order to improve the prior art, when there is a potential at both ends of the field plate, the charge can move freely in the gap of the field plate, and then enter the field plate structure, causing the problem of reducing the stability of the semiconductor device. The present invention provides a field plate structure and A semiconductor device comprising a connected first insulating dielectric layer and a second insulating dielectric layer, wherein the bottom end of the second insulating dielectric layer is provided with a field plate at the bottom of the wall, and the upper surface of the second insulating dielectric layer is inserted with a vertical wall conductor, And the vertical wall conductor and the field plate at the bottom of the wall form a collection cavity for collecting charges, and the upper surface of the second insulating dielectric layer is also provided with a guide field plate for introducing charges into the collection cavity. The field surrounds a collection cavity for collecting charges in the second insulating dielectric layer, and then the charge is introduced into the collection cavity by the guiding field plate arranged on the upper surface of the second insulating dielectric layer, and the charge is stabilized in the collection cavity through the collection cavity , can effectively improve the stability of semiconductor devices.

To facilitate the understanding of this embodiment, a field plate structure disclosed in this embodiment of the present invention is firstly introduced in detail.

Embodiment one:

Referring to a schematic diagram of a field plate structure shown in FIG. 1 , it includes a first insulating dielectric layer 2 and a second insulating dielectric layer 3 connected to each other. The bottom end of the second insulating dielectric layer 3 is provided with a field plate 4 at the bottom of the wall. The upper surface of the insulating dielectric layer 3 is inserted with a vertical wall conductor 5, and the vertical wall conductor 5 and the field plate 4 at the bottom of the wall form a collection chamber 7 for collecting charges, and the upper surface of the second insulating dielectric layer 3 is also provided with a Charges are introduced into the guiding field plate 6 of the collection chamber 7 .

In a specific implementation manner, the first insulating dielectric layer 2 , the second insulating dielectric layer 3 and the guiding field plate 6 are all manufactured by photolithography and etching processes, which are simple and can reduce manufacturing difficulty. The guide field plate 6 has the function of absorbing charges, and the guide field plate 6 is adjacent to the collection cavity 7 , and at the same time, the vertical wall conductor 5 and the charge interact with each other, so that the charge can be introduced into the collection cavity 7 .

In addition, the bottom of the collection chamber 7 is a conductor field plate, the movable charges in the collection chamber 7 lose their influence on the silicon surface, and the field plate structure can also collect and bind the movable charges coming in from the outside. The terminal of the field plate structure application is composed of multiple field plate structures, and each field plate structure is separated by vertical wall conductors 5, thereby avoiding the accumulation of high-density mobile charges caused by the long-distance movement of mobile charges.

In the above method provided by this embodiment, the second insulating dielectric layer 3 encloses a collection cavity 7 for collecting charges by the vertical wall conductor 5 and the wall bottom field, and then the second insulating dielectric layer 3 is arranged on the second insulating dielectric layer 3. The guided field plate 6 on the surface introduces charges into the collection cavity 7. The above method can collect the charges in the collection cavity 7. Compared with the prior art that the charges can move freely between the field plate gaps, this embodiment uses the collection cavity 7 to The charges are stabilized in the collecting cavity 7, which can effectively improve the stability of the semiconductor device.

In specific implementation, the guide field plate 6 is arranged on one side or both sides of the vertical wall conductor 5, and according to the different arrangement methods of the guide field plate 6, the structure of the guide field plate includes the following three structures:

(1) With reference to the guide field plate 6 shown in FIG. 2 being arranged on one side of the vertical wall conductor 5 and the first structural schematic diagram in which the guide field plate 6 shown in FIG. 3 is arranged on both sides of the vertical wall conductor 5, the guide field plate 6 and vertical wall conductors 5 are arranged on the upper surface of the second insulating dielectric layer 3 according to a first preset interval.

Wherein, the overlapping length of the guide field plate 6 and the wall bottom field plate 4 in the vertical direction is less than or equal to twice the thickness of the second insulating dielectric layer 3 .

(2) With reference to the guide field plate 6 shown in Figure 4 being arranged on one side of the vertical wall conductor 5 and the second structural schematic diagram of the guide field plate 6 shown in Figure 5 being arranged on both sides of the vertical wall conductor 5, the guide field plate 6 includes a first conductive plate 10 and a second conductive plate 15, and a conductor column connecting the first conductive plate 10 and the second conductive plate 15. The first conductive plate 10 is arranged on the upper surface of the second insulating dielectric layer 3; the first conductive plate 10 and the vertical wall conductor 5 are arranged according to a second preset interval on the upper surface of the second insulating dielectric layer 3, wherein the second The preset interval is greater than twice the thickness of the second insulating dielectric layer 3 ; the second conductive plate 15 is arranged at the bottom end of the second insulating dielectric layer 3 .

(3) With reference to the guide field plate 6 shown in Figure 6 being arranged on one side of the vertical wall conductor 5 and the third structural schematic diagram in which the guide field plate 6 shown in Figure 7 is arranged on both sides of the vertical wall conductor 5, the guide field plate One end of 6 is connected to the field plate 4 at the bottom of the wall through a conductor post, and the horizontal distance between the other end of the guide field plate 6 and the conductor post is greater than or equal to the thickness of the second insulating dielectric layer 3 .

In the above manner provided by this embodiment, charges can be collected according to field plate structures of different structures, thereby improving the stability of the semiconductor device.

In a specific implementation, the vertical wall conductor 5 includes a T-shaped vertical wall conductor 5 and/or an I-shaped vertical wall conductor 5 . The material of the vertical wall conductor 5 includes polysilicon material and/or metal material.

Both the first insulating dielectric layer 2 and the second insulating dielectric layer 3 include an oxide dielectric layer.

The material of the oxidized dielectric layer in the first insulating dielectric layer 2 includes silicon dioxide material.

The material of the oxidized dielectric layer in the second insulating dielectric layer 3 includes borophosphosilicate material or polyimide material.

In the above manner provided by this embodiment, by using the oxidized dielectric layer and polysilicon material and/or metal material, the process difficulty of the field plate structure can be reduced.

Embodiment two:

Referring to a schematic diagram of a semiconductor device 100 shown in FIG. 8 , it includes a lateral variable doping termination device 200 and a field limiting ring termination device 300 .

Both the lateral variable doping termination device 200 and the field limiting ring termination device 300 adopt the field plate structure 400 of the first embodiment.

In the above method provided by this embodiment, the second insulating dielectric layer 3 encloses a collection cavity 7 for collecting charges by the vertical wall conductor 5 and the wall bottom field, and then the second insulating dielectric layer 3 is arranged on the second insulating dielectric layer 3. The guided field plate 6 on the surface introduces charges into the collection cavity 7. The above method can collect the charges in the collection cavity 7. Compared with the prior art that the charges can move freely between the field plate gaps, this embodiment uses the collection cavity 7 to The charges are stabilized in the collecting cavity 7, which can effectively improve the stability of the semiconductor device.

In a specific implementation, the field plate structure 400 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 shown in FIG. As shown, the conventional floating field plates 12 are arranged on the first insulating dielectric layer 2 above the diffusion region 8 at intervals. As shown in Figure 10, above the conventional floating field plate 12, the vertical wall conductor 5 is added with the floating field plate 12 as the field plate at the bottom of the wall, and the vertical wall conductor 5 cuts off the second insulating dielectric layer 3, and the second insulating dielectric layer 3 is divided into several small sections, which prevents the long-distance movement of movable charges and avoids the accumulation of high-density movable charges. In addition, vertical wall conductors 5 can be added on the side near the active region of the lateral variable doping terminal device 200 and at the end of the lateral variable doping terminal device 200 to form a collecting cavity 7 for movable charges, which is used to reduce the lateral variable doping. Miscellaneous terminal device 200 and the amount of mobile charge in the active area of the chip.

In a specific implementation manner, the field plate structure 400 shown in FIG. 2 in which the guided field plate 6 is arranged on one side of the vertical wall conductor can be applied to the lateral variable doping terminal device 200, and its application structure is shown in FIG. 11 , wherein, the field plate structure 400 is placed repeatedly according to a certain interval, and bridges the P+ region 9 and the diffusion region 8 at the edge of the active region and the surface of the semiconductor 1, forming a plurality of blunt charge collection chambers 7 on the semiconductor surface. structure. In addition, vertical wall conductors 5 can also be added to the side of the lateral variable doping termination device 200 close to the active region and at the end of the lateral variable doping termination device 200 to form a mobile charge collection cavity 7 for reducing lateral variation. Doping the terminal device 200 and the amount of mobile charge in the active area of the chip.

In a specific implementation manner, the field plate structure 400 shown in FIG. 3 in which the guided field plate 6 is arranged on both sides of the vertical wall conductor 5 can be applied to the lateral variable doping termination device 200, and its application structure is shown in FIG. 12 As shown, wherein the field plate structure 400 is placed repeatedly according to a certain interval, spanning the P+ region 9 and the diffusion region 8 at the edge of the active region and the surface of the semiconductor 1, forming a plurality of movable charge collection cavities 7 on the surface of the semiconductor. passivation structure; it is also possible to add a vertical wall conductor 5 on the side near the active region in the lateral variable doping terminal device 200 and at the end of the lateral variable doping terminal device 200 to form a collecting cavity 7 for movable charges, which is used to reduce The amount of mobile charges in the doping termination device 200 and the active area of the chip can be varied laterally.

In a specific implementation manner, after further improvement, the field plate structure 400 shown in FIG. The structure is shown in Figure 12 and Figure 13, wherein an insulating dielectric layer 13 is added to guide the field plate 6 above the field plate structure 400 shown in Figure 3, and vertical wall conductors 5 are added to cut off the insulating dielectric layer 13. Through the electrical coupling between the adjacent vertical wall conductors 5, a plurality of movable charge collection chambers 7 are also formed in the insulating dielectric layer 13; The structure is used to reduce the amount of movable charge in the laterally variable doping termination device 200 and the active region of the chip.

In a specific implementation manner, after further improvement, the field plate structure 400 shown in FIG. The structure is shown in Figure 12 and Figure 14 with reference to, wherein, add a layer of insulating dielectric layer 13 again, in the second insulating dielectric layer 3 and insulating dielectric layer 13, form vertical and horizontal cascaded structure, form two layers above the semiconductor surface The passivation structure of multiple movable charge collection cavities 7 is used to reduce the quantity of movable charges in the laterally variable doping terminal device 200 and the active region of the chip. Further improve the ability to collect mobile charges. In this structure, the guide field plate 6 of the field plate structure 400 can also be divided into two sections, left and right, to achieve the same effect. In the same manner, the field plate structure 400 can be stacked in multiple layers in the vertical direction.

In a specific implementation manner, the field plate structure 400 shown in FIG. 2 in which the guiding field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring terminal device 300, and its application structure is shown in FIG. 15 , Among them, in the field-limiting ring terminal device 300, the outermost field-limiting ring and the end of the device are usually set to be the widest in the entire device to improve the withstand voltage and the stability of the withstand voltage, because the width is relatively large, and the field plate structure 400 has a relatively strong ability to collect movable charges. Further, as shown in Fig. 16, on the field plate 12 above the field limiting ring 11, a vertical wall conductor 5 is added with the field plate 12 as the field plate at the bottom of the wall, the vertical wall conductor 5 cuts off the second insulating dielectric layer 3, and the second insulating dielectric layer 3 Divided into several small segments, it prevents the long-distance movement of movable charges, resulting in the accumulation of high-density movable charges.

In a specific implementation manner, the field plate structure 400 shown in FIG. 2 in which the guiding field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring terminal device 300, and its application structure is shown in FIG. 17 , Among them, the field plate structure 400 is repeatedly placed according to a certain distance, combined with the distance of the field limiting ring 11, and the horizontal distance of the field plate structure 400 is adjusted to bridge the P+ region 9 at the edge of the active region and the arrangement area of the field limiting ring 11. And on the surface of the semiconductor 1, a passivation structure of a plurality of movable charge collection chambers 7 is formed on the semiconductor surface; it can also be added to the side near the active region in the field-limiting ring termination device 300 and at the end of the field-limiting ring termination device 300 The vertical wall conductors 5 form a mobile charge collection cavity 7 for reducing the quantity of mobile charges in the field limiting ring termination device 300 and the active area of the chip.

In a specific implementation manner, the field plate structure 400 shown in FIG. 3 in which the guiding field plate 6 is arranged on both sides of the vertical wall conductor 5 can be applied to the field limiting ring termination device 300, and its application structure is shown in FIG. 18 , Among them, the field plate structure 400 is repeatedly placed according to a certain distance, combined with the distance of the field limiting ring 11, and the lateral distance of the field plate structure 400 is adjusted, and it bridges the P+ region 9 at the edge of the active region and the arrangement area of the field limiting ring 11 and the semiconductor 1, a passivation structure of multiple movable charge collection chambers 7 is formed on the semiconductor surface; vertical wall conductors can also be added on the side near the active region in the field limiting ring terminal device and at the end of the field limiting ring terminal device 300 5. A collecting chamber 7 for mobile charges is formed, which is used to reduce the quantity of mobile charges in the field limiting ring termination device 300 and the active area of the chip.

In a specific embodiment, after further improvement, the field plate structure 400 shown in FIG. 3 in which the guide field plate 6 is arranged on both sides of the vertical wall conductor 5 can be applied to the field limiting ring termination device 300. For its application structure, refer to As shown in FIG. 18 and FIG. 19 , another layer of insulating dielectric layer 13 is added, the field plate structure 400 guides the upper surface of the field plate 6 , and vertical wall conductors 5 are added to cut off the insulating dielectric layer 13 . Through the electrical coupling between the adjacent vertical wall conductors 5, a plurality of movable charge collection chambers 7 are also formed in the insulating dielectric layer 13; The structure is used to reduce the amount of mobile charge in the field limiting ring termination device 300 and the active area of the chip.

In a specific embodiment, after further improvement, the field plate structure 400 shown in FIG. 3 in which the guide field plate 6 is arranged on both sides of the vertical wall conductor 5 can be applied to the field limiting ring termination device 300. For its application structure, refer to As shown in FIG. 18 and FIG. 20 , an additional insulating dielectric layer 13 is added, and the field plate structure 400 forms a vertical and lateral cascaded structure in the second insulating dielectric layer 3 and the insulating dielectric layer 13 . A passivation structure with two layers of multiple movable charge collection cavities 7 is formed on the surface of the semiconductor, which is used to reduce the amount of movable charges in the lateral variable doping terminal device 200 and the active area of the chip, and further improve the ability to collect movable charges .

In a specific implementation manner, the field plate structure 400 shown in FIG. 4 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the lateral variable doping termination device 200, and its application structure is shown in FIG. 21 , wherein the floating field plates 12 are arranged on the second insulating dielectric layer 3 at a certain interval. Further, as shown in Figure 22, the vertical wall conductor 5 is added with the floating field plate 12 as the wall bottom field plate, and the vertical wall conductor 5 cuts off the second insulating dielectric layer 3, and divides the second insulating dielectric layer 3 into several small sections, eliminating the possibility of movable charges Long-distance movement causes the accumulation of high-density movable charges; it is also possible to add vertical wall conductors 5 on the side of the lateral variable doping terminal device 200 close to the active region and at the end of the lateral variable doping terminal device 200 to form a movable The charge collecting cavity 7 is used to reduce the amount of movable charge in the laterally variable doping terminal device 200 and the active area of the chip.

In a specific implementation, the field plate structure 400 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 shown in FIG. As shown, wherein, the field plate structure 400 is placed repeatedly according to a certain interval, spanning the P+ region 9 and the diffusion region 8 at the edge of the active region and the surface of the semiconductor 1, forming a plurality of movable charge collection cavities 7 on the semiconductor surface passivation structure; it is also possible to add a vertical wall conductor 5 on the side near the active region in the lateral variable doping terminal device 200 and at the end of the lateral variable doping terminal device 200 to form a collecting cavity 7 for movable charges, which is used to reduce The amount of mobile charges in the doping termination device 200 and the active area of the chip can be varied laterally.

In a specific implementation manner, the field plate structure 400 shown in FIG. 4 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the lateral variable doping termination device 200, and its application structure is shown in FIG. 24 As shown, the field plate structure 400 is repeatedly placed at a certain interval through the electric field coupling field plate 14, and bridges the P+ region 9 and the diffusion region 8 at the edge of the active region as well as the surface of the semiconductor 1, forming multiple possible structures on the semiconductor surface. The passivation structure of the mobile charge collection cavity 7; it is also possible to add vertical wall conductors 5 on the side close to the active region in the lateral variable doping terminal device 200 and at the end of the lateral variable doping terminal device 200 to form a collection of mobile charges The cavity 7 is used to reduce the amount of mobile charge in the laterally variable doping terminal device 200 and the active region of the chip.

In a specific implementation manner, after further improvement, the field plate structure 400 shown in FIG. Referring to FIG. 24 and FIG. 25 , an insulating dielectric layer 13 is added, and a vertical wall conductor 5 is added to cut off the insulating dielectric layer 13 on the electric field coupling field plate 14 . Through the electrical coupling between the adjacent vertical wall conductors 5, a plurality of movable charge collection chambers 7 are also formed in the insulating dielectric layer 13; The structure is used to reduce the amount of movable charge in the laterally variable doping termination device 200 and the active region of the chip.

In a specific implementation manner, after further improvement, the field plate structure 400 shown in FIG. Referring to FIG. 24 and FIG. 26 , a guide field plate 6 is added on one side of the vertical wall conductor 5 in the insulating dielectric layer 13 to form a field plate structure 400 to enhance the charge collection capability of the movable charge collection cavity 7 . It is used to reduce the amount of mobile charges in the laterally variable doping terminal device 200 and the active region of the chip.

In a specific implementation manner, the field plate structure 400 shown in FIG. 5 in which the guided field plate 6 is arranged on both sides of the vertical wall conductor 5 can be applied to the lateral variable doping termination device 200, and its application structure is shown in FIG. 27 As shown, wherein, the field plate structure 400 is placed repeatedly according to a certain interval, spanning the P+ region 9 and the diffusion region 8 at the edge of the active region and the surface of the semiconductor 1, forming a plurality of movable charge collection cavities 7 on the semiconductor surface passivation structure; further, as shown in FIG. 28 , the field plate structure 400 is repeatedly placed at a certain interval through the electric field coupling field plate 14, and bridges the P+ region 9 and the diffusion region 8 at the edge of the active region and the surface of the semiconductor 1, A passivation structure of a plurality of movable charge collection chambers 7 is formed on the semiconductor surface; vertical wall conductors can also be added on the side near the active region in the lateral variable doping termination device 200 and at the end of the lateral variable doping termination device 200 5. A collecting chamber 7 for movable charges is formed to reduce the quantity of movable charges in the lateral variable doping terminal device 200 and the active region of the chip.

In a specific implementation manner, after further improvement, the field plate structure 400 shown in FIG. The structure is shown in FIG. 28 and FIG. 29 , wherein an insulating dielectric layer 13 is added, and a vertical wall conductor 5 is added to cut off the insulating dielectric layer 13 on the electric field coupling field plate 14 . Through the electrical coupling between the adjacent vertical wall conductors 5, a plurality of movable charge collecting cavities 7 have also been formed in the insulating dielectric layer 13; A guide field plate 6 is added on one or both sides of the conductor 5 to form the field plate structure 400, thereby enhancing the charge collection capability of the movable charge beam collection cavity 7, and used to reduce the lateral variable doping terminal device 200 and chip active. The amount of movable charge in the region.

In a specific implementation manner, the field plate structure 400 shown in FIG. 4 in which the guided field plate is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring termination device 300, and its application structure is shown in FIG. 31 , wherein , the field plate structure 400 is applied on the upper part of the outermost field limiting ring 11 . Further, as shown in Figure 32, on the field plate 12 above the conventional field limiting ring 11, a vertical wall conductor 5 is added with the field plate 12 as the field plate at the bottom of the wall, and the vertical wall conductor 5 cuts off the second insulating dielectric layer 3, and the second insulating dielectric layer Layer 3 is divided into several small sections, which prevents the long-distance movement of movable charges and causes the accumulation of high-density movable charges; it is also possible to add vertical rings on the side of the field-limiting ring terminal device 300 close to the active region and at the end of the field-limiting ring terminal device 300. The wall conductor 5 forms a mobile charge collecting cavity 7 for reducing the quantity of mobile charges in the field limiting ring termination device 300 and the active area of the chip.

In a specific implementation manner, the field plate structure 400 shown in FIG. 4 in which the guiding field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring terminal device 300, and its application structure is shown in FIG. 33 . Among them, the field plate structure 400 is repeatedly placed according to a certain distance, combined with the distance of the field limiting ring 11, and the lateral distance of the field plate structure 400 is adjusted, and it bridges the P+ region 9 at the edge of the active region and the arrangement area of the field limiting ring 11 and the semiconductor 1, a passivation structure of a plurality of movable charge collection chambers 7 is formed on the semiconductor surface; vertical walls can also be added on the side of the field limiting ring termination device 300 close to the active region and at the end of the field limiting ring termination device 300 The conductor 5 forms a collecting chamber 7 for movable charges, which is used to reduce the quantity of movable charges of the field limiting ring termination device 300 and the active area of the chip.

In a specific implementation manner, the field plate structure 400 shown in FIG. 4 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring terminal device 300, and its application structure is shown in FIG. 34 . Among them, the field plate structure 400 is placed repeatedly at a certain distance through the electric field coupling field plate 14, combined with the distance of the field limiting ring 11, adjusting the lateral distance of the field plate structure 400, and connecting the P+ region 9 and the field limiting ring at the edge of the active region. 11 On the arrangement area and the surface of the semiconductor 1, a passivation structure of a plurality of movable charge collection chambers 7 is formed on the semiconductor surface; it can also be near the active region side in the field limiting ring termination device 300 and in the field limiting ring termination device Vertical wall conductors 5 are added to the end of 300 to form a mobile charge collection cavity 7 for reducing the quantity of mobile charges in the field limiting ring termination device 300 and the active area of the chip.

In a specific implementation, after further improvement, the field plate structure 400 shown in FIG. 4 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring termination device 300. For the application structure, refer to As shown in FIG. 34 and FIG. 35 , an insulating dielectric layer 13 is added, and a vertical wall conductor 5 is added to cut off the insulating dielectric layer 13 on the electric field coupling field plate 14 . Through the electrical coupling between the adjacent vertical wall conductors 5, a plurality of movable charge collection cavities 7 have also been formed in the insulating dielectric layer 13; A guide field plate 6 is added to one or both sides of the conductor 5 to form the field plate structure 400 , thereby enhancing the charge collection capability of the movable charge beam collector 7 . It is used to reduce the amount of movable charge in the FCL termination device 300 and the active area of the chip.

In a specific implementation manner, the field plate structure 400 shown in FIG. 6 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the lateral variable doping termination device 200, and its application structure is shown in FIG. 37 As shown, the field plate structure 400 is applied above the PN junction in the diffusion region, and the floating field plates 12 are arranged on the second insulating dielectric layer 3 above the diffusion region 8 at a certain interval. Further, as shown in FIG. 38, on the floating field plate 12, a vertical wall conductor 5 is added with the floating field plate 12 as the bottom field plate, and the vertical wall conductor 5 cuts off the second insulating dielectric layer 3, and the second insulating dielectric layer The layer 3 is divided into several small segments, which prevents the long-distance movement of movable charges, resulting in the accumulation of high-density movable charges; A vertical wall conductor 5 is added at the end to form a mobile charge collection chamber 7 for reducing the quantity of mobile charges in the laterally variable doping terminal device 200 and the active area of the chip.

In a specific implementation manner, the field plate structure 400 shown in FIG. 6 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the lateral variable doping termination device 200, and its application structure is shown in FIG. 39 As shown, wherein, the field plate structure 400 is placed repeatedly according to a certain interval, spanning the P+ region 9 and the diffusion region 8 at the edge of the active region and the surface of the semiconductor 1, forming a plurality of movable charge collection cavities 7 on the semiconductor surface Passivation structure; vertical wall conductors 5 can be added to the side of the lateral variable doping terminal device 200 close to the active region and at the end of the lateral variable doping terminal device 200 to form a mobile charge collection cavity 7 for reducing lateral The amount of mobile charge in the doping termination device 200 and the active area of the chip is varied.

In a specific implementation manner, after further improvement, the field plate structure 400 shown in FIG. The structure is shown in FIG. 39 and FIG. 40 , wherein an insulating dielectric layer 13 is added, and vertical wall conductors 5 are added to cut off the insulating dielectric layer 13 on the guide field plate 6 of the field plate structure 400 . Through the electrical coupling between the adjacent vertical wall conductors 5, a plurality of movable charge collecting cavities 7 are also formed in the insulating dielectric layer 13; further improved structures, as shown in Figure 41, in the insulating dielectric layer 13 One side of the vertical wall conductor 5 is added with a guide field plate 6 to form the field plate structure 400, thereby enhancing the charge collection capability of the movable charge collection cavity 7, and is used to reduce the lateral variable doping terminal device 200 and the active area of the chip. The amount of moving charge.

In a specific implementation manner, the field plate structure 400 shown in FIG. 6 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring terminal device 300, and its application structure is shown in FIG. 42 , Wherein, the field plate structure 400 is applied on the upper part of the outermost field limiting ring 11 . Further, as shown in Figure 43, on the field plate 12 above the field limiting ring 11, a vertical wall conductor 5 is added with the field plate 12 as the field plate at the bottom of the wall, and the vertical wall conductor 5 cuts off the second insulating dielectric layer 3, and the second insulating dielectric layer 3 Divided into several small sections, it prevents the long-distance movement of movable charges, resulting in the accumulation of high-density movable charges; the outermost field-limiting ring and the end of the field-limiting ring terminal device 300 are usually set to the widest to increase the field plate structure 400 pairs of mobile charge collection capacity.

In a specific implementation manner, the field plate structure 400 shown in FIG. 6 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring terminal device 300, and its application structure is shown in FIG. 44 , Among them, the field plate structure 400 is repeatedly placed according to a certain distance, combined with the distance of the field limiting ring 11, and the lateral distance of the field plate structure 400 is adjusted, and bridged between the P+ region 9 at the edge of the active region and the arrangement area of the field limiting ring 11 and On the surface of the semiconductor 1, a passivation structure of a plurality of movable charge collection chambers 7 is formed on the semiconductor surface; it is also possible to add a vertical ring on the side near the active region in the field limiting ring termination device 300 and at the end of the field limiting ring termination device 300. The wall conductor 5 forms a mobile charge collecting cavity 7 for reducing the quantity of mobile charges in the field limiting ring termination device 300 and the active area of the chip.

In a specific implementation, after further improvement, the field plate structure 400 shown in FIG. 6 in which the guided field plate 6 is arranged on one side of the vertical wall conductor 5 can be applied to the field limiting ring termination device 300. For its application structure, refer to As shown in FIGS. 44 and 45 , another layer of insulating dielectric layer 13 is added, and on the guide field plate 6 of the field plate structure 400 , vertical wall conductors 5 are added to cut off the insulating dielectric layer 13 . Through the electrical coupling between the adjacent vertical wall conductors 5, a plurality of movable charge collection cavities 7 have also been formed in the insulating dielectric layer 13; A guiding field plate 6 is added to one or both sides of the conductor 5 to form a field plate structure 400 , thereby enhancing the charge collection capability of the movable charge collection cavity 7 . At the same time, vertical wall conductors 5 can also be added at the end of the field-limiting ring termination device 300 to form a collection cavity 7 for movable charges, which is used to reduce the amount of movable charges in the field-limiting ring termination device 300 .

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the various embodiments of the present invention. scope.

Claims (10)

1. A field plate structure, characterized in that it comprises a connected first insulating dielectric layer and a second insulating dielectric layer, the bottom end of the second insulating dielectric layer is provided with a field plate at the bottom of the wall, and the second insulating dielectric layer A vertical wall conductor is inserted into the upper surface of the dielectric layer, and the vertical wall conductor and the field plate at the bottom of the wall form a collection cavity for collecting charges, and the upper surface of the second insulating dielectric layer is also provided with a Introduce the guided field plate into the collection chamber. 2 . The field plate structure according to claim 1 , wherein the guide field plate and the vertical wall conductors are arranged at a first preset interval on the upper surface of the second insulating dielectric layer. 3 . 3. The field plate structure according to claim 2, wherein the overlapping length of the guide field plate and the wall-bottom field plate in the vertical direction is less than or equal to the thickness of the second insulating dielectric layer double. 4. The field plate structure according to claim 1, wherein the guided field plate comprises a first conductive plate and a second conductive plate, and a conductor connecting the first conductive plate and the second conductive plate column. 5. The field plate structure according to claim 4, wherein the first conductive plate is disposed on the upper surface of the second insulating dielectric layer; The first conductive plate and the vertical wall conductors are arranged on the upper surface of the second insulating dielectric layer according to a second preset interval, wherein the second preset interval is greater than that of the second insulating dielectric layer twice the thickness; The second conductive plate is disposed on the bottom end of the second insulating dielectric layer. 6. The field plate structure according to claim 1, wherein one end of the guide field plate is connected to the field plate at the bottom of the wall through a conductor post, and the other end of the guide field plate is connected to the conductor post The horizontal distance is greater than or equal to the thickness of the second insulating dielectric layer. 7. The field plate structure according to any one of claims 1 to 6, wherein the guide field plate is arranged on one side or both sides of the vertical wall conductor. 8. The field plate structure according to claim 1, wherein the vertical wall conductor comprises a T-shaped vertical wall conductor and/or an I-shaped vertical wall conductor; The material of the vertical wall conductors includes polysilicon material and/or metal material. 9. The field plate structure according to claim 1, wherein the first insulating dielectric layer and the second insulating dielectric layer both comprise an oxide dielectric layer; The material of the oxidized dielectric layer in the first insulating dielectric layer includes silicon dioxide material; The material of the oxidized dielectric layer in the second insulating dielectric layer includes borophosphosilicate material or polyimide material. 10. A semiconductor device, characterized in that it comprises a lateral variable doping termination device and a field limiting ring termination device; Both the lateral variable doping termination device and the field limiting ring termination device adopt the field plate structure described in any one of claims 1 to 8 .