CN110612667A - 频率产生器以及频率产生方法 - Google Patents
频率产生器以及频率产生方法 Download PDFInfo
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- CN110612667A CN110612667A CN201880000440.3A CN201880000440A CN110612667A CN 110612667 A CN110612667 A CN 110612667A CN 201880000440 A CN201880000440 A CN 201880000440A CN 110612667 A CN110612667 A CN 110612667A
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- China
- Prior art keywords
- signal
- frequency
- cyclic
- generate
- phase
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- 238000000034 method Methods 0.000 title claims description 11
- 125000004122 cyclic group Chemical group 0.000 claims abstract description 77
- 230000003111 delayed effect Effects 0.000 claims abstract description 51
- 230000001934 delay Effects 0.000 claims description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 20
- 238000010586 diagram Methods 0.000 description 12
- 239000000872 buffer Substances 0.000 description 6
- 102100038026 DNA fragmentation factor subunit alpha Human genes 0.000 description 4
- 101000950906 Homo sapiens DNA fragmentation factor subunit alpha Proteins 0.000 description 4
- 238000013139 quantization Methods 0.000 description 3
- 102100038023 DNA fragmentation factor subunit beta Human genes 0.000 description 1
- 101100277639 Homo sapiens DFFB gene Proteins 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/16—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/181—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
- Pulse Circuits (AREA)
Abstract
一种频率产生器,包括控制单元,用来接收输入信号,以产生除数信号、相位信号以及循环信号;除频器,用来接收所述输入信号,以及根据所述除数信号对所述输入信号进行整数除频而产生除频信号;循环式延迟电路,耦接于所述除频器,用来对所述除频信号进行至少一循环操作,且于每次进行所述循环操作时产生至少一延迟相位信号;第一多工器,耦接于所述循环式延迟电路,用来根据所述相位信号由所述除频信号以及所述至少一延迟相位信号中选择其中之一信号,以产生多工信号;以及重定时器,耦接于所述第一多工器,用来根据所述循环信号、所述多工信号以及所述除频信号,产生输出信号。
Description
PCT国内申请,说明书已公开。
Claims (6)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2018/080993 WO2019183866A1 (zh) | 2018-03-29 | 2018-03-29 | 频率产生器以及频率产生方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110612667A true CN110612667A (zh) | 2019-12-24 |
CN110612667B CN110612667B (zh) | 2023-05-02 |
Family
ID=68062534
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201880000440.3A Active CN110612667B (zh) | 2018-03-29 | 2018-03-29 | 频率产生器以及频率产生方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10680620B2 (zh) |
EP (1) | EP3573242A4 (zh) |
CN (1) | CN110612667B (zh) |
WO (1) | WO2019183866A1 (zh) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10998911B1 (en) * | 2019-12-30 | 2021-05-04 | Nxp Usa, Inc. | Fractional N PLL with sigma-delta noise cancellation |
US11356136B2 (en) * | 2020-09-08 | 2022-06-07 | Shenzhen GOODIX Technology Co., Ltd. | Harmonic rejection in multiphase signals |
US11095293B1 (en) * | 2020-12-31 | 2021-08-17 | Texas Instruments Incorporated | Low-power fractional analog PLL without feedback divider |
US11456760B1 (en) * | 2021-03-05 | 2022-09-27 | Motorola Solutions, Inc. | Linearizing narrowband carriers with low resolution predistorters |
US11323124B1 (en) * | 2021-06-01 | 2022-05-03 | SambaNova Systems, Inc. | Variable-length clock stretcher with correction for glitches due to finite DLL bandwidth |
WO2023081987A1 (pt) * | 2021-11-11 | 2023-05-19 | Robert Bosch Limitada | Método de controle de um dispositivo para operar com resolução fracionária |
US20230378961A1 (en) * | 2022-05-23 | 2023-11-23 | Texas Instruments Incorporated | Methods and apparatus to retime data using a programmable delay |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6671341B1 (en) * | 1999-09-17 | 2003-12-30 | Agere Systems, Inc. | Glitch-free phase switching synthesizer |
US20080055010A1 (en) * | 2006-08-29 | 2008-03-06 | Texas Instruments Incorporated | Local oscillator with non-harmonic ratio between oscillator and RF frequencies using pulse generation and selection |
CN102055466A (zh) * | 2009-11-06 | 2011-05-11 | 联咏科技股份有限公司 | 多相位信号产生装置 |
US20120230144A1 (en) * | 2011-03-11 | 2012-09-13 | Elpida Memory, Inc. | Semiconductor device |
CN102832932A (zh) * | 2011-06-13 | 2012-12-19 | 联发科技股份有限公司 | 分频器及分频方法 |
US20160156364A1 (en) * | 2014-12-02 | 2016-06-02 | Mediatek Inc. | Fractional Dividing Module and Related Calibration Method |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7012985B1 (en) * | 2004-07-30 | 2006-03-14 | Xilinx, Inc. | Frequency division of an oscillating signal involving a divisor fraction |
US7495517B1 (en) * | 2006-12-14 | 2009-02-24 | Altera Corporation | Techniques for dynamically adjusting the frequency range of phase-locked loops |
CN101217277B (zh) * | 2008-01-15 | 2010-12-29 | 凌阳科技股份有限公司 | 非整数除频器以及可产生非整数时脉信号的锁相回路 |
US7969209B2 (en) * | 2009-04-01 | 2011-06-28 | Skyworks Solutions, Inc. | Frequency divider circuit |
US8461933B2 (en) * | 2010-10-26 | 2013-06-11 | Mediatek Inc. | Device and method for frequency calibration and phase-locked loop using the same |
US8873699B2 (en) * | 2012-11-21 | 2014-10-28 | Intel Mobile Communications GmbH | Fractional frequency divider with phase permutation |
US20160380642A1 (en) * | 2014-03-12 | 2016-12-29 | Mediatek Singapore Pte. Ltd. | Divisor control circuit, fractional frequency division device, frequency synthesizer and frequency synthesis method |
-
2018
- 2018-03-29 EP EP18897872.0A patent/EP3573242A4/en active Pending
- 2018-03-29 WO PCT/CN2018/080993 patent/WO2019183866A1/zh unknown
- 2018-03-29 CN CN201880000440.3A patent/CN110612667B/zh active Active
-
2019
- 2019-07-10 US US16/507,654 patent/US10680620B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6671341B1 (en) * | 1999-09-17 | 2003-12-30 | Agere Systems, Inc. | Glitch-free phase switching synthesizer |
US20080055010A1 (en) * | 2006-08-29 | 2008-03-06 | Texas Instruments Incorporated | Local oscillator with non-harmonic ratio between oscillator and RF frequencies using pulse generation and selection |
CN102055466A (zh) * | 2009-11-06 | 2011-05-11 | 联咏科技股份有限公司 | 多相位信号产生装置 |
US20120230144A1 (en) * | 2011-03-11 | 2012-09-13 | Elpida Memory, Inc. | Semiconductor device |
CN102832932A (zh) * | 2011-06-13 | 2012-12-19 | 联发科技股份有限公司 | 分频器及分频方法 |
US20160156364A1 (en) * | 2014-12-02 | 2016-06-02 | Mediatek Inc. | Fractional Dividing Module and Related Calibration Method |
Non-Patent Citations (2)
Title |
---|
YURY ANTONOV: "Open-loop all-digital delay line with on-chip calibration via self-equalizing delays", 《2017 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (ECCTD)》 * |
刘玮: "基于FPGA任意分频系统设计", 《电子产品世界》 * |
Also Published As
Publication number | Publication date |
---|---|
US10680620B2 (en) | 2020-06-09 |
US20190334529A1 (en) | 2019-10-31 |
EP3573242A1 (en) | 2019-11-27 |
EP3573242A4 (en) | 2020-03-11 |
CN110612667B (zh) | 2023-05-02 |
WO2019183866A1 (zh) | 2019-10-03 |
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