CN110603639A - Light emitting diode for display and display device having the same - Google Patents

Light emitting diode for display and display device having the same Download PDF

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Publication number
CN110603639A
CN110603639A CN201880029322.5A CN201880029322A CN110603639A CN 110603639 A CN110603639 A CN 110603639A CN 201880029322 A CN201880029322 A CN 201880029322A CN 110603639 A CN110603639 A CN 110603639A
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China
Prior art keywords
led stack
stack
led
type semiconductor
semiconductor layer
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CN201880029322.5A
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Chinese (zh)
Inventor
蔡钟炫
金彰渊
李豪埈
张成逵
李贞勳
赵大成
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Seoul Viosys Co Ltd
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Seoul Viosys Co Ltd
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Publication date
Application filed by Seoul Viosys Co Ltd filed Critical Seoul Viosys Co Ltd
Priority to CN201911188415.5A priority Critical patent/CN111312700A/en
Priority to CN201911187162.XA priority patent/CN110911532A/en
Priority to CN201911199299.7A priority patent/CN110993592A/en
Priority to CN201911191474.8A priority patent/CN111312701A/en
Priority to CN201911196398.XA priority patent/CN110931473A/en
Priority to CN201911191187.7A priority patent/CN110828437A/en
Publication of CN110603639A publication Critical patent/CN110603639A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/13Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L33/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0756Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/0008Devices characterised by their operation having p-n or hi-lo junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50Wavelength conversion elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape

Abstract

A light emitting diode stack for a display comprising: a support substrate; a first LED stack, a second LED stack, and a third LED stack; a conductive growth substrate bonded to the second LED stack or the third LED stack; a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and third LED stacks while reflecting light generated from the third LED stack, wherein the light generated from the first LED stack is emitted to the outside through the second LED stack, the third LED stack, and the conductive growth substrate, and the light generated from the second LED stack is emitted to the outside through the third LED stack and the conductive growth substrate.

Description

Light emitting diode for display and display device having the same
Technical Field
Exemplary embodiments of the present disclosure relate to a light emitting diode for a next generation display and a display apparatus having the same.
Background
As an inorganic light source, a light emitting diode has been used in various fields including a display, an automobile lamp, general illumination, and the like. Light emitting diodes have replaced existing light sources in the prior art with various advantages such as long life, low power consumption, and fast response.
Typical light emitting diodes have been used as backlight light sources in display devices. Recently, however, a micro LED display configured to directly implement an image using a light emitting diode has been developed as a next generation display.
Generally, a display device implements various colors by mixing blue, green, and red light. In the display device, each pixel includes sub-pixels corresponding to blue, green, and red, respectively, to determine the color of a specific pixel based on the colors of the sub-pixels, so that an image can be realized by a combination of such pixels.
In the micro LED display, since the micro LEDs are arranged corresponding to the sub-pixels on a two-dimensional plane, a plurality of micro LEDs need to be arranged on a single substrate. However, the micro LED has a very small size of 200 μm or less, or a size of 100 μm or less, thereby causing various problems. In particular, it is difficult to mount the micro LEDs on the display panel due to difficulty in handling the micro LEDs, and it is difficult to replace defective micro LEDs among the micro LEDs on the display panel with new micro LEDs.
Further, since the sub-pixels are arranged in a two-dimensional plane in the display, one pixel including the blue sub-pixel, the green sub-pixel, and the red sub-pixel occupies a relatively large area. Therefore, it is necessary to reduce the area of each sub-pixel to arrange the sub-pixels in a limited area, thereby causing luminance degradation due to the reduction of the light emitting area.
On the other hand, blue, green and red are significantly different in visibility. In particular, the visibility with respect to green is much higher than that with respect to red. As a result, even when Light Emitting Diodes (LEDs) emit the same light radiation flux, a luminance difference occurs according to colors. In order to reduce the visibility-dependent luminance difference, the area of the LED emitting a color having low visibility may be increased. However, the increase in the area of the LED results in an increase in the area occupied by the sub-pixels.
Further, although the luminance difference can be reduced by adjusting the current density applied to each LED, reducing the luminance difference depending on the visibility by adjusting the current density makes the operation of the display complicated and difficult. Therefore, for a display device using micro LEDs, it is required to develop a technology for allowing the micro LEDs to emit light having similar brightness without significantly changing an area occupied by the micro LEDs in a two-dimensional plane or a current density applied to the micro LEDs.
The above information disclosed in this background section is only for background understanding of the inventive concept and, therefore, it may contain information that does not constitute prior art.
Disclosure of Invention
Technical problem
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that increases a light emitting area of each sub-pixel without increasing a pixel area, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that increases a light emitting area of each sub-pixel without increasing a pixel area, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode pixel for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that increases a light emitting area of each sub-pixel without increasing a pixel area, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that can adjust emission of light in consideration of visibility and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that increases a light emitting area of each sub-pixel without increasing a pixel area, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that can adjust emission of light in consideration of visibility and a display apparatus having the same.
Technical scheme
According to an exemplary embodiment of the present disclosure, a light emitting diode stack for a display includes: a support substrate; a first LED stack disposed on a support substrate; a second LED stack disposed on the first LED stack; a third LED stack disposed on the second LED stack; a conductive growth substrate bonded to the second LED stack or the third LED stack; a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and third LED stacks while reflecting light generated from the third LED stack, wherein the light generated from the first LED stack is emitted to the outside through the second LED stack, the third LED stack, and the conductive growth substrate, and the light generated from the second LED stack is emitted to the outside through the third LED stack and the conductive growth substrate.
According to another exemplary embodiment of the present disclosure, a display apparatus includes a plurality of pixels disposed on a support substrate, each pixel including: a first LED stack disposed on a support substrate; a second LED stack disposed on the first LED stack; a third LED stack disposed on the second LED stack; a conductive growth substrate bonded to the second LED stack or the third LED stack; a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and third LED stacks while reflecting light generated from the third LED stack, wherein the light generated from the first LED stack is emitted to the outside through the second LED stack, the third LED stack, and the conductive growth substrate, and the light generated from the second LED stack is emitted to the outside through the third LED stack and the conductive growth substrate.
According to an exemplary embodiment of the present disclosure, a light emitting diode stack for a display includes: a first LED stack including a first conductive type semiconductor layer and a second conductive type semiconductor layer; a second LED stack disposed on the first LED stack; a third LED stack disposed on the second LED stack; ohmic electrodes disposed at opposite sides of the second LED stack and forming ohmic contacts with the first conductive type semiconductor layer of the first LED stack; and a reflective electrode disposed at the opposite side of the second LED stack and forming an ohmic contact with the second conductive type semiconductor layer of the first LED stack, wherein light generated from the first LED stack is emitted to the outside through the second and third LED stacks, and light generated from the second LED stack is emitted to the outside through the third LED stack.
According to another exemplary embodiment of the present disclosure, a display apparatus includes a plurality of pixels disposed on a support substrate, each pixel including: a first LED stack disposed on a support substrate and including a first conductive type semiconductor layer and a second conductive type semiconductor layer; a second LED stack disposed on the first LED stack; a third LED stack disposed on the second LED stack; an ohmic electrode interposed between the substrate and the first conductive type semiconductor layer of the first LED stack, and forming ohmic contact with the first conductive type semiconductor layer of the first LED stack; and a reflective electrode interposed between the substrate and the second conductive type semiconductor layer of the first LED stack and forming an ohmic contact with the second conductive type semiconductor layer of the first LED stack, wherein light generated from the first LED stack is emitted to the outside through the second and third LED stacks, and light generated from the second LED stack is emitted to the outside through the third LED stack.
According to an exemplary embodiment of the present disclosure, a light emitting diode pixel for a display includes: a first LED stack; a second LED stack disposed in some areas on the first LED stack; a third LED stack disposed in some areas on the second LED stack; and a reflective electrode disposed at a lower side of the first LED stack, wherein each of the first to third LED stacks includes an n-type semiconductor layer and a p-type semiconductor layer, all of the n-type semiconductor layers of the first to third LED stacks are electrically connected to the reflective electrode, and the first, second, and third LED stacks may be independently driven.
According to another exemplary embodiment of the present disclosure, a display apparatus includes a plurality of pixels disposed on a support substrate, each pixel including: a first LED stack; a second LED stack disposed in some areas on the first LED stack; a third LED stack disposed in some areas on the second LED stack; and a reflective electrode disposed at a lower side of the first LED stack, wherein each of the first to third LED stacks includes an n-type semiconductor layer and a p-type semiconductor layer, all of the n-type semiconductor layers of the first to third LED stacks are electrically connected to the reflective electrode, and the first, second, and third LED stacks are independently driven.
According to an exemplary embodiment of the present disclosure, a light emitting diode stack for a display includes: a first-1 LED stack; a first-2 LED stack disposed on the first-1 LED stack; a second LED stack disposed on the first-2 LED stack; and a third LED stack disposed on the second LED stack, wherein the first-1 LED stack and the first-2 LED stack are adapted to emit red light, the second LED stack is adapted to emit green light, and the third LED stack is adapted to emit blue light.
According to another exemplary embodiment of the present disclosure, a display apparatus includes a plurality of pixels disposed on a support substrate, each pixel including: a first-1 LED stack disposed on a support substrate; a first-2 LED stack disposed on the first-1 LED stack; a second LED stack disposed on the first-2 LED stack; and a third LED stack disposed on the second LED stack, wherein the first-1 LED stack and the first-2 LED stack are adapted to emit red light, the second LED stack is adapted to emit green light, and the third LED stack is adapted to emit blue light.
According to still another exemplary embodiment of the present disclosure, a light emitting diode stack for a display includes: a first-1 LED stack; a first-2 LED stack disposed on the first-1 LED stack; a second LED stack disposed on the first-2 LED stack; and a third LED stack disposed on the second LED stack, wherein the first-1 LED stack and the first-2 LED stack include AlGaInP-based well layers, the second LED stack is adapted to emit light having a shorter wavelength than the first-1 LED stack and the first-2 LED stack, and the third LED stack is adapted to emit light having a shorter wavelength than the second LED stack.
According to an exemplary embodiment of the present disclosure, a light emitting diode stack for a display includes: a first LED stack; a second LED stack disposed on the first LED stack; and a third LED stack disposed on the second LED stack, wherein the first LED stack has a multi-junction LED stack structure.
According to another exemplary embodiment of the present disclosure, a display apparatus includes a plurality of pixels disposed on a support substrate, each pixel including: a first LED stack disposed on a support substrate; a second LED stack disposed on the first LED stack; and a third LED stack disposed on the second LED stack, wherein the first LED stack has a multi-junction LED stack structure.
According to an exemplary embodiment of the present disclosure, there is provided a light emitting diode stack for a display. The light emitting diode stack includes: a support substrate; a first LED stack disposed on a support substrate; a second LED stack disposed on the first LED stack; a third LED stack disposed on the second LED stack; a conductive growth substrate bonded to the second LED stack or the third LED stack; a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and third LED stacks while reflecting light generated from the third LED stack, wherein the light generated from the first LED stack is emitted to the outside through the second LED stack, the third LED stack, and the conductive growth substrate, and the light generated from the second LED stack is emitted to the outside through the third LED stack and the conductive growth substrate.
With the structure in which the first to third LED stacks are stacked one on another, the light emitting diode stack may increase the light emitting area of each sub-pixel without increasing the pixel area. Further, the light emitting diode stack emits light generated from the first LED stack to the outside through the second and third LED stacks and emits light generated from the second LED stack to the outside through the third LED stack, while preventing light generated from the second LED stack from entering the first LED stack and preventing light generated from the third LED stack from entering the second LED stack, using the first and second color filters, thereby improving light emitting efficiency.
In addition, the growth substrate for the second LED stack or the third LED stack may be left instead of removed, so that the manufacturing process can be simplified. However, it should be understood that the present disclosure is not limited thereto. In other exemplary embodiments, the growth substrate may be removed.
In particular, the light emitting diode stack may include conductive growth substrates bonded to the second and third LED stacks, respectively.
Meanwhile, the first, second, and third LED stacks may be sequentially disposed to emit light having gradually decreasing wavelengths in the stated order. For example, the first, second, and third LED stacks may emit red, green, and blue light, respectively. Since the first, second, and third LED stacks emit light having gradually decreasing wavelengths in the stated order, it is possible to prevent light interference between the LED stacks.
Each of the first color filter and the second color filter may be a low pass filter, a band pass filter, or a band stop filter. In particular, each of the first and second color filters may include an insulating layer having a different refractive index. With the structure in which the first color filter and the second color filter include the insulating layer, the light emitting diode stack may have stability in structure and may exhibit good light emitting efficiency. For example, each of the first color filter and the second color filter may be a band-stop filter including a distributed Bragg reflector (distributed Bragg reflector).
The conductive growth substrate may be a Si doped GaN based substrate. The GaN-based substrate used as a growth substrate may reduce the dislocation density of the second LED stack or the third LED stack grown thereon. The second or third LED stack can have a dislocation density of, for example, 103/cm2 to 107/cm 2. As a result, the light emitting efficiency of the second LED stack or the third LED stack may be improved.
The first, second, and third LED stacks may be sequentially stacked on the support substrate via the first, second, and third bonding layers. The first, second, and third bonding layers may be transparent inorganic insulating layers, transparent organic insulating layers, or transparent conductive layers.
In one exemplary embodiment, the light emitting diode stack for a display may further include:
a first bonding layer disposed between the support substrate and the first LED stack; a second bonding layer interposed between the first LED stack and the first color filter; and a third bonding layer interposed between the second LED stack and the second color filter; wherein the second bonding layer transmits light generated from the first LED stack, and the third bonding layer transmits light generated from the first and second LED stacks. With the first to third bonding layers, the first, second, and third LED stacks may be bonded to each other while emitting light to the outside through the second and third bonding layers, thereby preventing light loss.
The first to third LED stacks may be independently driven. For this, the light emitting diode stack may be provided with electrodes having various structures.
In one exemplary embodiment, the light emitting diode stack for a display may further include: a first p-reflective electrode disposed between the first bonding layer and the first LED stack and forming an ohmic contact with the p-type semiconductor layer of the first LED stack; a second p-transparent electrode interposed between the first color filter and the second LED stack and forming an ohmic contact with the p-type semiconductor layer of the second LED stack; and a third p transparent electrode interposed between the second color filter and the third LED stack and forming an ohmic contact with the p-type semiconductor layer of the third LED stack, wherein light generated from the first LED stack is emitted to the outside through the second p transparent electrode and the third p transparent electrode, and light generated from the second LED stack is emitted to the outside through the third p transparent electrode. The first p-reflective electrode, the second p-transparent electrode, and the third p-transparent electrode may contribute to current spreading in the light emitting diode stack. In addition, the first p-reflective electrode may reflect light generated from the first LED stack to emit it to the outside, thereby improving light emitting efficiency, and the second and third p-transparent electrodes transmit light generated from the LED stack, thereby preventing light loss.
The second bonding layer may be adjacent to the n-type semiconductor layer of the first LED stack, and the third bonding layer may be adjacent to the conductive growth substrate bonded to the second LED stack.
In other exemplary embodiments, the light emitting diode stack for a display may further include: a first bonding layer disposed between the support substrate and the first LED stack; a second bonding layer interposed between the first color filter and the second LED stack; and a third bonding layer interposed between the second LED stack and the second color filter; wherein the second bonding layer and the third bonding layer transmit light generated from the first LED stack and the second LED stack.
In addition, the light emitting diode stack for a display may further include: a first n-reflective electrode disposed between the first bonding layer and the first LED stack and forming an ohmic contact with the n-type semiconductor layer of the first LED stack; a first p-transparent electrode interposed between the first LED stack and the first color filter and forming an ohmic contact with the p-type semiconductor layer of the first LED stack; a second p-transparent electrode disposed between the second LED stack and the third bonding layer and forming an ohmic contact with the p-type semiconductor layer of the second LED stack; and a third p transparent electrode interposed between the second color filter and the third LED stack and forming an ohmic contact with the p-type semiconductor layer of the third LED stack, wherein light generated from the first LED stack is emitted to the outside through the first, second, and third p transparent electrodes, and light generated from the second LED stack is emitted to the outside through the second and third p transparent electrodes.
According to another exemplary embodiment of the present disclosure, a display apparatus is provided. The display device includes a plurality of pixels disposed on a support substrate, each pixel including: a first LED stack disposed on a support substrate; a second LED stack disposed on the first LED stack; a third LED stack disposed on the second LED stack; a conductive growth substrate bonded to the second LED stack or the third LED stack; a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and third LED stacks while reflecting light generated from the third LED stack, wherein the light generated from the first LED stack is emitted to the outside through the second LED stack, the third LED stack, and the conductive growth substrate, and the light generated from the second LED stack is emitted to the outside through the third LED stack and the conductive growth substrate.
In addition, the display device may include a conductive growth substrate bonded to the second and third LED stacks, respectively.
Each of the first color filter and the second color filter may be a low pass filter, a band pass filter, or a band stop filter.
The conductive growth substrate may be a Si doped GaN based substrate.
In each pixel, the p-type semiconductor layer of the first, second, and third LED stacks may be electrically connected to a common line, and the n-type semiconductor layer of the first, second, and third LED stacks may be electrically connected to different lines. For example, the common line may be a data line, and the different line may be a scan line.
The display device may further include: and a lower insulating layer covering side surfaces of the first, second, and third LED stacks, wherein the lower insulating layer may include an opening for electrical connection.
The lower insulating layer may include distributed bragg reflectors that reflect red, green, and blue light.
In one exemplary embodiment, the display apparatus may further include a reflective electrode interposed between the support substrate and the first LED stack. The reflective electrode may be continuously disposed throughout the plurality of pixels to serve as a common line.
In another exemplary embodiment, the display apparatus may further include a reflective electrode interposed between the support substrate and the first LED stack. Each reflective electrode may be restrictively positioned in each pixel region.
The display device may further include: a first bonding layer disposed between the support substrate and the first LED stack; a second bonding layer disposed between the first LED stack and the second LED stack; and a third bonding layer interposed between the second LED stack and the second color filter, wherein the second bonding layer transmits light generated from the first LED stack, and the third bonding layer transmits light generated from the first and second LED stacks.
The first, second, and third bonding layers may be transparent inorganic insulating layers, transparent organic insulating layers, or transparent conductive layers.
In each pixel, the first to third LED stacks may be independently driven.
The present disclosure provides a light emitting stack structure having a simple structure and capable of being simply manufactured.
The present disclosure provides a display device having a light emitting stack structure.
Embodiments of the inventive concept may provide a light emitting stack structure including a plurality of epitaxial stacks sequentially stacked one on another and emitting color light having wavelength bands different from each other. Each of the epitaxial stacks may emit a corresponding one of the color lights in an upward direction, and an epitaxial stack disposed at a lowermost end among the epitaxial stacks includes a concave-convex portion disposed on an upper surface thereof.
Each epitaxial stack may be driven independently.
The color lights respectively emitted from the epitaxial stacks may have energy bands different from each other, and the energy bands of the color lights emitted from the epitaxial stacks become higher and higher from an epitaxial stack disposed at a lowermost end among the epitaxial stacks to an epitaxial stack disposed at an uppermost end among the epitaxial stacks.
Color light emitted from a lower epitaxial stack of two epitaxial stacks disposed adjacent to each other among the epitaxial stacks may travel through an upper epitaxial stack of the two epitaxial stacks. The epitaxial stack may transmit about 80% or more of the color light from the epitaxial stack disposed therebelow.
The epitaxial stack may include: a first epitaxial stack disposed on a substrate to emit a first color light; a second epitaxial stack disposed on the first epitaxial stack to emit a second color light having a wavelength band different from that of the first color light; and a third epitaxial stack disposed on the second epitaxial stack to emit a third color light having a wavelength band different from that of the first and second color lights.
The first, second, and third color lights may be red, green, and blue lights, respectively.
The light emitting stack structure may further include a first wave-pass filter disposed between the first epitaxial stack and the second epitaxial stack.
The light emitting stack structure may further include a second wave-pass filter disposed between the second epitaxial stack and the third epitaxial stack.
Each of the first, second, and third epitaxial stacks may include a p-type semiconductor layer disposed on a substrate, an active layer disposed on the p-type semiconductor layer, and an n-type semiconductor layer disposed on the active layer.
The n-type semiconductor layer of at least one of the second epitaxial stack and the third epitaxial stack may include a concave-convex portion disposed thereon.
The light emitting stack structure may further include first, second, and third p-type electrodes connected to the p-type semiconductor layer of the first, second, and third epitaxial stacks, respectively.
The first p-type electrode may be disposed between the substrate and the first epitaxial stack.
A second p-type electrode may be disposed between the first epitaxial stack and the second epitaxial stack. The second p-type electrode may include a transparent conductive material.
A third p-type electrode may be disposed between the second epitaxial stack and the third epitaxial stack. The third p-type electrode may include a transparent conductive material.
The first, second, and third p-type electrodes may substantially cover the first, second, and third epitaxial stacks, respectively.
The light emitting stack structure may further include an insulating layer covering the third epitaxial stack and including first and second contact holes, the first contact hole being defined through the insulating layer to expose upper surfaces of the second and third p-type electrodes, and the second contact hole being defined through the insulating layer to expose upper surfaces of the second and third n-type semiconductor layers.
The first contact hole and the second contact hole may be defined in the peripheral region.
The light emitting stack structure may further include a data line to apply a common voltage to the first p-type electrode of the first epitaxial stack, the second p-type electrode of the second epitaxial stack, and the third p-type electrode of the third epitaxial stack. The data line is connected to the first p-type electrode between the substrate and the first epitaxial stack through the first contact hole, and connected to the second p-type electrode and the third p-type electrode through the first contact hole.
The light emitting stack structure may further include first, second, and third signal lines applying signals to the first, second, and third n-type semiconductor layers of the first, second, and third epitaxial stacks, respectively. The first signal line may be connected to the first n-type semiconductor layer between the substrate and the first epitaxial stack, the second signal line may be connected to the second n-type semiconductor layer through the second contact hole, and the third signal line may be connected to the third n-type semiconductor layer through the second contact hole.
Embodiments of the inventive concept may provide a display apparatus to which a light emitting stack structure is applied. The display device includes a plurality of pixels. Each pixel includes a plurality of epitaxial stacks that are sequentially stacked one on another and emit color light having wavelength bands different from each other. Each of the epitaxial stacks emits corresponding color light among the color lights in an upward direction, light emitting regions of the epitaxial stacks overlap each other, and an epitaxial stack disposed at a lowermost end among the epitaxial stacks may include a concave-convex portion disposed on an upper surface thereof.
The display device may further include a wiring portion electrically connected to the pixels to apply a light emitting signal to the pixels.
The line part may include a plurality of data lines extending in a first direction and connecting the first semiconductor layers of the first, second, and third epitaxial stacks, and a plurality of signal lines extending in a second direction crossing the first direction and respectively connected to the second semiconductor layers of the first, second, and third epitaxial stacks.
The display device may be driven in a passive matrix manner or an active matrix manner.
According to the above, the light emitting stack structure may have a simple structure and may be simply manufactured. In addition, the display device may include a light emitting stack structure.
The present disclosure provides a light emitting stack structure having a simple structure and capable of being simply manufactured.
Embodiments of the inventive concept may provide a light emitting stack structure including: a first epitaxial stack emitting a first color light; a second epitaxial stack disposed on the first epitaxial stack to emit a second color light different from the first color light; and an electrode portion disposed on the second epitaxial stack and electrically connected to the first epitaxial stack and the second epitaxial stack. The light emitting region of the first epitaxial stack may overlap the light emitting region of the second epitaxial stack, and the first epitaxial stack may emit the first color light in a downward direction and the second epitaxial stack may emit the second color light in the downward direction.
The first color light may have a wavelength shorter than a wavelength of the second color light.
The first color light may be blue light and the second color light may be red light.
The first epitaxial stack and the second epitaxial stack may be driven independently of each other.
At least one of the first epitaxial stack and the second epitaxial stack may include a concave-convex portion disposed on a lower surface thereof.
The light emitting stack structure may further include an adhesive layer disposed between the first epitaxial stack and the second epitaxial stack.
The light emitting stack structure may further include a long pass filter disposed between the first epitaxial stack and the adhesion layer.
The first epitaxial stack may include an n-type semiconductor layer, an active layer disposed on the n-type semiconductor layer, a p-type semiconductor layer disposed on the active layer, and a first p-type contact electrode disposed on the p-type semiconductor layer.
The first p-type contact electrode may include a transparent conductive material.
The light emitting stack structure may further include a peripheral region disposed adjacent to the light emitting region when viewed in a plan view, and the first p-type contact electrode may be disposed to overlap the light emitting region.
The second epitaxial stack may include: a second n-type semiconductor layer; an active layer of a second epitaxial stack disposed on the second n-type semiconductor layer; a p-type semiconductor layer of a second epitaxial stack disposed on the active layer of the second epitaxial stack; a second n-type contact electrode disposed on the second n-type semiconductor layer; and a second p-type contact electrode disposed on the p-type semiconductor layer of the second epitaxial stack.
The second p-type contact electrode may include a reflective material.
The electrode part may include: a common electrode connected to the first p-type contact electrode and the second p-type contact electrode; a first signal electrode connected to the n-type semiconductor layer of the first epitaxial stack; and a second signal electrode connected to the second n-type semiconductor layer.
The first contact hole may be defined through the second epitaxial stack, the active layer of the first epitaxial stack, and the p-type semiconductor layer of the first epitaxial stack to expose an upper surface of the n-type semiconductor layer of the first epitaxial stack, and the first signal electrode may be connected to the n-type semiconductor layer of the first epitaxial stack through the first contact hole.
A third contact hole may be defined through the second epitaxial stack to expose an upper surface of the first p-type contact electrode, and the common electrode may be connected to the first p-type contact electrode through the third contact hole.
The light emitting stack structure may further include a first insulating layer covering the second epitaxial stack, a second contact hole may be defined through the first insulating layer to expose an upper surface of the second n-type contact electrode, and the second signal electrode may be connected to the second n-type contact electrode through the second contact hole.
The light emitting stack structure may further include a second insulating layer disposed on the first insulating layer, a fourth contact hole may be defined through the second insulating layer to expose an upper surface of the second p-type contact electrode, and the common electrode may be connected to the second p-type contact electrode through the fourth contact hole.
At least one of the n-type semiconductor layer and the second n-type semiconductor layer of the first epitaxial stack may include a concave-convex portion disposed on a lower surface thereof.
The light emitting stack structure may further include a substrate disposed on a lower surface of the first epitaxial stack.
The light emitting stack structure may further include a light conversion layer disposed on a lower surface of the first epitaxial stack.
Embodiments of the inventive concept may provide a lighting device including a printed circuit board and the above light emitting stack structure mounted on the printed circuit board.
According to an exemplary embodiment of the present disclosure, there is provided a light emitting diode stack for a display. The light emitting diode stack includes: a first LED stack including a first conductive type semiconductor layer and a second conductive type semiconductor layer; a second LED stack disposed on the first LED stack; a third LED stack disposed on the second LED stack; ohmic electrodes disposed at opposite sides of the second LED stack and forming ohmic contacts with the first conductive type semiconductor layer of the first LED stack; and a reflective electrode disposed at an opposite side of the second LED stack and forming an ohmic contact with the second conductive type semiconductor layer of the first LED stack, wherein light generated from the first LED stack is emitted to the outside through the second and third LED stacks, and light generated from the second LED stack is emitted to the outside through the third LED stack.
With the structure in which the first to third LED stacks are stacked one on another, the light emitting diode stack may increase the light emitting area of each sub-pixel without increasing the pixel area. Light generated from the first LED stack may be emitted to the outside through the second LED stack and the third LED stack, and light generated from the second LED stack may be emitted to the outside through the third LED stack, thereby improving light emitting efficiency.
The first LED stack may emit light having a longer wavelength relative to the second LED stack and the third LED stack, and the second LED stack may emit light having a longer wavelength relative to the third LED stack. For example, the first, second, and third LED stacks may emit red, green, and blue light, respectively. Since the first, second, and third LED stacks emit light having gradually decreasing wavelengths in the stated order, it is possible to prevent light interference between the LED stacks.
The light emitting diode stack for a display may further include: a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and second LED stacks while reflecting light generated from the third LED stack. With the first and second color filters, the light emitting diode stack may prevent light generated from the second LED stack from entering the first LED stack and prevent light generated from the third LED stack from entering the second LED stack, thereby further improving light emitting efficiency.
Each of the first color filter and the second color filter may be a low pass filter, a band pass filter, or a band stop filter. In particular, each of the first and second color filters may include an insulating layer having a different refractive index. With the structure in which the first color filter and the second color filter include the insulating layer, the light emitting diode stack may have stability in structure and may exhibit good light emitting efficiency.
The light emitting diode stack for a display may further include: and an interconnection line disposed under the first LED stack to be insulated from the reflective electrode and connected to the ohmic electrode. The interconnection line may be electrically connected to the first conductive type semiconductor layer of the first LED stack to function as a scan line or a data line in the display device.
The light emitting diode stack for a display may further include: and an insulating layer interposed between the reflective electrode and the interconnection line to insulate the interconnection line from the reflective electrode.
The light emitting diode stack for a display may further include: a support substrate; a first bonding layer disposed between the support substrate and the first LED stack; a second bonding layer disposed between the first LED stack and the second LED stack; and a third bonding layer interposed between the second LED stack and the third LED stack, wherein the second bonding layer transmits light generated from the first LED stack, and the third bonding layer transmits light generated from the first LED stack and the second LED stack.
The first bonding layer may be adjacent to the interconnect line.
The light emitting diode stack for a display may further include: a second p-transparent electrode forming an ohmic contact with the p-type semiconductor layer of the second LED stack; and a third p-transparent electrode forming an ohmic contact with the p-type semiconductor layer of the third LED stack. The light emitting diode stack may implement current diffusion through the second and third p transparent electrodes, which allow light generated from the corresponding LED stack to pass therethrough, thereby preventing light loss.
In one exemplary embodiment, the light emitting diode stack for a display may further include: a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and second LED stacks while reflecting light generated from the third LED stack, wherein the first color filter may be disposed on the second bonding layer, and the second color filter may be disposed on the third bonding layer.
According to another exemplary embodiment of the present disclosure, a display apparatus is provided. The display device includes: a plurality of pixels disposed on the support substrate, each pixel including: a first LED stack disposed on a support substrate and including a first conductive type semiconductor layer and a second conductive type semiconductor layer; a second LED stack disposed on the first LED stack; a third LED stack disposed on the second LED stack; an ohmic electrode interposed between the substrate and the first conductive type semiconductor layer of the first LED stack and forming an ohmic contact with the first conductive type semiconductor layer of the first LED stack; and a reflective electrode interposed between the substrate and the second conductive type semiconductor layer of the first LED stack and forming an ohmic contact with the second conductive type semiconductor layer of the first LED stack, wherein light generated from the first LED stack is emitted to the outside through the second and third LED stacks, and light generated from the second LED stack is emitted to the outside through the third LED stack.
The first LED stack may emit light having a longer wavelength relative to the second LED stack and the third LED stack, and the second LED stack may emit light having a longer wavelength relative to the third LED stack.
The display device may further include: and an interconnection line interposed between the support substrate and the first LED stack to be insulated from the reflective electrode and connected to the ohmic electrode.
The display device may further include: and an insulating layer interposed between the reflective electrode and the interconnection line to insulate the interconnection line from the reflective electrode.
The display device may further include: a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and second LED stacks while reflecting light generated from the third LED stack.
Each of the first color filter and the second color filter may be a low pass filter, a band pass filter, or a band stop filter.
In each pixel, the p-type semiconductor layer of the first LED stack, the p-type semiconductor layer of the second LED stack, and the p-type semiconductor layer of the third LED stack may be electrically connected to a common line, and the n-type semiconductor layer of the first LED stack, the n-type semiconductor layer of the second LED stack, and the n-type semiconductor layer of the third LED stack may be electrically connected to different lines. The interconnection line may be a line connected to the n-type semiconductor layer of the first LED stack.
The common line may be a data line, and the different line may be a scan line. Alternatively, the n-type semiconductor layer of the first LED stack, the n-type semiconductor layer of the second LED stack, and the n-type semiconductor layer of the third LED stack may be electrically connected to a common line, and the p-type semiconductor layer of the first LED stack, the p-type semiconductor layer of the second LED stack, and the p-type semiconductor layer of the third LED stack may be electrically connected to different lines.
The reflective electrode may be continuously disposed throughout the plurality of pixels to serve as a common line.
The display device may further include: and a lower insulating layer covering side surfaces of the first, second, and third LED stacks, wherein the lower insulating layer may include an opening exposing the reflective electrode, the second, and third LED stacks.
The lower insulating layer may include distributed bragg reflectors that reflect red, green, and blue light.
According to an exemplary embodiment of the present disclosure, a light emitting diode pixel for a display includes: a first LED stack; a second LED stack disposed in some areas on the first LED stack; a third LED stack disposed in some areas on the second LED stack; and a reflective electrode disposed at a lower side of the first LED stack, wherein each of the first to third LED stacks includes an n-type semiconductor layer and a p-type semiconductor layer, all of the n-type semiconductor layers of the first to third LED stacks are electrically connected to the reflective electrode, and the first, second, and third LED stacks are independently driven.
With the structure in which the first to third LED stacks may be disposed to overlap each other, the first to third LED stacks may be fabricated at a wafer level by wafer bonding, thereby eliminating the need to separately mount the first to third LED stacks.
In addition, since the second LED stack is disposed in some regions on the first LED stack and the third LED stack is disposed in some regions on the second LED stack, the light emitting diode pixel may reduce light loss caused by light emitted from the first and second LED stacks being absorbed by the second or third LED stack.
In addition, since the n-type semiconductor layers of the first to third LED stacks are electrically connected to the reflective electrode, it is possible to provide a pixel in which the cathodes of the first to third LED stacks are electrically connected to the common line.
The first to third LED stacks emit light having different wavelengths, respectively. In some exemplary embodiments, the first LED stack may emit light having a longer wavelength relative to the second and third LED stacks, and the second LED stack may emit light having a longer wavelength relative to the third LED stack. For example, the first, second, and third LED stacks may emit red, green, and blue light, respectively.
The p-type semiconductor layers of the first to third LED stacks may be disposed on the n-type semiconductor layers of the first to third LED stacks, respectively, and the reflective electrode may form an ohmic contact with the n-type semiconductor layers of the first LED stack.
The light emitting diode pixel may further include: a first color filter interposed between the first and second LED stacks; and a second color filter interposed between the second and third LED stacks. The first color filter may transmit light generated from the first LED stack while reflecting light generated from the second LED stack, and the second color filter may transmit light generated from the second LED stack while reflecting light generated from the third LED stack.
The first color filter may be adjacent to the n-type semiconductor layer of the second LED stack, and the second color filter may be adjacent to the n-type semiconductor layer of the third LED stack.
The light emitting diode pixel may further include: a second bonding layer interposed between the first LED stack and the first color filter; and a third bonding layer interposed between the second LED stack and the second color filter. The second bonding layer may transmit light generated from the first LED stack, and the third bonding layer may transmit light generated from the second LED stack.
The light emitting diode pixel may further include: a first-2 ohmic electrode in contact with the p-type semiconductor layer of the first LED stack; a second-1 ohmic electrode in contact with the n-type semiconductor layer of the second LED stack; a second-2 ohmic electrode in contact with the p-type semiconductor layer of the second LED stack; a third-1 ohmic electrode in contact with the n-type semiconductor layer of the third LED stack; and a third-2 ohmic electrode in contact with the p-type semiconductor layer of the third LED stack. In addition, the first-2 ohmic electrode may be in contact with the n-type semiconductor layer of the first LED stack and located outside some regions of the first LED stack, and the second-1 ohmic electrode and the second-2 ohmic electrode may be in contact with the n-type semiconductor layer and the p-type semiconductor layer of the second LED stack, respectively, and located outside some regions of the second LED stack.
In addition, the third-1 ohmic electrode may be in contact with and located on the n-type semiconductor layer of the third LED stack, and the third-2 ohmic electrode may be in contact with and located on the p-type semiconductor layer of the third LED stack.
The light emitting diode pixel may further include connection parts that electrically connect the second-1 ohmic electrode and the third-1 ohmic electrode to the reflective electrode, respectively. Accordingly, the n-type semiconductor layer of the second LED stack and the p-type semiconductor layer of the third LED stack are electrically connected to the reflective electrode through the ohmic electrode and the connection portion.
Meanwhile, the areas of the regions of the first LED stack other than some regions of the first LED stack, the areas of the regions of the second LED stack other than some regions of the second LED stack, and the areas of the regions of the third LED stack may be different from each other. Since the first to third LED stacks emit light having different visibility, the light emission intensity of light having lower visibility can be increased to above the light emission intensity of light having higher visibility by adjusting the areas of the first to third LED stacks.
According to another exemplary embodiment of the present disclosure, a display apparatus is provided. The display device includes a plurality of pixels disposed on a support substrate, each pixel including: a first LED stack; a second LED stack disposed in some areas on the first LED stack; a third LED stack disposed in some areas on the second LED stack; and a reflective electrode disposed at a lower side of the first LED stack, wherein each of the first to third LED stacks includes an n-type semiconductor layer and a p-type semiconductor layer, all of the n-type semiconductor layers of the first to third LED stacks are electrically connected to the reflective electrode, and the first, second, and third LED stacks may be independently driven.
The first, second, and third LED stacks may emit light having different wavelengths, respectively.
The n-type semiconductor layer of the first LED stack, the n-type semiconductor layer of the second LED stack, and the n-type semiconductor layer of the third LED stack may be electrically connected to a common line, and the p-type semiconductor layer of the first LED stack, the p-type semiconductor layer of the second LED stack, and the p-type semiconductor layer of the third LED stack may be electrically connected to different lines. Thus, the first, second, and third LED stacks may be independently driven.
On the other hand, the p-type semiconductor layers of the first to third LED stacks may be disposed on the n-type semiconductor layers of the first to third LED stacks, respectively, and the reflective electrode may form an ohmic contact with the n-type semiconductor layers of the first LED stack.
Each pixel may further include: a first color filter interposed between the first and second LED stacks; and a second color filter interposed between the second LED stack and the third LED stack, wherein the first color filter transmits light generated from the first LED stack while reflecting light generated from the second LED stack, and the second color filter transmits light generated from the second LED stack while reflecting light generated from the third LED stack.
Each pixel may further include: a first bonding layer interposed between the support substrate and the reflective electrode; a second bonding layer interposed between the first LED stack and the first color filter; and a third bonding layer interposed between the second LED stack and the second color filter.
Each pixel may further include: a first-2 ohmic electrode in contact with the p-type semiconductor layer of the first LED stack; a second-1 ohmic electrode in contact with the n-type semiconductor layer of the second LED stack; a second-2 ohmic electrode in contact with the p-type semiconductor layer of the second LED stack; a third-1 ohmic electrode in contact with the n-type semiconductor layer of the third LED stack; and a third-2 ohmic electrode in contact with the p-type semiconductor layer of the third LED stack. In addition, the first-2 ohmic electrode may be in contact with the p-type semiconductor layer of the first LED stack and located outside some regions of the first LED stack, and the second-1 ohmic electrode and the second-2 ohmic electrode may be in contact with the n-type semiconductor layer and the p-type semiconductor layer of the second LED stack, respectively, and located outside some regions of the second LED stack.
Further, the third-1 ohmic electrode may be in contact with and on the n-type semiconductor layer of the third LED stack, and the third-2 ohmic electrode may be in contact with and on the p-type semiconductor layer of the third LED stack.
Each pixel may further include: and a connection part electrically connecting the second-1 ohmic electrode and the third-1 ohmic electrode to the reflective electrode, respectively.
Meanwhile, the areas of the regions of the first LED stack other than some regions of the first LED stack, the areas of the regions of the second LED stack other than some regions of the second LED stack, and the areas of the regions of the third LED stack may be different from each other. For example, the area of the region of the first LED stack other than some regions of the first LED stack may be larger than the area of the region of the second LED stack other than some regions of the second LED stack and the area of the third LED stack region may be different from each other.
According to an exemplary embodiment of the present disclosure, a light emitting diode stack for a display includes: a support substrate; a first-1 LED stack disposed on a support substrate; a first-2 LED stack disposed on the first-1 LED stack; a second LED stack disposed on the first-2 LED stack; and a third LED stack disposed on the second LED stack, wherein the first-1 LED stack and the first-2 LED stack are adapted to emit red light, the second LED stack is adapted to emit green light, and the third LED stack is adapted to emit blue light.
With the structure in which the first to third LED stacks are stacked one on another, the light emitting diode stack may increase the light emitting area of each sub-pixel without increasing the pixel area. Further, with the structure in which the first-1 LED stack is disposed to overlap the first-2 LED stack, the light emitting diode stack may improve the luminance of red light without increasing the area occupied by the light emitting diode stack in the two-dimensional plane.
In one exemplary embodiment, the light emitting diode stack may further include: a first-1 upper ohmic contact layer forming an ohmic contact with an upper surface of the first-1 LED stack; and a first-2 lower ohmic contact layer forming an ohmic contact with a lower surface of the first-2 LED stack. The first-1 upper ohmic contact layer and the first-2 lower ohmic contact layer may be electrically connected to each other.
The light emitting diode stack may further include: a first-1 lower ohmic contact layer forming an ohmic contact with a lower surface of the first-1 LED stack; and a first-2 upper ohmic contact layer forming an ohmic contact with an upper surface of the first-2 LED stack, wherein the first-1 LED stack and the first-2 LED stack may be connected in series with each other between the first-1 lower ohmic contact layer and the first-2 upper ohmic contact layer.
The first-1 lower ohmic contact layer may include a reflective layer reflecting light generated from the first-1 LED stack. As a result, the light emitting efficiency of the first-1 LED stack may be improved.
The light emitting diode stack may further include a second bonding layer interposed between the first-1 LED stack and the first-2 LED stack. The second bonding layer may be a transparent conductive layer. The first-1 LED stack and the first-2 LED stack may be easily electrically connected to each other by using the transparent conductive layer as a bonding layer.
In some exemplary embodiments, the light emitting diode stack may further include: a first-1 upper ohmic contact layer forming an ohmic contact with an upper surface of the first-1 LED stack; a first-2 lower ohmic contact layer forming an ohmic contact with a lower surface of the first-2 LED stack; and a second bonding layer interposed between the first-1 LED stack and the first-2 LED stack, wherein the first-1 upper ohmic contact layer may be insulated from the first-2 lower ohmic contact layer by the second bonding layer. Here, the second bonding layer may be formed of an insulating material.
The light emitting diode stack may further include: a first-1 lower ohmic contact layer forming an ohmic contact with a lower surface of the first-1 LED stack; and a first-2 upper ohmic contact layer forming an ohmic contact with an upper surface of the first-2 LED stack, wherein the first-1 lower ohmic contact layer may be electrically connected to the first-2 lower ohmic contact layer, and the first-2 upper ohmic contact layer may be electrically connected to the first-1 upper ohmic contact layer. Thus, a first-1 LED stack can be connected in parallel with a first-2 LED stack.
The light emitting diode stack may further include: a first color filter disposed between the first-2 LED stack and the second LED stack, and transmitting light generated from the first-1 LED stack and the first-2 LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second LED stack and the third LED stack, and transmitting light generated from the first-1 LED stack, the first-2 LED stack, and the second LED stack while reflecting light generated from the third LED stack.
Light generated from the first-1 and first-2 LED stacks may be emitted to the outside through the second and third LED stacks, and light generated from the second LED stack may be emitted to the outside through the third LED stack.
With the first and second color filters, the light emitting diode stack may prevent light generated from the second LED stack from entering the first-2 LED stack, and may prevent light generated from the third LED stack from entering the second LED stack, thereby reducing light loss.
In other exemplary embodiments, a second LED stack may be disposed in some areas on the first-2 LED stack, and a third LED stack may be disposed in some areas on the second LED stack. Accordingly, some light generated from the first-1 and first-2 LED stacks may be emitted to the outside without passing through the second LED stack, and some light generated from the second LED stack may also be emitted to the outside without passing through the third LED stack.
The light emitting diode stack may further include: a support substrate disposed at a lower side of the first-1 LED stack; a first bonding layer disposed between the support substrate and the first-1 LED stack; a third bonding layer interposed between the first-2 LED stack and the first color filter; and a fourth bonding layer interposed between the second LED stack and the second color filter, wherein the third bonding layer transmits light generated from the first-1 LED stack and the first-2 LED stack, and the fourth bonding layer transmits light generated from the first-1 LED stack, the first-2 LED stack, and the second LED stack.
The light emitting diode stack may further include: a second transparent electrode disposed between the first color filter and the second LED stack and forming an ohmic contact with the second LED stack; and a third transparent electrode interposed between the second color filter and the third LED stack and forming an ohmic contact with the third LED stack.
The second and third transparent electrodes may facilitate current spreading in the second and third LED stacks.
According to another exemplary embodiment of the present disclosure, a display apparatus includes: a plurality of pixels disposed on the support substrate, each pixel including: a first-1 LED stack disposed on a support substrate; a first-2 LED stack disposed on the first-1 LED stack; a second LED stack disposed on the first-2 LED stack; and a third LED stack disposed on the second LED stack, wherein the first-1 LED stack and the first-2 LED stack are adapted to emit red light, the second LED stack is adapted to emit green light, and the third LED stack is adapted to emit blue light.
Using the first-1 LED stack and the first-2 LED stack, which are stacked on each other, each pixel may be adapted to emit red light, thereby increasing the brightness of red light within each pixel without increasing the area of the sub-pixels.
In one exemplary embodiment, the first-1 LED stack and the first-2 LED stack may be connected in series with each other. In addition, in each pixel, the p-type semiconductor layer of the first-1 LED stack, the p-type semiconductor layer of the second LED stack, and the p-type semiconductor layer of the third LED stack may be electrically connected to a common line, and the n-type semiconductor layer of the first-2 LED stack, the n-type semiconductor layer of the second LED stack, and the n-type semiconductor layer of the third LED stack may be electrically connected to different lines.
In another exemplary embodiment, the first-1 LED stack and the first-2 LED stack may be connected in parallel with each other. In addition, in each pixel, the p-type semiconductor layer of the first-1 LED stack, the p-type semiconductor layer of the first-2 LED stack, and the p-type semiconductor layer of the third LED stack may be electrically connected to a common line, the n-type semiconductor layer of the first-1 LED stack, the n-type semiconductor layer of the second LED stack, and the n-type semiconductor layer of the third LED stack may be electrically connected to different lines, and the n-type semiconductor layer of the first-2 LED stack may be electrically connected to the n-type semiconductor layer of the first-1 LED stack.
The display device may further include: and a lower insulating layer covering side surfaces of the first-1 and first-2, second and third stacks, wherein the lower insulating layer may include an opening exposing at least a portion of the first-2, second and third LED stacks.
The display device may further include a reflective electrode interposed between the support substrate and the first-1 LED stack. The reflective electrode may be continuously disposed throughout the plurality of pixels.
The display device may further include: a first color filter disposed between the first-2 LED stack and the second LED stack, and transmitting light generated from the first-1 LED stack and the first-2 LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second LED stack and the third LED stack, and transmitting light generated from the first-1 LED stack, the first-2 LED stack, and the second LED stack while reflecting light generated from the third LED stack.
Light generated from the first-1 and first-2 LED stacks may be emitted to the outside through the second and third LED stacks, and light generated from the second LED stack may be emitted to the outside through the third LED stack.
In other exemplary embodiments, a second LED stack may be disposed in some areas on the first-2 LED stack, and a third LED stack may be disposed in some areas on the second LED stack. Accordingly, some light generated from the first-1 and first-2 LED stacks may be emitted to the outside without passing through the second LED stack, and some light generated from the second LED stack may also be emitted to the outside without passing through the third LED stack.
In each pixel, the second and third LED stacks may be driven independently of the first-1 and first-2 LED stacks, and the first-1 and first-2 LED stacks may be driven together.
According to an exemplary embodiment of the present disclosure, there is provided a light emitting diode stack for a display. The light emitting diode stack includes: a first LED stack; a second LED stack disposed on the first LED stack; and a third LED stack disposed on the second LED stack, wherein the first LED stack has a multi-junction LED stack structure.
With the structure in which the first to third LED stacks are stacked one on another, the light emitting diode stack can increase the light emitting area of each sub-pixel without increasing the pixel area. In addition, by employing the first LED stack having the multi-junction LED stack structure, the light emitting diode stack may improve the luminance of the first LED stack without increasing the light emitting area and the current density.
Here, the term "LED stack" denotes a stack of semiconductor layers capable of emitting light. Further, a multi-junction LED stack structure represents an LED stack formed by a tunnel junction of at least two LED stacks.
The first LED stack may include: a first-1 LED stack; a first-2 LED stack; and a tunnel junction layer interposed between the first-1 LED stack and the first-2 LED stack, and each of the first-1 LED stack and the first-2 LED stack includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer.
The first LED stack may include AlGaInP-based semiconductor layers.
The first LED stack may emit red light having a longer wavelength than the second LED stack and the third LED stack, and the second LED stack may emit red light having a longer wavelength than the third LED stack. The first-1 LED stack may emit light having the same wavelength or a similar wavelength as compared to the first-2 LED stack. For example, the first, second, and third LED stacks may emit red, green, and blue light, respectively.
In addition, light generated from the first LED stack may be emitted to the outside through the second LED stack and the third LED stack, and light generated from the second LED stack may be emitted to the outside through the third LED stack.
In other exemplary embodiments, the second LED stack may be disposed in some areas on the first LED stack, and the third LED stack may also be disposed in some areas on the second LED stack. Accordingly, at least a portion of light generated from the first LED stack may be emitted to the outside without passing through the second LED stack, and at least a portion of light generated from the second LED stack may be emitted to the outside without passing through the third LED stack.
The light emitting diode stack may further include: a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and second LED stacks while reflecting light generated from the third LED stack.
The light emitting diode stack emits light generated from the first LED stack to the outside through the second and third LED stacks and emits light generated from the second LED stack to the outside through the third LED stack, while preventing light generated from the second LED stack from entering the first LED stack and preventing light generated from the third LED stack from entering the second LED stack, using the first and second color filters, thereby improving light emitting efficiency.
Each of the first color filter and the second color filter may be a low pass filter, a band pass filter, or a band stop filter. In particular, each of the first color filter and the second color filter may include a distributed bragg reflector. With the structure in which the first color filter and the second color filter include the distributed bragg reflector, the light emitting diode stack may have stability in structure and may exhibit good light emitting efficiency.
The light emitting diode stack may further include: a second bonding layer interposed between the first LED stack and the first color filter; and a third bonding layer interposed between the second LED stack and the second color filter; wherein the second bonding layer transmits light generated from the first LED stack, and the third bonding layer transmits light generated from the first and second LED stacks.
With the second bonding layer and the third bonding layer, the first, second, and third LED stacks may be bonded to each other while emitting light to the outside through the second bonding layer and the third bonding layer, thereby preventing light loss.
The light emitting diode stack may further include: a support substrate disposed at a lower side of the first LED stack; and a first bonding layer disposed between the support substrate and the first LED stack.
The light emitting diode stack may further include: and a first reflective electrode interposed between the first bonding layer and the first LED stack and forming an ohmic contact with the p-type semiconductor layer of the first LED stack.
The first reflective electrode may reflect light generated from the first LED stack, thereby improving light emitting efficiency of the first LED stack.
The light emitting diode stack may further include a first ohmic electrode forming an ohmic contact with an upper surface of the first LED stack.
The light emitting diode stack may further include: a second transparent electrode interposed between the first color filter and the second LED stack and forming an ohmic contact with the p-type semiconductor layer of the second LED stack; and a third transparent electrode interposed between the second color filter and the third LED stack and forming an ohmic contact with the p-type semiconductor layer of the third LED stack, wherein light generated from the first LED stack is emitted to the outside through the second transparent electrode and the third transparent electrode, and light generated from the second LED stack is emitted to the outside through the third transparent electrode.
According to another exemplary embodiment of the present disclosure, a display apparatus is provided. The display device includes: a plurality of pixels disposed on the support substrate, each pixel including: a first LED stack disposed on a support substrate; a second LED stack disposed on the first LED stack; and a third LED stack disposed on the second LED stack, wherein the first LED stack has a multi-junction LED stack structure.
With the multi-junction LED stack structure, the first LED stack may have improved brightness.
The first LED stack may include: a first-1 LED stack; a first-2 LED stack; and a tunnel junction layer interposed between the first-1 LED stack and the first-2 LED stack, each of the first-1 LED stack and the first-2 LED stack including an n-type semiconductor layer, an active layer, and a p-type semiconductor layer.
The first LED stack may include AlGaInP-based semiconductor layers.
The display device may further include: a first color filter interposed between the first and second LED stacks, and transmitting light generated from the first LED stack while reflecting light generated from the second LED stack; and a second color filter interposed between the second and third LED stacks, and transmitting light generated from the first and third LED stacks while reflecting light generated from the third LED stack, wherein the light generated from the first LED stack is emitted to the outside through the second and third LED stacks, and the light generated from the second LED stack is emitted to the outside through the third LED stack.
Each of the first and second color filters may be a low pass filter, a band pass filter, or a band stop filter, and may include a distributed bragg reflector having high reflectivity in a specific wavelength band.
In other exemplary embodiments, the second LED stack may be disposed in some areas on the first LED stack, and the third LED stack may also be disposed in some areas on the second LED stack. Accordingly, at least a portion of light generated from the first LED stack may be emitted to the outside without passing through the second LED stack, and at least a portion of light generated from the second LED stack may be emitted to the outside without passing through the third LED stack.
In each pixel, the p-type semiconductor layer of the first, second, and third LED stacks may be electrically connected to a common line, and the n-type semiconductor layer of the first, second, and third LED stacks may be electrically connected to different lines. For example, the common line may be a data line, and the different line may be a scan line.
The display device may further include: and a lower insulating layer covering side surfaces of the first to third LED stacks, wherein the lower insulating layer may include a distributed Bragg reflector that reflects red, green, and blue light.
In one exemplary embodiment, the display apparatus may further include a reflective electrode interposed between the first LED stack and the support substrate.
The reflective electrode may be continuously disposed throughout the plurality of pixels to serve as a common line.
In another exemplary embodiment, the display apparatus may further include a reflective electrode interposed between the support substrate and the first LED stack. Each reflective electrode may be restrictively positioned in each pixel region.
The first to third LED stacks in each pixel may be independently driven.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
Advantageous effects of the invention
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that increases a light emitting area of each sub-pixel without increasing a pixel area, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that increases a light emitting area of each sub-pixel without increasing a pixel area, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode pixel for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus including the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that increases a light emitting area of each sub-pixel without increasing a pixel area, and a display apparatus including the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus including the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that can adjust emission of light in consideration of visibility and a display apparatus including the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that increases a light emitting area of each sub-pixel without increasing a pixel area, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display, which allows a plurality of pixels to be simultaneously manufactured, and thus does not need to be separately mounted on a display panel, and a display apparatus having the same.
Exemplary embodiments of the present disclosure provide a light emitting diode for a display that can adjust emission of light in consideration of visibility and a display apparatus having the same.
Drawings
Fig. 1 is a schematic cross-sectional view of a light emitting diode stack for a display according to one exemplary embodiment of the present disclosure.
Fig. 2A, 2B, and 2C are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack for a display according to an exemplary embodiment of the present disclosure.
Fig. 3 is a schematic circuit diagram illustrating an operation of a display apparatus according to an exemplary embodiment of the present disclosure.
Fig. 4 is a schematic plan view of a display apparatus according to an exemplary embodiment of the present disclosure.
Fig. 5 is an enlarged plan view of one pixel of the display device shown in fig. 4.
Fig. 6 is a schematic cross-sectional view taken along line a-a of fig. 5.
Fig. 7 is a schematic sectional view taken along line B-B of fig. 5.
Fig. 8A, 8B, 8C, 8D, 8E, 8F, 8G, 8H, 8I, 8J, and 8K are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure.
Fig. 9 is a schematic circuit diagram illustrating an operation of a display apparatus according to another exemplary embodiment of the present disclosure.
Fig. 10 is a schematic plan view of a display apparatus according to another exemplary embodiment of the present disclosure.
Fig. 11 is a schematic cross-sectional view of a light emitting diode stack for a display according to another exemplary embodiment of the present disclosure.
Fig. 12A, 12B, 12C, 12D, 12E, and 12F are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack for a display according to another exemplary embodiment of the present disclosure.
Fig. 13 is a schematic cross-sectional view of a light emitting diode stack for a display according to still another exemplary embodiment of the present disclosure.
Fig. 14 is a schematic cross-sectional view of a light emitting diode stack for a display according to still another exemplary embodiment of the present disclosure.
Fig. 15 is a sectional view illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure.
Fig. 16 is a sectional view illustrating a light emitting stack structure of a contact portion having a wire according to an exemplary embodiment of the present disclosure.
Fig. 17A, 17B, and 17C are sectional views illustrating each epitaxial stack of fig. 16 in detail.
Fig. 18 is a cross-sectional view illustrating a light emitting stack structure having a pre-pass filter according to an exemplary embodiment of the present disclosure.
Fig. 19 and 20 are cross-sectional views illustrating light emitting stack structures according to exemplary embodiments of the present disclosure, in which concave and convex portions are formed at least a portion of an epitaxial stack in the respective light emitting stack structures.
Fig. 21 is a plan view illustrating a display device according to an exemplary embodiment of the present disclosure.
Fig. 22 is an enlarged plan view illustrating a portion P1 of fig. 21.
Fig. 23 is a block diagram illustrating a display device according to an exemplary embodiment of the present disclosure.
Fig. 24 is a circuit diagram showing one sub-pixel used for a passive matrix type display device.
Fig. 25 is a circuit diagram showing a first sub-pixel for an active matrix type display device.
Fig. 26 is a plan view illustrating a pixel according to an exemplary embodiment of the present disclosure.
Fig. 27A and 27B are sectional views taken along line I-I 'and line II-II' of fig. 26, respectively.
Fig. 28 is a plan view showing a substrate on which first to third epitaxial stacks are stacked.
FIG. 29A, FIG. 29B, FIG. 29C, FIG. 29D, FIG. 29E, FIG. 29F, FIG. 29G, FIG. 29H, FIG. 29C,
Fig. 29I, 29J, 29K, and 29L are cross-sectional views sequentially illustrating a process of stacking first to third epitaxial stacks on a substrate, taken along line I-I' of fig. 28.
Fig. 30A, 31A, 32A, 33A, 34A, and 35A are plan views sequentially illustrating processes of connecting the second and third epitaxial stacks to the second and third sub-scan lines and the data line.
Fig. 30B, 31B, 32B, 33B, 34B, and 35B are sectional views taken along line I-I ', line IIa-IIa ', and line IIb-IIb ' of fig. 30A, 31A, 32A, 33A, 34A, and 35A, respectively.
Fig. 36A, 36B, and 36C are sectional views illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure.
Fig. 37A is a plan view illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure.
Fig. 37B is a sectional view taken along line I-I' of fig. 37A.
Fig. 38A, 39A, 40A, 41A, 42A, and 43A are plan views sequentially illustrating a method of manufacturing a light emitting stack structure according to an exemplary embodiment of the present disclosure.
Fig. 38B, 39B, 40C, 40D, 40E, 40F, 40G, 41B, 41C, 41D, 42B, and 43B are sectional views taken along the line I-I of fig. 38A, 39A, 40A, 41A, 42A, and 43A, respectively.
Fig. 44 is a sectional view illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure.
Fig. 45 is a sectional view showing a concave-convex section formed on the second epitaxial stack.
Fig. 46 is a sectional view illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure.
Fig. 47 and 48 are sectional views illustrating a light emitting stack structure having a light conversion layer according to an exemplary embodiment of the present disclosure.
Fig. 49 and 50 are plan views illustrating a light emitting stack structure mounted on a printed circuit board according to an exemplary embodiment of the present disclosure.
Fig. 51 is a schematic cross-sectional view of a light emitting diode stack for a display according to an exemplary embodiment of the present disclosure.
Fig. 52A, 52B, 52C, 52D, and 52E are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack for a display according to an exemplary embodiment of the present disclosure.
Fig. 53 is a schematic circuit diagram illustrating an operation of a display device according to an exemplary embodiment of the present disclosure.
Fig. 54 is a schematic plan view of a display device according to an exemplary embodiment of the present disclosure.
Fig. 55 is an enlarged plan view of one pixel of the display device shown in fig. 54.
Fig. 56 is a schematic cross-sectional view taken along line a-a of fig. 55.
Fig. 57 is a schematic cross-sectional view taken along line B-B of fig. 55.
Fig. 58A, 58B, 58C, 58D, 58E, 58F, 58G, and 58H are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure.
Fig. 59 is a schematic plan view of a display apparatus according to another exemplary embodiment of the present disclosure.
Fig. 60 is a schematic cross-sectional view of a light emitting diode pixel for a display according to an exemplary embodiment of the present disclosure.
Fig. 61 is a schematic circuit diagram illustrating an operation of a display apparatus according to an exemplary embodiment of the present disclosure.
Fig. 62 is a schematic plan view of a display device according to certain exemplary embodiments of the present disclosure.
Fig. 63 is an enlarged plan view of one pixel of the display device shown in fig. 62.
Fig. 64A is a schematic cross-sectional view taken along line a-a of fig. 63.
Fig. 64B is a schematic cross-sectional view taken along line B-B of fig. 63.
Fig. 64C is a schematic cross-sectional view taken along line C-C of fig. 63.
Fig. 64D is a schematic cross-sectional view taken along line D-D of fig. 63.
Fig. 65A, 65B, 66A, 66B, 67A, 67B, 67C, 68A, 68B, 68C, 69A, 69B, 70A, 70B, 71A, 71B, 72A, 72B, 73A, 73B, 74A, 74B, 75, 76A, 76B, and 77 are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to a certain exemplary embodiment of the present disclosure.
Fig. 78 is a schematic circuit diagram illustrating an operation of a display apparatus according to another exemplary embodiment of the present disclosure.
Fig. 79 is a schematic cross-sectional view of a light emitting diode stack for a display according to an exemplary embodiment of the present disclosure.
Fig. 80A, 80B, 80C, and 80D are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack for a display according to an exemplary embodiment of the present disclosure.
Fig. 81 is a schematic circuit diagram illustrating an operation of a display device according to an exemplary embodiment of the present disclosure.
Fig. 82 is a schematic plan view of a display device according to an exemplary embodiment of the present disclosure.
Fig. 83 is an enlarged plan view of one pixel of the display device shown in fig. 82.
Fig. 84 is a schematic cross-sectional view taken along line a-a of fig. 83.
Fig. 85 is a schematic cross-sectional view taken along line B-B of fig. 83.
FIG. 86A, FIG. 86B, FIG. 86C, FIG. 86D, FIG. 86E, FIG. 86F, FIG. 86G, FIG. 86H, FIG. 86B,
Fig. 86I, 86J, and 86K are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure.
Fig. 87 is a schematic plan view of a display device according to another exemplary embodiment of the present disclosure.
Fig. 88 is a schematic circuit diagram illustrating an operation of a display apparatus according to another exemplary embodiment of the present disclosure.
Fig. 89A is a schematic cross-sectional view of a light emitting diode stack for a display according to one exemplary embodiment of the present disclosure.
Fig. 89B is an enlarged cross-sectional view of the first LED stack of fig. 89A.
Fig. 90A, 90B, and 90C are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack for a display according to an exemplary embodiment of the present disclosure.
Fig. 91 is a schematic circuit diagram illustrating an operation of a display device according to an exemplary embodiment of the present disclosure.
Fig. 92 is a schematic plan view of a display device according to an exemplary embodiment of the present disclosure.
Fig. 93 is an enlarged plan view of one pixel of the display device shown in fig. 92.
Fig. 94 is a schematic cross-sectional view taken along line a-a of fig. 93.
Fig. 95 is a schematic cross-sectional view taken along line B-B of fig. 93.
FIG. 96A, FIG. 96B, FIG. 96C, FIG. 96D, FIG. 96E, FIG. 96F, FIG. 96G, FIG. 96H, FIG. 96D,
Fig. 96I, 96J, and 96K are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure.
Fig. 97 is a schematic circuit diagram illustrating an operation of a display apparatus according to another exemplary embodiment of the present disclosure.
Fig. 98 is a schematic plan view of a display apparatus according to still another exemplary embodiment of the present disclosure.
Detailed Description
Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example to fully convey the spirit of the disclosure to those skilled in the art to which the disclosure pertains. Accordingly, the present disclosure is not limited to the embodiments disclosed herein, but may be embodied in various forms. In the drawings, the width, length, thickness, etc. of elements may be exaggerated for clarity and descriptive purposes. When an element or layer is referred to as being "disposed" on "or" over "another element or layer, it can be directly" disposed "on" or "over" the other element or layer, or intervening elements or layers may be present. Throughout the specification, the same reference numerals denote elements having the same or similar functions.
Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. As used herein, a light emitting device or light emitting diode according to an exemplary embodiment may include a micro LED having a surface area of less than about 10000 square microns (μm) as is known in the art. In other exemplary embodiments, the micro LEDs may have a surface area of less than about 4000 square μm (or less than about 2500 square μm), depending on the particular application.
Fig. 1 is a schematic cross-sectional view of a light emitting diode stack 100 for a display according to one exemplary embodiment of the present disclosure.
Referring to fig. 1, the light emitting diode stack 100 may include a support substrate 51, a second substrate 31, a third substrate 41, a first LED stack 23, a second LED stack 33, a third LED stack 43, a first p-reflective electrode 25, a second p-transparent electrode 35, a third p-transparent electrode 45, a first color filter 37, a second color filter 47, a first bonding layer 53, a second bonding layer 55, and a third bonding layer 57.
The support substrate 51 supports the semiconductor stacks 23, 33, 43. The support substrate 51 may include, but is not limited to, circuits on a surface thereof or in the same. The support substrate 51 may include, for example, a Si substrate or a Ge substrate.
Each of the first, second, and third LED stacks 23, 33, and 43 includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer interposed between the n-type semiconductor layer and the p-type semiconductor layer. The active layer may have a multiple quantum well structure.
For example, the first LED stack 23 may be an inorganic light emitting diode adapted to emit red light, the second LED stack 33 may be an inorganic light emitting diode adapted to emit green light, and the third LED stack 43 may be an inorganic light emitting diode adapted to emit blue light. The first LED stack 23 may include a GaInP-based well layer, and each of the second LED stack 33 and the third LED stack 43 may include a GaInN-based well layer.
In addition, both surfaces of each of the first, second, and third LED stacks 23, 33, and 43 are an n-type semiconductor layer and a p-type semiconductor layer, respectively. In this exemplary embodiment, each of the first, second, and third LED stacks 23, 33, 43 has an n-type upper surface and a p-type lower surface. Since the third LED stack 43 has an n-type upper surface, a rough surface may be formed on the upper surface of the third LED stack 43 by chemical etching. However, it is to be understood that the present disclosure is not limited thereto, and the semiconductor type of the upper and lower surfaces of each LED stack may be changed.
The first LED stack 23 is disposed adjacent to the support substrate 51; the second LED stack 33 is disposed on the first LED stack 23; a third LED stack 43 is arranged on the second LED stack. Since the first LED stack 23 emits light having a longer wavelength than the second and third LED stacks 33 and 43, the light generated from the first LED stack 23 may be emitted to the outside through the second and third LED stacks 33 and 43. In addition, since the second LED stack 33 emits light having a longer wavelength than the third LED stack 43, light generated from the second LED stack 33 may be emitted to the outside through the third LED stack 43.
The second substrate 31 is a growth substrate for the second LED stack 33, and may be, for example, a GaN-based substrate. The second substrate 31 is a homogeneous substrate of the second LED stack 33 and is integrally bonded to the second LED stack 33. The second substrate 31 may be doped with an n-type dopant, such as Si, to serve as an n-type semiconductor layer. Since a homogeneous substrate of the second LED stack 33 is used as the second substrate 31, the dislocation density of the second LED stack 33 grown on the second substrate 31 may be reduced, thereby improving the light emitting efficiency of the second LED stack 33. The second LED stack 33 may have a dislocation density of, for example, 103/cm2 to 107/cm 2. Since the GaN-based semiconductor layer grown on the sapphire substrate generally has a dislocation density of 108/cm2 or more, the dislocation density of second LED stack 33 can be significantly reduced using the GaN growth substrate.
The third substrate 41 is a growth substrate for the third LED stack 43, and may be a GaN-based substrate (e.g., a GaN substrate). The third substrate 41 is a homogeneous substrate of the third LED stack 43 and is integrally bonded to the third LED stack 43. The third substrate 41 may be doped with an n-type dopant, such as Si, to serve as an n-type semiconductor layer. Since a homogeneous substrate of the third LED stack 43 is used as the third substrate 41, the dislocation density of the third LED stack 43 grown on the third substrate 41 improves the light emitting efficiency of the third LED stack 43. The third LED stack 43 may have a dislocation density of, for example, 103/cm2 to 107/cm 2.
Although both the second and third substrates 31 and 41 are used in this exemplary embodiment, one of the second and third substrates 31 and 41 may be omitted. In addition, as will be described below with reference to fig. 13, both the second substrate 31 and the third substrate 41 may be removed.
The first p-reflective electrode 25 forms an ohmic contact with the p-type semiconductor layer of the first LED stack 23 and reflects light generated from the first LED stack 23. For example, the first p-reflective electrode 25 may be formed of Au-Ti or Au-Sn. In addition, the first p-reflective electrode 25 may include a diffusion barrier layer.
The second p-transparent electrode 35 forms an ohmic contact with the p-type semiconductor layer of the second LED stack 33. The second p transparent electrode 35 may be composed of a metal layer or a conductive oxide layer transparent to red and green light.
In addition, the third p transparent electrode 45 forms an ohmic contact with the p-type semiconductor layer of the third LED stack 43. The third p transparent electrode 45 may be composed of a metal layer or a conductive oxide layer transparent to red, green, and blue light.
The first p-reflective electrode 25, the second p-transparent electrode 35, and the third p-transparent electrode 45 may contribute to current spreading by ohmic contact with the p-type semiconductor layer of each LED stack.
A first color filter 37 may be disposed between the first LED stack 23 and the second LED stack 33. In addition, a second color filter 47 may be interposed between the second LED stack 33 and the third LED stack 43. The first color filter 37 transmits light generated from the first LED stack 23 while reflecting light generated from the second LED stack 33. The second color filter 47 transmits light generated from the first and second LED stacks 23 and 33 while reflecting light generated from the third LED stack 43. As a result, light generated from the first LED stack 23 may be emitted to the outside through the second LED stack 33 and the third LED stack 43, and light generated from the second LED stack 33 may be emitted to the outside through the third LED stack 43. In addition, the light emitting diode stack may prevent light generated from the second LED stack 33 from entering the first LED stack 23, or may prevent light generated from the third LED stack 43 from entering the second LED stack 33, thereby preventing light loss. Meanwhile, light generated from the first LED stack 23 is emitted to the outside through the second p transparent electrode 35 and the third p transparent electrode 45, and light generated from the second LED stack 33 is emitted to the outside through the third p transparent electrode 45.
In some exemplary embodiments, the first color filter 37 may reflect light generated from the third LED stack 43.
The first and second color filters 37 and 47 may be, for example, a low-pass filter allowing light in a low frequency band (i.e., a long frequency band) to pass therethrough, a band-pass filter allowing light in a predetermined wavelength band, or a band-stop filter preventing light in a predetermined wavelength band from passing therethrough. Specifically, each of the first color filter 37 and the second color filter 47 may be a band-stop filter including a Distributed Bragg Reflector (DBR). The distributed bragg reflector may be formed by alternately stacking insulating layers (e.g., TiO2 and SiO2) having different refractive indices one on another. In addition, the stop band of the distributed bragg reflector can be controlled by adjusting the thicknesses of the TiO2 layer and the SiO2 layer. The low-pass filter and the band-pass filter may also be formed by alternately stacking insulating layers having different refractive indexes one on another.
The first bonding layer 53 bonds the first LED stack 23 to the support substrate 51. As shown in the drawing, the first p-reflective electrode 25 may be adjacent to the first bonding layer 53. The first bonding layer 53 may be a light-transmissive layer or a light-opaque layer. The first bonding layer 53 may be, for example, a transparent inorganic insulating layer, a transparent organic insulating layer, or a transparent conductive layer.
The second bonding layer 55 bonds the second LED stack 33 to the first LED stack 23. As shown in the drawing, the second bonding layer 55 may be adjacent to the first LED stack 23 and the first color filter 37. However, it is to be understood that the present disclosure is not limited thereto, and a transparent conductive layer may be disposed on the first LED stack 23. The second bonding layer 55 transmits light generated from the first LED stack 23. The second bonding layer 55 may be, for example, a transparent inorganic insulating layer, a transparent organic insulating layer, or a transparent conductive layer, and may be formed of, for example, light transmissive spin-on-glass (light transmissive spin-on-glass).
The third bonding layer 57 bonds the third LED stack 43 to the second LED stack 33. As shown in the drawing, the third bonding layer 57 may be adjacent to the second substrate 31 integrally bonded to the second LED stack 33, and may also be adjacent to the second color filter 47. However, it should be understood that the present disclosure is not limited thereto. If the second substrate 31 is omitted, the third bonding layer 57 may be adjacent to the second LED stack 33. In addition, a transparent conductive layer may be disposed on the second LED stack 33 or the second substrate 31, and the third bonding layer 57 may be adjacent to the transparent conductive layer. The third bonding layer 57 transmits light generated from the first and second LED stacks 23 and 33. The third bonding layer 57 may be, for example, a transparent inorganic insulating layer, a transparent organic insulating layer, or a transparent conductive layer, and may be formed of, for example, light-transmitting spin-on glass.
Fig. 2 illustrates a schematic cross-sectional view of a method of manufacturing a light emitting diode stack for a display according to one exemplary embodiment of the present disclosure.
Referring to fig. 2, first, a first LED stack 23 is grown on a first substrate 21, and a first p-reflective electrode 25 is formed on the first LED stack 23.
The first substrate 21 may be, for example, a GaAs substrate. Further, the first LED stack 23 is composed of AlGaInP-based semiconductor layers, and includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The first p-reflective electrode 25 forms an ohmic contact with the p-type semiconductor layer.
Meanwhile, a second LED stack 33 is grown on the second substrate 31, and a second p transparent electrode 35 and a first color filter 37 are formed on the second LED stack 33. The second LED stack 33 may be composed of GaN-based semiconductor layers, and may include a GaInN well layer. The second substrate 31 is a homogeneous substrate of a GaN-based semiconductor layer, and may be, for example, a GaN substrate. In addition, the second substrate 31 may be an n-type semiconductor doped with an n-type dopant. The composition ratio of GaInN for the second LED stack 33 may be determined such that the second LED stack 33 emits green light. Meanwhile, the second p transparent electrode 35 forms ohmic contact with the p-type semiconductor layer.
Further, a third LED stack 43 is grown on the third substrate 41, and a third p transparent electrode 45 and a second color filter 47 are formed on the third LED stack 43. The third LED stack 43 may be composed of GaN-based semiconductor layers, and may include a GaInN well layer. The third substrate 41 is a homogeneous substrate of a GaN-based semiconductor layer, and may be, for example, a GaN substrate. The composition ratio of GaInN for the third LED stack 43 may be determined such that the third LED stack 43 emits blue light. On the other hand, the third p transparent electrode 45 forms ohmic contact with the p-type semiconductor layer.
The first color filter 37 and the second color filter 47 are the same as the first color filter 37 and the second color filter 47 described with reference to fig. 1, and repeated description thereof will be omitted.
Referring to fig. 1 and 2, the first LED stack 23 is bonded to the support substrate 51 via a first bonding layer 53. The first bonding layer 53 may be previously formed on the support substrate 51, and then the first p-reflective electrode 25 may be disposed to face the support substrate 51 and bonded to the first bonding layer 53. The first substrate 21 is removed from the first LED stack 23 by chemical etching.
Then, the second LED stack 33 is bonded to the first LED stack 23 via the second bonding layer 55. The first color filter 37 is disposed to face the first LED stack 23 and is bonded to the second bonding layer 55. The second bonding layer 55 may be previously formed on the first LED stack 23, and then the first color filter 37 may be disposed to face the second bonding layer 55 and bonded to the second bonding layer 55. The second substrate 31 may be reduced in thickness by a thinning process, as compared with the case when the second substrate is used as a growth substrate. In addition, the entire second substrate 31 may be removed.
Then, the third LED stack 43 is bonded to the second LED stack 33 via the third bonding layer 57. The second color filter 47 is disposed to face the second substrate 31 and is bonded to the third bonding layer 57. The third bonding layer 57 may be previously disposed on the second substrate 31, and then the second color filter 47 may be disposed to face the third bonding layer 57 and bonded to the third bonding layer 57. As a result, as shown in fig. 1, a light emitting diode stack for a display is provided, the light emitting diode stack having the third LED stack 43 exposed to the outside. The thinning process may also be performed on the third substrate 41, and the third substrate 41 may also be completely removed.
The display device may be set up in the following way: the stack of the first, second, and third LED stacks 23, 33, and 43 on the support substrate 51 is patterned in units of pixels, and then the first to third LED stacks are connected to each other by interconnection lines. Hereinafter, exemplary embodiments of a display apparatus will be described.
Fig. 3 is a schematic circuit diagram illustrating an operation of a display apparatus according to one exemplary embodiment of the present disclosure, and fig. 4 is a schematic plan view of the display apparatus according to the exemplary embodiment of the present disclosure.
First, referring to fig. 3 and 4, the display device according to the exemplary embodiment may be implemented to operate in a passive matrix manner.
For example, since the light emitting diode stack for a display described with reference to fig. 1 has a structure in which the first, second, and third LED stacks 23, 33, and 43 are stacked in the vertical direction, one pixel includes three kinds of light emitting diodes R, G and B. Here, the first light emitting diode R corresponds to the first LED stack 23, the second light emitting diode G corresponds to the second LED stack 33, and the third light emitting diode B corresponds to the third LED stack 43.
In fig. 3 and 4, one pixel includes a first light emitting diode R, a second light emitting diode G, and a third light emitting diode B, each of which corresponds to a sub-pixel. The anodes of the first, second, and third light emitting diodes R, G, and B are connected to a common line (e.g., a data line), and their cathodes are connected to different lines (e.g., a scan line). For example, in the first pixel, anodes of the first, second, and third light emitting diodes R, G, and B are commonly connected to the data line Vdata1, and cathodes thereof are respectively connected to the scan lines Vscan1-1, Vscan1-2, and Vscan 1-3. As a result, the light emitting diodes R, G and B in each pixel can be driven independently.
Further, each of the light emitting diodes R, G and B is driven by pulse width modulation or by changing the magnitude of current, so that the luminance of each sub-pixel can be adjusted.
Referring again to fig. 4, a plurality of pixels are formed by patterning the stack described with reference to fig. 1, and each pixel is connected to the first p-reflective electrode 25 and the interconnection lines 71, 73, 75. As shown in fig. 3, the first p-reflective electrode 25 may be used as the data line Vdata, and the interconnection lines 71, 73, 75 may be formed as scan lines.
The pixels may be arranged in a matrix form, with the anode of the light emitting diode R, G, B of each pixel commonly connected to the first p-reflective electrode 25, and their cathodes connected to the interconnection lines 71, 73, 75 that are separate from each other. Here, the interconnection lines 71, 73, 75 may be used as the scan lines Vscan.
Fig. 5 is an enlarged plan view of one pixel of the display device shown in fig. 4, fig. 6 is a schematic cross-sectional view taken along line a-a of fig. 5, and fig. 7 is a schematic cross-sectional view taken along line B-B of fig. 5.
Referring to fig. 4, 5, 6, and 7, in each pixel, a portion of the first p reflective electrode 25, a portion of the upper surface of the first LED stack 23, a portion of the second p transparent electrode 35, a portion of the upper surface of the second substrate 31, a portion of the third p transparent electrode 45, and an upper surface of the third substrate 41 are exposed to the outside.
The third LED stack 43 may have a rough surface 43a on an upper surface thereof. The rough surface 43a may be formed on the entire upper surface of the third substrate 41, or may be formed in some regions of the upper surface of the third substrate 41 as shown in the drawing. In the structure in which the third substrate 41 is removed, a rough surface may be formed on the third LED stack 43.
The first insulating layer 61 may cover a side surface of each pixel. The first insulating layer 61 may be formed of a light-transmitting material such as SiO 2. In this case, the first insulating layer 61 may cover the entire upper surface of the third substrate 41. Optionally, the first insulating layer 61 may include a distributed bragg reflector to reflect light traveling toward side surfaces of the first, second, and third LED stacks 23, 33, and 43. In this case, the first insulating layer 61 at least partially exposes the upper surface of the third substrate 41.
The first insulating layer 61 may include an opening 61a exposing the upper surface of the third substrate 41, an opening 61b exposing the upper surface of the second substrate 31, an opening 61c exposing the ohmic electrode 29 of the first LED stack 23 (see fig. 8H), an opening 61d exposing the third p transparent electrode 45, an opening 61e exposing the second p transparent electrode 35, and an opening 61f exposing the first p reflective electrode 25.
The interconnection lines 71, 75 may be formed on the support substrate 51 near the first, second, and third LED stacks 23, 33, and 43, and may be disposed on the first insulating layer 61 to be insulated from the first p-reflective electrode 25. On the other hand, the connection part 77a connects the third p transparent electrode 45 to the first p reflective electrode 25, and the connection part 77b connects the second p transparent electrode 35 to the first p reflective electrode 25, so that the anode of the first LED stack 23, the anode of the second LED stack 33, and the anode of the third LED stack 43 are commonly connected to the first p reflective electrode 25.
The connection portion 71a connects the upper surface of the third substrate 41 to the interconnection line 71, and the connection portion 75a connects the upper surface of the first LED stack 23 to the interconnection line 75.
A second insulating layer 81 may be disposed on the interconnection lines 71, 73 to cover the upper surface of the third substrate 41. The second insulating layer 81 may have an opening 81a partially exposing an upper surface of the second substrate 31.
The interconnection lines 73 may be disposed on the second insulating layer 81, and the connection portions 73a may connect the upper surface of the second substrate 31 to the interconnection lines 73. The connection portion 73a may cross over an upper portion of the interconnection line 75 and be insulated from the interconnection line 75 by the second insulating layer 81.
Although the electrode of each pixel is described as being connected to the data line and the scan line in this exemplary embodiment, it is understood that various embodiments are possible. Although the interconnection lines 71, 75 are formed on the first insulating layer 61 and the interconnection line 73 is formed on the second insulating layer 81 in this exemplary embodiment, it is to be understood that the present disclosure is not limited thereto, for example, all of the interconnection lines 71, 73, 75 may be formed on the first insulating layer 61 and may be covered by the second insulating layer 81 that may have an opening configured to expose the interconnection line 73. In this structure, the connection portion 73a may connect the upper surface of the second substrate 31 to the interconnection line 73 through the opening of the second insulating layer 81.
Alternatively, the interconnection lines 71, 73, 75 may be formed inside the support substrate 51, and the connection portions 71a, 73a, 75a on the first insulating layer 61 may connect the upper surface of the first LED stack 23 and the upper surfaces of the second and third LED substrates 31, 41 to the interconnection lines 71, 73, 75.
Fig. 8A to 8K are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure. Here, a description will be given below of a method of forming the pixel of fig. 5.
First, the light emitting diode stack 100 described in fig. 1 is prepared.
Then, referring to fig. 8A, a rough surface 41a may be formed on the upper surface of the third substrate 41. A rough surface 41a may be formed on the upper surface of the third substrate 41 to correspond to each pixel region. The roughened surface 41a may be formed by chemical etching, such as photo-enhanced chemical etching (PEC).
The rough surface 41a may be partially formed in each pixel region in consideration of a region of the third substrate 41 to be etched in a subsequent process, without being limited thereto. Alternatively, the rough surface 41a may be formed on the entire upper surface of the third substrate 41.
Referring to fig. 8B, the peripheral regions of the third substrate 41 and the third LED stack 43 in each pixel are removed by etching to expose the third p transparent electrode 45. As shown in the drawing, the third substrate 41 may be left to have a rectangular shape or a square shape as shown in the drawing. Here, a plurality of recesses may be formed along edges of the third substrate 41 and the third LED stack 43. These recesses may be continuously formed on the third substrate 41 and the third LED stack 43.
Referring to fig. 8C, the upper surface of the second substrate 31 is exposed by removing the third p transparent electrode 45 exposed in the other region except for the portion of the third p transparent electrode 45 exposed in one recess. Accordingly, the upper surface of the second substrate 31 is exposed around the third substrate 41 and in other recesses except the recess in which the third p transparent electrode 45 partially remains.
Referring to fig. 8D, the second p transparent electrode 35 is exposed by removing the second substrate 31 exposed in the other region except for a portion of the second substrate 31 exposed in one recess, and then removing the second LED stack 33.
Referring to fig. 8E, the upper surface of the first LED stack 23 is exposed by removing the second p transparent electrode 35 exposed in the other region except for the portion of the second p transparent electrode 35 exposed in one recess. Accordingly, the upper surface of the first LED stack 23 is exposed around the third substrate 41, and the upper surface of the first LED stack 23 is exposed in at least one of the recesses formed in the third substrate 41.
Referring to fig. 8F, the first p reflective electrode 25 is exposed by removing exposed portions of the first LED stack 23 located in other regions except the first LED stack 23 exposed in the recess. The first p reflective electrode 25 is exposed around the third substrate 41.
Referring to fig. 8G, a linear interconnection line is formed by patterning the first p-reflective electrode 25. Here, the support substrate 51 may be exposed. The first p reflective electrode 25 may connect pixels arranged in one column among the pixels arranged in a matrix to each other (see fig. 4).
Referring to fig. 8H, a first insulating layer 61 (see fig. 6 and 7) is formed to cover the pixels. The first insulating layer 61 covers the first p-reflective electrode 25, the side surface of the first LED stack 23, the side surface of the second LED stack 33, the side surface of the third LED stack 43, the side surface of the second substrate 31, and the side surface of the third substrate 41. In addition, the first insulating layer 61 may at least partially cover the upper surface of the third substrate 41. If the first insulating layer 61 is a transparent layer such as a SiO2 layer, the first insulating layer 61 may cover the entire upper surface of the third substrate 41. Alternatively, the first insulating layer 61 may include a distributed bragg reflector. In this case, the first insulating layer 61 may at least partially expose the upper surface of the third substrate 41 to emit light to the outside.
The first insulating layer 61 may include an opening 61a exposing the third substrate 41, an opening 61b exposing the second substrate 31, an opening 61c exposing the first LED stack 23, an opening 61d exposing the third p-transparent electrode 45, an opening 61e exposing the second p-transparent electrode 35, and an opening 61f exposing the first p-reflective electrode 25. A plurality of openings 61f adapted to expose the first p-reflective electrode 25 may be formed.
Referring to fig. 8I, interconnection lines 71, 75 and connection portions 71a, 75a, 77b are formed. The interconnection lines 71, 75 and the connection portions 71a, 75a, 77b may be formed by a lift-off process. The interconnection lines 71, 75 are insulated from the first p-reflective electrode 25 by the first insulating layer 61. The connection portion 71a electrically connects the third substrate 41 to the interconnection line 71, and the connection portion 75a electrically connects the first LED stack 23 to the interconnection line 75. The connection portion 77a electrically connects the third p transparent electrode 45 to the first p reflective electrode 25, and the connection portion 77b electrically connects the second p transparent electrode 35 to the first p reflective electrode 25.
Referring to fig. 8J, a second insulating layer 81 (see fig. 6 and 7) covers the interconnection lines 71, 75 and the connection portions 71a, 75a, 77 b. The second insulating layer 81 may also cover the entire upper surface of the third substrate 41. The second insulating layer 81 has an opening 81a exposing the upper surface of the second substrate 31. The second insulating layer 81 may be formed of, for example, silicon oxide or silicon nitride, and may include a distributed bragg reflector. In that
In the structure in which the second insulating layer 81 includes the distributed bragg reflector, the second insulating layer 81 is formed to expose at least a portion of the upper surface of the third substrate 41 to emit light to the outside.
Referring to fig. 8K, an interconnection line 73 and a connection portion 73a are formed. The interconnection line 75 and the connection portion 75a may be formed by a lift-off process. The interconnection line 73 is provided on the second insulating layer 81, and is insulated from the first p-reflective electrode 25 and the interconnection lines 71, 75. The connection portion 73a electrically connects the second substrate 31 to the interconnection line 73. The connection portion 73a may cross over an upper portion of the interconnection line 75 and be insulated from the interconnection line 75 by the second insulating layer 81.
As a result, the pixel region is completed as shown in fig. 5. Further, as shown in fig. 4, a plurality of pixels may be formed on the support substrate 51, and the plurality of pixels may be connected to each other through the first p-reflective electrode 25 and the interconnection lines 71, 73, 75 to operate in a passive matrix manner.
Although a method of manufacturing a display device adapted to operate in a passive matrix manner is shown in this exemplary embodiment, it should be understood that the present disclosure is not limited thereto. That is, the display device according to the exemplary embodiment may be manufactured in various ways to operate in a passive matrix manner using the light emitting diode stack shown in fig. 1.
For example, although the interconnection line 73 is shown to be formed on the second insulating layer 81 in this exemplary embodiment, the interconnection line 73 may be formed on the first insulating layer 61 together with the interconnection lines 71, 75, and the connection portion 73a may be formed on the second insulating layer 81 to connect the second substrate 31 to the interconnection line 73. Alternatively, the interconnection lines 71, 73, 75 may be provided inside the support base 51.
Fig. 9 is a schematic circuit diagram illustrating an operation of a display apparatus according to another exemplary embodiment of the present disclosure. The above embodiments relate to a display device driven in a passive matrix manner, however, the exemplary embodiments relate to a display device driven in an active matrix manner.
Referring to fig. 9, the driving circuit according to the exemplary embodiment includes at least two transistors Tr1, Tr2 and a capacitor. When a power source is connected to the select lines Vrow1 through Vrow3 and a voltage is applied to the data lines Vdata1 through Vdata3, a voltage is applied to the corresponding light emitting diode. Further, the corresponding capacitor is charged according to the value of Vdata1 to Vdata 3. Since the on state of the transistor Tr2 can be maintained by the voltage charged by the capacitor, even when the power supplied to the Vrow1 is cut off, the voltage of the capacitor can be maintained and can be applied to the light emitting diodes LED1 to LED 3. Further, the currents flowing in the light emitting diodes LED1 to LED3 may be changed according to the values of Vdata1 to Vdata 3. Current can be continuously supplied through Vdd to enable continuous light emission.
The transistors Tr1, Tr2 and the capacitor may be formed inside the support substrate 51. For example, a thin film transistor formed on a silicon substrate may be used for active matrix driving.
Here, the light emitting diodes LED1 to LED3 correspond to the first LED stack 23, the second LED stack 33, and the third LED stack 43 stacked in one pixel, respectively. Anodes of the first to third LED stacks are connected to the transistor Tr2, and cathodes of the first to third LED stacks are grounded.
Although one example of a circuit for active matrix driving is shown in this exemplary embodiment, it should be understood that other types of circuits may be used. Further, although the anodes of the light emitting diodes LED1 through LED3 are connected to different transistors Tr2 and the cathodes of the light emitting diodes LED1 through LED3 are grounded in this exemplary embodiment, the anodes of the light emitting diodes may be connected to a current source Vdd and the cathodes of the light emitting diodes may be connected to different transistors in other exemplary embodiments.
Fig. 10 is a schematic plan view of a display apparatus according to another exemplary embodiment of the present disclosure. Here, a description will be given below of one pixel among a plurality of pixels arranged on the support substrate 151.
Referring to fig. 10, the pixel according to the exemplary embodiment is substantially similar to the pixel described with reference to fig. 4 to 7, except that the support substrate 151 is a thin film transistor panel including transistors and capacitors and the first p-reflective electrode 25 is restrictively positioned in a lower region of the first LED stack 23.
The cathode of the third LED stack 43 is connected to the support substrate 151 through a connection portion 171 a. For example, as shown in fig. 9, the cathode of the third LED stack 43 may be grounded by being electrically connected to the support substrate 151. The cathode of the second LED stack 33 and the cathode of the first LED stack 23 may also be grounded by being electrically connected to the support base 151 via the connection portions 173a and 175 a.
On the other hand, the first p-reflective electrode 25 is connected to the transistor Tr2 (see fig. 9) located inside the support substrate 151. The third p transparent electrode 45 and the second p transparent electrode 35 are also connected to the transistor Tr2 (see fig. 9) located inside the support substrate 151 through the connection portions 171b and 173 b.
In this way, the first LED stack 23, the second LED stack 33, and the third LED stack 43 are connected to each other, thereby constituting a circuit for active matrix driving as shown in fig. 9.
Although one example of the electrical connection for active matrix driving is shown in this exemplary embodiment, it is to be understood that the present disclosure is not limited thereto, and the circuit for the display device may be modified into various circuits for active matrix driving in various ways.
On the other hand, in the exemplary embodiment described with reference to fig. 1, although the first, second, and third p-reflective electrodes 25, 35, and 45 form ohmic contacts with the p-type semiconductor layer of the first, second, and third LED stacks 23, 33, and 43, respectively, each of the second and third substrates 31 and 41 is not provided with a separate ohmic contact layer. When the pixel has a size of 200 μm or less, current diffusion is not difficult even if a separate ohmic contact layer is not formed in the n-type semiconductor layer. However, a transparent electrode layer may be provided on each of the second and third substrates 31 and 41 to ensure current diffusion.
In addition, the first, second, and third LED stacks 23, 33, and 43 may be connected to each other in various structures.
Fig. 11 is a schematic cross-sectional view of a light emitting diode stack 101 for a display according to another exemplary embodiment of the present disclosure.
Referring to fig. 11, like the light emitting diode stack 100 described with reference to fig. 1, the light emitting diode stack 101 includes a support substrate 51, a first LED stack 23, a second LED stack 33, a third LED stack 43, a second substrate 31, a third substrate 41, a second p transparent electrode 35, a third p transparent electrode 45, a first color filter 137, a second color filter 47, a first bonding layer 153, a second bonding layer 155, and a third bonding layer 157. In addition, the light emitting diode stack 101 may further include a first n reflective electrode 129, a first p transparent electrode 125, and a second n transparent electrode 139.
The support substrate 51 supports the semiconductor stacks 23, 33, and 43. The support substrate 51 may include, but is not limited to, circuits on a surface thereof or in the same. The support substrate 51 may include, for example, a Si substrate or a Ge substrate.
The first, second, and third LED stacks 23, 33, and 43 are similar to the first, second, and third LED stacks 23, 33, and 43 described with reference to fig. 1, and a detailed description thereof will be omitted. However, this exemplary embodiment is different from the exemplary embodiment illustrated in fig. 1 above in that each of the first and second LED stacks 23 and 33 has an n-type lower surface and a p-type upper surface. As in the exemplary embodiment shown in fig. 1, the third LED stack 43 according to this exemplary embodiment has a p-type lower surface and an n-type upper surface.
The second and third substrates 31 and 41 are similar to the second and third substrates 31 and 41 described with reference to fig. 1, and detailed description thereof will be omitted.
Meanwhile, since the first LED stack 23 has a p-type upper surface, the first p transparent electrode 125 forms an ohmic contact with the upper surface of the first LED stack 23. The first p transparent electrode 125 transmits light (e.g., red light) generated from the first LED stack 23.
The first n-reflective electrode 129 forms an ohmic contact with the lower surface of the first LED stack 23. The first n reflective electrode 129 forms an ohmic contact with the first LED stack 23 and reflects light generated from the first LED stack 23. The first n reflective electrode 129 may be formed of, for example, Au-Ti or Au-Sn. In addition, the first n reflective electrode 129 may include a diffusion barrier layer.
The second p-transparent electrode 35 forms an ohmic contact with the p-type semiconductor layer of the second LED stack 33. Since the second LED stack 33 has a p-type upper surface, the second p transparent electrode 35 is disposed on the second LED stack 33. The second p transparent electrode 35 may be composed of a metal layer or a conductive oxide layer transparent to red and green light.
The second n transparent electrode 139 may form an ohmic contact with the lower surface of the second substrate 31. The second n transparent electrode 139 may also be composed of a metal layer or a conductive oxide layer that is transparent to red and green light. The second n transparent electrode 139 is partially exposed by patterning the second LED stack 33 and the second substrate 31 to provide a connection terminal for electrically connecting to the n-type semiconductor layer of the second LED stack 33.
The third p transparent electrode 45 may form an ohmic contact with the p-type semiconductor layer of the third LED stack 33. The third p transparent electrode 45 may be composed of a metal layer or a conductive oxide layer that is transparent with respect to red, green, and green light.
The first color filter 137 is disposed between the first LED stack 23 and the second LED stack 33. In addition, a second color filter 47 is interposed between the second LED stack 33 and the third LED stack 43. The first color filter 137 transmits light generated from the first LED stack 23 and reflects light generated from the second LED stack 33. Meanwhile, the second color filter 47 transmits light generated from the first and second LED stacks 23 and 33 and reflects light generated from the third LED stack 43. Accordingly, light generated from the first LED stack 23 may be emitted to the outside through the second substrate 31, the second LED stack 33, the third LED stack 43, and the third substrate 41, and light generated from the second LED stack 33 may be emitted to the outside through the third LED stack 43 and the third substrate 41. Further, the light emitting diode stack 101 may prevent light generated from the second LED stack 33 from entering the first LED stack 23, or may prevent light generated from the third LED stack 43 from entering the second LED stack 33, thereby preventing light loss. Light generated from the first LED stack 23 is emitted to the outside through the first p transparent electrode 125, the second p transparent electrode 35, the second n transparent electrode 139, and the third p transparent electrode 45. In addition, light generated from the second LED stack 33 is emitted to the outside through the second p transparent electrode 35 and the third p transparent electrode 45.
In some exemplary embodiments, the first color filter 137 may reflect light generated from the third LED stack 43.
The first and second color filters 137 and 47 may be, for example, a low-pass filter allowing light in a low frequency band (i.e., a long wavelength band) to pass therethrough, a band-pass filter allowing light in a predetermined wavelength band, or a band-stop filter preventing light in a predetermined wavelength band from passing therethrough. Specifically, each of the first color filter 137 and the second color filter 47 may be a band-stop filter including a Distributed Bragg Reflector (DBR). The distributed bragg reflector may be formed by alternately stacking insulating layers (e.g., TiO2 and SiO2) having different refractive indices one on another. In addition, the stop band of the distributed bragg reflector can be controlled by adjusting the thicknesses of the TiO2 layer and the SiO2 layer. The low-pass filter and the band-pass filter may also be formed by alternately stacking insulating layers having different refractive indexes one on another.
The first bonding layer 153 bonds the first LED stack 23 to the support substrate 51. As shown in the drawing, the first n reflective electrode 129 may be adjacent to the first bonding layer 53. The first bonding layer 153 may be a light-transmissive layer or a light-opaque layer. The first bonding layer 153 may be, for example, a transparent inorganic insulating layer, a transparent organic insulating layer, or a transparent conductive layer.
The second bonding layer 155 bonds the second LED stack 33 to the first LED stack 23. As shown in the drawing, the second bonding layer 155 may be disposed on the first color filter 137 and adjacent to the second n transparent electrode 139. The second bonding layer 155 transmits light generated from the first LED stack 23. The second bonding layer 155 may be, for example, a transparent inorganic insulating layer, a transparent organic insulating layer, or a transparent conductive layer, and may be formed of, for example, light-transmitting spin-on glass.
Third bonding layer 157 bonds third LED stack 43 to second LED stack 33. As shown in the drawing, the third bonding layer 157 may be adjacent to the second p transparent electrode 35 and the second color filter 47. The third bonding layer 157 transmits light generated from the first and second LED stacks 23 and 33. The third bonding layer 157 may be, for example, a transparent inorganic insulating layer, a transparent organic insulating layer, or a transparent conductive layer, and may be formed of, for example, light-transmitting spin-on glass.
Fig. 12A to 12F are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack for a display according to another exemplary embodiment of the present disclosure.
Referring to fig. 12A, first, a third LED stack 43 is grown on a third substrate 41, and a third p transparent electrode 45 and a second color filter 47 are formed on the third LED stack 43. The third LED stack 43 is composed of GaN-based semiconductor layers, and may include a GaInN well layer. The third substrate 41 is a homogeneous substrate of a GaN-based semiconductor layer, and may be, for example, a GaN substrate doped with an n-type dopant. The composition ratio of GaInN for the third LED stack 43 may be determined such that the third LED stack 43 emits blue light. The third p transparent electrode 45 forms an ohmic contact with the p-type semiconductor layer.
Referring to fig. 12B, a second LED stack 33 is grown on a second substrate 31, and a second p transparent electrode 35 is formed on the second LED stack 33. The second LED stack 33 may be composed of GaN-based semiconductor layers, and may include a GaInN well layer. The second substrate 31 is a homogeneous substrate of a GaN-based semiconductor layer, and may be, for example, a GaN substrate doped with n-type dopants. The composition ratio of GaInN for the second LED stack 33 may be determined such that the second LED stack 33 emits green light. Meanwhile, the second p transparent electrode 35 forms ohmic contact with the p-type semiconductor layer.
The second substrate 31 is disposed such that the third bonding layer 157 is disposed to the second color filter 47, and the second p transparent electrode 35 on the second substrate 31 is adjacent to the third bonding layer 157. The third bonding layer 157 may be formed of, for example, spin-on glass. Thus, the second LED stack 33 is bonded to the third LED stack 43.
Referring to fig. 12C, a second n transparent electrode 139 may be formed on the second substrate 31. The second n transparent electrode 139 forms an ohmic contact with the second substrate 31. The second n transparent electrode 139 may be composed of a metal layer or a conductive oxide layer. The second n transparent electrode 139 may be omitted.
Referring to fig. 12D, a first LED stack 23 is grown on a first substrate 21, a first p-reflective electrode 125 is formed on the first LED stack 23, and a first color filter 137 is formed on the first p-transparent electrode 125.
The first substrate 21 may be, for example, a GaAs substrate. Further, the first LED stack 23 is composed of AlGaInP-based semiconductor layers, and includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The first p-reflective electrode 125 forms an ohmic contact with the p-type semiconductor layer.
The first color filter 137 is the same as the first color filter 37 described with reference to fig. 1, and detailed description thereof will be omitted to avoid redundancy.
Then, a second bonding layer 155 is disposed to the second n transparent electrode 139, and the first substrate 31 is disposed such that the first color filter 137 positioned on the first substrate 21 is adjacent to the second bonding layer 155. The second bonding layer 155 may be formed of, for example, spin-on glass. Thus, the first LED stack 23 is bonded to the second LED stack 33.
Referring to fig. 12E, the first LED stack 23 is bonded to the second LED stack 33, and the first substrate 21 is removed from the first LED stack 23 by using chemical etching. As a result, the first LED stack 23 is exposed.
Referring to fig. 12F, a first n reflective electrode 129 is formed on the exposed first LED stack 23. The first n-reflective electrode 129 includes a metal layer that reflects light generated from the first LED stack 23.
Then, a first bonding layer 153 is disposed on the first n reflective electrode 129, and the support substrate 51 is bonded to the first bonding layer 153. As a result, as shown in fig. 11, the light emitting diode stack 101 having the third substrate 41 exposed to the outside is provided.
The display device may be set up in the following way: the stack 101 of the first, second, and third LED stacks 23, 33, and 43 on the support substrate 51 is patterned in units of pixels, and then the first to third LED stacks are connected to each other by interconnection lines.
Fig. 13 is a schematic cross-sectional view of a light emitting diode stack 102 for a display according to still another exemplary embodiment of the present disclosure.
Referring to fig. 13, a light emitting diode stack 102 according to the exemplary embodiment is substantially similar to the light emitting diode stack 100 described with reference to fig. 1, except that the second and third substrates 31 and 41 are removed. After the second and third substrates 31 and 41 are used as growth substrates for the second and third LED stacks 33 and 43, respectively, the second and third substrates 31 and 41 are removed from the second and third LED stacks 33 and 43, respectively. Each of the second LED stack 33 and the third LED stack 43 was grown on a homogeneous GaN-based substrate, providing a reduced dislocation density of 103/cm2 to 107/cm 2.
Since the second and third substrates 31, 41 are removed, the interconnection lines electrically connected to these substrates 31, 41 may be electrically connected to the second and third LED stacks 33, 43, respectively. In addition, a rough surface 41a may be formed on the upper surface of the third LED stack 43.
Fig. 14 is a schematic cross-sectional view of a light emitting diode stack 103 for a display according to still another exemplary embodiment of the present disclosure.
Referring to fig. 14, a light emitting diode stack 103 according to this exemplary embodiment is substantially similar to the light emitting diode stack 101 described with reference to fig. 11, except that the second and third substrates 31 and 41 are removed. After the second and third substrates 31 and 41 are used as growth substrates for the second and third LED stacks 33 and 43, respectively, the second and third substrates 31 and 41 are removed from the second and third LED stacks 33 and 43, respectively. Each of the second LED stack 33 and the third LED stack 43 was grown on a homogeneous GaN-based substrate, providing a reduced dislocation density of 103/cm2 to 107/cm 2.
Since the second and third substrates 31, 41 are removed, the interconnection lines electrically connected to these substrates 31, 41 may be electrically connected to the second and third LED stacks 33, 43, respectively. In addition, a rough surface 41a may be formed on the upper surface of the third LED stack 43.
According to an exemplary embodiment, since a plurality of pixels can be formed at a wafer level using the light emitting diode stacks 100, 101, 102, 103 for a display, it is not necessary to separately mount light emitting diodes. Further, the light emitting diode stack according to the exemplary embodiment has a structure in which: the first, second, and third LED stacks 23, 33, and 43 are stacked in a vertical direction, thereby securing an area for a sub-pixel in a limited pixel area. In addition, the light emitting diode stack according to the exemplary embodiment allows light generated from the first, second, and third LED stacks 23, 33, and 43 to be emitted to the outside therethrough, thereby reducing light loss. In addition, each of the second and third LED stacks 33 and 43 may be grown on a homogeneous substrate to reduce the dislocation density thereof, thereby improving the light emitting efficiency. In addition, the second and third substrates 31 and 41 may remain on the second and third LED stacks 33 and 43 without being removed therefrom, thereby simplifying the process of manufacturing the light emitting diode stack.
Fig. 15 is a sectional view illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure.
Referring to fig. 15, a light emitting stack structure according to an exemplary embodiment of the present disclosure includes a plurality of epitaxial stacks stacked one on another. The epitaxial stack is disposed on a substrate 210.
The substrate 210 has a plate shape provided with a front surface and a rear surface.
The substrate 210 may have various shapes, each of which is provided with a front surface on which the epitaxial stack is mounted. The substrate 210 may include an insulating material. As a material for the substrate 210, glass, quartz, silicon, an organic polymer, or an organic-inorganic composite material may be used, but is not limited thereto or thereby. That is, the material for the substrate 210 should not be particularly limited as long as the material has an insulating property. In an exemplary embodiment of the present disclosure, a wiring portion may be further provided on the substrate 210 to apply a light emitting signal and a common voltage to each epitaxial stack. Specifically, in the case where each epitaxial stack is operated by the active matrix method, a driving device including a thin film transistor may be provided on the substrate in addition to the wiring portion. For this, the substrate 210 may be provided as a printed circuit board or a composite substrate obtained by forming a wiring part and/or a driving device on glass, quartz, silicon, an organic polymer, or an organic-inorganic composite material.
The epitaxial stacks are sequentially stacked on the front surface of the substrate 210.
In an exemplary embodiment of the present disclosure, two or more epitaxial stacks are provided, and the epitaxial stacks emit light having wavelength bands different from each other. That is, a plurality of epitaxial stacks are provided, and the epitaxial stacks have energy bands different from each other. In the present exemplary embodiment, three epitaxial stacks sequentially stacked on the substrate 210 are shown. In the following embodiments, three layers sequentially stacked on the substrate 210 will be referred to as a first epitaxial stack 220, a second epitaxial stack 230, and a third epitaxial stack 240, respectively.
Each epitaxial stack may emit color light in a visible light band among light of various wavelength bands. The light emitted from the epitaxial stack disposed at the lowermost end is the color light having the longest wavelength of the lowest energy band, and the wavelength of the color light emitted from the epitaxial stack becomes shorter from the bottom epitaxial stack to the top epitaxial stack. The light emitted from the epitaxial stack disposed at the uppermost end is a color light having the shortest wavelength of the highest energy band. For example, the first epitaxy stack 220 emits a first color light L1, the second epitaxy stack 230 emits a second color light L2, and the third epitaxy stack 240 emits a third color light L3. The first, second, and third color lights L1, L2, and L3 may be color lights different from each other, and the first, second, and third color lights L1, L2, and L3 may be color lights having wavelength bands different from each other (the order is shortened). That is, the first, second, and third color lights L1, L2, and L3 may have wavelength bands different from each other, and may be short wavelength bands of color lights having higher energy from the first to third color lights L1 to L3.
In the present exemplary embodiment, the first color light L1 may be red light, the second color light L2 may be green light, and the third color light L3 may be blue light.
Each epitaxial stack emits light to travel in a direction facing the front surface of the substrate 210. In this case, the light emitted from one epitaxial stack travels in a direction in which the front surface of the substrate 210 faces after passing through another epitaxial stack located on an optical path of the light emitted from the one epitaxial stack. The direction in which the front surface of the substrate 210 faces represents the direction in which the first epitaxial stack 220, the second epitaxial stack 230, and the third epitaxial stack 240 are stacked.
Hereinafter, for convenience of explanation, a direction in which the front surface of the substrate 210 faces will be referred to as a "front surface direction" or an "upward direction", and a direction in which the rear surface of the substrate 210 faces will be referred to as a "rear surface direction" or a "downward direction". However, the terms "upward" and "downward" denote directions opposite to each other, and may vary according to the arrangement or stacking direction of the light emitting stack structure.
Each epitaxial stack emits light in an upward direction and transmits a large portion of the light emitted from the epitaxial stack disposed therebelow. In other words, light emitted from the first epitaxial stack 220 travels in the front surface direction after passing through the second epitaxial stack 230 and the third epitaxial stack 240, and light emitted from the second epitaxial stack 230 travels in the front surface direction after passing through the third epitaxial stack 240. To this end, at least a portion (preferably, the entire portion) of the other epitaxial stacks except the epitaxial stack disposed at the lowermost end may be formed of a light-transmitting material. The term "light-transmitting material" denotes not only a case where the light-transmitting material transmits all light but also a case where the light-transmitting material transmits light having a predetermined wavelength or a part of light having a predetermined wavelength. In an exemplary embodiment, each epitaxial stack may transmit about 60% or more of light from an epitaxial stack disposed therebelow. According to another embodiment, each epitaxial stack may transmit about 80% or more of light from an epitaxial stack disposed therebelow, and according to another embodiment, each epitaxial stack may transmit about 90% or more of light from an epitaxial stack disposed therebelow.
In the light emitting stack structure having the above-described structure according to the exemplary embodiment of the present disclosure, the epitaxial stacks may be independently driven since the signal lines, which respectively apply the light emitting signals to the epitaxial stacks, are independently connected to the epitaxial stacks, and various colors may be displayed according to whether light is emitted from each of the epitaxial stacks. Further, since the epitaxial stacks emitting light having different wavelengths are formed to overlap each other, the light emitting stack structure may be formed in a narrow region.
Fig. 16 is a cross-sectional view illustrating a light emitting stack structure having a wiring portion that allows each epitaxial stack to be independently driven according to an exemplary embodiment of the present disclosure. Fig. 17A to 17C are sectional views illustrating each epitaxial stack of fig. 16 in detail.
Referring to fig. 16, the light emitting stack structure includes a light emitting area EA and a peripheral area PA disposed adjacent to the light emitting area EA.
The light emitting area EA is an area in which light is emitted toward an upper direction from the first, second, and third epitaxial stacks 220, 230, and 240. The light emitting areas EA of the first, second, and third epitaxial stacks 220, 230, and 240 are stacked on each other, and thus the light emitting areas EA of the first, second, and third epitaxial stacks 220, 230, and 240 have the same area as each other.
The peripheral area PA is an area in which a wiring portion connected to the first epitaxial stack 220, the second epitaxial stack 230, and the third epitaxial stack 240 is disposed. Here, light may be emitted from the first, second, and third epitaxial stacks 220, 230, and 240 disposed in the peripheral area PA. However, although not shown in the drawings, various additional components may be provided in the peripheral area PA in addition to the wiring portion, and a separate barrier layer or a reflective layer that prevents light from being emitted to the outside may also be provided in the peripheral area PA. Therefore, light is not emitted through the peripheral area PA.
Each of the first, second, and third epitaxial stacks 220, 230, and 240 is disposed on the substrate 210 with a corresponding adhesive layer among the first, second, and third adhesive layers 250a, 250b, and 250c interposed therebetween. The first adhesive layer 250a, the second adhesive layer 250b, and the third adhesive layer 250c may include a non-conductive material, and may include a light-transmitting material. For example, the first adhesive layer 250a, the second adhesive layer 250b, and the third adhesive layer 250c may include an Optically Clear Adhesive (OCA). The materials for the first, second, and third adhesive layers 250a, 250b, and 250c should not be particularly limited as long as the materials for the first, second, and third adhesive layers 250a, 250b, and 250c are optically transparent and stably attached to each epitaxial stack. For example, the first, second, and third adhesive layers 250a, 250b, and 250c may include organic materials such as epoxy-based polymers like SU-8, various resists, parylene, poly (methyl methacrylate) (PMMA), and benzocyclobutene (BCB), and inorganic materials such as silicon oxide, aluminum oxide, and molten glass. Further, a conductive oxide may be used as an adhesion layer as needed, and in this case, the conductive oxide is required to be insulated from other components. In the case of using an organic material as an adhesive layer and using a molten glass of an inorganic material as an adhesive layer, the first, second, and third epitaxial stacks 220, 230, and 240 and the substrate 210 are attached to each other by: a material is coated on the adhesion sides of the first, second, and third epitaxial stacks 220, 230, and 240 and the substrate 210, and a high temperature and high pressure are applied to the material in a high vacuum state. In the case where an inorganic material (excluding molten glass) is used as the bonding layer, the first epitaxial stack 220,
The second and third epitaxial stacks 230, 240 and the substrate 210 are attached to each other by: a material is deposited on the adhesion sides of the first, second, and third epitaxial stacks 220, 230, and 240 and the substrate 210, the material is planarized using Chemical Mechanical Planarization (CMP), plasma treatment is performed on the surface of the material, and adhesion is performed in a high vacuum state.
Referring to fig. 17A through 17C, the first, second, and third epitaxial stacks 220, 230, and 240 include first semiconductor layers 221, 231, and 241, active layers 223, 233, and 243, and second semiconductor layers 225, 235, and 245, which are sequentially stacked. In fig. 17A to 17C, the first semiconductor layers 221, 231 and 241, the active layers 223, 233 and 243 and the second semiconductor layers 225, 235 and 245 are sequentially stacked in an upward direction, however, it should be noted that the first epitaxial stack 220, the second epitaxial stack 230 and the third epitaxial stack 240 of fig. 17A to 17C are shown upside down in fig. 16. That is, the first, second, and third epitaxial stacks 220, 230, and 240 shown in fig. 16 are arranged in the upward direction in the order of the second semiconductor layers 225, 235, and 245, the active layers 223, 233, and 243, and the first semiconductor layers 221, 231, and 241.
Referring to fig. 17A, the first semiconductor layer 221, the active layer 223, and the second semiconductor layer 225 of the first epitaxial stack 220 may include a red light emitting semiconductor material. As a semiconductor material that emits red light, aluminum gallium arsenide (AlGaAs), gallium arsenic phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), and gallium phosphide (GaP) can be used. However, the semiconductor material that emits red light should not be limited thereto or thereby, and various other materials may be used.
The first semiconductor layer 221 may be a semiconductor layer including first conductive type impurities, and the second semiconductor layer 225 may be a semiconductor layer including second conductive type impurities. The first conductivity type and the second conductivity type have polarities opposite to each other. When the first conductivity type is n-type, the second conductivity type is p-type, and when the first conductivity type is p-type, the second conductivity type is n-type. In an exemplary embodiment of the present disclosure, a structure in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially formed will be described as a representative example, and the first semiconductor layer 221 may be referred to as an "n-type semiconductor layer" and the second semiconductor layer 225 may be referred to as a "p-type semiconductor layer". This is for convenience of explanation, and according to another embodiment of the present disclosure, the first semiconductor layer 221 and the second semiconductor layer 225 may be a p-type semiconductor layer and an n-type semiconductor layer, respectively.
By removing a portion of the n-type semiconductor layer 221, the active layer 223, and the p-type semiconductor layer 225, a mesa is formed in the first epitaxial stack 220. A first n-type contact electrode 229 is disposed on the upper surface of the exposed n-type semiconductor layer 221, and a first p-type contact electrode 227 is disposed on the p-type semiconductor layer 225 having the mesa formed therein.
The first n-type contact electrode 229 and the first p-type contact electrode 227 may have a single layer structure or a multi-layer structure of a metal material. For example, the first n-type contact electrode 229 and the first p-type contact electrode 227 may include a metal material such as Al, Ti, Cr, Au, Ag, Ti, Sn, Ni, Cr, W, Cu, or an alloy thereof. In particular, the first p-type contact electrode 227 may include a metal material having a high reflectivity, and since the first p-type contact electrode 227 includes a metal material having a high reflectivity, the light emitting efficiency in the upward direction of the light emitted from the first epitaxial stack 220 may be improved.
Since the first epitaxial stack 220 is inverted and disposed on the substrate 210 with the first adhesive layer 250a interposed between the first epitaxial stack 220 and the substrate 210, the first n-type contact electrode 229 and the first p-type contact electrode 227 are disposed between the substrate 210 and the second adhesive layer 250 b. The first p-type contact electrode 227 overlaps the light emitting area EA and reflects light emitted from the active layer 223 of the first epitaxial stack 220 toward an upper direction.
Referring to fig. 17B, the second epitaxial stack 230 includes an n-type semiconductor layer 231, an active layer 233, and a p-type semiconductor layer 235, which are sequentially stacked. The n-type semiconductor layer 231, the active layer 233, and the p-type semiconductor layer 235 may include a semiconductor material emitting green light. As a semiconductor material that emits green light, indium gallium nitride (InGaN), gallium nitride (GaN), gallium phosphide (GaP), aluminum gallium indium phosphide (AlGaInP), and aluminum gallium phosphide (AlGaP) can be used. However, the semiconductor material emitting green light should not be limited thereto or thereby, but various other materials may be used.
Referring again to fig. 16, a second p-type contact electrode 237 is disposed on the p-type semiconductor layer 235 of the second epitaxial stack 230. In fig. 16, since the second epitaxial stack 230 corresponds to the inverted second epitaxial stack 230 of fig. 17B, the second p-type contact electrode 237 is disposed between the first epitaxial stack 220 and the second epitaxial stack 230, specifically, between the second adhesive layer 250B and the second epitaxial stack 230.
The second p-type contact electrode 237 may include a transparent conductive material, for example, a Transparent Conductive Oxide (TCO), and may have a thickness of about 2000 angstroms to about 2 microns.
Referring to fig. 17C, the third epitaxial stack 240 includes an n-type semiconductor layer 241, an active layer 243, and a p-type semiconductor layer 245, which are sequentially stacked. The n-type semiconductor layer 241, the active layer 243, and the p-type semiconductor layer 245 may include a semiconductor material emitting blue light. As a semiconductor material emitting blue light, gallium nitride (GaN), indium gallium nitride (InGaN), and zinc selenide (ZnSe) may be used. However, the semiconductor material emitting blue light should not be limited thereto or thereby, and various other materials may be used.
Referring again to fig. 16, a third p-type contact electrode 247 is disposed on the p-type semiconductor layer 245 of the third epitaxial stack 240. In fig. 16, since the third epitaxial stack 240 corresponds to the inverted third epitaxial stack 240 of fig. 17C, the third p-type contact electrode 247 is disposed between the second epitaxial stack 230 and the third epitaxial stack 240, specifically, between the third adhesive layer 250C and the third epitaxial stack 240.
In the present exemplary embodiment, each of the n-type semiconductor layers 221, 231, and 241 and each of the p-type semiconductor layers 225, 235, and 245 of the first, second, and third epitaxial stacks 220, 230, and 240 have a single-layer structure, however, according to an embodiment, each of the n-type semiconductor layers 221, 231, and 241 and each of the p-type semiconductor layers 225, 235, and 245 of the first, second, and third epitaxial stacks 220, 230, and 240 may have a multi-layer structure, and may include a superlattice layer. The active layers 223, 233, and 243 of the first, second, and third epitaxial stacks 220, 230, and 240 may have a single quantum well structure or a multiple quantum well structure.
In the present exemplary embodiment, the second p-type contact electrode 237 and the third p-type contact electrode 247 are disposed to overlap the light emitting area EA. The second and third p-type contact electrodes 237 and 247 may include a transparent conductive material to transmit light from the epitaxial stack disposed thereunder. For example, each of the second and third p-type contact electrodes 237 and 247 may include a Transparent Conductive Oxide (TCO). The transparent conductive oxide may include tin oxide (SnO), indium oxide (InO2), zinc oxide (ZnO), Indium Tin Oxide (ITO), and Indium Tin Zinc Oxide (ITZO). The transparent conductive oxide may be deposited by Chemical Vapor Deposition (CVD) or Physical Vapor Deposition (PVD) using an evaporator or a sputter. The second and third p-type contact electrodes 237 and 247 may have a thickness sufficient to be used as an etch stopper in the following manufacturing process under the condition that a range of transmittance is satisfied.
In the present exemplary embodiment, the first, second, and third p-type contact electrodes 227, 237, and 247 may be connected to a common line. The common line is a line to which a common voltage is applied. In addition, the common signal line may be connected to the first n-type contact electrode 229 and the p-type semiconductor layer 235 of the second epitaxial stack 230 and the p-type semiconductor layer 245 of the third epitaxial stack 240, respectively. In the present exemplary embodiment, a common voltage Sc is applied to the first, second, and third p-type contact electrodes 227, 237, and 247 through a common line, and a light emission signal is applied to the first n-type contact electrode 229, the n-type semiconductor layer 231 of the second epitaxial stack 230, and the n-type semiconductor layer 241 of the third epitaxial stack 240 through a light emission signal line. Thus, light emission of the first, second, and third epitaxial stacks 220, 230, and 240 is controlled. The light emission signals include first, second, and third light emission signals SR, SG, and SB corresponding to the first, second, and third epitaxial stacks 220, 230, and 240, respectively, and are signals corresponding to light emission of red, green, and blue light, respectively.
In the above-described embodiments, the common voltage is applied to the p-type semiconductor layers of the first, second, and third epitaxial stacks 220, 230, and 240, and the light emission signal is applied to the n-type semiconductor layers of the first, second, and third epitaxial stacks 220, 230, and 240, however, embodiments of the present disclosure should not be limited thereto or thereby. According to another embodiment of the present disclosure, a common voltage may be applied to the n-type semiconductor layers of the first, second, and third epitaxial stacks 220, 230, and 240, and a light emitting signal may be applied to the p-type semiconductor layers of the first, second, and third epitaxial stacks 220, 230, and 240. This structure can be easily achieved by forming each epitaxial stack in the order of the p-type semiconductor layer, the active layer, and the n-type semiconductor layer, which is different from the stacking order of each epitaxial stack formed in the order of the n-type semiconductor, the active layer, and the p-type semiconductor in the above-described embodiment. According to the above-described embodiment, the first, second, and third epitaxial stacks 220, 230, and 240 are driven in response to a light emitting signal applied thereto. That is, the first epitaxial stack 220 is driven in response to the first light emission signal SR, the second epitaxial stack 230 is driven in response to the second light emission signal SG, and the third epitaxial stack 240 is driven in response to the third light emission signal SB. In this case, the first, second, and third light emission signals SR, SG, and SB are independently applied to the first, second, and third epitaxial stacks 220, 230, and 240, and as a result, the first, second, and third epitaxial stacks 220, 230, and 240 are independently driven. The light emitting stack structure may provide light of various colors by combining the first, second, and third color light emitted toward the upper direction from the first, second, and third epitaxial stacks.
When displaying colors, the light emitting stack structure having the above structure provides different color light through regions overlapped with each other, not through different regions on a plane, and thus the light emitting elements can be reduced and integrated. According to the conventional art, light emitting elements emitting different color lights (for example, red light, green light, and blue light) are disposed apart from each other on a plane to realize full color display. Therefore, since the light emitting elements are disposed apart from each other on a plane, an area occupied by the light emitting elements in the conventional art is relatively large. On the other hand, according to the present disclosure, light emitting elements emitting different color lights are disposed to overlap each other in the same region to form a light emitting stack structure, and thus a full color display can be realized by a region significantly smaller than that of the conventional art. Therefore, a high-resolution display device can be manufactured in a small area.
Further, even in the case of the conventional light emitting device manufactured in a stacked manner, the conventional light emitting device is manufactured by: the contact portion is independently formed in each light emitting element, for example, the light emitting elements are independently and individually formed and the light emitting elements are connected to each other using a wiring. As a result, the structure of the light emitting device is complicated, and it is not easy to manufacture the light emitting device. However, the light emitting stack structure according to the exemplary embodiment of the present disclosure is manufactured by: a plurality of epitaxial stacks are sequentially stacked on one substrate, contact portions are formed in the epitaxial stacks by a minimum process, and a wiring portion is connected to the epitaxial stacks. Further, according to the exemplary embodiments of the present disclosure, since one light emitting stack structure is mounted instead of the conventional light emitting element, the manufacturing method of the display device may be simplified as compared to the conventional display device manufacturing method in which light emitting elements of various colors are separately manufactured and the light emitting elements are independently mounted.
The light emitting stack structure according to the exemplary embodiment of the present disclosure may further include various components providing color light having high purity and high efficiency. For example, the light emitting stack structure according to the exemplary embodiment of the present disclosure may include a wave-pass filter to prevent light having a relatively short wavelength from traveling to an epitaxial stack that emits light having a relatively long wavelength.
In the following embodiments, features different from those of the above-described embodiments will be mainly described to avoid redundancy. It is assumed that the unexplained part is the same as or similar to the part of the embodiment described above.
Fig. 18 is a cross-sectional view illustrating a light emitting stack structure having a pre-pass filter according to an exemplary embodiment of the present disclosure.
Referring to fig. 18, the light emitting stack structure according to an exemplary embodiment of the present disclosure may include a first wave-pass filter 261 disposed between the first and second epitaxial stacks 220 and 230.
The first pass filter 261 selectively transmits light having a predetermined wavelength. The first pass filter 261 may transmit the first color light emitted from the first epitaxial stack 220 and may block or reflect light other than the first color light. Accordingly, the first color light emitted from the first epitaxial stack 220 may travel in an upward direction, and the second and third color lights emitted from the second and third epitaxial stacks 230 and 240, respectively, may not travel toward the first epitaxial stack 220, but may be reflected or blocked by the first band pass filter 261.
The second color light and the third color light have a relatively shorter wavelength and a relatively higher energy than the first color light. In the case where the second color light and the third color light are incident into the first epitaxial stack 220, additional light emission may be induced in the first epitaxial stack 220. In the present exemplary embodiment, the second color light and the third color light may be prevented from being incident into the first epitaxial stack 220 by the first pass filter 261.
In an exemplary embodiment of the present disclosure, the second pass filter 263 may be disposed between the second epitaxial stack 230 and the third epitaxial stack 240. The second pass filter 263 may transmit the first and second color lights emitted from the first and second epitaxial stacks 220 and 230, respectively, and may block or reflect light other than the first and second color lights. Accordingly, the first and second color lights respectively emitted from the first and second epitaxial stacks 220 and 230 may travel in an upward direction, and the third color light emitted from the third epitaxial stack 240 may not travel toward the first and second epitaxial stacks 220 and 230 but may be reflected or blocked by the second pass filter 263.
Similar to the above description, the third color light has a relatively shorter wavelength and a relatively higher energy than the first color light and the second color light. In the case where the light of the third color is incident into the first and second epitaxial stacks 220 and 230, additional light emission may be induced in the first and second epitaxial stacks 220 and 230. In the present exemplary embodiment, the third color light may be prevented from being incident into the first and second epitaxial stacks 220 and 230 by the second pass filter 263.
The light emitting stack structure according to the exemplary embodiments of the present disclosure may further include various components to provide efficient and uniform light. As an example, the light emitting stack structure according to the exemplary embodiment of the present disclosure may include various concave and convex portions on the light emitting surface.
Fig. 19 and 20 are cross-sectional views illustrating light emitting stack structures according to exemplary embodiments of the present disclosure, in which concave and convex portions are formed at least a portion of an epitaxial stack in the respective light emitting stack structures.
The light emitting stack structure according to an exemplary embodiment of the present disclosure may include a concave and convex portion PR formed on an upper surface of at least one n-type semiconductor layer among the n-type semiconductor layers 221, 231, and 241 of the first, second, and third epitaxial stacks 220, 230, and 240. In an exemplary embodiment of the present disclosure, the concave-convex portion PR of each epitaxial stack may be selectively formed. For example, the concave-convex portion PR may be disposed on the first and third epitaxial stacks 20 and 40 as shown in fig. 19, and the concave-convex portion PR may be disposed on the first, second, and third epitaxial stacks 220, 230 and 240 as shown in fig. 20. The concave and convex portions PR of each epitaxial stack may be disposed on the n-type semiconductor layers 221, 231, and 241 corresponding to the light emitting surfaces of the first, second, and third epitaxial stacks 220, 230, and 240, respectively.
The concave-convex portion PR is for improving light emitting efficiency. The concave-convex portion PR may be provided in various shapes such as a polygonal pyramid, a hemisphere, or a surface having roughness on which the concave-convex portion is randomly arranged. The concave-convex portion PR may be textured by various etching processes, or may be formed using a patterned sapphire substrate.
In an exemplary embodiment of the present disclosure, the first, second, and third color lights from the first, second, and third epitaxial stacks 220, 230, and 240 may have different intensities, and the difference in intensity may cause a difference in visibility. In the present exemplary embodiment, the light emitting efficiency may be improved by the concave and convex portions PR selectively formed on the light emitting surfaces of the first, second, and third epitaxial stacks 220, 230, and 240, and thus the intensity difference between the first, second, and third color lights may be reduced. Since the visibility of color light corresponding to red and/or blue is lower than that of color light corresponding to green, the visibility difference may be reduced by texturing the first and/or third epitaxial stacks 220 and 240. In particular, since red light is provided from the lowermost portion of the light emitting stack structure, the red light has a relatively small intensity. In this case, when the concave-convex portion PR is formed on the first epitaxial stack 220, light efficiency may be improved.
The light emitting stack structure having the above structure may correspond to a light emitting element capable of displaying various colors, and may be used as a pixel in a display device. In the following description, a display device employing the light emitting stack structure having the above structure as a component thereof will be described.
Fig. 21 is a plan view illustrating a display device 2100 according to an exemplary embodiment of the present disclosure, and fig. 22 is an enlarged plan view illustrating a portion P1 of fig. 21.
Referring to fig. 21 and 22, a display device 2100 according to an exemplary embodiment of the present disclosure displays arbitrary visual information such as text, video, photos, and 2-dimensional or 3-dimensional images.
The display device 2100 may have various shapes such as a closed polygonal shape having a straight side like a rectangular shape, a circular shape or an elliptical shape having a curved side, and a semicircular shape or a semi-elliptical shape having a straight side and a curved side. In an exemplary embodiment of the present disclosure, a display device having a rectangular shape is illustrated.
The display device 2100 includes a plurality of pixels 2110 that display an image. Each pixel 2110 is the smallest unit of a display image. Each pixel 2110 may include a light emitting stack structure having the above-described structure, and may emit white light and/or color light.
In an exemplary embodiment of the present disclosure, each pixel 2110 includes a first sub-pixel 2110R emitting red light, a second sub-pixel 2110G emitting green light, and a third sub-pixel 2110B emitting blue light. The first, second, and third subpixels 2110R, 2110G, and 2110B may correspond to the first, second, and third epitaxial stacks 220, 230, and 240 of the light emitting stack structure, respectively.
The pixels 2110 are arranged in a matrix form. The expression that the pixels 2110 are arranged in a matrix form may mean not only that the pixels 2110 are accurately arranged in a line along a row or a column, but also that the pixels 2110 are arranged along a row or a column as a whole while changing a detailed position of the pixels 2110, for example, a zigzag shape.
Fig. 23 is a block diagram illustrating a display device according to an exemplary embodiment of the present disclosure.
Referring to fig. 23, the display device 2100 according to an exemplary embodiment of the present disclosure includes a timing controller 2350, a scan driver 2310, a data driver 2330, a line part, and pixels. In the case where each pixel includes a plurality of sub-pixels, each sub-pixel is independently connected to the scan driver 2310 and the data driver 2330 through line portions.
The timing controller 2350 receives various control signals and image data required to drive the display device 2100 from an external source (e.g., a system transmitting the image data). The timing controller 2350 rearranges the received image data and applies the rearranged image data to the data driver 2330. In addition, the timing controller 2350 generates scan control signals and data control signals required to drive the scan driver 2310 and the data driver 2330 and applies the generated scan control signals and data control signals to the scan driver 2310 and the data driver 2330, respectively.
The scan driver 2310 receives a scan control signal from the timing controller 2350 and generates a scan signal in response to the scan control signal.
The data driver 2330 receives data control signals and image data from the timing controller 2350 and generates data signals in response to the data control signals.
The wiring section includes a plurality of signal lines. Specifically, the line portion includes a scan line 2130 connecting the scan driver 2310 and the sub-pixels and a data line 2120 connecting the data driver 2330 and the sub-pixels. The scan lines 2130 may be respectively connected to the subpixels, and the scan lines respectively connected to the subpixels are shown as a first sub-scan line 2130R, a second sub-scan line 2130G, and a third sub-scan line 2130B.
In addition, the line portion may further include lines connecting the timing controller 2350 and the scan driver 2310, the timing controller 2350 and the data driver 2330, or other components to each other to transmit signals.
The scan lines 2130 apply scan signals generated by the scan driver 2310 to the subpixels. A data signal generated by the data driver 2330 is applied to the data line 2120.
The sub-pixels are connected to scan lines 2130 and data lines 2120. When a scan signal from the scan line 2310 is applied to the sub-pixel, the sub-pixel selectively emits light in response to a data signal supplied from the data line 2120. As an example, each sub-pixel emits light of a luminance corresponding to a data signal applied thereto during each frame period. The sub-pixel to which the data signal corresponding to the black luminance is applied does not emit light during the corresponding frame period, and thus black is displayed.
In an exemplary embodiment of the present disclosure, the sub-pixels may be driven in a passive matrix manner or an active matrix manner. When the display device is driven in an active matrix manner, the display device 2100 may be driven by being further supplied with a first pixel power supply and a second pixel power supply in addition to a scan signal and a data signal.
Fig. 24 is a circuit diagram showing one sub-pixel used for a passive matrix type display device. In this case, the sub-pixel may be one of sub-pixels, for example, a red sub-pixel, a green sub-pixel, and a blue sub-pixel, and the first sub-pixel 2110R is illustrated in the present exemplary embodiment.
Referring to fig. 24, the first subpixel 2110R includes a light emitting element 2150 connected between a scan line 2130 and a data line 2120. The light emitting element 2150 corresponds to the first epitaxial stack 220. When a voltage equal to or greater than a threshold voltage is applied between the p-type semiconductor layer and the n-type semiconductor layer, the first epitaxial stack 220 emits light of a luminance corresponding to the level of the voltage applied thereto. That is, light emission of the first subpixel 2110R can be controlled by controlling a voltage of a scan signal applied to the scan line 2130 and/or a voltage of a data signal applied to the data line 2120.
Fig. 25 is a circuit diagram showing a first sub-pixel 2110R used for an active matrix type display device. When the display device is an active matrix type display device, the first sub-pixels 2110R may be driven by being further supplied with the first pixel power source ELVDD and the second pixel power source ELVSS, in addition to the scan signal and the data signal.
Referring to fig. 25, the first subpixel 2110R includes one or more light emitting elements 2150 and a transistor part connected to the light emitting element 2150.
The light emitting element 2150 may correspond to the first epitaxial stack 220, a p-type semiconductor layer of the light emitting element 2150 may be connected to the first pixel power source ELVDD via a transistor portion, and an n-type semiconductor layer of the light emitting element 2150 may be connected to the second pixel power source ELVSS. The first pixel power source ELVDD and the second pixel power source ELVSS may have different potentials from each other. As an example, the second pixel power source ELVSS may have a potential lower than that of the first pixel power source ELVDD by a threshold voltage of the light emitting element 2150 or more. Each of the light emitting elements 2150 emits light of luminance corresponding to the driving current controlled by the transistor portion.
According to an exemplary embodiment of the present disclosure, the transistor part includes the first and second transistors M1 and M2 and the storage capacitor Cst. However, the configuration of the transistor portion should not be limited to the embodiment shown in fig. 25.
The first transistor M1 (switching transistor) includes a source electrode connected to the data line 2120, a drain electrode connected to the first node N1, and a gate electrode connected to the scan line 2130. When a scan signal having a voltage sufficient to turn on the first transistor M1 is supplied through the scan line 2130, the first transistor M1 turns on to electrically connect the data line 2120 and the first node N1. In this case, a data signal corresponding to a frame is applied to the data line 2120, and thus the data signal is applied to the first node N1. The storage capacitor Cst charges the data signal applied to the first node N1.
The second transistor M2 (driving transistor) includes a source electrode connected to the first pixel power source ELVDD, a drain electrode connected to the N-type semiconductor layer of the light emitting element 2150, and a gate electrode connected to the first node N1. The second transistor M2 controls the amount of driving current supplied to the light emitting element 2150 in response to the voltage of the first node N1.
One electrode of the storage capacitor Cst is connected to the first pixel power source ELVDD, and the other electrode of the storage capacitor Cst is connected to the first node N1. The storage capacitor Cst charges a voltage corresponding to the data signal applied to the first node N1 and maintains the charged voltage until the data signal of the next frame is supplied.
For convenience of explanation, fig. 25 shows a transistor portion including two transistors. However, the number of transistors included in the transistor portion should not be limited to two, but the configuration of the transistor portion may be changed in various ways. For example, the transistor portion may include more transistors and more capacitors. Further, in the present exemplary embodiment, the configurations of the first transistor, the second transistor, the storage capacitor, and the wiring are not shown in detail, however, the first transistor, the second transistor, the storage capacitor, and the wiring may be changed in various ways within a range where the circuit according to the exemplary embodiment of the present disclosure is implemented.
The above-described pixels may be changed in various ways within the scope of the present disclosure, and may be implemented in the following structure.
Fig. 26 is a plan view illustrating a pixel according to an exemplary embodiment of the present disclosure, and fig. 27A and 27B are cross-sectional views taken along lines I-I 'and II-II' of fig. 26, respectively.
Referring to fig. 26, 27A, and 27B, a pixel according to an exemplary embodiment of the present disclosure includes a light emitting region EA and a peripheral region PA. The epitaxial stack is stacked in the light emitting area EA. In the present exemplary embodiment, the epitaxial stack includes a first epitaxial stack 220, a second epitaxial stack 230, and a third epitaxial stack 240.
The first, second, and third epitaxial stacks 220, 230, and 240 are connected to the first, second, and third sub-scan lines 2130R, 2130G, and 2130B and the data line 2120. In an exemplary embodiment of the present disclosure, the first, second, and third sub-scan lines 2130R, 2130G, and 2130B may extend in a first direction (e.g., a horizontal direction as shown in fig. 26). The data line 2120 is connected to the first p-type contact electrode 227 through the first contact hole CH1, and the first p-type contact electrode 227 basically functions as the data line 2120. Accordingly, hereinafter, the first p-type contact electrode 227 may be referred to as a data line 2120. The data line 2120 may extend in a second direction (e.g., a vertical direction crossing the first, second, and third sub-scan lines 2130R, 2130G, and 2130B as shown in fig. 26). However, the directions in which the first, second, and third sub-scan lines 2130R, 2130G, 2130B and the data line 2120 extend should not be limited thereto or thereby, but may be changed in various ways according to the arrangement of pixels.
The first sub-scan line 2130R and the data line (specifically, the first p-type contact electrode 227) are connected to the first epitaxial stack 220. The data line 2120 and the second sub-scan line 2130G are connected to the second epitaxial stack 230 through the first contact hole CH1 and the second contact hole CH2, respectively. The data line 2120 and the third sub-scan line 2130B are connected to the third epitaxial stack 240 through the first contact hole CH1 and the second contact hole CH2, respectively. In the present exemplary embodiment, the first contact hole CH1 and the second contact hole CH2 are formed in the peripheral area PA.
An adhesive layer, a contact electrode, and a wave pass filter are disposed between the substrate 210 and the first epitaxial stack 220, between the first epitaxial stack 220 and the second epitaxial stack 230, and between the second epitaxial stack 230 and the third epitaxial stack 240. Hereinafter, a pixel according to an exemplary embodiment of the present disclosure will be described according to a stacking order.
According to the present exemplary embodiment, the first epitaxial stack 220 having the mesa structure is disposed on the substrate 210 with the first adhesive layer 250a interposed therebetween.
A first insulating layer 271 is disposed on a lower surface (i.e., a surface facing the substrate 210) of the first epitaxial stack 220. The first insulating layer 271 is provided with a plurality of contact holes defined therethrough. The first n-type contact electrode 229 in contact with the n-type semiconductor layer of the first epitaxial stack 220 is disposed in a contact hole corresponding to the peripheral area PA, and the first p-type contact electrode 227 in contact with the p-type semiconductor layer of the first epitaxial stack 220 is disposed in a contact hole corresponding to the light emitting area EA. The first and second ohmic electrodes 229 'and 227' may be disposed on regions in which the first n-type contact electrode 229 and the first p-type contact electrode 227 are formed to make ohmic contact with the first p-type contact electrode 227 and the first n-type contact electrode 229. The first and second ohmic electrodes 229 'and 227' for ohmic contact may include various materials. In an exemplary embodiment of the present disclosure, the second ohmic electrode 227' corresponding to the p-type ohmic electrode may include au (zn) or au (be). In this case, since the reflectivity of the material for the second ohmic electrode 227' is lower than those of Ag, Al, and Au, an additional reflective electrode may also be provided. As a material for the additional reflective electrode, Ag or Au may be used, and a layer including Ti, Ni, Cr, or Ta may be provided as an adhesive layer for adhering adjacent components. In this case, the adhesive layer may be thinly deposited on the upper and lower surfaces of the reflective electrode including Ag or Au.
The first p-type contact electrode 227 overlaps the light emitting region EA when viewed in a plan view, and is disposed to cover the entire light emitting region EA. The first p-type contact electrode 227 may include a material having reflectivity to reflect light in the first epitaxial stack 220. In this case, the first insulating layer 271 may be formed to have reflectivity, so that reflection of light in the first epitaxial stack 220 is easily performed. For example, the first insulating layer 271 may have an omnidirectional reflector (ODR) structure.
The second insulating layer 273 is disposed between the first p-type contact electrode 227 and the substrate 210. The second insulating layer 273 covers the lower surface of the first epitaxial stack 220 on which the first p-type contact electrode 227 is formed, and has a contact hole through which the first n-type contact electrode 229 is exposed. The first sub-scan line 2130R is disposed between the second insulating layer 273 and the substrate 210 to apply a data signal to the first n-type contact electrode 229.
The second adhesive layer 250b is disposed on the first epitaxial stack 220, and the first pass filter 261, the second p-type contact electrode 237, and the second epitaxial stack 230 are sequentially disposed on the second adhesive layer 250 b. Although not separately shown, the second epitaxial stack 230 includes a p-type semiconductor layer, an active layer, and an n-type semiconductor layer sequentially stacked in an upward direction from the bottom of the second epitaxial stack 230.
In the present exemplary embodiment, the first wave-pass filter 261 and the second p-type contact electrode 237 may have substantially the same area as that of the first epitaxial stack 220, and the second epitaxial stack 230 may have an area smaller than that of the first epitaxial stack 220. Since the second epitaxial stack 230 has an area smaller than that of the first epitaxial stack 220, a portion of the second p-type contact electrode 237 may be exposed.
The third adhesive layer 250c is disposed on the second epitaxial stack 230, and the second pass filter 263, the third p-type contact electrode 247, and the third epitaxial stack 240 are sequentially disposed on the third adhesive layer 250 c. Although not separately shown, the third epitaxial stack 240 includes a p-type semiconductor layer, an active layer, and an n-type semiconductor layer sequentially stacked in an upward direction from the bottom of the third epitaxial stack 240.
The third epitaxial stack 240 may have an area smaller than that of the second epitaxial stack 230. The third epitaxial stack 240 may have an area smaller than that of the third p-type contact electrode 247, and thus a portion of the upper surface of the third p-type contact electrode 247 may be exposed. In addition, the third p-type contact electrode 247 may have an area smaller than that of the second epitaxial stack 230, and thus a portion of the upper surface of the second epitaxial stack 230 may be exposed.
A third insulating layer 275 is disposed on the third epitaxial stack 240 to cover the stacked structure of the first epitaxial stack 220, the second epitaxial stack 230, and the third epitaxial stack 240. The third insulating layer 275 may include various organic/inorganic insulating materials, and should not be limited thereto or thereby. For example, the third insulating layer 275 may include an inorganic insulating material (including silicon nitride or silicon oxide) or an organic insulating material (such as polyimide).
The third insulating layer 275 includes: a first contact hole CH1 through which the upper surfaces of the first, second, and third p-type contact electrodes 227, 237, and 247 are exposed; and a second contact hole CH2 through which the upper surfaces of the n-type semiconductor layers of the second and third epitaxial stacks 230 and 240 are exposed.
The data line 2120 and the first, second, and third sub-scan lines 2130R, 130G, and 130B are disposed on the third insulating layer 275. The data line 2120 is simultaneously connected to the first p-type contact electrode 227, the second p-type contact electrode 237 and the third p-type contact electrode 247 through a first contact hole CH1 formed through the third insulating layer 275. Each of the second and third sub-scan lines 2130R and 130G is connected to the n-type semiconductor layer of the second and third epitaxial stacks 230 and 240, respectively, through the second contact hole CH 2.
In an exemplary embodiment of the present disclosure, the second sub-scan line 2130G may be in direct contact with the n-type semiconductor layer of the second epitaxial stack 230 and may be electrically connected to the n-type semiconductor layer of the second epitaxial stack 230, and the third sub-scan line 2130B may be in direct contact with the n-type semiconductor layer of the third epitaxial stack 240 and may be electrically connected to the n-type semiconductor layer of the third epitaxial stack 240. However, according to another embodiment, a second n-type contact electrode may be further disposed between the second sub-scan line 2130G and the n-type semiconductor layer of the second epitaxial stack 230, and the second sub-scan line 2130G and the n-type semiconductor layer of the second epitaxial stack 230 may be electrically connected to each other through the second n-type contact electrode. Further, a third n-type contact electrode may be further disposed between the third sub-scan line 2130B and the n-type semiconductor layer of the third epitaxial stack 240, and the third sub-scan line 2130B and the n-type semiconductor layer of the third epitaxial stack 240 may be electrically connected to each other through the third n-type contact electrode.
The fourth insulating layer 277 is disposed on the data line 2120 and the first, second, and third sub-scan lines 2130R, 130G, and 130B to cover the data line 2120 and the first, second, and third sub-scan lines 2130R, 130G, and 130B. In addition, the fourth insulating layer 277 may include various organic/inorganic insulating materials, and it should not be limited thereto or thereby.
Although not separately illustrated in the present exemplary embodiment, a concave-convex portion may be selectively provided on the upper surfaces of the first, second, and third epitaxial stacks 220, 230, and 240 (i.e., the upper surfaces of the n-type semiconductor layers of each of the first, second, and third epitaxial stacks 220, 230, and 240). Each concave-convex portion may be provided only in a region corresponding to the light emitting region EA, or may be provided on the entire upper surface of each n-type semiconductor layer. Accordingly, the second sub-scan line 2130G and the third sub-scan line 2130B may be in contact with the n-type semiconductor layer on which the concave and convex portion PR is not disposed and may be electrically connected to the n-type semiconductor layer on which the concave and convex portion PR is not disposed, or may be in contact with the n-type semiconductor layer on which the concave and convex portion PR is disposed and may be electrically connected to the n-type semiconductor layer on which the concave and convex portion PR is disposed.
Further, although not shown in detail, in an exemplary embodiment of the present disclosure, a non-light-transmitting layer may be further provided on the fourth insulating layer 277 corresponding to a side surface of the pixel. The non-light-transmissive layer may serve as a light blocking layer to prevent light from the first, second, and third epitaxial stacks 220, 230, and 240 from being emitted to a side surface of the pixel, and may include a material that absorbs or reflects light.
The non-light-transmitting layer should not be particularly limited as long as the non-light-transmitting layer absorbs or reflects light to block the transmission of light. In an exemplary embodiment of the present disclosure, the non-light transmissive layer may be a Distributed Bragg Reflector (DBR) dielectric mirror, a metal reflective layer formed on an insulating layer, or a black organic polymer layer. When the metal reflective layer serves as the non-light transmissive layer, the metal reflective layer may be in a floating state in which the metal reflective layer is electrically insulated from components of other pixels.
Due to the non-light-transmitting layer provided on the side surface of the pixel, it is possible to prevent light emitted from a specific pixel from affecting pixels adjacent thereto or from being mixed with light emitted from adjacent pixels.
The pixel having the above-described structure may be manufactured by sequentially stacking a first epitaxial stack, a second epitaxial stack, and a third epitaxial stack on a substrate, and hereinafter, the pixel will be described in detail with reference to fig. 28 and 29A to 29L.
Fig. 28 is a plan view illustrating a substrate on which first to third epitaxial stacks are stacked, and fig. 29A to 29L are sectional views sequentially illustrating a process of stacking the first to third epitaxial stacks on the substrate, taken along line I-I' of fig. 28.
Referring to fig. 28 and 29A, a first epitaxial stack 220 is formed on a first preliminary substrate 210 p. In an exemplary embodiment of the present disclosure, the first preliminary substrate 210p may be made of a semiconductor (e.g., gallium arsenide (GaAs)) required to form the first epitaxial stack 220. The first epitaxial stack 220 is manufactured by forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on the first preliminary substrate 210p, and removing portions of the n-type semiconductor layer, the active layer, and the p-type semiconductor layer to form a mesa structure.
Referring to fig. 28 and 29B, a first insulating layer 271 is formed on the first preliminary substrate 210p, and contact holes are formed through the first insulating layer 271 to partially expose the p-type semiconductor layer and the n-type semiconductor layer. A plurality of contact holes defined on the p-type semiconductor layer may be provided. Ohmic electrodes 227 'and 229' may be formed on the p-type semiconductor layer and the n-type semiconductor layer exposed through the contact holes, respectively.
Referring to fig. 28 and 29C, a first n-type contact electrode 229 and a first p-type contact electrode 227 are formed on the first preliminary substrate 210p on which the ohmic electrodes 227 'and 229' are formed. A first n-type contact electrode 229 is formed on the n-type semiconductor layer and a first p-type contact electrode 227 is formed on the p-type semiconductor layer. The first n-type contact electrode 229 and the first p-type contact electrode 227 may be formed of a reflective material.
Referring to fig. 28 and 29D, a second insulating layer 273 is formed on the first preliminary substrate 210p on which the first n-type contact electrode 229 and the first p-type contact electrode 227 are formed, and a first sub-scanning line 2130R is formed on the second insulating layer 273. A contact hole is formed through the second insulating layer 273 at a position corresponding to the first n-type contact electrode 229, and the first sub-scan line 2130R is connected to the first n-type contact electrode 229 through the contact hole formed at a position corresponding to the first n-type contact electrode 229.
Referring to fig. 28 and 29E, the first epitaxial stack 220 formed on the first preliminary substrate 210p is turned upside down to be attached to the substrate 210 with the first adhesive layer 250a interposed therebetween.
Referring to fig. 28 and 29F, after the first epitaxial stack 220 is attached to the substrate 210, the first preliminary substrate 210p is removed. The first preliminary substrate 210p may be removed by various methods such as a wet etching process, a dry etching process, a physical removal process, or a laser lift-off process. Although not shown in the drawings, after the first preliminary substrate 210p is removed, a concave-convex portion PR may be formed on an upper surface (n-type semiconductor layer) of the first epitaxial stack 220. The concave-convex portion PR may be textured by various etching processes. For example, the concave-convex portion PR may be formed by various processes such as a dry etching process using photomicrography, a wet etching process using crystalline properties, a texturing process using a physical method such as sand blasting, an ion beam etching process, or a texturing process using an etching rate difference of a block copolymer.
Referring to fig. 28 and 29G, a second epitaxial stack 230 is formed on a second initial substrate 210 q. The second preliminary substrate 210q may be a sapphire substrate. The second epitaxial stack 230 is manufactured by forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on the second initial substrate 210 q. A second p-type contact electrode 237 and a first wave-pass filter 261 may also be formed on the second epitaxial stack 230.
Referring to fig. 28 and 29H, the second epitaxial stack 230 formed on the second preliminary substrate 210q is turned upside down to be attached to the first epitaxial stack 220 with the second adhesive layer 250b interposed therebetween.
Referring to fig. 28 and 29I, after attaching the second epitaxial stack 230 to the first epitaxial stack 220, the second initial substrate 210q is removed.
Although not shown in the drawings, after the second preliminary substrate 210q is removed, a concave-convex portion PR may be formed on an upper surface (n-type semiconductor layer) of the second epitaxial stack 230. The concave-convex portion PR may be textured by various etching processes, or may be formed using a patterned sapphire substrate as the second preliminary substrate 210 q. The second preliminary substrate 210q may be removed by various methods. For example, in the case where the second preliminary substrate 210q is a sapphire substrate, the sapphire substrate may be removed through a laser lift-off process, a stress lift-off process, a chemical lift-off process, or a physical polishing process.
Referring to fig. 28 and 29J, a third epitaxial stack 240 is formed on the third preliminary substrate 210 r. The third preliminary substrate 210r may be a sapphire substrate. The third epitaxial stack 240 is manufactured by forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on the third preliminary substrate 210 r. A third p-type contact electrode 247 and a second wave-pass filter 263 may also be formed on the third epitaxial stack 240.
Referring to fig. 28 and 29K, the third epitaxial stack 240 formed on the third preliminary substrate 210r is turned upside down to be attached to the second epitaxial stack 230 with the third adhesive layer 250c interposed therebetween.
Referring to fig. 28 and 29L, after attaching the third epitaxial stack 240 to the second epitaxial stack 230, the third initial substrate 210r is removed, and thus, all of the first epitaxial stack 220, the second epitaxial stack 230, and the third epitaxial stack 240 are stacked on the substrate 210. Although not shown in the drawings, after the third preliminary substrate 210r is removed, a concave-convex portion PR may be formed on an upper surface (n-type semiconductor layer) of the third epitaxial stack 240. The concave-convex portion PR may be textured by various etching processes, or may be formed using a patterned sapphire substrate as the third preliminary substrate 40.
Through the above process, the first epitaxial stack 220 is connected to the first sub-scan line 2130R and the data line (i.e., the first p-type contact electrode 227), however, the second and third epitaxial stacks 230 and 240 are not connected to the second and third sub-scan lines 2130G and 2130B and the data line 2120. Accordingly, a process for connecting the second and third epitaxial stacks 230 and 240 to the second and third sub-scan lines 2130G and 2130B and the data line 2120 is performed.
Fig. 30A to 35A are plan views sequentially illustrating a process for connecting the second and third epitaxial stacks 230 and 240 to the second and third sub-scan lines 2130G and 2130B and a data line 2120, and fig. 30B to 35B are sectional views taken along lines I-I ', IIa-IIa ' and IIb-IIb ' of fig. 30A to 35A, respectively.
Referring to fig. 30A and 30B, a portion of the third epitaxial stack 240 is removed such that a portion of the upper surface of the third p-type contact electrode 247 is exposed to the outside. The third p-type contact electrode 247 serves as an etch stopper when etching the third epitaxial stack 240.
Referring to fig. 31A and 31B, portions of the third p-type contact electrode 247, the second pass filter 263, and the third adhesive layer 250c are etched. Accordingly, a portion of the upper surface of the second epitaxial stack 230 is exposed to the outside. In this case, the contact area to which the third p-type contact electrode 247 and the data line 2120 are connected is not etched.
Referring to fig. 32A and 32B, a portion of the second epitaxial stack 230 is etched to expose a portion of the upper surface of the second p-type contact electrode 237. The second p-type contact electrode 237 functions as an etch stopper when etching the second epitaxial stack 230.
Referring to fig. 33A and 33B, portions of the second p-type contact electrode 237, the first pass filter 261, the second adhesive layer 250B, the first epitaxial stack 220, and the first insulating layer 271 are etched. Accordingly, portions of the second insulating layer 273 and the first p-type contact electrode 227 are exposed to the outside. In this case, the contact area to which the second p-type contact electrode 237 and the data line 2120 are connected is not etched.
Referring to fig. 34A and 34B, a third insulating layer 275 is formed on the substrate 210, and a first contact hole CH1 and a second contact hole CH2 are formed through the third insulating layer 275. Portions to which the data lines 2120 are connected (i.e., portions of the upper surfaces of the first, second, and third p-type contact electrodes 227, 237, and 247) are exposed through the first contact holes CH 1. Portions to which the second and third sub-scan lines 2130G and 2130B are connected (i.e., portions of the upper surfaces of the n-type semiconductor layers of the second and third epitaxial stacks 230 and 240) are exposed through the second contact holes CH 2.
Referring to fig. 35A and 35B, second and third sub-scan lines 2130G and 2130B and a data line 2120 are formed on the substrate 210 having the first and second contact holes CH1 and CH2 formed thereon. The second and third sub-scan lines 2130G and 2130B and the data line 2120 may be formed by forming a metal layer on the substrate 210 and patterning the metal layer. The second and third sub-scanning lines 2130G and 2130B are connected to the second and third n-type semiconductor layers through second contact holes CH2, respectively, and the data line 2120 is connected to the first, second and third p-type contact electrodes 227, 237 and 247 through the first contact hole CH 1.
A fourth insulating layer 277 is formed on the substrate 210 on which the second and third sub-scan lines 2130G and 2130B and the data line 2120 are formed.
In an exemplary embodiment of the present disclosure, although not shown in the drawings, a non-light transmissive layer may be further provided on the third insulating layer 275 or the fourth insulating layer 277 corresponding to a side surface of the pixel. The non-light-transmitting layer may be formed by a DBR dielectric mirror, by a metal reflective layer formed on an insulating layer, or by an organic polymer. In the case where the metal reflective layer serves as the non-light-transmitting layer, the metal reflective layer may be in a floating state in which the metal reflective layer is electrically insulated from components of other pixels.
As described above, the display device according to the exemplary embodiment of the present disclosure may be manufactured by: a plurality of epitaxial stacks are sequentially stacked, and a line portion and a contact structure are formed substantially simultaneously in the epitaxy.
Embodiments of the present disclosure relate to a light emitting stack structure emitting light. The light emitting stack structure of the present disclosure may be applied to various devices as a light source.
Fig. 36A to 36C are sectional views illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure.
Referring to fig. 36A to 36C, a light emitting stack structure according to an exemplary embodiment of the present disclosure includes two epitaxial stacks, i.e., a first epitaxial stack 320 and a second epitaxial stack 330, which are sequentially stacked. A first epitaxial stack 320 and a second epitaxial stack 330 are disposed on the substrate 310.
The substrate 310 has a plate shape provided with a front surface and a rear surface.
The substrate 310 may be formed of a light-transmitting insulating material. The expression "the substrate 310 has light transmittance" indicates the following cases: such as substrate 310 being transparent to transmit light substantially completely, substrate 310 being translucent to transmit only light having a particular wavelength, or substrate 310 being partially transparent to transmit only a portion of light having a particular wavelength.
As a material for the substrate 310, one of growth substrates on which an epitaxial stack (i.e., the first epitaxial stack 320) is grown, which is disposed directly above the substrate 310, may be used. In this case, the substrate 310 may be a sapphire substrate, however, the substrate 310 should not be limited thereto or thereby. That is, as a material for the substrate 310, various transparent insulating materials may be used in addition to the sapphire substrate, as long as the material has transparent and insulating properties and the epitaxial stack is disposed on the upper surface of the substrate 310. For example, as a material for the substrate 310, glass, quartz, an organic polymer, or an organic-inorganic composite material may be used. In an exemplary embodiment of the present disclosure, a wiring portion may be further provided on the substrate 310 to apply a light emitting signal and a common voltage to each epitaxial stack. For this, the substrate 310 may be provided as a printed circuit board, or a composite substrate obtained by forming a wiring portion and/or a driving device on glass, quartz, silicon, an organic polymer, or an organic-inorganic composite material. The first epitaxial stack 320 includes an n-type semiconductor layer 321, an active layer 323, and a p-type semiconductor layer 325, which are sequentially stacked. In the present exemplary embodiment, the n-type semiconductor layer 321 and the p-type semiconductor layer 325 may have a single-layer structure, a multi-layer structure, or a superlattice layer. In addition, the active layer 323 may have a single quantum well structure or a multiple quantum well structure. The second epitaxial stack 330 further includes an n-type semiconductor layer 331, an active layer 333, and a p-type semiconductor layer 335, which are sequentially stacked. In the present exemplary embodiment, the n-type semiconductor layer 331 and the p-type semiconductor layer 335 may have a single-layer structure, a multi-layer structure, or a superlattice layer. In addition, the active layer 333 may have a single quantum well structure or a multiple quantum well structure.
The n-type semiconductor layer 331, the active layer 333, and the p-type semiconductor layer 335 of the second epitaxial stack 330 may include a red light emitting semiconductor material.
As a semiconductor material that emits red light, aluminum gallium arsenide (AlGaAs), gallium arsenic phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), and gallium phosphide (GaP) can be used. However, the semiconductor material that emits red light should not be limited thereto or thereby, and various other materials may be used. In the present exemplary embodiment, in the case where the semiconductor layer emits light of other colors, a semiconductor material corresponding to the light of other colors may be selected.
The first and second epitaxial stacks 320 and 330 are sequentially stacked on the front surface of the substrate 310, and each of the first and second epitaxial stacks 320 and 330 emits light. The first epitaxial stack 320 emits color light having a relatively shorter wavelength than that of the color light emitted from the second epitaxial stack 330 and having a relatively higher energy band than that of the color light emitted from the second epitaxial stack 330, and the second epitaxial stack 330 emits color light having a relatively longer wavelength than that of the color light emitted from the first epitaxial stack 320 and having a relatively lower energy band than that of the color light emitted from the first epitaxial stack 320.
In an exemplary embodiment of the present disclosure, the first and second epitaxial stacks 320 and 330 may emit light having wavelength bands different from each other. That is, a plurality of epitaxial stacks are provided, and the epitaxial stacks have energy bands different from each other. Each epitaxial stack may emit color light in a visible light band among light of various wavelength bands. For example, the first epitaxial stack 320 may emit a first color light L1 and the second epitaxial stack 330 may emit a second color light L2.
The first color light L1 and the second color light L2 may be color lights different from each other. The first color light L1 and the second color light L2 may be color lights having wavelength bands (sequential extensions) different from each other. In the present exemplary embodiment, each of the first and second color lights L1 and L2 may display a color of a predetermined wavelength band, and may be selected to display white when the first and second color lights L1 and L2 are mixed with each other. For example, the first color light L1 may be blue light, and the second color light L2 may be red light. As another example, the first color light L1 may be blue light, and the second color light L2 may be yellow light. As another example, the first color light L1 may be blue light, and the second color light L2 may be green light. When the first and second color lights L1 and L2 are mixed with each other, the mixed light of the first and second color lights L1 and L2 may substantially display white, however, there is a difference in color temperature and color coordinates according to the difference in intensity of the first and second color lights L1 and L2.
Hereinafter, for convenience of explanation, the first color light L1 will be described as blue light, and the second color light L2 will be described as red light.
Each epitaxial stack emits light toward the rear surface of the substrate 310. The back surface direction corresponds to the opposite direction along which the first epitaxial stack 320 and the second epitaxial stack 330 are stacked. Hereinafter, for convenience of explanation, a direction in which the front surface of the substrate 310 faces will be referred to as a "front surface direction" or an "upward direction", and a direction in which the rear surface of the substrate 310 faces will be referred to as a "rear surface direction" or a "downward direction". However, the terms "upward" and "downward" may denote directions opposite to each other, and may vary according to the arrangement or stacking direction of the light emitting stack structure.
Each of the first epitaxial stack 320 and the second epitaxial stack 330 emits light in a downward direction. That is, the first epitaxial stack 320 emits light toward the substrate 310 disposed therebelow, and the second epitaxial stack 330 emits light toward the first epitaxial stack 320 and the substrate 310 disposed therebelow. In this case, the first epitaxial stack 320 transmits most of the light emitted from the second epitaxial stack 330 disposed thereon. To this end, at least a portion (preferably, the entire portion) of the first epitaxial stack 320 may be formed of a light-transmissive material. The term "light-transmitting material" denotes not only a case where the light-transmitting material substantially completely transmits light, but also a case where the light-transmitting material transmits light having a predetermined wavelength or a part of light having a predetermined wavelength. In an exemplary embodiment, the first epitaxial stack 320 may transmit about 60% or more of light from the second epitaxial stack 330 disposed thereon. According to another embodiment, the first epitaxial stack 320 may transmit about 80% or more of the light from the second epitaxial stack 330 disposed thereon, and according to another embodiment, the first epitaxial stack 320 may transmit about 90% or more of the light from the second epitaxial stack 330 disposed thereon.
In the light emitting stack structure having the above-described structure according to the exemplary embodiment of the present disclosure, the first and second epitaxial stacks 320 and 330 may be independently driven since signal lines respectively applying light emitting signals to the first and second epitaxial stacks 320 and 330 are independently connected to the first and second epitaxial stacks 320 and 330, and color light and white light having various color temperatures may be displayed according to whether light is emitted from each epitaxial stack. In addition, since the first and second epitaxial stacks 320 and 330 emitting light having different wavelengths are formed to overlap each other, the light emitting stack structure may be formed in a narrow region.
As a result, the light emitting stack structure according to the exemplary embodiment of the present disclosure may implement white light close to sunlight, and may emit light having different colors according to the user's needs.
Fig. 37A is a plan view illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure, and fig. 37B is a sectional view taken along line I-I' of fig. 37A. Hereinafter, for convenience of explanation, a structure of the light emitting stack structure in a plane will be described with reference to fig. 37A, and then a structure of the light emitting stack structure in a cross section will be described with reference to fig. 37A.
Referring to fig. 37A and 37B, the light emitting stack structure according to the exemplary embodiment of the present disclosure may have a substantially rectangular shape, however, the structure of the light emitting stack structure should not be limited to the rectangular shape.
In an exemplary embodiment of the present disclosure, the light emitting stack structure includes a light emitting area EA and a peripheral area PA when viewed in a plan view. The first and second epitaxial stacks 320 and 330 are stacked in the light emitting area EA of the light emitting stack structure. The peripheral area PA may be disposed adjacent to at least one side of the light emitting area EA. In the present exemplary embodiment, the peripheral area PA is provided so as to surround the light emitting area EA. Contact portions are disposed in the peripheral area PA to electrically connect the first and second epitaxial stacks 320 and 330 to the wiring. The contact portion is a region in which a contact hole is defined through at least a portion of the first and second epitaxial stacks 320 and 330, and the contact portion includes a first contact portion 320C, a second contact portion 330C, and a third contact portion 340C. The first contact portion 320C is defined to supply a light emitting signal to the first epitaxial stack 320, the second contact portion 330C is defined to supply a light emitting signal to the second epitaxial stack 330, and the third contact portion 340C is defined to supply a common voltage to the first and second epitaxial stacks 320 and 330. In the present exemplary embodiment, in order to be electrically connected to the electrode part using the wiring, a first contact hole CH1 is defined in the first contact part 320C, a second contact hole CH2 is defined in the second contact part 330C, and a third contact hole CH3 and a fourth contact hole CH4 are defined in the third contact part 340C.
In the present exemplary embodiment, the contact portion may be located at a position corresponding to each corner of the rectangular shape. That is, in the case where the light emitting stack structure has a quadrangular shape, the first contact portion 320C, the second contact portion 330C, and the third contact portion 340C may be located at three corners among four corners of the quadrangular shape such that the light emitting region is located at the center portion. However, the position of the contact portion should not be limited thereto or thereby, and may be changed in various ways. That is, the contact portion may be located at the center of one side of the quadrangular shape, or located inside the quadrangular shape.
In the present exemplary embodiment, the first and second epitaxial stacks 320 and 330 may overlap each other when viewed in a plan view. The first and second epitaxial stacks 320 and 330 may be completely overlapped with each other in the light emitting area EA, but may not be completely overlapped with each other in the peripheral area to contact the electrode part.
Each of the first and second epitaxial stacks 320 and 330 includes an electrode portion to apply a light emitting signal to the first and second epitaxial stacks 320 and 330.
The electrode part includes a first signal electrode 320E, a second signal electrode 330E, and a common electrode 340E.
The first signal electrode 320E, the second signal electrode 330E, and the common electrode 340E are spaced apart from each other when viewed in a plan view. The first signal electrode 320E, the second signal electrode 330E, and the common electrode 340E are disposed at positions corresponding to the first contact portion 320C, the second contact portion 330C, and the third contact portion 340C, respectively.
In this case, each of the first signal electrode 320E, the second signal electrode 330E, and the common electrode 340E may be disposed only in the peripheral area PA, or may be disposed on the peripheral area PA and the light emitting area EA. Since the light emitting stack structure according to the exemplary embodiment of the present disclosure emits light L in a downward direction, the first signal electrode 320E, the second signal electrode 330E, and the common electrode 340E formed on the light emitting stack structure are not disposed on the optical path, and thus the first signal electrode 320E, the second signal electrode 330E, and the common electrode 340E may be disposed to cover the light emitting area EA. In the present exemplary embodiment, the first and second signal electrodes 320E and 330E are disposed in the peripheral area PA, and the common electrode 340E has a wider area than the areas of the first and second signal electrodes 320E and 330E, and is disposed on a portion of the light emitting area EA and the peripheral area PA.
The first signal electrode 320E and the common electrode 340E are connected to the first epitaxial stack 320. The second signal electrode 330E and the common electrode 340E are connected to the second epitaxial stack 330. The first signal electrode 320E is connected to the first epitaxial stack 320 through the first contact hole CH1, and the common electrode 340E is connected to the first epitaxial stack 320 through the third contact hole CH 3. The second signal electrode 330E is connected to the second epitaxial stack 330 through the second contact hole CH2, and the common electrode 340E is connected to the second epitaxial stack 330 through the fourth contact hole CH 4.
Then, the light emitting stack structure will be described according to its stacking order with reference to fig. 37A and 37B.
According to the present exemplary embodiment, the first epitaxial stack 320 is disposed on the substrate 310.
A first p-type contact electrode 327 is disposed on the first epitaxial stack 320. Specifically, the first p-type contact electrode 327 is disposed in contact with the p-type semiconductor layer of the first epitaxial stack 320. The first p-type contact electrode 327 may include a transparent conductive material (e.g., a Transparent Conductive Oxide (TCO)) and may have a thickness of about 2000 angstroms to about 2 microns. The transparent conductive oxide may include tin oxide (SnO), indium oxide (InO2), zinc oxide (ZnO), Indium Tin Oxide (ITO), and Indium Tin Zinc Oxide (ITZO). The transparent conductive oxide may be deposited by Chemical Vapor Deposition (CVD) or Physical Vapor Deposition (PVD) using an evaporator or a sputter. The material of the first p-type contact electrode 327 should not be limited thereto or thereby.
In an exemplary embodiment of the present disclosure, the long wave pass filter 360 may be disposed on the first p-type contact electrode 327. The long pass filter 360 may be a component that provides color light with high purity and high efficiency, and may be selectively applied to the light emitting stack structure. The longwave pass filter 360 is used to block light having a relatively short wavelength to travel to the epitaxial stack that emits light having a relatively long wavelength.
In the present exemplary embodiment, the long wave pass filter 360 selectively transmits light having a predetermined wavelength. The long pass filter 360 may transmit the second color light emitted from the second epitaxial stack 330 and may block or reflect light other than the second color light. Thus, light of the second color emitted from the second epitaxial stack 330 may travel in a downward direction, and light of the first color emitted from the first epitaxial stack 320 may not travel toward the second epitaxial stack 330, but may be reflected or blocked by the long pass filter 360.
The first color light is light having a wavelength relatively shorter than that of the second color light and having energy relatively higher than that of the second color light. In the case where the first color light is incident to the second epitaxial stack 330, additional light emission may be induced in the second epitaxial stack 330. In the present exemplary embodiment, the first color light may be prevented from being incident into the second epitaxial stack 330 by the long pass filter 360.
The long pass filter 360 may be disposed in the light emitting area EA and the peripheral area PA, however, the long pass filter 360 may not be disposed in the peripheral area AP as needed.
The second epitaxial stack 330 is disposed on the first epitaxial stack 320 on which the first p-type contact electrode 327 is disposed, and the adhesive layer 350 is interposed between the second epitaxial stack 330 and the first epitaxial stack 320.
The adhesive layer 350 may include a non-conductive material, and may include a light-transmitting material. For example, the adhesive layer 350 may include an Optically Clear Adhesive (OCA). The material for the adhesive layer 350 should not be particularly limited as long as the material for the adhesive layer 350 is optically transparent and stably attached to each epitaxial stack. For example, the adhesive layer 50 may include an organic material such as epoxy-based polymers like SU-8, various resists, parylene, poly (methyl methacrylate) (PMMA), and benzocyclobutene (BCB), and an inorganic material such as silicon oxide, aluminum oxide, and molten glass. Further, a conductive oxide may be used as an adhesion layer as needed, and in this case, the conductive oxide is required to be insulated from other components. In the case of using an organic material as an adhesive layer and using a molten glass of an inorganic material as an adhesive layer, the first and second epitaxial stacks 320 and 330 are attached to each other by: a material is coated on the adhesion sides of the first epitaxial stack 320 and the second epitaxial stack 330, and a high temperature and a high pressure are applied to the material in a high vacuum state. In the case of using an inorganic material (except for molten glass) as the bonding layer, the first epitaxial stack 320 and the second epitaxial stack 330 are attached to each other by: an inorganic material is deposited on the adhesion sides of the first and second epitaxial stacks 320 and 330, the inorganic material is planarized using Chemical Mechanical Planarization (CMP), plasma treatment is performed on the surface of the inorganic material, and the first and second epitaxial stacks 320 and 330 are attached in a high vacuum state.
The second epitaxial stack 330 is disposed on the adhesive layer 350.
A mesa M is formed in the second epitaxial stack 330 by removing a portion of the n-type semiconductor layer, the active layer, and the p-type semiconductor layer. A part of the semiconductor layer (specifically, a part of the n-type semiconductor layer and the active layer) is removed from the portion where the mesa M is not formed, and thus the upper surface of the n-type semiconductor layer is exposed. The region where the mesa M is disposed may overlap with the light emitting region EA, and the region where the mesa M is not disposed may overlap with the peripheral region PA (specifically, overlap with the contact portion).
A second n-type contact electrode 339 is disposed on the exposed upper surface of the n-type semiconductor layer. The second p-type contact electrode 337 is disposed on the p-type semiconductor layer on which the mesa is formed, and the ohmic electrode 337' and the first insulating layer 371 are interposed between the second p-type contact electrode 337 and the p-type semiconductor layer.
The first insulating layer 371 covers an upper surface of the second epitaxial stack 330, and includes a contact hole defined through the first insulating layer 371, the contact hole corresponding to a portion at which the ohmic electrode 337' is disposed. The ohmic electrode 337' may be disposed corresponding to a region where the third contact portion 340C is disposed, and may have various shapes (e.g., a circular ring shape as illustrated in fig. 37A).
The ohmic electrode 337' may be used for ohmic contact, and may include various materials. In exemplary embodiments of the present disclosure, the ohmic electrode 337' may include au (zn) or au (be). In this case, since the material for the ohmic electrode 337' has a relatively lower reflectance than those of Ag, Al and Au, an additional reflective electrode may also be provided. As a material for the additional reflective electrode, Ag or Au may be used, and a layer including Ti, Ni, Cr, or Ta may be provided as an adhesion layer for adhering adjacent components. In this case, the adhesive layer may be thinly deposited on the upper and lower surfaces of the reflective electrode including Ag or Au.
The second p-type contact electrode 337 is disposed on the first insulating layer 371. The second p-type contact electrode 337 may overlap the light emitting area EA when viewed in a plan view, and may be disposed to cover the entire light emitting area EA. The second p-type contact electrode 337 may include a material having reflectivity to reflect light from the second epitaxial stack 330 in a downward direction. As a material having reflectivity for the second p-type contact electrode 337, various reflective metals (e.g., Ag, Al, and Au) may be used, and a layer including Ti, Ni, Cr, or Ta may be provided as an adhesive layer for adhering adjacent components.
Specifically, when the second epitaxial stack 330 emits red light, the second p-type contact electrode 337 may include a material having a high reflectivity in a red wavelength band. For example, the second p-type contact electrode 337 may include "Au" having high reflectivity in a red wavelength band, and in this case, since the "Au" may absorb blue light leaked from the bottom of the second p-type contact electrode 337, unnecessary color interference may be reduced.
In the present exemplary embodiment, the first insulating layer 371 may be formed to have reflectivity, so that reflection of light from the second epitaxial stack 330 is easily performed. For example, the first insulating layer 371 may have an omnidirectional reflector (ODR) structure.
A second insulating layer 373 is disposed on the first insulating layer 371 with the second p-type contact electrode 337 disposed thereon. The second insulating layer 373 covers the upper surface of the second epitaxial stack 330 and the side surfaces of the respective components disposed under the second insulating layer 373.
In the present exemplary embodiment, the second insulating layer 373 may also have reflectivity. Further, although not shown in detail, in an exemplary embodiment of the present disclosure, a non-light transmissive layer may also be disposed on a side portion of the second insulating layer 373 corresponding to a side surface of the light emitting stack structure. The non-light transmissive layer may serve as a light blocking layer to prevent light from the first and second epitaxial stacks 320 and 330 from being emitted through a side surface of the light emitting stack structure, and may include a material that absorbs or reflects light.
The non-light-transmitting layer should not be particularly limited as long as the non-light-transmitting layer absorbs or reflects light to block the transmission of light. In an exemplary embodiment of the present disclosure, the non-light transmissive layer may be a Distributed Bragg Reflector (DBR) dielectric mirror, a metal reflective layer formed on an insulating layer, or a black organic polymer layer. When the metal reflective layer serves as the non-light transmissive layer, the metal reflective layer may be in a floating state in which the metal reflective layer is electrically insulated from components of other light emitting stack structures.
Due to the non-light transmissive layer disposed on the side surface of the light emitting stack structure, it is possible to prevent light emitted from a specific light emitting stack structure from affecting or mixing with light emitted from an adjacent light emitting stack structure.
The first and second signal electrodes 320E and 330E and the common electrode 340E are disposed on the second insulating layer 373. The first and second signal electrodes 320E and 330E and the common electrode 340E may have a single layer or a plurality of layers of metal. For example, the first and second signal electrodes 320E and 330E and the common electrode 340E may include various materials including metals of Al, Ti, Cr, Ni, Au, Ag, Sn, W, and Cu or alloys thereof.
The first and second signal electrodes 320E and 330E and the common electrode 340E are connected to corresponding components through first, second, third and fourth contact holes CH1, CH2, CH3 and CH4, respectively, defined thereunder.
The first signal electrode 320E is connected to the n-type semiconductor layer of the first epitaxial stack 320 through the first contact hole CH 1. The first contact hole CH1 is defined by penetrating portions of the second insulating layer 373, the first insulating layer 371, the second epitaxial stack 330, the adhesive layer 350, the long wavelength pass filter 360, the first p-type contact electrode 327, and the first epitaxial stack 320 from above. Specifically, since portions of the p-type semiconductor layer and the active layer of the first epitaxial stack 320 are removed and the upper surface of the n-type semiconductor layer of the first epitaxial stack 320 is exposed, the first signal electrode 320E is connected to the n-type semiconductor layer of the first epitaxial stack 320 through the first contact hole CH 1.
The second signal electrode 330E is connected to the n-type semiconductor layer of the second epitaxial stack 330 through the second contact hole CH 2. The second contact hole CH2 is defined by penetrating the second insulating layer 373 and the first insulating layer 371 from above. Accordingly, the upper surface of the n-type semiconductor layer of the second epitaxial stack 330 is exposed through the second contact hole CH2, and thus the second signal electrode 330E is connected to the n-type semiconductor layer of the second epitaxial stack 330 through the second contact hole CH 2.
The common electrode 340E is connected to the first p-type contact electrode 327 of the first epitaxial stack 320 through the third contact hole CH 3. The third contact hole CH3 is defined by a portion penetrating the second insulating layer 373, the first insulating layer 371, the second epitaxial stack 330, the adhesive layer 350, and the long-wave pass filter 360 from above. Accordingly, the upper surface of the first p-type contact electrode 327 is exposed, and the common electrode 340E is connected to the first p-type contact electrode 327 through the third contact hole CH 3.
In addition, the common electrode 340E is connected to the second p-type contact electrode 337 of the second epitaxial stack 330 through the fourth contact hole CH 4. The fourth contact hole CH4 is defined by penetrating a portion of the second insulating layer 373. Accordingly, the upper surface of the second p-type contact electrode 337 is exposed, and the common electrode 340E is connected to the second p-type contact electrode 337 through the fourth contact hole CH 4.
The light emitting stack structure having the above structure emits light in a downward direction using light emitted from the first and second epitaxial stacks 320 and 330. In this case, separate driving signals may be applied to the first and second epitaxial stacks 320 and 330 through the first and second signal electrodes 320E and 330E, and thus light emission of the first and second epitaxial stacks 320 and 330 may be independently controlled. In other words, whether the first epitaxial stack 320 emits light may be determined by a light emission signal and a common voltage applied to the first epitaxial stack 320 via the first signal electrode 320E and the common electrode 340E, respectively. Whether the second epitaxial stack 330 emits light may be determined by a light emission signal and a common voltage applied to the second epitaxial stack 330 via the second signal electrode 330E and the common electrode 340E, respectively. Therefore, light emission of the first and second epitaxial stacks 320 and 330 may be different from each other according to a signal applied to the first signal electrode 320E and a signal applied to the second signal electrode 330E.
In the above-described embodiment, the common voltage is applied to the p-type semiconductor layers of the first and second epitaxial stacks 320 and 330 and the light emitting signal is applied to the n-type semiconductor layers of the first and second epitaxial stacks 320 and 330, however, embodiments of the present disclosure should not be limited thereto or thereby. According to another embodiment of the present disclosure, a common voltage may be applied to the n-type semiconductor layers of the first and second epitaxial stacks 320 and 330, and a light emitting signal may be applied to the p-type semiconductor layers of the first and second epitaxial stacks 320 and 330. This structure can be easily achieved by arranging the components of each epitaxial stack in the order of a p-type semiconductor layer, an active layer, and an n-type semiconductor layer, which is different from the stacking order of the semiconductor layers (i.e., the n-type semiconductor layer, the active layer, and the p-type semiconductor layer) in the present disclosure.
Accordingly, by independently driving the first and second epitaxial stacks, the light emitting stack structure according to the present exemplary embodiment may provide white light having different color temperatures according to each operation mode. In particular, since the current applied to the first and second epitaxial stacks is independently controlled, the color temperature can be precisely controlled. Therefore, in the case where the light emitting stack structure according to the present exemplary embodiment is applied to a lighting device, light may be controlled according to the sensitivity of a user. In addition, white light may be generated by mixing color lights with each other in various ways using lights from the first and second epitaxial stacks, and thus, white light having a high color rendering index and a wide correlated color temperature may be realized.
Further, the light emitting stack structure having the above structure provides different color light through the regions overlapped with each other when displaying colors, rather than providing different color light through different regions on a plane, and thus the light emitting elements can be reduced and integrated. According to the conventional art, light emitting elements emitting different color lights (e.g., red and blue lights) are disposed apart from each other on a plane to realize white light. Therefore, since the light emitting elements are disposed apart from each other on a plane, an area occupied by the light emitting elements in the conventional art is relatively large. On the other hand, according to the present disclosure, light emitting elements emitting different color lights are disposed in the same region overlapped with each other to form a light emitting stack structure, and thus white light can be realized through a region significantly smaller than that of the conventional art. Therefore, a high-resolution display device can be manufactured in a small area.
Further, even in the case of the conventional light emitting element manufactured in a stacked manner, the conventional light emitting element is manufactured by: the contact portion is independently formed in each light emitting element, for example, the light emitting elements are independently and individually formed and the light emitting elements are connected to each other using a wiring. As a result, the structure of the light emitting device is complicated, and it is not easy to manufacture the light emitting device. However, the light emitting stack structure according to the exemplary embodiment of the present disclosure is manufactured by: a plurality of epitaxial stacks are sequentially stacked on one substrate, and a wiring portion is connected to the epitaxial stacks through a minimized process, so that the structure and the manufacturing method of the light emitting stack structure can be simplified.
The light emitting stack structure having the above structure may be manufactured by sequentially stacking a first epitaxial stack and a second epitaxial stack on a substrate, and will be described with reference to the accompanying drawings. The light emitting stack structure according to the exemplary embodiment of the present disclosure may be manufactured in a single number, or a plurality of light emitting stack structures may be substantially simultaneously formed using a substrate having a wide area. In the case where the light emitting stack structures are formed substantially simultaneously, the recess portion may be formed to electrically and physically separate the light emitting stack structures adjacent to each other from each other, and each of the light emitting stack structures may be separated into a single light emitting stack structure by cutting off a portion corresponding to the recess portion in a final process.
In the following embodiments, one light emitting stack structure is shown as a representative example. In the case of forming a plurality of light emitting stack structures, portions corresponding to outermost lines in the drawing correspond to edges of the substrate and to boundaries between the light emitting stack structures adjacent to each other.
Fig. 38A, 39A, 40A, 41A, 42A, and 43A are plan views sequentially illustrating a method of manufacturing a light emitting stack structure according to an exemplary embodiment of the present disclosure, and fig. 38B, 39B, 40B to 40G, 41B to 41D, 42B, and 43B are cross-sectional views taken along line I-I of fig. 38A, 39A, 40A, 41A, 42A, and 43A, respectively.
The light emitting stack structure according to the exemplary embodiment of the present disclosure may be manufactured by: the first epitaxial stack 320 is formed on the substrate 310, the second epitaxial stack 330 is formed on a separate temporary substrate, the second epitaxial stack 330 is formed on the first epitaxial stack 320, and an electrode portion connecting the first epitaxial stack 320 and the second epitaxial stack 330 is formed. Hereinafter, for convenience of explanation, the fabrication of the light emitting stack structure will be described in the order of forming the second epitaxial stack 330 on the temporary substrate and forming the second epitaxial stack 330 on the first epitaxial stack 320.
Referring to fig. 38A and 38B, a first epitaxial stack 320 is disposed on a first temporary substrate 310 p.
The first temporary substrate 310p may be a semiconductor substrate 310 to form a second epitaxial stack 330. The first temporary substrate 310p may be differently set according to a semiconductor layer to be formed, and when the second epitaxial stack 330 includes a semiconductor layer emitting red light, the first temporary substrate 310p may be a gallium arsenide (GaAs) substrate. The second epitaxial stack 330 is manufactured by: an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are formed on the first temporary substrate 310p, and portions of the active layer and the p-type semiconductor layer are removed, and if necessary, a portion of the n-type semiconductor layer is removed to form the mesa structure M. Since the mesa structure M is formed, the upper surface of the n-type semiconductor layer of the second epitaxial stack 330 is exposed.
Referring to fig. 39A and 39B, a second n-type contact electrode 339, an ohmic electrode 337', and a first insulating layer 371 are formed on the second epitaxial stack 330 on which the mesa structure M is formed. The second n-type contact electrode 339 is disposed in a region corresponding to the second contact portion 330C, and the ohmic electrode 337' is disposed in a region corresponding to the third contact portion 340C. A contact hole passing through the first insulating layer 371 is formed in a region where the ohmic electrode 337 'is formed, through which the upper surface of the p-type semiconductor layer of the second epitaxial stack 330 is exposed, and the ohmic electrode 337' is formed in the contact hole.
Referring to fig. 40A and 40B, a second p-type contact electrode 337 is formed on the first temporary substrate 310p on which the first insulating layer 371 is formed. The second p-type contact electrode 337 may include a reflective material, and may be formed to cover the light emitting area EA. The second p-type contact electrode 337 may be formed by forming a reflective conductive material on the entire surfaces of the first insulating layer 371 and the ohmic electrode 337' and patterning the reflective conductive material using a photolithography process.
Referring to fig. 40A and 40C, the second epitaxial stack 330 on which the second p-type contact electrode 337 is formed is turned upside down from the first temporary substrate 310p and attached to the second temporary substrate 310q with the temporary adhesive layer 351 interposed between the second epitaxial stack 330 and the second temporary substrate 310 q.
The temporary adhesive layer 351 allows the second epitaxial stack 330 to be attached to the second temporary substrate 310q and removed after a predetermined process is performed. Accordingly, the temporary adhesive layer 351 may be formed of a material selected from materials having a predetermined viscosity while being easily removed. The material for the temporary bonding layer 351 should not be particularly limited.
The second temporary substrate 310q is a carrier substrate on which the second epitaxial stack 330 is temporarily attached, and the type of the second temporary substrate 310q should not be particularly limited.
Referring to fig. 40A and 40D, after the second epitaxial stack 330 is attached to the second temporary substrate 310q, the first temporary substrate 310p is removed. The first temporary substrate 310p may be removed by various methods such as a wet etching process, a dry etching process, a physical removal process, or a laser lift-off process. However, the method for removing the first temporary substrate 310p should not be limited thereto or thereby. The first temporary substrate 310p may be removed by forming a sacrificial layer between the first temporary substrate 310p and the second epitaxial stack 330 and removing the sacrificial layer.
Referring to fig. 40A and 40E, the first epitaxial stack 320 is fabricated separately from the second epitaxial stack 330. The first epitaxial stack 320 may be manufactured by sequentially forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on the substrate 310. The first p-type contact electrode 327, the long wavelength pass filter 360, and the adhesive layer 350 may be sequentially formed on the first epitaxial stack 320.
Referring to fig. 40A and 40F, the second epitaxial stack 330 formed on the second temporary substrate 310q is turned upside down to be attached to the first epitaxial stack 320 with the adhesive layer 350 interposed therebetween. In this case, the lower surface of the n-type semiconductor layer of the second epitaxial stack 330 is disposed to face the p-type semiconductor layer of the first epitaxial stack 320, and then the second epitaxial stack 330 is attached to the first epitaxial stack 320. The adhesive layer 350 may include a non-conductive material, and may include a material having light transmittance. For example, an optically clear adhesive may be used as the adhesive layer 350.
Referring to fig. 40A and 40G, after the second epitaxial stack 330 is attached to the first epitaxial stack 320, the temporary adhesive layer 351 and the second temporary substrate 310q disposed on the second epitaxial stack 330 are removed. The second temporary substrate 310q may be removed by various methods. For example, when the second temporary substrate 310q is a sapphire substrate, the sapphire substrate may be removed through a laser lift-off process, a stress lift-off process, a chemical lift-off process, or a physical polishing process.
After the first and second epitaxial stacks 320 and 330 are formed on the substrate 310 as described above, electrode portions and contact portions are formed. This will be explained in detail below.
Referring to fig. 41A and 41B, portions of the first insulating layer 371, the second epitaxial stack 330, the adhesive layer 350, and the long pass filter 360 are removed from regions corresponding to the first and third contact portions 320C and 340C to form first and third temporary contact holes CH1' and CH3, respectively. In this case, a concave portion is formed along the periphery of the light emitting stack structure having the first temporary contact hole CH1' and the third contact hole CH 3. In forming the light emitting stack structure, the recess portion is formed to electrically and physically separate the light emitting stack structures adjacent to each other.
The first temporary contact hole CH1', the third contact hole CH3, and the recess portion may be formed using a photolithography process. The upper surface of the first p-type contact electrode 327 is exposed to the outside due to the first temporary contact hole CH1', the third contact hole CH3, and the recessed portion R.
Referring to fig. 41A and 41C, portions of the first p-type contact electrode 327 and the first epitaxial stack 320 (specifically, the p-type semiconductor layer and the active layer of the first epitaxial stack 320) are removed from a region corresponding to the first contact portion 320C to form a first contact hole CH 1. In this case, a portion of the p-type semiconductor layer and a portion of the active layer of the first epitaxial stack 320 are removed along the periphery of the light emitting stack structure, and thus the recess portion is further etched.
Additional etching of the first contact hole CH1 and the recessed portion may be performed by a photolithography process. Accordingly, the upper surface of the n-type semiconductor layer of the first epitaxial stack 320 is exposed to the outside through the first contact hole CH1 in a region corresponding to the first contact portion 320C and is exposed to the outside through the recess portion in the periphery of the light emitting stack structure.
Referring to fig. 41A and 41D, a portion of the n-type semiconductor layer of the first epitaxial stack 320 is removed along the periphery of the light emitting stack structure, and thus the recess portion is further etched. This is to electrically and physically separate each light emitting stack structure from its neighboring light emitting stack structure. The additional etching of the recess portion in the present operation may be performed through a photolithography process, and the upper surface of the substrate 310 is exposed in the periphery of the light emitting stack structure.
Referring to fig. 42A and 42B, a second insulating layer 373 is formed on the entire surface of the substrate 310 and patterned to form a second contact hole CH2 and a fourth contact hole CH4 in the second contact portion 330C and the third contact portion 340C, respectively. The second insulating layer 373 covers not only the components on the second epitaxial stack 330 but also the side surface of the light emitting stacked structure in which the recess portion is formed and the first and second epitaxial stacks 320 and 330.
The second contact hole CH2 and the fourth contact hole CH4 may be formed through a photolithography process.
When the second contact hole CH2 is formed, the first insulating layer 371 disposed under the second insulating layer 373 is patterned, and thus the upper surface of the second n-type contact electrode 339 is exposed to the outside. The fourth contact hole CH4 is formed such that a portion of the upper surface of the second p-type contact electrode 337 is exposed to the outside in the third contact portion 340C. In the present exemplary embodiment, the region where the fourth contact hole CH4 is formed overlaps the region where the ohmic electrode 337' is formed, however, this is merely for convenience of explanation, and they should not be limited thereto or thereby.
In the present exemplary embodiment, the second insulating layer 373 is formed in the first and third contact holes CH1 and CH3, and when the second insulating layer 373 is patterned, the second insulating layer 373 located on the upper surface of the n-type semiconductor layer of the first epitaxial stack 320 and the second insulating layer 373 located on the upper surface of the first p-type contact electrode 327 are removed, thereby maintaining the exposure of the upper surface of the n-type semiconductor layer of the first epitaxial stack 320 and the upper surface of the first p-type contact electrode 327. However, the second insulating layer 373 formed on sidewalls of the first and third contact holes CH1 and CH3 may remain without being removed.
Referring to fig. 43A and 43B, a first signal electrode 320E, a second signal electrode 330E, and a common electrode 340E are formed on the substrate 310 having the first, second, third, and fourth contact holes CH1, CH2, CH3, and CH4 formed therein.
The first signal electrode 320E, the second signal electrode 330E, and the common electrode 340E may be formed through a photolithography process, and the first signal electrode 320E, the second signal electrode 330E, and the common electrode 340E may be formed through a single process using one mask.
The first signal electrode 320E is formed in a region corresponding to the first contact portion 320C, the second signal electrode 330E is formed in a region corresponding to the second contact portion 330C, and the common electrode 340E is formed in a region corresponding to the third contact portion 340C. Accordingly, the first signal electrode 320E is connected to the n-type semiconductor layer of the first epitaxial stack 320 through the first contact hole CH1, the second signal electrode 330E is directly connected to the second n-type contact electrode 339 through the second contact hole CH2, and the common electrode 340E is connected to the first and second p-type contact electrodes 327 and 337 through the third and fourth contact holes CH3 and CH4, respectively.
Each of the light emitting stack structures is manufactured through the above-described operation. Although not shown in the drawings, in the case where a plurality of light emitting stack structures are substantially simultaneously manufactured, a process of cutting the substrate 310 along the boundary of the light emitting stack structures may be further performed. When a plurality of light emitting stack structures are manufactured substantially simultaneously using a substrate having a wide area and cut to separate the light emitting stack structures into individual light emitting stack structures, the manufacturing efficiency of the light emitting stack structures may be improved and the manufacturing cost of the light emitting stack structures may be reduced.
The light emitting stack structure according to the exemplary embodiments of the present disclosure may further include various components to provide efficient and uniform light. As an example, the light emitting stack structure according to the exemplary embodiment of the present disclosure may include various concave and convex portions PR on the light emitting surface.
Fig. 44 is a sectional view illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure. Specifically, fig. 44 shows a concave-convex portion PR formed on the second epitaxial stack 330. In the following embodiments, features different from those of the above-described embodiments will be mainly described to avoid redundancy. It is assumed that the unexplained parts are the same as or similar to the parts of the embodiments described above.
The light emitting stack structure according to an exemplary embodiment of the present disclosure may include a concave-convex portion PR formed on the second epitaxial stack 330. In an exemplary embodiment of the present disclosure, the concave and convex portion PR may be disposed on a lower surface of the n-type semiconductor layer of the second epitaxial stack 330 corresponding to a light emitting surface.
The concave-convex portion PR is for improving light emitting efficiency. The concave-convex portion PR may be provided in various shapes such as a polygonal pyramid, a hemisphere, or a surface having roughness on which the concave-convex portion is randomly arranged. The concave-convex portion PR may be formed by texturing through various etching processes. For example, the concave-convex portion PR may be formed by various processes such as a dry etching process using photomicrography, a wet etching process using crystalline properties, a texturing process using a physical method such as sand blasting, an ion beam etching process, or a texturing process using an etching rate difference of a block copolymer.
In exemplary embodiments of the present disclosure, there may be an intensity difference between the first and second color lights from the first and second epitaxial stacks, which may cause a color temperature difference when generating white light. In the present exemplary embodiment, concave and convex portions are selectively formed on the light emitting surfaces of the first and second epitaxial stacks to improve the light emitting efficiency, and as a result, the difference in light intensity between the first and second color lights may be reduced. Specifically, the visibility of color light corresponding to red is lower than that of color light of blue, and the difference in intensity of light may be reduced by texturing the second epitaxial stack.
After the operation illustrated in fig. 40D, a process of forming a concave-convex section on the lower surface of the n-type semiconductor layer of the second epitaxial stack may be performed, and fig. 45 is a cross-sectional view illustrating the concave-convex section formed on the second epitaxial stack of fig. 40D.
Referring to fig. 45, after removing the first temporary substrate 310p contacting the n-type semiconductor layer of the second epitaxial stack 330, a texturing process is performed on the exposed n-type semiconductor layer to form a concave-convex portion PR.
According to an exemplary embodiment of the present disclosure, a concave-convex portion may be provided for another epitaxial stack, and a substrate may be removed.
Fig. 46 is a sectional view illustrating a light emitting stack structure according to an exemplary embodiment of the present disclosure. Specifically, fig. 46 shows a structure in which the substrate 310 is removed and the concave-convex portion PR is formed on the first epitaxial stack 320 in addition to the second epitaxial stack 330.
Referring to fig. 46, the light emitting stack structure according to an exemplary embodiment of the present disclosure may have a structure in which the substrate 310 is removed therefrom. Since the substrate 310 has a relatively thick thickness, the thickness of the light emitting stack structure may be significantly reduced when the substrate 310 is removed. Therefore, in the case of manufacturing a predetermined device by transferring the light emitting stack structure from which the substrate 310 is removed onto a separate wiring substrate, it is easy to thin the predetermined device.
According to the present exemplary embodiment, the concave-convex portion PR may be disposed on the first epitaxial stack 320 to improve light efficiency. That is, the concave and convex portions PR may be disposed on a lower surface of the n-type semiconductor layer of the first epitaxial stack 320 corresponding to the light emitting surface. In this case, when a patterned sapphire substrate is used as the substrate 310 and then the patterned sapphire substrate is removed, the concave and convex portions PR may be easily formed on the light emitting surface of the first epitaxial stack 320.
According to an exemplary embodiment of the present disclosure, the light emitting stack structure may further employ additional components for high color rendering index and wide correlated color temperature. As an example, the light emitting stack structure may further include a light conversion layer to convert at least a portion of light emitted from the first and second epitaxial stacks, respectively, into light having different wavelengths.
Fig. 47 and 48 are sectional views illustrating a light emitting stack structure having a light conversion layer according to an exemplary embodiment of the present disclosure. Fig. 47 illustrates the light emitting stack structure from which the substrate is removed, and fig. 48 illustrates the light emitting stack structure including the substrate.
Referring to fig. 47, a light conversion layer 380 may also be disposed on a lower surface corresponding to a light emitting surface of the first epitaxial stack 320. Referring to fig. 48, a light conversion layer 380 is also disposed on the lower surface of the substrate 310, and the light conversion layer 380 may be disposed to selectively cover the side surface of the light emitting stack structure.
The light conversion layer 380 may include nanostructures such as fluorescent substances and quantum dots, organic materials capable of converting colors, or a combination thereof. For example, when a fluorescent substance is used as a material for the light conversion layer 380, the fluorescent substance may absorb light having a predetermined wavelength and may emit light having a wavelength longer than that of the light having the predetermined wavelength. The fluorescent substance may be provided in a mixed form with a transparent or translucent adhesive such as PDMS (polydimethylsiloxane), PI (polyimide), PMMA (poly (2-methyl methacrylate)), or ceramic.
In the present exemplary embodiment, since the light emitting stack structure includes the light conversion layer 380, the light emitting stack structure may output light having a wavelength different from that of the first and/or second color light in addition to the first and second color light emitted from the first and second epitaxial stacks 320 and 330. Accordingly, in exemplary embodiments of the present disclosure, a high color rendering index and a wide correlated color temperature may be obtained by mixing finally provided lights with each other.
The light emitting stack structure according to the exemplary embodiments of the present disclosure may be independently used, however, should not be limited thereto or thereby. That is, the light emitting stack structure may be used as various types of light sources after being mounted on a base substrate (e.g., a printed circuit board) on which a wiring is formed.
Fig. 49 and 50 are plan views illustrating a light emitting stack structure mounted on a printed circuit board 3110 according to an exemplary embodiment of the present disclosure.
Referring to fig. 49, a plurality of light emitting stack structures 3120 according to an exemplary embodiment of the present disclosure may be arranged in a longitudinal direction on a printed circuit board 3110 extending in one direction. Referring to fig. 50, the light emitting stack structures 3120 according to an exemplary embodiment of the present disclosure may be arranged in a matrix form on a printed circuit board 3110 having a predetermined shape (e.g., a rectangular shape) and a predetermined area. The shape of the printed circuit board 3110 and the arrangement of the light emitting stack structure 3120 should not be limited thereto or thereby, but may be varied in various ways. Accordingly, the light emitting stack structure may provide light in the form of a point light source, a line light source, or a surface light source.
Terminals may be formed on the printed circuit board 3110 to apply a light emitting signal and a common voltage to the light emitting stack structure, respectively, and light emission of the light emitting stack structure may be determined by the light emitting signal and the common voltage applied to the light emitting stack structure through the terminals.
The light emitting stack structure according to the exemplary embodiment of the present disclosure may be used in various illumination devices requiring white light. For example, the light emitting stack structure may be used as a backlight unit included in a light receiving type display device or indoor and/or outdoor lighting in daily life.
Fig. 51 is a schematic cross-sectional view of a light emitting diode stack 400 for a display according to an exemplary embodiment of the present disclosure.
Referring to fig. 51, the light emitting diode stack 400 includes a support substrate 451, a first LED stack 423, a second LED stack 433, a third LED stack 443, a reflective electrode 425, an ohmic electrode 426, a first insulating layer 427, a second insulating layer 428, an interconnection line 429, a second p transparent electrode 435, a third p transparent electrode 445, a first color filter 437, a second color filter 447, a first bonding layer 453, a second bonding layer 455, and a third bonding layer 457.
The support substrate 451 supports the semiconductor stacks 423, 433, 443. The support substrate 451 may include, but is not limited to, circuitry on its surface or in it. The support substrate 451 may include, for example, a glass, sapphire substrate, Si substrate, or Ge substrate.
Each of the first, second, and third LED stacks 423, 433, and 443 includes an n-type semiconductor layer 423a, 433a, or 443a, a p-type semiconductor layer 423b, 433b, or 443b, and an active layer interposed therebetween. The active layer may have a multiple quantum well structure.
For example, the first LED stack 423 may be an inorganic light emitting diode adapted to emit red light, the second LED stack 433 may be an inorganic light emitting diode adapted to emit green light, and the third LED stack 443 may be an inorganic light emitting diode adapted to emit blue light. The first LED stack 423 may include a GaInP-based well layer, and each of the second LED stack 433 and the third LED stack 443 may include a GaInN-based well layer.
In addition, both surfaces of each of the first, second, and third LED stacks 423, 433, and 443 are an n-type semiconductor layer and a p-type semiconductor layer, respectively. In this exemplary embodiment, each of the first conductive type semiconductor layers 423a, 433a, 443a of the first, second, and third LED stacks 423, 433, 443 is an n-type semiconductor layer, and each of the second conductive type semiconductor layers 423b, 433b, 443b of the first, second, and third LED stacks 423, 433, 443 is a p-type semiconductor layer. Since the third LED stack 443 has an n-type upper surface, a rough surface may be formed on the upper surface of the third LED stack 443 by chemical etching. However, it should be understood that the present disclosure is not limited thereto, and the semiconductor type of the upper and lower surfaces of each LED stack may be changed.
The first LED stack 423 is disposed adjacent to the support substrate 451; second LED stack 433 is disposed on first LED stack 423; a third LED stack 443 is disposed over the second LED stack. Since the first LED stack 423 emits light having a longer wavelength than the second and third LED stacks 433 and 443, the light generated from the first LED stack 423 may be emitted to the outside through the second and third LED stacks 433 and 443. In addition, since the second LED stack 433 emits light having a longer wavelength than the third LED stack 443, light generated from the second LED stack 433 may be emitted to the outside through the third LED stack 443.
The reflective electrode 425 forms an ohmic contact with the second conductive type semiconductor layer of the first LED stack 423 and reflects light generated from the first LED stack 423. For example, the reflective electrode 425 may include an ohmic contact layer 425a and a reflective layer 425 b.
The ohmic contact layer 425a partially contacts the second conductive type semiconductor layer (i.e., the p-type semiconductor layer). In order to prevent light from being absorbed by the ohmic contact layer 425a, the area of the ohmic contact layer 425a in contact with the p-type semiconductor layer is not more than 50% of the total area of the p-type semiconductor layer. The reflective layer 425b covers the ohmic contact layer 425a and the insulating layer 427. As shown in the drawing, the reflective layer 425b may cover the entire ohmic contact layer 425a without being limited thereto. Alternatively, the reflective layer 425b may cover a portion of the ohmic contact layer 425 a.
Since the reflective layer 425b covers the first insulating layer 427, an omnidirectional reflector may be formed by a stacked structure of the first LED stack 423 having a relatively high refractive index and the insulating layer 427 and the reflective layer 425b having a relatively low refractive index. The reflective layer 425b covers 50% or more of the area of the first LED stack 423 or covers most of the first LED stack 423, thereby improving light emitting efficiency.
The ohmic contact layer 425a and the reflective layer 425b may be metal layers including Au. The ohmic contact layer 425a may Be formed of, for example, an Au-Zn alloy or an Au-Be alloy. The reflective layer 425b may be formed of a metal (e.g., Al, Ag, or Au) having a high reflectivity with respect to light (e.g., red light) generated from the first LED stack 423. Specifically, Au may have a relatively low reflectivity with respect to light (e.g., green or blue light) generated from the second and third LED stacks 433 and 443, thereby reducing interference of light that has been generated from the second and third LED stacks 433 and 443 and travels toward the support substrate 451 by absorbing the light.
The insulating layer 427 is interposed between the support substrate 451 and the first LED stack 423, and has an opening exposing the first LED stack 423. The ohmic contact layer 425a is connected to the first LED stack 423 in the opening of the insulating layer 427.
The ohmic electrode 426 forms an ohmic contact with the first conductive type semiconductor layer 423a of the first LED stack 423. The ohmic electrode 426 may be disposed on the first conductive type semiconductor layer 423a exposed by partially removing the second conductive type semiconductor layer 423 b. Although a single ohmic electrode 426 is illustrated in fig. 51, a plurality of ohmic electrodes 426 are arranged in a plurality of regions on the support substrate 451. The ohmic electrode 426 may be formed of, for example, an Au-Te alloy or an Au-Ge alloy.
The second insulating layer 428 is interposed between the support substrate 451 and the reflective electrode 425, and covers the reflective electrode 425. The second insulating layer 428 has an opening exposing the ohmic electrode 426.
The interconnection line 429 is interposed between the second insulating layer 428 and the support substrate 451, and is connected to the ohmic electrode 426 through an opening of the second insulating layer 428. The interconnection line 26 may connect the plurality of ohmic electrodes 426 to each other on the support substrate 451.
The second p-transparent electrode 435 forms an ohmic contact with the second conductive type semiconductor layer 4433b of the second LED stack 433 (i.e., a p-type semiconductor layer thereof). The second p-transparent electrode 435 may be composed of a metal layer or a conductive oxide layer transparent to red and green light.
In addition, the third p transparent electrode 445 forms an ohmic contact with the second conductive type semiconductor layer 443b of the third LED stack 443 (i.e., a p-type semiconductor layer thereof). The third p transparent electrode 445 may be composed of a metal layer or a conductive oxide layer transparent to red, green, and blue light.
Reflective electrode 425, second p-transparent electrode 435, and third p-transparent electrode 445 may facilitate current spreading by ohmic contact with the p-type semiconductor layers of each LED stack.
The first color filter 437 may be disposed between the first LED stack 423 and the second LED stack 433. In addition, a second color filter 447 may be interposed between the second LED stack 433 and the third LED stack 443. The first color filter 437 transmits light generated from the first LED stack 423 while reflecting light generated from the second LED stack 433. The second color filter 447 transmits light generated from the first and second LED stacks 423 and 433 while reflecting light generated from the third LED stack 443. As a result, light generated from the first LED stack 423 may be transmitted to the outside through the second LED stack 433 and the third LED stack 443, and light generated from the second LED stack 433 may be transmitted to the outside through the third LED stack 443. In addition, the light emitting diode stack may prevent light generated from the second LED stack 433 from entering the first LED stack 423 or may prevent light generated from the third LED stack 443 from entering the second LED stack 433, thereby preventing light loss.
In some exemplary embodiments, the first color filter 437 may reflect light generated from the third LED stack 443.
The first and second color filters 437 and 447 may be, for example, a low-pass filter allowing light in a low frequency band (i.e., in a long wavelength band) to pass therethrough, a band-pass filter allowing light in a predetermined wavelength band, or a band-stop filter preventing light in a predetermined wavelength band from passing therethrough. Specifically, each of the first color filter 437 and the second color filter 447 may be formed by alternately stacking insulating layers having different refractive indexes one on another. For example, each of the first and second color filters 437 and 447 may be formed by alternately stacking a TiO2 layer and a SiO2 layer, a Ta2O5 layer and a SiO2 layer, a Nb2O5 layer and a SiO2 layer, a HfO2 layer and a SiO2 layer, or a ZrO2 layer and a SiO2 layer. In addition, the first color filter 437 and/or the second color filter 447 may include a Distributed Bragg Reflector (DBR). The distributed bragg reflector may be formed by alternately stacking insulating layers having different refractive indexes one on another. In addition, the stop band of the distributed bragg reflector can be controlled by adjusting the thicknesses of the TiO2 layer and the SiO2 layer.
A first bonding layer 453 bonds the first LED stack 423 to the support substrate 451. As shown in the figure, the interconnect lines 429 may be adjacent to the first bonding layer 453. Further, the interconnect lines 429 are disposed under some regions of the second insulating layer 428 such that regions of the second insulating layer 428 on which the interconnect lines 429 are not formed are adjacent to the first bonding layer 453. The first bonding layer 453 may be light transmissive or opaque. Specifically, a bonding layer formed of a black epoxy resin capable of absorbing light is used as the first bonding layer 453, thereby improving the contrast of the display device.
Second bonding layer 455 bonds second LED stack 433 to first LED stack 423. As shown in the drawing, the second bonding layer 455 may be adjacent to the first LED stack 423 and the first color filter 437. The ohmic electrode 426 may be covered with the second bonding layer 455. The second bonding layer 455 transmits light generated from the first LED stack 423. The second bonding layer 455 may be formed of, for example, light-transmitting spin-on glass (SOG).
The third bonding layer 457 bonds the third LED stack 443 to the second LED stack 433. As shown in the drawing, the third bonding layer 457 may be adjacent to the second LED stack 433 and the second color filter 447. However, it should be understood that the present disclosure is not limited thereto. For example, a transparent conductive layer may be disposed on the second LED stack 433. The third bonding layer 457 transmits light generated from the first and second LED stacks 423 and 433. The third bonding layer 457 may be formed of, for example, light-transmissive spin-on glass.
In this exemplary embodiment, the first, second, and third bonding layers 453, 455, and 457 are formed of SOG. However, it is to be understood that the present disclosure is not limited thereto, and the first to third bonding layers may be formed of other transparent organic or inorganic materials. Examples of the organic material may include SU8, poly (methyl methacrylate) (PMMA), polyimide, parylene, benzocyclobutene (BCB), or others, and examples of the inorganic material may include Al2O3, SiO2, SiNx, or others. The organic material layer may be bonded under high vacuum and high pressure conditions, and the inorganic material layer may be bonded under high vacuum conditions after planarizing the surface of the inorganic material layer by, for example, chemical mechanical polishing and changing the surface energy using plasma.
Fig. 52A, 52B, 52C, 52D, and 52E are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack 400 for a display according to an exemplary embodiment of the present disclosure.
Referring to fig. 52A, first, a first LED stack 423 is grown on a first substrate 421. The first substrate 421 may be, for example, a GaAs substrate. Further, the first LED stack 423 is composed of AlGaInP-based semiconductor layers, and includes a first conductive type semiconductor layer 423a, an active layer, and a second conductive type semiconductor layer 423 b.
Then, the first conductive type semiconductor layer 423a is exposed by partially removing the second conductive type semiconductor layer 423 b. Although a single pixel region is illustrated herein, the first conductive type semiconductor layer 423a is partially exposed in each pixel region.
An insulating layer 427 is formed on the first LED stack 423, and the insulating layer 427 is patterned to form an opening. For example, a SiO2 layer is formed on first LED stack 423 and a photoresist is deposited on the SiO2 layer, followed by photolithography and development to form a photoresist pattern. Then, the SiO2 layer is patterned by a photoresist pattern serving as an etching mask, thereby forming the insulating layer 427. One of the openings formed in the first insulating layer 427 may be disposed on the first conductive type semiconductor layer 423a, and the other openings may be disposed on the second conductive type semiconductor layer 423 b.
Then, an ohmic contact layer 425a and an ohmic electrode 426 are formed in the opening of the first insulating layer 427. The ohmic contact layer 425a and the ohmic electrode 426 may be formed through a lift-off process. The ohmic contact layer 425a may be formed before the ohmic electrode 426 is formed, or vice versa. In addition, in some exemplary embodiments, the ohmic electrode 426 and the ohmic contact layer 425a may be simultaneously formed of the same material layer.
After the ohmic contact layer 425a is formed, a reflective layer 425b is formed to cover the ohmic contact layer 425a and the first insulating layer 427. The reflective layer 425b may be formed by a lift-off process. As shown in the figure, the reflective layer 425b may cover a portion of the ohmic contact layer 425a or the whole thereof. The ohmic contact layer 425a and the reflective layer 425b form a reflective electrode 425.
The reflective electrode 425 forms an ohmic contact with the p-type semiconductor layer of the first LED stack 423, and thus will be referred to as a first p-reflective electrode 425. The reflective electrode 425 is separated from the ohmic electrode 426 and thus is electrically insulated from the first conductive type semiconductor layer 423 a.
Then, a second insulating layer 428 is formed to cover the reflective electrode 425, the second insulating layer 428 having an opening exposing the ohmic electrode 426. The second insulating layer 428 may be formed of, for example, SiO2 or SOG.
On the other hand, an interconnection line 429 is formed on the second insulating layer 428. The interconnection line 429 is connected to the ohmic electrode 426 through the opening of the second insulating layer 428 to be electrically connected to the first conductive type semiconductor layer 423 a.
Although the interconnect lines 429 are shown to cover the entire surface of the second insulating layer 428 in fig. 52A, the interconnect lines 429 are partially disposed on the second insulating layer 428 such that the upper surface of the second insulating layer 428 is exposed around the interconnect lines 429.
Although a single pixel region is illustrated herein, the first LED stack 423 disposed on the substrate 421 may cover a plurality of pixel regions, and the interconnection line 429 may be commonly connected to the ohmic electrode 426 formed in the plurality of pixel regions. In addition, a plurality of interconnection lines 429 may be formed on the substrate 421.
Referring to fig. 52B, a second LED stack 433 is grown on a second substrate 431, and a second p-transparent electrode 435 and a first color filter 437 are formed on the second LED stack 433. The second LED stack 433 includes a GaN-based first conductive type semiconductor layer 4433a, a second conductive type semiconductor layer 4433b, and an active layer (not shown) interposed therebetween and including a GaInN well layer. The second substrate 431 is a substrate that allows a GaN-based semiconductor layer to be grown thereon and is different from the first substrate 421. The composition ratio of GaInN for the second LED stack 433 may be determined so that the second LED stack 433 may emit green light. On the other hand, the second p transparent electrode 435 forms ohmic contact with the second conductive type semiconductor layer 4433 b.
A first color filter 437 may be formed on the second p-transparent electrode 435. Details of the first color filter 437 are the same as those of the first color filter 437 described with reference to fig. 51, and a repetitive description thereof will be omitted.
Referring to fig. 52C, a third LED stack 443 is grown on the third substrate 441, and a third p transparent electrode 445 and a second color filter 447 are formed on the third LED stack 443. The third LED stack 443 includes a GaN-based first conductive type semiconductor layer 443a, a second conductive type semiconductor layer 443b, and an active layer (not shown) interposed therebetween and including a GaInN well layer. The third substrate 441 is a substrate that allows a GaN-based semiconductor layer to be grown thereon and is different from the first substrate 421. The composition ratio of GaInN for the third LED stack 443 may be determined so that the third LED stack 443 may emit blue light. On the other hand, the third p transparent electrode 445 forms ohmic contact with the second conductive type semiconductor layer 443 b.
The details of the second color filter 447 are the same as those of the second color filter 447 described with reference to fig. 51, and a repeated description thereof will be omitted.
As such, the first LED stack 423, the second LED stack 433, and the third LED stack 443 are grown on different substrates, and thus their formation order is not limited to a specific order.
Referring to fig. 52D, the first LED stack 423 is bonded to the support substrate 451 via a first bonding layer 453. A bonding material layer may be disposed on the support substrate 451 and the second insulating layer 428, and the bonding material layers may be bonded to each other to form the first bonding layer 453. The interconnect 429 is disposed to face the support substrate 451. On the other hand, the first substrate 421 is removed from the first LED stack 423 by chemical etching. As a result, the upper surface of the first conductive type semiconductor layer of the first LED stack 423 is exposed. The exposed surface of the first conductive type semiconductor layer 423a may be textured to improve light extraction efficiency, so that a light extraction structure, such as a rough surface, may be formed on the surface of the first conductive type semiconductor layer 423 a.
Referring to fig. 52E, the second LED stack 433 is bonded to the first LED stack 423 via the second bonding layer 455. The first color filter 437 is disposed to face the first LED stack 423 and is bonded to the second bonding layer 455. A bonding material layer may be disposed on the first LED stack 423 and the first color filter 437, and the bonding material layers may be bonded to each other to form the second bonding layer 455. The second substrate 431 may be removed from the second LED stack 433 by a laser lift-off process or a chemical lift-off process. In addition, a rough surface may be formed on the exposed surface of the first conductive type semiconductor layer 4433a by surface texturing to improve light extraction efficiency.
Then, referring to fig. 51 and 52C, the third LED stack 443 is bonded to the second LED stack 433 via a third bonding layer 457. The second color filter 447 is disposed to face the second LED stack 433 and bonded to the third bonding layer 457. A bonding material layer may be disposed on the second LED stack 433 and the third color filter 447, and the bonding material layers are bonded to each other to form a third bonding layer 457.
The third substrate 441 may be separated from the third LED stack 443 by a laser lift-off process or a chemical lift-off process. As a result, as shown in fig. 51, the light emitting diode stack for a display having the first conductive type semiconductor layer 443a of the third LED stack 443 exposed to the outside is completed. In addition, a rough surface may be formed on the exposed surface of the first conductive type semiconductor layer 443a by surface texturing.
The display device may be set up by: the stack of the first to third LED stacks 423, 433 and 443 on the support substrate 451 is patterned in units of pixels, and then connected to each other by interconnection lines. Hereinafter, exemplary embodiments of a display apparatus will be described.
Fig. 53 is a schematic circuit diagram illustrating an operation of a display apparatus according to one exemplary embodiment of the present disclosure, and fig. 54 is a schematic plan view of the display apparatus according to the exemplary embodiment of the present disclosure.
First, referring to fig. 53 and 54, the display device according to the exemplary embodiment may be implemented to operate in a passive matrix manner.
For example, since the light emitting diode stack for a display described with reference to fig. 51 has such a structure: the first LED stack 423, the second LED stack 433, and the third LED stack 443 are stacked in a vertical direction, so one pixel includes three kinds of light emitting diodes R, G and B. Here, the first light emitting diode R corresponds to the first LED stack 423, the second light emitting diode G corresponds to the second LED stack 433, and the third light emitting diode B corresponds to the third LED stack 443.
In fig. 3 and 4, one pixel includes a first light emitting diode R, a second light emitting diode G, and a third light emitting diode B, each of which corresponds to a sub-pixel. The anodes of the first, second, and third light emitting diodes R, G, and B are connected to a common line (e.g., a data line), and their cathodes are connected to different lines (e.g., a scan line). For example, in the first pixel, anodes of the first, second, and third light emitting diodes R, G, and B are commonly connected to the data line Vdata1, and cathodes thereof are respectively connected to the scan lines Vscan1-1, Vscan1-2, and Vscan 1-3. As a result, the light emitting diodes R, G and B in each pixel can be driven independently.
Further, each of the light emitting diodes R, G and B is driven by pulse width modulation or by changing the magnitude of current, so that the luminance of each sub-pixel can be adjusted.
Referring again to fig. 54, a plurality of pixels are formed by patterning the stack described with reference to fig. 51, and each pixel is connected to the reflective electrode 425 and the interconnection lines 471, 473, 475. As shown in fig. 53, the reflective electrode 425 may be used as the data line Vdata, and the interconnection lines 471, 473, 475 may be formed as scan lines. Here, the interconnection line 75 may be formed of an interconnection line 429. The reflective electrode 425 may electrically connect the first conductive type semiconductor layers 423a, 433a, 443a of the first, second, and third LED stacks 423, 433, 443 of the plurality of pixels, and the interconnection line 429 may be disposed orthogonal to the reflective electrode 425 to electrically connect the first conductive type semiconductor layers 23a of the plurality of pixels.
The pixels may be arranged in a matrix form in which the anode of the light emitting diode R, G, B of each pixel is commonly connected to the reflective electrode 425, and their cathodes are connected to the interconnection lines 471, 473, 475, which are separated from each other. Here, the interconnection lines 471, 473, 475 may be used as the scan lines Vscan.
Fig. 55 is an enlarged plan view of one pixel of the display device shown in fig. 54, fig. 56 is a schematic sectional view taken along line a-a of fig. 55, and fig. 57 is a schematic sectional view taken along line B-B of fig. 55.
Referring to fig. 54, 55, 56, and 57, in each pixel, a portion of the reflective electrode 425, a portion of the second p transparent electrode 435, a portion of the upper surface of the second LED stack 433, a portion of the third p transparent electrode 445, and the upper surface of the third LED stack 443 are exposed to the outside.
The third LED stack 443 may have a rough surface 443r on an upper surface thereof. The rough surface 443r may be formed on the entire upper surface of the third LED stack 443 or may be formed in some regions of the upper surface of the third LED stack 443 as shown in the drawing.
The lower insulating layer 461 may cover a side surface of each pixel. The lower insulating layer 461 may be formed of a light-transmitting material such as SiO 2. In this case, the lower insulating layer 461 may cover the entire upper surface of the third LED stack 443. Alternatively, the lower insulating layer 461 may include a distributed bragg reflector to reflect light traveling toward side surfaces of the first, second, and third LED stacks 423, 433, and 443. In this case, the lower insulating layer 461 at least partially exposes the upper surface of the third LED stack 443.
The lower insulating layer 461 may include an opening 461a exposing the upper surface of the third LED stack 443, an opening 461b exposing the upper surface of the second LED stack 433, an opening 461c exposing the third p-transparent electrode 445, an opening 461d exposing the second p-transparent electrode 435, and an opening 61e exposing the first p-reflective electrode 425. On the other hand, the upper surface of the first LED stack 423 may not be exposed.
The interconnection lines 471, 473 may be formed on the support substrate 451 near the first, second, and third LED stacks 423, 433, 443 and may be disposed on the lower insulating layer 461 to be insulated from the first p-reflective electrode 425. On the other hand, the connecting portion 477ab connects the second p transparent electrode 435 and the third p transparent electrode 445 to the reflective electrode 425. As a result, the anodes of the first, second, and third LED stacks 423, 433, and 443 are commonly connected to the reflective electrode 425.
The interconnection line 75 or 29 may be disposed under the reflective electrode 425 to be orthogonal to the reflective electrode 425, and may be connected to the ohmic electrode 426 to be electrically connected to the first conductive type semiconductor layer 423 a. The ohmic electrode 426 is connected to the first conductive type semiconductor layer 423a under the first LED stack 423. As shown in fig. 55, the ohmic electrode 426 may be disposed outside a lower region of the rough surface 443r of the third LED stack 443, thereby reducing light loss.
The connection part 471a connects the upper surface of the third LED stack 443 to the interconnection line 471, and the connection part 473a connects the upper surface of the second LED stack 433 to the interconnection line 473.
An upper insulating layer 481 may be disposed on the interconnection lines 471, 473 and the lower insulating layer 461 to protect the interconnection lines 471, 473, 475. The upper insulating layer 481 may have openings that expose the interconnect lines 471, 473, 475 so that the bonding lines may be connected through the openings.
According to this exemplary embodiment, the anodes of the first, second, and third LED stacks 423, 433, and 443 are commonly connected to the reflective electrode 425, and their cathodes are connected to the interconnection lines 471, 473, 475, respectively. As a result, the first LED stack 423, the second LED stack 433, and the third LED stack 443 can be independently driven.
Although the electrode of each pixel is described as being connected to the data line and the scan line in this exemplary embodiment, it is understood that various embodiments are possible.
Fig. 58A to 58H are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure. Here, a description will be given below of a method of forming the pixel of fig. 55.
First, the light emitting diode stack 400 described in fig. 51 is prepared.
Then, referring to fig. 58A, a rough surface 443r may be formed on the upper surface of the third LED stack 443. A rough surface 443r may be formed on the upper surface of the third LED stack 443 corresponding to each pixel region. The rough surface 443r may be formed by chemical etching, such as photo-enhanced chemical etching (PEC).
The rough surface 443r may be partially formed in each pixel region in consideration of a region of the third LED stack 443 to be etched in a subsequent process, without limitation. Specifically, the rough surface 443r may be formed such that the ohmic electrode 426 is positioned outside the rough surface 443 r. Alternatively, the rough surface 443r may be formed over the entire upper surface of the third LED stack 443.
Referring to fig. 58B, a peripheral region of the third LED stack 443 in each pixel is removed by etching to expose the third p transparent electrode 445. As shown in the figure, the third LED stack 443 may be left to have a rectangular shape or a square shape as shown in the figure. Here, the third LED stack 443 may have at least two recesses along an edge thereof. Further, as shown in the figures, the size of one recess may be larger than the size of another recess.
Referring to fig. 58C, the upper surface of the second LED stack 433 is exposed by removing the third p transparent electrode 445 exposed in other regions except for a portion of the third p transparent electrode 445 exposed in the recess having a larger size. Thus, the upper surface of the second LED stack 433 is exposed around the third LED stack 443 and in other recesses. In the recess having a larger size, an exposed region of the third p transparent electrode 445 and an exposed region of the second LED stack 433 are formed.
Referring to fig. 58D, the second p transparent electrode 435 is exposed by removing the second LED stack 433 exposed in the other region except the second LED stack 433 exposed in the recess having the smaller size. The second p transparent electrode 435 is exposed around the third LED stack 443 and partially exposed in the recess having a larger size.
Referring to fig. 58E, the upper surface of the first LED stack 423 is exposed by removing the second p transparent electrode 435 exposed around the third LED stack 443 except for a portion of the second p transparent electrode 435 exposed in the recess having a larger size.
Referring to fig. 58F, the reflective electrode 425 is exposed by removing the second LED stack 423 exposed around the third LED stack 443, and then by removing the first insulating layer 427. As a result, the reflective electrode 425 is exposed around the third LED stack 443. The linear interconnection line is formed by patterning the exposed reflective electrode 425 to have an elongated shape in a vertical direction. The patterned reflective electrode 425 is disposed on a plurality of areas in a vertical direction and is separated from adjacent pixels in a horizontal direction.
Although the reflective electrode 425 is patterned after removing the second LED stack 423 in this exemplary embodiment, the reflective electrode 425 may be formed to have a patterned shape when the reflective electrode 425 is formed on the substrate 421. In this case, the reflective electrode 425 does not need to be patterned after removing the second LED stack 423.
The second insulating layer 428 may be exposed by patterning the reflective electrode 425. The interconnection line 429 is provided orthogonal to the reflective electrode 425, and is insulated from the reflective electrode 425 by the second insulating layer 428.
Referring to fig. 58G, a lower insulating layer 461 (see fig. 56 and 57) is formed to cover the pixels. The lower insulating layer 461 covers the reflective electrode 425 and side surfaces of the first, second, and third LED stacks 423, 433, and 443. In addition, the lower insulating layer 461 may at least partially cover an upper surface of the third LED stack 443. If the lower insulating layer 461 is a transparent layer such as a SiO2 layer, the lower insulating layer 461 may cover the entire upper surface of the third LED stack 443. Alternatively, the lower insulating layer 461 may include a distributed bragg reflector. In this case, the lower insulating layer 461 may at least partially expose the upper surface of the third LED stack 443 to emit light to the outside.
The lower insulating layer 461 may include an opening 461a exposing the third LED stack 443, an opening 461b exposing the second LED stack 433, an opening 461c exposing the third p-transparent electrode 445, an opening 461d exposing the second p-transparent electrode 435, and an opening 461e exposing the reflective electrode 425. The opening 461f adapted to expose the reflective electrode 425 may be formed singly or in plurality.
Referring to fig. 58H, interconnection lines 471, 473 and connection portions 471a, 473a, 477ab are formed. The interconnection lines 471, 473 and the connection portions 471a, 473a, 477ab may be formed by a lift-off process. The interconnection lines 471, 473 are insulated from the reflective electrode 425 by the lower insulating layer 461. The connection part 471a electrically connects the third LED stack 443 to the interconnection line 471, and the connection part 473a electrically connects the second LED stack 433 to the interconnection line 473. The connecting portion 477ab electrically connects the third p transparent electrode 445 and the second p transparent electrode 435 to the first p reflective electrode 425.
The interconnection lines 471, 473 may be disposed orthogonal to the reflective electrode 425 and may connect a plurality of pixels to each other.
Then, an upper insulating layer 481 (see fig. 56 and 57) covers the interconnection lines 471, 473 and the connection portions 471a, 473a, 477 ab. The upper insulating layer 481 may also cover the entire upper surface of the third LED stack 443. The upper insulating layer 481 may be formed of, for example, silicon oxide or silicon nitride, and may include a distributed bragg reflector. In addition, the upper insulating layer 481 may include a transparent insulating layer and a reflective metal layer or a multi-layered organic reflective layer formed on the transparent insulating layer to reflect light, or may include a light absorbing layer formed of black epoxy resin to block light.
When the upper insulating layer 481 reflects or blocks light, the upper insulating layer 481 is formed to at least partially expose the upper surface of the third LED stack 443 to emit light to the outside. In order to make electrical connection with the outside, the upper insulating layer 481 may be partially removed to expose the interconnection lines 471, 473, 475. Alternatively, the upper insulating layer 481 may be omitted.
As a result, the pixel region is completed as shown in fig. 55. Further, as shown in fig. 54, a plurality of pixels may be formed on the support substrate 451, and the plurality of pixels may be connected to each other through the first p-reflective electrode 425 and the interconnection lines 471, 473, 475 to operate in a passive matrix manner.
Although a method of manufacturing a display device adapted to operate in a passive matrix manner is shown in this exemplary embodiment, it should be understood that the present disclosure is not limited thereto. That is, the display device according to the exemplary embodiment may be manufactured in various ways to operate in a passive matrix manner using the light emitting diode stack shown in fig. 51.
Although the interconnect line 471 is formed on the lower insulating layer 461 together with the interconnect line 75 in this exemplary embodiment, the interconnect line 471 may be formed on the lower insulating layer 461 and the interconnect line 473 may be formed on the insulating layer 481.
In the exemplary embodiment described with reference to fig. 51, although the reflective electrode 425, the second p-transparent electrode 435, and the third p-transparent electrode 445 form ohmic contacts with the second conductive type semiconductor layer 423b of the first LED stack 423, the second conductive type semiconductor layer 433b of the second LED stack 433, and the second conductive type semiconductor layer 443b of the third LED stack 443, respectively, and the ohmic electrode 426 forms ohmic contacts with the first conductive type semiconductor layer 423a of the first LED stack 423, the first conductive type semiconductor layer 4433a of the second LED stack 433 and the first conductive type semiconductor layer 33b of the third LED stack 443 are not provided with separate ohmic contact layers. When the pixel has a size of 200 μm or less, current diffusion is not difficult even if a separate ohmic contact layer is not formed in the n-type semiconductor layer. However, a transparent electrode layer may be provided on the n-type semiconductor layer of each of the second and third LED stacks to ensure current diffusion.
According to an exemplary embodiment, since a plurality of pixels can be formed at a wafer level using the light emitting diode stack 400 for a display, it is not necessary to separately mount light emitting diodes. Further, the light emitting diode stack according to the exemplary embodiment has a structure in which: the first, second, and third LED stacks 423, 433, and 443 are stacked in a vertical direction, thereby securing an area for a sub-pixel in a limited pixel area. In addition, the light emitting diode stack according to the exemplary embodiment allows light generated from the first, second, and third LED stacks 423, 433, and 443 to be emitted to the outside therethrough, thereby reducing light loss.
Fig. 59 is a schematic plan view of a display device 5000 according to another exemplary embodiment of the present disclosure, and fig. 60 is a schematic cross-sectional view of a light emitting diode pixel 500 for a display according to one exemplary embodiment of the present disclosure.
Referring to fig. 59, the display apparatus 5000 includes a support substrate 551 and a plurality of pixels 500 disposed on the support substrate 551. Each pixel 500 includes a first sub-pixel R, a second sub-pixel G, and a third sub-pixel B.
Referring to fig. 60, a support substrate 551 supports LED stacks 523, 533, 543. The support substrate 551 may include, but is not limited to, circuitry on its surface or in it. The support substrate 551 may include, for example, a Si substrate or a Ge substrate.
The first subpixel R includes a first LED stack 523, the second subpixel G includes a second LED stack 533, and the third subpixel B includes a third LED stack 543. The first sub-pixel R is adapted to make the first LED stack 523 emit light, the second sub-pixel G is adapted to make the second LED stack 533 emit light, and the third sub-pixel B is adapted to make the third LED stack 543 emit light. First LED stack 523, second LED stack 533, and third LED stack 543 can be independently driven.
First, second, and third LED stacks 523, 533, and 543 are stacked one on another in a vertical direction to overlap each other. Here, as shown in the figures, the second LED stack 533 is disposed in some areas on the first LED stack 523. As shown in the figures, second LED stack 533 may be disposed offset to one side on first LED stack 523. In addition, third LED stack 543 is disposed in some regions on second LED stack 533. As shown in the figures, the third LED stack 543 may be disposed offset to one side on the second LED stack 533. Although the third LED stack 543 is biased to the right in the drawing, it is understood that the present disclosure is not limited thereto, and the second LED stack 533 may be disposed biased to the left.
Light R generated from first LED stack 523 may be emitted through a region of first LED stack 523 not covered by second LED stack 533 and may also be emitted after passing through second LED stack 533 and third LED stack 543, and light G generated from second LED stack 533 may be emitted through a region of second LED stack 533 not covered by third LED stack 543 and may also be emitted after passing through third LED stack 543.
In general, the region of first LED stack 523 covered by second LED stack 533 may cause light loss, so that the region of first LED stack 523 not covered by second LED stack 533 may emit light having higher luminous intensity per unit area. Accordingly, the luminous intensity of light emitted from the first LED stack 523 can be controlled by adjusting the area of the region of the first LED stack 523 covered by the second LED stack 533 and the area of the region of the first LED stack 523 not covered by the second LED stack 533 among the areas of the first LED stack 523. Likewise, the luminous intensity of light emitted from second LED stack 533 can be controlled by adjusting the area of the region of second LED stack 533 covered by third LED stack 543 and the area of the region of second LED stack 533 not covered by third LED stack 543, among the areas of second LED stack 533.
For example, in such a configuration: first LED stack 523 emits red light, second LED stack 533 emits green light, and third LED stack 543 emits blue light, and it is necessary to reduce the light emission intensity of green light due to high visibility of green light. To this end, the area of the second LED stack 533 not covered by the third LED stack 543 can be adjusted to be smaller than the area of the third LED stack 543. Further, since red light has low visibility, it is necessary to increase the light emission intensity of red light. To this end, the area of the first LED stack 523 not covered by the second LED stack 533 may be adjusted to be larger than the area of the third LED stack 543.
Meanwhile, each of the first, second, and third LED stacks 523, 533, and 543 includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer interposed between the n-type semiconductor layer and the p-type semiconductor layer. The active layer may have a multiple quantum well structure. First LED stack 523, second LED stack 533, and third LED stack 543 may include different active layers to emit light having different wavelengths. For example, the first LED stack 523 may be an inorganic light emitting diode emitting red light, the second LED stack 533 may be an inorganic light emitting diode emitting green light, and the third LED stack 543 may be an inorganic light emitting diode emitting blue light. For this, the first LED stack 523 may include a GaInP-based well layer, and the second and third LED stacks 533 and 543 may include a GaInN-based well layer.
Fig. 61 is a schematic circuit diagram illustrating an operation of a display apparatus according to an exemplary embodiment of the present disclosure.
Referring to fig. 61, the display device according to the exemplary embodiment may be implemented to operate in a passive matrix manner. As described with reference to fig. 59 and 60, one pixel includes a first subpixel R, a second subpixel G, and a third subpixel B. The first LED stack 523 of the first subpixel R emits light having a first wavelength, the second LED stack 533 of the second subpixel G emits light having a second wavelength, and the third LED stack 543 of the third subpixel B emits light having a third wavelength. The cathodes of the first, second, and third subpixels R, G, and B may be connected to a common line (e.g., the data line Vdata 525), and their anodes may be connected to different lines (e.g., the scan lines Vscan 571, 573, and 575).
For example, in the first pixel, cathodes of the first, second, and third sub-pixels R, G, and B are commonly connected to the data line Vdata1, and anodes thereof are respectively connected to the scan lines Vscan1-1, Vscan1-2, and Vscan 1-3. Therefore, the sub-pixels R, G and B in the same pixel can be driven independently.
In addition, each of the LED stacks 523, 533, and 543 may be driven by pulse width modulation or by changing the magnitude of current, so that the luminance of each sub-pixel can be adjusted. In addition, the brightness may be adjusted by adjusting the areas of the first, second, and third LED stacks 523, 533, and 543 and the areas of the regions where the first, second, and third LED stacks 523, 533, and 543 do not overlap.
Fig. 62 is a schematic plan view of a display apparatus 5000A according to a specific exemplary embodiment, in which a plurality of pixels 500A are arranged on a support substrate 551, as shown in the circuit diagram of fig. 61. Fig. 63 is an enlarged plan view of one pixel 500A of the display device shown in fig. 62, and fig. 64A, 64B, 64C, and 64D are schematic sectional views taken along lines a-a, B-B, C-C, and D-D of fig. 63.
Referring to fig. 62, 63, 64A, 64B, 64C, and 64D, the display apparatus 5000A may include a support substrate 551, a plurality of pixels 500A, a first subpixel R, a second subpixel G, a third subpixel B, a first LED stack 523, a second LED stack 533, a third LED stack 543, a reflective electrode (first-1 ohmic electrode) 525, a first-2 ohmic electrode 529, a second-1 ohmic electrode 537, a second-2 ohmic electrode 539, a third-1 ohmic electrode 549, a first color filter 535, a second color filter 545, a first bonding layer 5553, a second bonding layer 555, a third bonding layer 557, an insulating layer 527, a lower insulating layer 561, an upper insulating layer 563, interconnection lines 571, 573, and 575, and connection portions 571a, 573a, 575a, 577a, and 577B.
Each of the sub-pixels R, G and B is connected to the reflective electrode 525 and the interconnection lines 571, 573, and 575. As shown in fig. 61, the reflective electrode 525 may be used as the data line Vdata, and the interconnection lines 571, 573, and 575 may be used as the scan line Vscan.
As shown in fig. 62, the pixels may be arranged in a matrix in which cathodes of the sub-pixels R, G and B in each pixel are commonly connected to the reflective electrode 525, and anodes thereof are connected to interconnection lines 571, 573, and 575 that are separated from each other. The connection portions 571a, 573a, and 575a may connect the interconnection lines 571, 573, and 575 to the subpixels R, G and B.
The support substrate 551 supports the LED stacks 523, 533, and 543. The support substrate 551 may include, but is not limited to, circuitry on its surface or in it. The support substrate 551 may include, for example, a glass substrate, a sapphire substrate, a Si substrate, or a Ge substrate.
The first LED stack 523 includes a first conductive type semiconductor layer 523a and a second conductive type semiconductor layer 523 b; the second LED stack 533 includes a first conductive type semiconductor layer 533a and a second conductive type semiconductor layer 533 b; the third LED stack 543 includes a first conductive type semiconductor layer 543a and a second conductive type semiconductor layer 543 b. Although not shown in the drawings, an active layer may be provided between the first conductive type semiconductor layer 523a and the second conductive type semiconductor layer 523b, between the first conductive type semiconductor layer 533a and the second conductive type semiconductor layer 533b, and between the first conductive type semiconductor layer 543a and the second conductive type semiconductor layer 543b, respectively.
In this exemplary embodiment, each of the first conductive type semiconductor layers 523a, 533a, and 543a is an n-type semiconductor layer, and each of the second conductive type semiconductor layers 523b, 533b, and 543b is a p-type semiconductor layer. A rough surface may be formed on a surface of at least one of the first conductive type semiconductor layers 523a, 533a, and 543a by surface texturing.
The first LED stack 523 is disposed adjacent to the support base 551; second LED stack 533 is disposed over first LED stack 523; a third LED stack 543 is disposed on second LED stack 533. Further, the second LED stack 533 is disposed in some areas on the first LED stack 523 such that the first LED stack 523 partially overlaps the second LED stack 533. Further, the third LED stack 543 is disposed in some regions on the second LED stack 533 such that the second LED stack 533 partially overlaps the third LED stack 543. Accordingly, at least a portion of light generated from the first LED stack 523 may be emitted to the outside without passing through the second and third LED stacks 533 and 543. In addition, at least a portion of light generated from the second LED stack 533 may be emitted to the outside without passing through the third LED stack 543.
The details of the materials for first, second, and third LED stacks 523, 533, and 543 are the same as those described with reference to fig. 60, and a detailed description thereof will be omitted.
The reflective electrode 525 forms an ohmic contact with the lower surface of the first LED stack 523 (i.e., the first conductive type semiconductor layer 523a of the first LED stack 523). The reflective electrode 525 includes a reflective layer to reflect light emitted from the first LED stack 523. As shown in the figure, the reflective electrode 525 may cover almost the entire lower surface of the first LED stack. In addition, the reflective electrode 525 may be commonly connected to the plurality of pixels 500a to be used as the data line Vdata.
The reflective electrode 525 may be formed of a material layer forming an ohmic contact with the second conductive type semiconductor layer 523b of the first LED stack 523, and may include a reflective layer adapted to reflect light (e.g., red light) generated from the first LED stack 523.
The reflective electrode 525 may include an ohmic reflective layer, and may be formed of, for example, an Au-Te alloy or an Au-Ge alloy. These alloys have high reflectance to light in the red range and form ohmic contact with the first conductive type semiconductor layer 523 a.
The first-2 ohmic electrode 529 forms ohmic contact with the second conductive type semiconductor layer 523b of the first subpixel R. The first-2 ohmic electrode 529 may Be formed of, for example, an Au-Zn alloy or an Au-Be alloy. The first-2 ohmic electrode 529 may include a pad (pad, which may also be referred to as a "pad") region and an extension portion, and the connection portion 75a may be connected to the pad region as shown in fig. 64B. The first-2 ohmic electrode 529 may be separated from a region in which the second LED stack 533 is disposed.
The second-1 ohmic electrode 537 forms an ohmic contact with the first conductive type semiconductor layer 533a of the second LED stack 533. The second-1 ohmic electrode 537 may be disposed on the first conductive type semiconductor layer 533 a. For example, the first conductive type semiconductor layer 533a may be exposed by removing the second conductive type semiconductor layer 533b and the active layer disposed on the first conductive type semiconductor layer 533a, and the second-1 ohmic electrode 537 may be disposed on the exposed surface of the first conductive type semiconductor layer 533 a.
Meanwhile, as shown in fig. 64C, a connection portion 577b may electrically connect the second-1 ohmic electrode 537 to the reflective electrode 525. The second-1 ohmic electrode 537 may be separated from a region in which the third LED stack 543 is disposed.
The second-2 ohmic electrode 539 forms ohmic contact with the second conductive type semiconductor layer 533b of the second LED stack 533. The second-2 ohmic electrode 539 may be disposed on the second conductive type semiconductor layer 533b to be separated from a region in which the third LED stack 543 is disposed. The second-2 ohmic electrode 539 may include a pad region and an extension portion as shown in fig. 64B, and the connection portion 75a may be connected to the pad region as shown in fig. 64C.
The third-1 ohmic electrode 547 forms an ohmic contact with the first conductive type semiconductor layer 543a of the third LED stack 543. The third-1 ohmic electrode 547 may be disposed on the first conductive type semiconductor layer 543 a. For example, the first conductive type semiconductor layer 543a may be exposed by removing the second conductive type semiconductor layer 543b and the active layer disposed on the first conductive type semiconductor layer 543a, and the third-1 ohmic electrode 547 may be disposed on the exposed surface of the first conductive type semiconductor layer 543 a. As shown in fig. 64D, the connection portion 577a may electrically connect the third-1 ohmic electrode 547 to the reflective electrode 525.
The third-2 ohmic electrode 549 forms an ohmic contact with the second conductive type semiconductor layer 543b of the third LED stack 543. The third-2 ohmic electrode 549 may further include a pad region and an extension portion, and the connection portion 571a may be connected to the pad region of the third-2 ohmic electrode 549 as shown in fig. 64D.
Each of the first-2, second-1, and third-1 ohmic electrodes 529, 537, 547 may include an extended portion to facilitate current spreading in each LED stack.
Meanwhile, a first color filter 535 may be disposed between the first LED stack 523 and the second LED stack 533. In addition, a second color filter 545 may be disposed between the second and third LED stacks 533 and 543. First color filter 535 transmits light generated from first LED stack 523 while reflecting light generated from second LED stack 533. Meanwhile, the second color filter 545 transmits light generated from the first and second LED stacks 523 and 533 while reflecting light generated from the third LED stack 543. Accordingly, light generated from the first LED stack 523 may be emitted to the outside through the second and third LED stacks 533 and 543, and light generated from the second LED stack 533 may be emitted to the outside through the third LED stack 543. In addition, the light emitting diode pixel may prevent light generated from the second LED stack 533 from entering the first LED stack 523, or may prevent light generated from the third LED stack 543 from entering the second LED stack 533, thereby preventing light loss.
In some exemplary embodiments, the first color filter 537 may reflect light generated from the third LED stack 543.
The first and second color filters 537 and 545 may be, for example, a low-pass filter allowing light in a low frequency band (i.e., a long wavelength band) to pass therethrough, a band-pass filter allowing light in a predetermined wavelength band to pass therethrough, or a band-stop filter preventing light in a predetermined wavelength band from passing therethrough. Specifically, each of the first and second color filters 537 and 545 may be formed by alternately stacking insulating layers having different refractive indexes one on another, for example, by alternately stacking a TiO2 layer and a SiO2 layer. Specifically, the first and second color filters 537 and 545 may include Distributed Bragg Reflectors (DBRs). The stopband of the distributed bragg reflector can be controlled by adjusting the thickness of the TiO2 layer and the SiO2 layer. The low-pass filter and the band-pass filter may also be formed by alternately stacking insulating layers having different refractive indexes one on another.
The first bonding layer 5553 bonds the first LED stack 523 to the support substrate 551. As shown in the figure, the reflective electrode 525 may be adjacent to the first bonding layer 5553. The first bonding layer 5553 may be a light-transmitting layer or a light-opaque layer. The first bonding layer 5553 may be formed of an organic material or an inorganic material. Examples of the organic material may include SU8, poly (methyl methacrylate) (PMMA), polyimide, parylene, benzocyclobutene (BCB), or others, and examples of the inorganic material may include Al2O3, SiO2, SiNx, or others. The organic material layer may be bonded under high vacuum and high pressure conditions, and the inorganic material layer may be bonded under high vacuum after planarizing the surface of the inorganic material layer by, for example, chemical mechanical polishing and changing the surface energy using plasma. Specifically, a bonding layer formed of a black epoxy resin capable of absorbing light may be used as the first bonding layer 5553, thereby improving the contrast of the display device. The first bonding layer 5553 may also be formed of spin-on glass.
A second bonding layer 555 bonds first LED stack 523 to second LED stack 533. The second bonding layer 555 may be interposed between the first LED stack 523 and the first color filter 535. The second bonding layer 555 transmits light generated from the first LED stack 523, and may be formed of a light-transmitting bonding material like the first bonding layer 5553.
The insulating layer 527 may be interposed between the second bonding layer 555 and the first LED stack 523. The insulating layer 527 may be adjacent to the second conductive type semiconductor layer 523 b. The insulating layer 527 may be formed of, for example, SiO2, thereby improving the bonding strength of the second bonding layer 555.
The third bonding layer 557 bonds the second LED stack 533 to the third LED stack 543. A third bonding layer 557 may be interposed between the second LED stack 533 and the second color filter 545 to bond the second LED stack 533 to the second color filter 545. The third bonding layer 557 transmits light generated from the first and second LED stacks 523 and 533 and may be formed of a light-transmitting bonding material like the first bonding layer 5553.
The lower insulating layer 561 may cover the first, second, and third LED stacks 523, 533, and 543. The lower insulating layer 561 covers the reflective electrode 525 exposed around the first LED stack 523. Specifically, the lower insulating layer 561 may have an opening to provide an electrical connection path.
The upper insulating layer 563 covers the lower insulating layer 561. The upper insulating layer 563 may have an opening to provide an electrical connection path.
The lower insulating layer 561 and the upper insulating layer 563 may be formed of any insulating material (e.g., silicon oxide or silicon nitride), without being limited thereto.
As shown in fig. 62 and 63, the interconnection lines 571, 573, and 575 may be disposed orthogonal to the reflective electrode 525. The interconnection line 571 and the interconnection line 75 are disposed on the upper insulating layer 563 and may be connected to the third-2 ohmic electrode 549 and the first-2 ohmic electrode 529 through connection portions 571a and 575a, respectively. To this end, the upper and lower insulating layers 563 and 561 may have openings exposing the third-2 ohmic electrodes 547 and the first-2 ohmic electrodes 529.
The interconnection line 573 is disposed on the lower insulating layer 561 and insulated from the reflective electrode 525. The interconnection line 573 may be disposed between the lower insulating layer 561 and the upper insulating layer 563, and may be connected to the second-2 ohmic electrode 539 through a connection portion 573 a. For this, the lower insulating layer 561 has an opening exposing the second-2 ohmic electrode 539.
The connection portions 577a and 577b are disposed between the lower insulating layer 561 and the upper insulating layer 563, and electrically connect the third-1 ohmic electrode 547 and the second-1 ohmic electrode 537 to the reflective electrode 525, respectively. To this end, the lower insulating layer 561 may have openings exposing the third-1 ohmic electrode 547 and the second-1 ohmic electrode 537.
The interconnection line 571 and the interconnection line 573 are insulated from each other by the upper insulating layer 563, and thus may be disposed to overlap in the vertical direction.
Although the electrode of each pixel is connected to the data line and the scan line in this exemplary embodiment, it is understood that various embodiments are possible. In the above-described exemplary embodiment, the interconnection lines 571 and 575 are formed on the lower insulating layer 561, and the interconnection lines 573 are disposed between the lower insulating layer 561 and the upper insulating layer 563. However, it should be understood that the present disclosure is not limited thereto. For example, all of the interconnection lines 571, 573, and 575 may be formed on the lower insulating layer 561 and may be covered by the upper insulating layer 81, and the connection parts 571a and 575a may be formed on the upper insulating layer 563.
Next, a method of manufacturing the display device 5000A according to the above-described exemplary embodiment will be described.
Fig. 65 to 77 are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to a specific exemplary embodiment of the present disclosure. Each of these cross-sectional views is taken along line a-a of the corresponding plan view.
First, referring to fig. 65A and 65B, a first LED stack 523 is grown on a first substrate 521. The first substrate 521 may be, for example, a GaAs substrate. Further, the first LED stack 523 is composed of AlGaInP-based semiconductor layers, and includes a first conductive type semiconductor layer 523a, an active layer (not shown), and a second conductive type semiconductor layer 523 b.
Then, an insulating layer 527 is formed on the first LED stack 523. The insulating layer 527 is patterned so that the insulating layer 527 has an opening that exposes the second conductive type semiconductor layer 523 b. The insulating layer 527 may be formed of a hydrophilic material (e.g., SiO 2). The insulating layer 527 may be omitted.
A first-2 ohmic electrode 529 may be formed inside the opening of the insulating layer 527. The first-2 ohmic electrode 529 may Be formed of, for example, an Au-Zn alloy or an Au-Be alloy. The first-2 ohmic electrode 529 may be formed to have a pad region and an extended portion. The first-2 ohmic electrode 529 may be formed through a lift-off process such that the first-2 ohmic electrode 529 is positioned in each pixel region. As shown in fig. 65A, the first-2 ohmic electrode 529 may be biased to one side in each pixel region.
Then, referring to fig. 66A, an initial substrate 5121a may be attached to an upper side of the first LED stack 523 by a bonding layer 5123 a. The initial substrate 5121a is not limited to a specific substrate, but may be selected from any substrate capable of supporting the first LED stack 523. The first substrate 521 is removed from the first LED stack 523 by chemical etching. As a result, the upper surface of the first conductive type semiconductor layer 523a of the first LED stack 523 is exposed. A rough surface may be formed on the exposed upper surface of the first conductive type semiconductor layer 523a by surface texturing.
Then, a first-1 ohmic electrode (reflective electrode) 525 is formed on the exposed surface of the first LED stack 523. The reflective electrode 525 may be formed of, for example, an Au-Te alloy or an Au-Ge alloy. The reflective electrode 525 may be formed through a lift-off process, and the reflective electrode 525 may be patterned to have a specific shape. For example, the reflective electrode 525 may be patterned to have a length to connect a plurality of pixels to each other. However, it is understood that the present disclosure is not limited thereto, and the reflective electrode 525 may be patterned after forming the reflective electrode 525 on the entire upper surface of the first LED stack 523 without patterning the reflective electrode 525. The reflective electrode 525 may form an ohmic contact with the first conductive type semiconductor layer 523b of the first LED stack 523 (i.e., the n-type semiconductor layer of the first LED stack 523).
Referring to fig. 66B, the support substrate 551 is bonded to the first LED stack 523 via the first bonding layer 5553. The reflective electrode 525 on the first LED stack 523 may be disposed to face the support substrate 551 and be coupled to the support substrate 551. Accordingly, the first bonding layer 5553 may be adjacent to the reflective electrode 525 and the first conductive type semiconductor layer 523 a.
After being bonded to the support substrate 551, the preliminary substrate 5121a and the bonding layer 5123a may be removed. As a result, the insulating layer 527 and the first-2 ohmic electrode 529 may be exposed.
Referring to fig. 67A, a second LED stack 533 is grown on a second substrate 531. The second LED stack 533 is composed of GaN-based semiconductor layers, and may include a first conductive type semiconductor layer 533a, a GaInN well layer, and a second conductive type semiconductor layer 533 b. The second LED stack 533 is a substrate on which the GaN-based semiconductor layers are allowed to grow and is different from the first substrate 521. The GaInN composition of second LED stack 533 may be determined such that second LED stack 533 may emit green light.
Referring to fig. 67B, an initial substrate 5121B may be attached to the upper side of the second LED stack 533 by a bonding layer 5123B. The initial substrate 5121b is not limited to a specific substrate, but may be selected from any substrate capable of supporting the first LED stack 523.
Referring to fig. 67C, the second substrate 531 is removed. Second substrate 531 may be removed from second LED stack 533 by laser lift-off or chemical etching. As a result, the upper surface of the first conductive type semiconductor layer 533a of the second LED stack 533 is exposed. A rough surface may be formed on the exposed upper surface of the first conductive type semiconductor layer 533a by surface texturing.
Meanwhile, the first color filter 535 may be formed on the exposed surface of the first conductive type semiconductor layer 533 a. The first color filter 535 may be adjacent to the first conductive type semiconductor layer 533 a. The details of the material for the first color filter 535 are the same as those of the material for the first color filter 535 described with reference to fig. 64A, and a detailed description thereof will be omitted.
Referring to fig. 68A, a third LED stack 543 is grown on a third substrate 541. The third LED stack 543 is composed of GaN-based semiconductor layers, and may include a first conductive type semiconductor layer 543a, a GaInN well layer, and a second conductive type semiconductor layer 543 b. The third LED stack 543 is a substrate on which GaN-based semiconductor layers are allowed to grow and is different from the first substrate 521. The GaInN composition of the third LED stack 543 may be determined such that the third LED stack 543 may emit green light.
Referring to fig. 68B, an initial substrate 5121c may be attached to an upper side of the third LED stack 543 by a bonding layer 5123 c. The initial substrate 5121c is not limited to a specific substrate, but may be selected from any substrate capable of supporting the third LED stack 543.
Referring to fig. 68C, the third substrate 541 is removed. Third substrate 541 may be removed from third LED stack 543 by laser lift-off or chemical etching. As a result, the upper surface of the first conductive type semiconductor layer 543a of the third LED stack 543 is exposed. A rough surface may be formed on the exposed upper surface of the first conductive type semiconductor layer 543a by surface texturing.
Meanwhile, a second color filter 545 may be formed on the exposed surface of the first conductive type semiconductor layer 543 a. The second color filter 545 may be adjacent to the first conductive type semiconductor layer 543 a. The details of the material for the second color filter 545 are the same as those of the material for the second color filter 545 described with reference to fig. 64A, and a detailed description thereof will be omitted.
Since first LED stack 523, second LED stack 533, and third LED stack 543 are grown on different substrates, the order of forming the first to third LED stacks is not particularly limited.
Referring to fig. 69A and 69B, the second LED stack 533 to be described with reference to fig. 67C is bonded to the insulating layer 527 and the exposed first-2 ohmic electrode 529 as described with reference to fig. 66B via the second bonding layer 555.
The first color filter 535 is disposed to face the support substrate 551 and is bonded to the insulating layer 527 via the second bonding layer 555. The second bonding layer 555 may be formed of a light-transmitting material.
Then, the preliminary substrate 5121b and the bonding layer 5123b are removed to expose a surface of the second conductive type semiconductor layer 533b, and a second-2 ohmic electrode 539 is formed on the exposed surface of the second conductive type semiconductor layer 533 b.
As shown in fig. 69A, the second-2 ohmic electrode 539 may include a pad region and an extension portion. The extending portion may extend in a longitudinal direction of the reflective electrode 525. Meanwhile, the second-2 ohmic electrode 539 may be disposed to be separated from the first-2 ohmic electrode 529 in a horizontal direction. The second-2 ohmic electrode 539 forms ohmic contact with the second conductive type semiconductor layer 533 b.
Then, as shown in fig. 69A, the second conductive type semiconductor layer 533b and the active layer may be partially removed to expose the first conductive type semiconductor layer 533 a. The second conductive type semiconductor layer 533b and the active layer may be partially removed by mesa etching.
Thereafter, a second-1 ohmic electrode 537 may be formed on the exposed surface of the first conductive type semiconductor layer 533 a. The second-1 ohmic electrode 537 forms an ohmic contact with the first conductive type semiconductor layer 533 a.
Although the second-2 ohmic electrode 539 is formed before the second-1 ohmic electrode 537 in this exemplary embodiment, the order of forming the second-2 ohmic electrode 539 and the second-1 ohmic electrode 537 may be changed.
Then, referring to fig. 70A and 70B, the third LED stack 543, which will be described with reference to fig. 68, is bonded to the second LED stack 533 having the second-1 ohmic electrode 537 and the second-2 ohmic electrode 539 formed thereon via the third bonding layer 557.
The second color filter 545 may be disposed to face the second LED stack 533 and bonded to the second LED stack 533 by a third bonding layer 557. The third bonding layer 557 may be formed of a light-transmitting material.
Then, the preliminary substrate 5121c and the bonding layer 5123c may be removed to expose a surface of the second conductive type semiconductor layer 543b, and the third-2 ohmic electrode 549 may be formed on the exposed surface of the second conductive type semiconductor layer 543 b.
As shown in fig. 70A, the third-2 ohmic electrode 549 may include a pad region and an extension portion. The extending portion may extend in a longitudinal direction of the reflective electrode 525. Meanwhile, the third-2 ohmic electrode 549 may be disposed to be separated from the first-2 ohmic electrode 529 and the second-2 ohmic electrode 539 in the horizontal direction. The third-2 ohmic electrode 549 is in ohmic contact with the second conductive type semiconductor layer 543 b.
Meanwhile, as shown in fig. 70A, the second conductive type semiconductor layer 543b and the active layer may be partially removed to expose the first conductive type semiconductor layer 543 a. The second conductive type semiconductor layer 543b and the active layer may be partially removed by mesa etching.
Then, a third-1 ohmic electrode 547 may be formed on the exposed surface of the first conductive type semiconductor layer 543 a. The third-1 ohmic electrode 547 forms ohmic contact with the first conductive type semiconductor layer 543 a.
Although the third-2 ohmic electrode 549 is formed before the third-1 ohmic electrode 547 in this exemplary embodiment, the order of forming the third-2 ohmic electrode 549 and the third-1 ohmic electrode 547 may be changed.
Referring to fig. 71A and 71B, in each pixel region, the third LED stack 543 is patterned to remove the third LED stack 543 except for a region for the third subpixel B. As a result, the third sub-pixel B is defined. In addition, the second color filter 545 and the third bonding layer 557 may be removed together to expose the second conductive type semiconductor layer 533b, the second-1 ohmic electrode 537, and the second-2 ohmic electrode 539 of the second LED stack 533 as shown in the drawing.
Referring to fig. 72A and 72B, in each pixel region, the second LED stack 533 is patterned to remove the second LED stack 533 in a region except for a region for the second subpixel G. As a result, the second subpixel G is defined. In the region for the second subpixel G, the second LED stack 533 partially overlaps the third LED stack 543. That is, second LED stack 533 is patterned such that third LED stack 543 is disposed in some regions on second LED stack 533.
Meanwhile, the first color filter 535, the second bonding layer 555, and the insulating layer 527 may also be removed together, thereby exposing the second conductive type semiconductor layer 523b of the first LED stack 523 and the first-2 ohmic electrode 529 as shown in the drawing.
Referring to fig. 73A and 73B, the first LED stack 523 is patterned to remove the first LED stack 523 in an area except for an area for the first subpixel R. Meanwhile, the first-2 ohmic electrode 529 remains in the region for the first subpixel R. First LED stack 523 partially overlaps second LED stack 533 and third LED stack 543. That is, second and third LED stacks 533, 543 are restrictively positioned in an upper region of first LED stack 523.
Meanwhile, when the first LED stack 523 is patterned, the reflective electrode 525 may be exposed, and a surface of the first bonding layer 5553 may also be partially exposed. In other exemplary embodiments, an insulating layer may be disposed on the first bonding layer 5553, and the insulating layer may be exposed by patterning the first LED stack 523, instead of exposing a surface of the first bonding layer 5553.
Referring to fig. 74A and 74B, a lower insulating layer 561 is formed. The lower insulating layer 561 may cover the first, second, and third LED stacks 523, 533, and 543, and may also cover the reflective electrode 525 and the first bonding layer 5553. Meanwhile, the lower insulating layer 561 may be patterned such that the lower insulating layer 561 has openings exposing the first-2 ohmic electrode 529, the second-1 ohmic electrode 537, the second-2 ohmic electrode 539, the third-1 ohmic electrode 547, the third-2 ohmic electrode 549, and the reflective electrode 525.
Referring to fig. 75, an interconnection line 573 and connection parts 73a, 77a, and 77b are formed on the lower insulating layer 561. Connection portion 573a connects second-2 ohmic electrode 539 to interconnection line 573; the connection portion 577a connects the third-1 ohmic electrode 547 to the reflective electrode 525; the connection portion 577b connects the second-1 ohmic electrode 537 to the reflective electrode 525. The cross-sectional view taken along line a-a of fig. 75 is the same as fig. 74B and is not shown here.
Then, referring to fig. 76A and 76B, an upper insulating layer 563 is formed. The upper insulating layer 563 covers the interconnection line 573 and the connection portions 73a, 77a, and 77 b. Here, the upper insulating layer 563 may be patterned to expose pad regions of the first-2 ohmic electrode 529 and pad regions of the third-2 ohmic electrode 549.
Then, referring to fig. 77, interconnection lines 571 and 575 and connection parts 571a and 575a are formed on the upper insulating layer 563. The connection part 571a connects the interconnection line 571 to the third-2 ohmic electrode 549, and the connection part 75a connects the interconnection line 75 to the first-2 ohmic electrode 529.
As a result, the display device 5000A described with reference to fig. 62 and 63 is completed. The cross-sectional view taken along line a-a of fig. 77 is the same as fig. 76B and is not shown here.
In the above exemplary embodiments, by way of example, the pixels are driven in a passive matrix manner, whereas the pixels of the exemplary embodiments may be driven in an active matrix manner.
Fig. 78 is a schematic circuit diagram illustrating an operation of a display apparatus according to another exemplary embodiment of the present disclosure. In this embodiment, the display device is driven in an active matrix manner.
Referring to fig. 78, the driving circuit according to the exemplary embodiment includes at least two transistors Tr1, Tr2 and a capacitor. When a power source is connected to the select lines Vrow1 through Vrow3 and applies voltages to the data lines Vdata1 through Vdata3, voltages are applied to the corresponding light emitting diodes. Further, the corresponding capacitor is charged according to the value of Vdata1 to Vdata 3. Since the on state of the transistor Tr2 can be maintained by the voltage charged by the capacitor, even when the power supplied to the Vrow1 is cut off, the voltage of the capacitor can be maintained and can be applied to the light emitting diodes LED1 to LED 3. Further, the currents flowing in the light emitting diodes LED1 to LED3 may be changed according to the values of Vdata1 to Vdata 3. The current can be continuously supplied by Vdd, enabling continuous light emission.
The transistors Tr1 and Tr2 and the capacitor may be formed inside the support substrate 551. Connection pads for connection to transistors and capacitors may be formed on the surface of the support substrate 551. In addition, a selection line and a data line may be formed inside or on a surface of the support substrate 551. In this structure, the interconnection lines 571, 573, and 575 may be omitted.
Here, the light emitting diodes LEDs 1 to 3 correspond to the first LED stack 523, the second LED stack 533, and the third LED stack 543 in each pixel. The anodes of the first, second, and third LED stacks 523, 533, and 543 may be connected to the transistor Tr2, and the cathodes thereof may be grounded. The first-2 ohmic electrode 529, the second-2 ohmic electrode 539, and the third-2 ohmic electrode 549 may be connected to connection pads on the support substrate 551 through connection portions, and the reflective electrode 525 may be grounded by being connected to connection pads on the support substrate 551.
In this exemplary embodiment, the first, second, and third LED stacks 523, 533, and 543 may be grounded by being commonly connected to the reflective electrode 525. In addition, the reflective electrode 525 may be continuously disposed on two or more pixels, or disposed on all pixels. Thus, the reflective electrode 525 may be commonly connected to all of the LED stacks in the display device. The reflective electrode 525 is disposed between the pixel and the substrate 51, thereby eliminating noise of the active matrix circuit.
Although the exemplary embodiment relates to a circuit for active matrix driving, other types of circuits may be used.
According to an exemplary embodiment of the present disclosure, a plurality of pixels may be formed at a wafer level using wafer bonding, thereby eliminating the need for separately mounting light emitting diodes.
Fig. 79 is a schematic cross-sectional view of a light emitting diode stack 600 for a display according to an exemplary embodiment of the present disclosure.
Referring to fig. 79, the light emitting diode stack 600 may include a support substrate 651, a first-1 LED stack 623a, a first-2 LED stack 623b, a second LED stack 633, a third LED stack 643, a first-1 lower ohmic electrode 625a, a first-1 upper ohmic electrode 627a, a first-2 lower ohmic electrode 625b, a first-2 upper ohmic electrode 627b, a second transparent electrode 635, a third transparent electrode 645, a first color filter 637, a second color filter 647, a first bonding layer 653, a second bonding layer 655, a third bonding layer 657, and a fourth bonding layer 659.
The support base 651 supports the LED stacks 623a, 623b, 633, 643. The support substrate 651 may include, but is not limited to, circuitry on a surface thereof or therein. The support substrate 651 may include, for example, a Si substrate or a Ge substrate.
Each of the first-1 LED stack 623a, the first-2 LED stack 623b, the second LED stack 633, and the third LED stack 643 includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer interposed between the n-type semiconductor layer and the p-type semiconductor layer. The active layer may have a multiple quantum well structure.
The first-1 LED stack 623a and the first-2 LED stack 623b may be inorganic light emitting diodes adapted to emit red light, the second LED stack 633 may be inorganic light emitting diodes adapted to emit green light, and the third LED stack 643 may be inorganic light emitting diodes adapted to emit blue light. First-1 LED stack 623a and first-2 LED stack 623b may include an AlGaInP-based well layer, and second LED stack 633 may include an AlGaInP-based well layer or an AlGaInN-based well layer. The third LED stack 643 may include an AlGaInN-based well layer. The first-1 LED stack 623a and the first-2 LED stack 623b may have the same structure and the same composition, but are not limited thereto. For example, the first-1 LED stack 623a may emit red light having a longer wavelength than the first-2 LED stack 623 b.
Further, both surfaces of each of the LED stacks 623a, 623b, 633, 643 are an n-type semiconductor layer and a p-type semiconductor layer, respectively. In this exemplary embodiment, each of the stacks 623a, 623b, 633, 643 has an n-type upper surface and a p-type lower surface. Since the third LED stack 643 has an n-type upper surface, a rough surface may be formed on the upper surface of the third LED stack 643 by chemical etching. However, it should be understood that the present disclosure is not limited thereto, and the semiconductor type of the upper and lower surfaces of each LED stack may be changed.
First-1 LED stack 623a is disposed adjacent to support substrate 651; a first-2 LED stack 623b is disposed over the first-1 LED stack 623 a; a second LED stack 633 is disposed over the first-2 LED stack 623 b; a third LED stack 643 is disposed over the second LED stack. Since the first-1 and second-2 LED stacks 623a and 623b emit light having a longer wavelength than the second and third LED stacks 633 and 643, the light generated from the first-1 and second-2 LED stacks 623a and 623b may be emitted to the outside through the second and third LED stacks 633 and 643. In addition, since the second LED stack 633 emits light having a longer wavelength than the third LED stack 643, light generated from the second LED stack 633 may be emitted to the outside through the third LED stack 643.
The first-1 lower ohmic electrode 625a forms an ohmic contact with a lower surface of the first-1 LED stack 623a (e.g., a p-type semiconductor layer of the first-1 LED stack 623 a) and reflects light generated from the first-1 LED stack 623 a. The first-1 lower ohmic electrode 625a may include an ohmic reflective layer formed of, for example, an Au-Zn alloy or an Au-Be alloy.
The first-1 upper ohmic electrode 627a forms an ohmic contact with an upper surface of the first-1 LED stack 623a (e.g., an n-type semiconductor layer of the first-1 LED stack 623 a). The first-1 upper ohmic electrode 627a may include an ohmic layer formed of, for example, Au-Te alloy or Au-Ge alloy.
The first-2 lower ohmic electrode 625b forms an ohmic contact with the lower surface of the first-2 LED stack 623b (i.e., the p-type semiconductor layer of the first-2 LED stack 623 b). The first-2 lower ohmic electrode 625b may include an ohmic layer formed of, for example, Au-Zn alloy or Au-Be alloy. The first-2 lower ohmic electrode 625b has a narrower area than the first-1 lower ohmic electrode 625a, and provides a path through which light can pass.
In addition, the first-2 lower ohmic electrode 625b may be electrically connected to the first-1 upper ohmic electrode 627 a. As shown in fig. 79, the first-2 lower ohmic electrode 625b may be in direct contact with the first-1 upper ohmic electrode 627b, but is not limited thereto. Alternatively, the first-2 lower ohmic electrode 625b may be electrically connected to the first-1 upper ohmic electrode 627a through a transparent conductive bonding layer 655 as described below.
When the first-2 lower ohmic electrode 625b is electrically connected to the first-1 upper ohmic electrode 627a, the first-1 LED stack 623a and the first-2 LED stack 623b may be electrically connected in series to each other.
The first-2 upper ohmic electrode 627b forms an ohmic contact with an upper surface of the first-2 LED stack 623b (e.g., the n-type semiconductor layer of the first-2 LED stack 623 b). The first-2 upper ohmic electrode 627b may include an ohmic layer formed of, for example, Au-Te alloy or Au-Ge alloy.
The second transparent electrode 635 forms an ohmic contact with the p-type semiconductor layer of the second LED stack 633. The second transparent electrode 635 may be composed of a metal layer or a conductive oxide layer transparent to red and green light.
The third transparent electrode 645 forms an ohmic contact with the p-type semiconductor layer of the third LED stack 643. The third transparent electrode 645 may be composed of a metal layer or a conductive oxide layer transparent to red, green, and blue light.
The first-1 lower ohmic electrode 625a, the first-2 lower ohmic electrode 625b, the second transparent electrode 635 and the third transparent electrode 645 may contribute to current spreading by ohmic contact with the p-type semiconductor layers of the respective LED stacks.
The first color filter 637 is interposed between the first-2 LED stack 623b and the second LED stack 633. In addition, a second color filter 647 is interposed between the second LED stack 633 and the third LED stack 643. The first color filter 637 transmits light generated from the first-1 and first-2 LED stacks 623a and 623b while reflecting light generated from the second LED stack 633. The second color filter 647 transmits light generated from the first-1 LED stack 623a, the first-2 LED stack 623b, and the second LED stack 633 while reflecting light generated from the third LED stack 643. As a result, light generated from the first-1 and first-2 LED stacks 623a and 623b may be emitted to the outside through the second and third LED stacks 633 and 643, and light generated from the second LED stack 633 may be emitted to the outside through the third LED stack 643. In addition, the light emitting diode stack may prevent light generated from the second LED stack 633 from entering the first-2 LED stack 623b, or may prevent light generated from the third LED stack 643 from entering the second LED stack 633, thereby preventing light loss.
In some exemplary embodiments, the first color filter 637 may reflect light generated from the third LED stack 643.
The first and second color filters 637 and 647 may be, for example, a low-pass filter allowing light in a low frequency band (i.e., a long wavelength band) to pass therethrough, a band-pass filter allowing light in a predetermined wavelength band to pass therethrough, or a band-stop filter preventing light in a predetermined wavelength band from passing therethrough. Specifically, each of the first color filter 637 and the second color filter 647 may include a Distributed Bragg Reflector (DBR). Distributed Bragg Reflectors (DBRs) reflect light in a particular wavelength band (stop band) while transmitting light in other wavelength ranges. The distributed bragg reflector may be formed by alternately stacking insulating layers (e.g., TiO2 and SiO2) having different refractive indices one on another. In addition, the stop band of the distributed bragg reflector can be controlled by adjusting the thicknesses of the TiO2 layer and the SiO2 layer. The low-pass filter and the band-pass filter may also be formed by alternately stacking insulating layers having different refractive indexes one on another.
A first bonding layer 653 bonds first-1 LED stack 623a to support substrate 651. As shown in the drawing, the first-1 lower ohmic electrode 625a may be adjacent to the first bonding layer 653. The first bonding layer 653 may be a light-transmissive layer or a light-opaque layer. The first bonding layer 653 may be formed of an organic material or an inorganic material. Examples of the organic material may include SU8, poly (methyl methacrylate) (PMMA), polyimide, parylene, benzocyclobutene (BCB), or others, and examples of the inorganic material may include Al2O3, SiO2, SiNx, or others. The organic material layer may be bonded under high vacuum and high pressure conditions, and the inorganic material layer may be bonded under high vacuum after planarizing the surface of the inorganic material layer by, for example, chemical mechanical polishing and changing the surface energy using plasma. Specifically, a bonding layer formed of a black epoxy resin capable of absorbing light may be used as the first bonding layer 653, thereby improving the contrast of the display device. The first bonding layer 653 may also be formed of spin-on glass.
A second bonding layer 655 bonds first-2 LED stack 623b to first-1 LED stack 623 a. As shown in the drawing, the first-1 upper ohmic electrode 627a and the first-2 lower ohmic electrode 625b may be disposed inside the second bonding layer 655.
The second bonding layer 655 may be a light-transmitting layer, and may be formed of an organic material or an inorganic material as in the first bonding layer 653. In addition, the second bonding layer 655 may be an insulating layer or a conductive layer. For example, the second bonding layer 655 may be formed of a transparent conductive oxide such as ITO, IZO, ZnO, or others.
When the second bonding layer 655 is an insulating layer, the first-1 upper ohmic electrode 627a and the first-2 lower ohmic electrode 625b are directly electrically connected to each other. Alternatively, when the second bonding layer 655 is a conductive layer, the first-1 upper ohmic electrode 627a and the first-2 lower ohmic electrode 625b may be electrically connected to each other through the second bonding layer 655, rather than being directly connected to each other. In this structure, the first-1 upper ohmic electrode 627a and the first-2 lower ohmic electrode 625b do not need to be aligned, thereby simplifying the process of manufacturing the light emitting diode stack 600.
The third bonding layer 657 bonds the second LED stack 633 to the first-2 LED stack 623 b. As shown in the drawing, the third bonding layer 657 may be adjacent to the first-2 LED stack 623b and the first color filter 637.
The third bonding layer 657 transmits light generated from the first-1 LED stack 623a and the first-2 LED stack 623 b. The third bonding layer 657 may be formed of, for example, a transparent inorganic material, a transparent organic material, spin-on glass, or a transparent conductive material, as in the first bonding layer 653.
The fourth bonding layer 659 bonds the third LED stack 643 to the second LED stack 633. As shown in the drawing, the fourth bonding layer 659 may be adjacent to the second LED stack 633 and the second color filter 647. However, it should be understood that the present disclosure is not limited thereto. Optionally, a transparent conductive layer may be disposed on the second LED stack 633. The fourth bonding layer 659 transmits light generated from the first-1 LED stack 623a, the first-2 LED stack 623b and the second LED stack 633. The fourth bonding layer 659 may be formed of, for example, a transparent inorganic material, a transparent organic material, spin-on glass, or a transparent conductive material, as in the first bonding layer 653.
Fig. 80A, 80B, 80C, and 80D are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack for a display according to an exemplary embodiment of the present disclosure.
Referring to fig. 80A, first, a first-1 LED stack 623a is grown on a first-1 substrate 621a, and a first-1 lower ohmic electrode 625a is formed on the first-1 LED stack 623 a.
The first-1 substrate 621a may be, for example, a GaAs substrate. Further, the first-1 LED stack 623a is composed of AlGaInP-based semiconductor layers, and includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The first-1 lower ohmic electrode 625a forms an ohmic contact with the p-type semiconductor layer. The first-1 lower ohmic electrode 625a may cover the entire area of the first-1 LED stack 623 a.
Referring to fig. 80B, a first-2 LED stack 623B is grown on a first-2 substrate 621B, and a first-2 lower ohmic electrode 625B is formed on the first-2 LED stack 623B.
The first-2 substrate 621b may be, for example, a GaAs substrate. Further, the first-2 LED stack 623b is composed of AlGaInP-based semiconductor layers, and includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The first-2 lower ohmic electrode 625b forms an ohmic contact with the p-type semiconductor layer. The first-2 lower ohmic electrode 625b is partially in contact with the first-2 LED stack 623 b.
Referring to fig. 80C, a second LED stack 633 is grown on a second substrate 631, and a second transparent electrode 635 and a first color filter 637 are formed on the second LED stack 633. The second LED stack 633 may be composed of an AlGaInP-based semiconductor layer or an AlGaInN-based semiconductor layer, and may include an AlGaInP-based well layer or an AlGaInN-based well layer. The second substrate 631 may be a substrate (e.g., a GaAs substrate) on which an AlGaInP-based semiconductor layer is allowed to grow or a substrate (e.g., a sapphire substrate) on which a GaN-based semiconductor layer is allowed to grow. The composition ratio of Al, Ga, and In of the second LED stack 633 may be determined such that the second LED stack 633 may emit green light. On the other hand, the second transparent electrode 635 forms an ohmic contact with the p-type semiconductor layer.
Referring to fig. 80D, a third LED stack 643 is grown on a third substrate 41, and a third transparent electrode 645 and a second color filter 647 are formed on the third LED stack 643. The third LED stack 643 may be composed of GaN-based semiconductor layers, and may include an AlGaInN-based well layer. The third LED stack 643 is a substrate on which the GaN-based semiconductor layers are allowed to grow and is different from the first substrate 621. The composition ratio of Al, Ga, and In of the third LED stack 643 may be determined such that the third LED stack 643 may emit blue light. On the other hand, the third transparent electrode 645 forms ohmic contact with the p-type semiconductor layer.
The first color filter 637 and the second color filter 647 are the same as the first color filter 637 and the second color filter 647 described with reference to fig. 79, and a repeated description thereof will be omitted.
Referring to fig. 79 and 80A, first, the first-1 LED stack 623a is bonded to the support substrate 651 via the first bonding layer 653. The first-1 lower ohmic electrode 625a may be disposed to face the support substrate 651 and be bonded to the support substrate 651 by the first bonding layer 653. On the other hand, the first-1 substrate 621 is removed from the first-1 LED stack 623a by chemical etching. A rough surface may be formed on the exposed surface of the first-1 LED stack 623a by surface texturing.
As shown in fig. 79, a first-1 upper ohmic electrode 627a is formed on an exposed surface of the first-1 LED stack 623 a.
Then, referring to fig. 79 and 80B, the first-2 LED stack 623B is bonded to the first-1 LED stack 623a via a second bonding layer 655. The first-2 lower ohmic electrode 625b may be disposed to face the first-1 LED stack 623a and be coupled to the first-1 LED stack 623 a.
The second bonding layer 655 may be, for example, a transparent conductive oxide layer, and thus may electrically connect the first-1 upper ohmic electrode 627a and the first-2 lower ohmic electrode 625b to each other. Alternatively, when the second bonding layer 655 is an insulating layer, the first-2 lower ohmic electrode 625b is aligned with the first-1 upper ohmic electrode 627a to be in direct contact with the first-1 upper ohmic electrode 627 a.
When the second bonding layer 655 is a transparent conductive oxide layer, transparent conductive oxide layers are deposited on the first-1 LED stack 623a and the first-2 LED stack 623b, respectively, and the transparent conductive oxide layers are bonded to each other to form the second bonding layer 655. The transparent conductive oxide layer formed on the surface of the first-1 LED stack 623a and the surface of the first-2 LED stack 623b may be planarized by chemical mechanical polishing. Alternatively, the transparent conductive oxide layers formed on the first-1 upper ohmic electrode 627a and the first-1 LED stack 623a are processed to be flush with each other, and the transparent conductive oxide layers formed on the surfaces of the first-2 lower ohmic electrode 625b and the first-2 LED stack 623b are processed to be flush with each other, followed by bonding the transparent conductive oxide layers.
Referring to fig. 79 and 80C, the second LED stack 633 is bonded to the first-2 LED stack 623b via a third bonding layer 657. The first color filter 637 may be disposed to face the first-2 LED stack 623b and bonded to the first-2 LED stack 623b by a third bonding layer 657. On the other hand, the second substrate 631 may be separated from the second LED stack 633 by laser lift-off, chemical lift-off, or chemical etching. After separating the second substrate 631, a rough surface may be formed on the surface of the second LED stack 633 by surface texturing.
Referring to fig. 79 and 80D, the third LED stack 643 is bonded to the second LED stack 633 via a fourth bonding layer 659. The second color filter 647 may be disposed to face the second LED stack 633 and be bonded to the second LED stack 633 by the fourth bonding layer 659.
On the other hand, the third LED stack 643 may be separated from the third LED stack 643 by laser lift-off, chemical lift-off, or chemical etching. As a result, as shown in fig. 79, a light emitting diode stack for a display in which the n-type semiconductor layer of the third LED stack 643 is exposed may be provided. A rough surface may be formed on the surface of the third LED stack 643 by surface texturing.
The display device may be set up in the following way: the stack of the first-1 LED stack 623a, the first-2 LED stack 623b, the second LED stack 633 and the third LED stack 643 on the support substrate 651 is patterned in units of pixels, and then the first-1 LED stack, the first-2 LED stack, the second LED stack and the third LED stack are connected to each other by interconnection lines. Hereinafter, exemplary embodiments of a display apparatus will be described.
Fig. 81 is a schematic circuit diagram illustrating an operation of a display apparatus according to one exemplary embodiment of the present disclosure, and fig. 82 is a schematic plan view of the display apparatus according to the exemplary embodiment of the present disclosure.
First, referring to fig. 81 and 82, the display device according to the exemplary embodiment may be implemented to operate in a passive matrix manner.
For example, since the light emitting diode stack for a display described with reference to fig. 79 has such a structure: the stacks 623a, 623b, 633, 643 are stacked in a vertical direction, so one pixel includes at least four light emitting diodes R1, R2, G, B. Here, the first-1 light emitting diode R1 corresponds to the first-1 LED stack 623a, the first-2 light emitting diode R2 corresponds to the first-2 LED stack 623a, the second light emitting diode G corresponds to the second LED stack 633, and the third light emitting diode B corresponds to the third LED stack 643.
In fig. 81 and 82, one pixel includes a first-1 light emitting diode R1, a first-2 light emitting diode R2, a second light emitting diode G, and a third light emitting diode B, wherein the first-1 and the first-2 light emitting diodes correspond to sub-pixels emitting red light, and the second and the third light emitting diodes G and B correspond to sub-pixels emitting green and blue light, respectively.
Here, the first-1 light emitting diode R1 is connected in series to the first-2 light emitting diode R2; anodes of the first-1 light emitting diode R1 and the first-2 light emitting diode R2 are connected to a common line (e.g., a data line); and their cathodes are connected to the scan lines. On the other hand, anodes of the second and third light emitting diodes G and B are connected to a common line (e.g., a data line), and cathodes thereof are connected to a different line (e.g., a scan line).
For example, in the first pixel, the first-1 light emitting diode R1 and the first-2 light emitting diode R2 are connected in series with each other. Here, anodes of the first-1 light emitting diode R1 and the first-2 light emitting diode R2 (i.e., the anode of the first-1 light emitting diode R1) are commonly connected to the data line Vdata1 together with an anode of the second light emitting diode G and an anode of the third light emitting diode B, and a cathode of the first-2 light emitting diode R2, a cathode of the second light emitting diode G, and a cathode of the third light emitting diode B are connected to the scan lines Vscan1-1, Vscan1-2, and Vscan1-3, respectively. Accordingly, the first-1 light emitting diode R1 and the first-2 light emitting diode R2 may be driven together, and the second light emitting diode G and the third light emitting diode B may be driven independently of the first-1 light emitting diode R1 and the first-2 light emitting diode R2.
Further, each of the light emitting diodes R1, R2, G, B is driven by pulse width modulation or by changing the magnitude of current, so that the luminance of each sub-pixel can be adjusted. Further, in the exemplary embodiment, both of the first-1 light emitting diode R1 and the first-2 light emitting diode R2 emit red light having low visibility, thereby improving the luminance of the red light.
Referring again to fig. 82, a plurality of pixels are formed by patterning the stack described with reference to fig. 79, and each pixel is connected to the first-1 lower ohmic electrode 625a and the interconnection lines 671, 673, 675. As shown in fig. 81, the first-1 lower ohmic electrode 625a may be used as the data line Vdata, and the interconnection lines 671, 673, 675 may be used as the scan lines.
The pixels may be arranged in a matrix form, with the anode of the light emitting diode R1, G, B of each pixel commonly connected to the first-1 lower ohmic electrode 625a, and the cathode of the light emitting diode R1, G, B of each pixel connected to the interconnection lines 671, 673, 675, which are separated from each other. Here, the interconnection lines 671, 673, 675 may be used as the scan lines Vscan.
Fig. 83 is an enlarged plan view of one pixel of the display device shown in fig. 82, fig. 84 is a schematic sectional view taken along line a-a of fig. 83, and fig. 85 is a schematic sectional view taken along line B-B of fig. 83.
Referring to fig. 82, 83, 84, and 85, in each pixel, a portion of the first-1 lower ohmic electrode 625a, an upper surface of the first-2 upper ohmic electrode 627b, a portion of the second transparent electrode 635, a portion of an upper surface of the second LED stack 633, a portion of the third transparent electrode 645, and an upper surface of the third LED stack 643 may be exposed to the outside.
The third LED stack 643 may have a rough surface 643a on an upper surface thereof. The rough surface 643a may be formed on the entire upper surface of the third LED stack 643, or may be formed in some regions thereof as shown in the drawing.
The lower insulating layer 661 may cover a side surface of each pixel. The lower insulating layer 661 may be formed of a light-transmitting material such as SiO 2. In this structure, the lower insulating layer 661 may cover the entire upper surface of the third LED stack 643. Alternatively, the lower insulating layer 661 may include a distributed bragg reflector to reflect light traveling toward side surfaces of the first, second, and third LED stacks 623, 633, and 643. In this case, the lower insulating layer 661 at least partially exposes the upper surface of the third LED stack 643.
The lower insulating layer 661 may include an opening 661a exposing an upper surface of the third LED stack 643, an opening 661b exposing an upper surface of the second substrate 631, an opening 661c exposing an upper surface of the first-1 upper ohmic electrode 627b (see fig. 86H), an opening 661d exposing the third transparent electrode 645, an opening 661e exposing the second transparent electrode 635, and an opening 661f exposing the first-1 lower ohmic electrode 625 a.
The interconnection lines 671 and 675 may be formed near the LED stacks 623a, 623b, 633, and 643 on the support substrate 651, and may be disposed on the lower insulating layer 661 to be insulated from the first-1 lower ohmic electrode 625 a. On the other hand, the connection portion 677a connects the third transparent electrode 645 to the first-1 lower ohmic electrode 625a, and the connection portion 677b connects the second transparent electrode 635 to the first-1 lower ohmic electrode 625a, so that the anodes of the first-1 LED stack 623a, the second LED stack 633 and the third LED stack 643 are commonly connected to the first-1 lower ohmic electrode 625 a.
The connection portion 671a connects the upper surface of the third LED stack 643 to the interconnection line 671, and the connection portion 675a connects the upper surface of the first-2 upper ohmic electrode 627b to the interconnection line 675.
An upper insulating layer 681 may be disposed on the interconnection lines 671 and 673 and the lower insulating layer 661 to cover an upper surface of the third LED stack 643. The upper insulating layer 681 may have an opening 81a partially exposing the upper surface of the second LED stack 633.
The upper insulating layer 681 may be formed of, for example, silicon oxide or silicon nitride, and may include a distributed bragg reflector. In addition, the upper insulating layer 681 may include a transparent insulating layer and a reflective metal layer or a multi-layered organic reflective layer formed on the transparent insulating layer to reflect light, or may include a light absorbing layer formed of black epoxy to block light.
In the structure in which the upper insulating layer 681 reflects or blocks light, the upper insulating layer 681 is formed to at least partially expose the upper surface of the third LED stack 643 to emit light to the outside. In order to make electrical connection from the outside, the upper insulating layer 681 may be partially removed to expose the interconnection lines 671, 673, 675. Alternatively, the upper insulating layer 681 may be omitted.
An interconnection line 673 may be disposed on the upper insulating layer 681, and a connection portion 673a may connect the upper surface of the second LED stack 633 to the interconnection line 673. The connection portion 673a may cross the interconnect line 675 and be insulated from the interconnect line 675 by the upper insulating layer 681.
Although the electrode of each pixel is connected to the data line and the scan line in this exemplary embodiment, it is understood that various embodiments are possible. In the above exemplary embodiment, the interconnection lines 671, 675 are formed on the lower insulating layer 661, and the interconnection line 673 is formed on the upper insulating layer 681. However, it should be understood that the present disclosure is not limited thereto. For example, all of the interconnection lines 671, 673, and 675 may be formed on the lower insulating layer 661 and may be covered with the upper insulating layer 681, and the upper insulating layer 681 may have an opening configured to expose the interconnection line 673. In this structure, the connection portion 673a may connect the upper surface of the second LED stack 633 to the interconnection line 673 through the opening of the upper insulating layer 681.
Alternatively, the interconnection lines 671, 673, and 675 may be formed inside the support substrate 651, and the connection portions 671a, 673a, and 675a on the lower insulating layer 661 may connect the cathodes of the LED stacks 623b, 633, and 643 to the interconnection lines 671, 673, and 675.
Fig. 86A to 86K are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure. Here, a description will be given below of a method of forming the pixel of fig. 83.
First, the light emitting diode stack 600 described in fig. 79 is prepared.
Then, referring to fig. 86A, a rough surface 643a may be formed on an upper surface of the third LED stack 643. A rough surface 41a may be formed on an upper surface of the third LED stack 643 to correspond to each pixel region. The rough surface 643a may be formed by chemical etching, such as photo-enhanced chemical etching (PEC).
The rough surface 643a may be partially formed in each pixel region in consideration of a region of the third LED stack 643 to be etched in a subsequent process, without being limited thereto. Alternatively, the rough surface 643a may be formed on the entire upper surface of the third LED stack 643.
Referring to fig. 86B, a peripheral region of the third LED stack 643 in each pixel is removed by etching to expose the third transparent electrode 645. As shown in the figures, the third LED stack 643 may be left to have a rectangular shape or a square shape. Here, a plurality of recesses may be formed along an edge of the third LED stack 643.
Referring to fig. 86C, the upper surface of the second LED stack 633 is exposed by removing the third transparent electrode 645 exposed in other regions except for a portion of the third transparent electrode 645 exposed in one recess, and then by sequentially removing the second color filter 647 and the fourth bonding layer 659. Accordingly, the upper surface of the second LED stack 633 is exposed around the third LED stack 643 and in other recesses except the recess in which the third transparent electrode 645 remains.
Referring to fig. 86D, the second transparent electrode 635 is exposed by removing the second LED stack 633 exposed in the other region except for the portion of the second LED stack 633 exposed in one recess.
Referring to fig. 86E, the upper surface of the first-2 LED stack 623b is exposed by removing the second transparent electrode 635 exposed in the other region except for the portion of the second transparent electrode 635 exposed in one recess, and then by sequentially removing the first color filter 637 and the third bonding layer 657. Thus, the upper surface of the first-2 LED stack 623b is exposed around the third LED stack 643. When the upper surface of the third LED stack 643 is exposed, the first-2 upper ohmic electrode 627b is also exposed. As shown in the figure, the first-2 upper ohmic electrode 627b may be exposed in at least one recess of the third LED stack 643.
Referring to fig. 86F, the first-1 lower ohmic electrode 625a is exposed by removing the first-2 LED stack 623b exposed around the third LED stack 643, and then by sequentially removing the second bonding layer 655 and the first-1 LED stack 623 a. The first-1 lower ohmic electrode 625a is exposed around the third LED stack 643.
Referring to fig. 86G, a linear interconnection line is formed by patterning the first-1 lower ohmic electrode 625 a. Here, the support substrate 651 may be exposed. The first-1 lower ohmic electrode 625a may connect pixels arranged in one row among the pixels arranged in a matrix to each other (see fig. 82).
Referring to fig. 86H, a lower insulating layer 661 (see fig. 84 and 85) is formed to cover the pixels. The lower insulating layer 661 covers the first-1 lower ohmic electrode 625a and side surfaces of the LED stacks 623a, 623b, 633 and 643. In addition, the lower insulating layer 661 may at least partially cover an upper surface of the third LED stack 643. If the lower insulating layer 661 is a transparent layer such as a SiO2 layer, the lower insulating layer 661 may cover the entire upper surface of the third LED stack 643. Alternatively, the lower insulating layer 661 may include a distributed bragg reflector. In this structure, the lower insulating layer 661 may at least partially expose an upper surface of the third LED stack 643 to emit light to the outside.
The lower insulating layer 661 may include an opening 661a exposing the third LED stack 643, an opening 661b exposing the second LED stack 633, an opening 661c exposing the first-2 upper ohmic electrode 627b, an opening 661d exposing the third transparent electrode 645, an opening 661e exposing the second transparent electrode 635, and an opening 661f exposing the first-1 lower ohmic electrode 625 a. At least two openings 61f adapted to expose the first-1 lower ohmic electrode 625a may be formed.
Referring to fig. 86I, interconnection lines 671 and 675 and connection portions 671a, 675a, 677a, and 677b are formed. The interconnection lines 671 and 675 and the connection portions 671a, 675a, 677a, and 677b may be formed by a lift-off process. The interconnection lines 671, 675 are insulated from the first-1 lower ohmic electrode 625a by the lower insulating layer 661. The connection portion 671a electrically connects the third LED stack 643 to the interconnection line 671, and the connection portion 675a electrically connects the first-2 upper ohmic electrode 627b to the interconnection line 675. The connection portion 677a electrically connects the third transparent electrode 645 to the first-1 lower ohmic electrode 625a, and the connection portion 677b electrically connects the second transparent electrode 635 to the first-1 lower ohmic electrode 625 a.
Referring to fig. 86J, an upper insulating layer 681 (see fig. 84 and 85) covers the interconnection lines 671 and 675 and the connection portions 671a, 675a, 677a, and 677 b. The upper insulating layer 681 may also cover the entire upper surface of the third LED stack 643. The upper insulating layer 681 has an opening 81a exposing the upper surface of the second LED stack 633. The upper insulating layer 681 may be formed of, for example, silicon oxide or silicon nitride, and may include a distributed bragg reflector. In the structure in which the upper insulating layer 681 includes the distributed bragg reflector, the upper insulating layer 681 is formed to expose at least a portion of the upper surface of the third LED stack 643 to emit light to the outside.
Referring to fig. 86K, an interconnection line 673 and a connection portion 673a are formed. The interconnection line 675 and the connection portion 675a may be formed by a lift-off process. The interconnection line 673 is disposed on the upper insulating layer 681, and is insulated from the first-1 lower ohmic electrode 625a and the interconnection lines 671 and 675. The connection portion 673a electrically connects the second LED stack 633 to the interconnection line 673. The connection portion 673a may cross the interconnect line 675 and be insulated from the interconnect line 675 by the upper insulating layer 681.
As a result, the pixel region is completed as shown in fig. 83. Further, as shown in fig. 82, a plurality of pixels may be formed on the support substrate 651, and the plurality of pixels may be connected to each other through the first-1 lower ohmic electrode 625a and the interconnection lines 671, 673 and 675, thereby operating in a passive matrix manner.
Although a method of manufacturing a display device adapted to operate in a passive matrix manner is shown in this exemplary embodiment, it should be understood that the present disclosure is not limited thereto. That is, the display device according to the exemplary embodiment may be manufactured in various ways to operate in a passive matrix manner using the light emitting diode stack shown in fig. 79.
For example, although the interconnection line 673 is illustrated as being formed on the upper insulating layer 681 in the exemplary embodiment, the interconnection line 673 may be formed on the lower insulating layer 661 together with the interconnection lines 671 and 675, and the connection portion 673a may be formed on the upper insulating layer 681 to connect the second LED stack 633 to the interconnection line 673. Alternatively, the interconnection lines 671, 673, and 675 may be provided inside the support base 651.
Fig. 87 is a schematic plan view of a light emitting diode stack 601 for a display device according to another exemplary embodiment of the present disclosure.
Referring to fig. 87, the light emitting diode stack 601 according to this exemplary embodiment is generally similar to the light emitting diode stack 600 described with reference to fig. 79, except that the first-1 upper ohmic electrode 627a and the first-2 lower ohmic electrode 625b are insulated from each other.
Specifically, the first-1 upper ohmic electrode 627a and the first-2 lower ohmic electrode 625b are separated from each other and electrically insulated from each other. For this, the second bonding layer 655 is formed of a light-transmitting insulating layer.
A plurality of pixels may be formed on the support substrate 651 by patterning the light emitting diode stack 601, and the first-1 LED stack 623a and the first-2 LED stack 623b may be connected in parallel to each other by connection portions.
Fig. 88 is a schematic circuit diagram illustrating an operation of a display apparatus according to another exemplary embodiment of the present disclosure. In this exemplary embodiment, first-1 and first-2 LED stacks 623a and 623b are connected in parallel with each other to form a passive matrix.
Referring to fig. 88, the display apparatus according to the exemplary embodiment is generally similar to the display apparatus described with reference to fig. 81, except that the first-1 light emitting diode R1 and the first-2 light emitting diode R2 are connected in parallel with each other.
In this exemplary embodiment, the first-2 upper ohmic electrode 627b of fig. 87 is electrically connected to the first-1 upper ohmic electrode 627a, and the first-2 lower ohmic electrode 625b is electrically connected to the first-1 lower ohmic electrode 625 a.
The first-1 lower ohmic electrode 625a may be used as a common line, and the first-2 lower ohmic electrode 625b is electrically connected to the first-1 lower ohmic electrode 625a through a connection portion. The first-2 upper ohmic electrode 627b is connected to an interconnection line 675 together with the first-1 upper ohmic electrode 627 a.
The exemplary embodiment provides a display device in which the first-1 light emitting diode R1 and the first-2 light emitting diode R2 are connected in parallel with each other in each pixel.
According to an exemplary embodiment of the present disclosure, since a plurality of pixels can be formed at a wafer level using the light emitting diode stack 600 or 601 for a display, it is not necessary to separately mount light emitting diodes. Further, the light emitting diode stack according to the exemplary embodiment has a structure in which: the stacks 623a, 623b, 633, 643 are stacked one on another in the vertical direction, thereby securing an area for sub-pixels in a limited pixel area. Further, a plurality of LED stacks emitting light with low visibility are stacked one on another, thereby improving the brightness of red light without significantly changing the current density in a limited area.
Although the first-1, first-2, second and third LED stacks 623a, 623b, 633 and 643 are shown as being stacked on top of one another and having substantially similar light emitting areas in the above exemplary embodiment, these LED stacks need not have similar light emitting areas. Specifically, the second LED stack 633 can be disposed in some areas on the first-2 LED stack 623b, and the third LED stack 643 can be disposed in some areas on the second LED stack 633. In addition, first-2 LED stacks 623b may also be disposed in some areas on first-1 LED stack 623 a. With this structure, the first-1 and second LED stacks 623a and 623b having low visibility have a larger light emitting area than the second and third LED stacks 633 and 643, thereby further improving luminance. In addition, at least a portion of light generated from the first-1 and first-2 LED stacks 623a and 623b may be emitted to the outside without passing through the second and third LED stacks 633 and 643, and at least a portion of light generated from the second LED stack 633 may be emitted to the outside without passing through the third LED stack 643, thereby further improving luminous efficiency.
Fig. 89A is a schematic cross-sectional view of a light emitting diode stack 700 for a display according to an exemplary embodiment of the present disclosure, and fig. 89B is an enlarged cross-sectional view of a first LED stack 723 shown in fig. 89A.
Referring to fig. 89A and 89B, the light emitting diode stack 700 may include a support substrate 751, a first LED stack 723, a second LED stack 733, a third LED stack 743, a first reflective electrode 725, a first ohmic electrode 727, a second transparent electrode 735, a third transparent electrode 745, a first color filter 737, a second color filter 747, a first bonding layer 753, a second bonding layer 755, and a third bonding layer 757.
The support substrate 751 supports the semiconductor stacks 723, 733, 743. The support substrate 751 may include, but is not limited to, circuitry on its surface or within it. The support substrate 751 may include, for example, a Si substrate or a Ge substrate.
In this exemplary embodiment, the first LED stack 723 may be an inorganic light emitting diode adapted to emit light having a longer wavelength (e.g., red light) than the second LED stack 733 and the third LED stack 743. Further, the second LED stack 733 may be an inorganic light emitting diode adapted to emit light having a longer wavelength (e.g., green light) and the third LED stack 743 may be an inorganic light emitting diode adapted to emit blue light, as compared to the third LED stack 743. However, it should be understood that the present disclosure is not limited thereto.
In this exemplary embodiment, the first LED stack 723 may have a multi-junction LED stack structure, and may include, for example, a first-1 LED stack 723a, a first-2 LED stack 723B, and a tunnel junction layer 7130 as shown in fig. 89B.
The first-1 LED stack 723a may include an n-type semiconductor layer 7123, an active layer 7125, and a p-type semiconductor layer 7127. The n-type semiconductor layer 7123 may be composed of a single layer or a plurality of layers. For example, the n-type semiconductor layer 7123 may include an n-type cladding layer and an n-type window layer of an AlGaInP base. The p-type semiconductor layer 7127 may include, for example, a p-type cladding layer of an AlGaInP base. The active layer 7125 may have a multiple quantum well layer structure, and may include an AlGaInP-based well layer.
The first-2 LED stack 723b may include an n-type semiconductor layer 7133, an active layer 7135, a p-type semiconductor layer 7137, and a high density p-contact layer 7139. The n-type semiconductor layer 7133 may include an n-type cladding layer of an AlGaInP base. The p-type semiconductor layer 7137 may be composed of a single layer or a plurality of layers, and may include, for example, an AlGaInP-type cladding layer and a p-type window layer. The active layer 7135 may have a multiple quantum well layer structure, and may include an AlGaInP-based well layer. The high density p-contact layer 7139 may be formed of, for example, high density p-GaP.
The tunnel junction layer 7130 may include a highly heavily doped p-type layer 7129 and a highly doped n-type layer 7131 of AlGaInP-based. Current can be conducted through the tunnel junction layer 7130 where the highly doped n-type layer 7131 is bonded to the highly doped p-type layer 7129.
In this exemplary embodiment, two LED stacks 723a, 723b are bonded to each other by a tunnel junction layer 7130. However, it is understood that more LED stacks may be bonded to each other through two or more tunnel junction layers.
With the multi-junction LED stack structure, the light emitting diode stack may improve the light emitting intensity of light having low visibility without increasing the area and current density.
In this exemplary embodiment, the first LED stack 723 has an n-type upper surface and a p-type lower surface. However, it is to be understood that the present disclosure is not limited thereto, and the semiconductor types of the upper and lower surfaces may be changed.
Each of the second and third LED stacks 733 and 743 includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer interposed between the n-type semiconductor layer and the p-type semiconductor layer. The active layer may have a multiple quantum well structure. The second LED stack 733 may include an AlGaInP-based well layer or an AlGaInN-based well layer, and the third LED stack 743 may include an AlGaInN-based well layer.
In addition, two surfaces of each of the second and third LED stacks 733 and 743 are an n-type semiconductor layer and a p-type semiconductor layer, respectively. In this exemplary embodiment, each of the second and third LED stacks 733 and 743 has an n-type upper surface and a p-type lower surface. Since the third LED stack 743 has an n-type upper surface, a rough surface may be formed on the upper surface of the third LED stack 743 by chemical etching. However, it is to be understood that the present disclosure is not limited thereto, and the semiconductor type of the upper and lower surfaces of each of the LED stacks 733, 743 may be changed.
A first LED stack 723 is disposed adjacent to a support substrate 751; the second LED stack 733 is disposed on the first LED stack 723; a third LED stack 743 is disposed on the second LED stack. Since the first LED stack 723 emits light having a longer wavelength than the second LED stack 733 and the third LED stack 743, the light generated from the first LED stack 723 may be emitted to the outside through the second LED stack 733 and the third LED stack 743. In addition, since the second LED stack 733 emits light having a longer wavelength than the third LED stack 743, light generated from the second LED stack 733 may be emitted to the outside through the third LED stack 743.
The first reflective electrode 725 forms an ohmic contact with a lower surface of the first LED stack 723 (e.g., a p-type semiconductor layer of the first LED stack 723) and reflects light generated from the first LED stack 723. For example, the first reflective electrode 725 may include an ohmic reflective layer formed of, for example, an Au-Zn alloy or an Au-Be alloy.
The first ohmic electrode 727 forms an ohmic contact with an upper surface of the first LED stack 723 (e.g., an n-type semiconductor layer of the first LED stack 723). The first ohmic electrode 727 may include an ohmic layer formed of, for example, Au-Te alloy or Au-Ge alloy. The first ohmic electrode 727 may be formed in each pixel region.
The second transparent electrode 735 forms an ohmic contact with a lower surface of the second LED stack 733 (e.g., a p-type semiconductor layer of the second LED stack 733). The second transparent electrode 735 may be composed of a metal layer or a conductive oxide layer transparent to red and green light.
The third transparent electrode 745 forms an ohmic contact with a lower surface of the third LED stack 733 (e.g., a p-type semiconductor layer of the third LED stack 733). The third transparent electrode 745 may be composed of a metal layer or a conductive oxide layer that is transparent with respect to red, green, and blue light.
The first reflective electrode 725, the second transparent electrode 735, and the third transparent electrode 745 facilitate current diffusion in the p-type semiconductor layers of the respective LED stacks through ohmic contact with the p-type semiconductor layers thereof.
The first color filter 737 is disposed between the first LED stack 723 and the second LED stack 733. In addition, a second color filter 747 is interposed between the second LED stack 733 and the third LED stack 743. The first color filter 737 transmits light generated from the first LED stack 723 while reflecting light generated from the second LED stack 733. The second color filter 747 transmits light generated from the first and second LED stacks 723 and 733 while reflecting light generated from the third LED stack 743. As a result, light generated from the first LED stack 723 may be emitted to the outside through the second LED stack 733 and the third LED stack 743, and light generated from the second LED stack 733 may be emitted to the outside through the third LED stack 743. In addition, the light emitting diode stack may prevent light generated from the second LED stack 733 from entering the first LED stack 723 or may prevent light generated from the third LED stack 743 from entering the second LED stack 733, thereby preventing light loss.
In some exemplary embodiments, the first color filter 737 may reflect light generated from the third LED stack 743.
The first color filter 737 and the second color filter 747 may be, for example, a low pass filter allowing light in a low frequency band (i.e., in a long wavelength band) to pass therethrough, a band pass filter allowing light in a predetermined wavelength band to pass therethrough, or a band stop filter preventing light in a predetermined wavelength band from passing therethrough. Specifically, a first color filter 737 and
each of the second color filters 747 may include a Distributed Bragg Reflector (DBR). Distributed Bragg Reflectors (DBRs) reflect light in a particular wavelength band (stop band) while transmitting light in other wavelength ranges. The distributed bragg reflector may be formed by alternately stacking insulating layers (e.g., TiO2 and SiO2) having different refractive indices one on another. In addition, the stop band of the distributed bragg reflector can be controlled by adjusting the thicknesses of the TiO2 layer and the SiO2 layer. The low-pass filter and the band-pass filter may also be formed by alternately stacking insulating layers having different refractive indexes one on another.
The first bonding layer 753 bonds the first LED stack 723 to the support substrate 751. As shown in the figure, the first reflective electrode 725 may be adjacent to the first bonding layer 753. The first bonding layer 753 may be a light-transmitting layer or a light-opaque layer. The first bonding layer 753 may be formed of an organic material or an inorganic material. Examples of the organic material may include SU8, poly (methyl methacrylate) (PMMA), polyimide, parylene, benzocyclobutene (BCB), or others, and examples of the inorganic material may include Al2O3, SiO2, SiNx, or others. The organic material layer may be bonded under high vacuum and high pressure conditions, and the inorganic material layer may be bonded under high vacuum after planarizing the surface of the inorganic material layer by, for example, chemical mechanical polishing and changing the surface energy using plasma. Specifically, a bonding layer formed of a black epoxy resin capable of absorbing light may be used as the first bonding layer 753, thereby improving the contrast of the display device. The first bonding layer 753 may also be formed of spin-on glass or a transparent conductive material.
The second bonding layer 755 bonds the second LED stack 733 to the first LED stack 723. As shown in the drawing, the second bonding layer 755 may be adjacent to the first LED stack 723 and the first color filter 737. The second bonding layer 755 may cover the first ohmic electrode 727.
The second bonding layer 755 may be formed of a light-transmitting material as in the first bonding layer 753. The second bonding layer 755 may be, for example, a transparent inorganic insulating layer, a transparent organic insulating layer, or a transparent conductive layer, or may be formed of spin-on glass that transmits light.
The third bonding layer 757 bonds the third LED stack 743 to the second LED stack 733. As shown in the figure, the third bonding layer 757 may be adjacent to the second substrate 731 and the second color filter 747. However, it is to be understood that the present disclosure is not limited thereto, and a transparent conductive layer may be disposed on the second LED stack 733. The third bonding layer 757 transmits light generated from the first LED stack 723 and the second LED stack 733. The third bonding layer 757 may be formed of a light-transmitting material as in the first bonding layer 753. The third bonding layer 757 may be, for example, a transparent inorganic insulating layer, a transparent organic insulating layer, or a transparent conductive layer, or may be formed of spin-on glass which transmits light.
Fig. 90A, 90B, and 90C are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode stack for a display according to an exemplary embodiment of the present disclosure.
Referring to fig. 90A, first, an n-type GaAs layer 7121 is grown on a first substrate 721, a first LED stack 723 is grown on the n-type GaAs layer 7121, and a first reflective electrode 725 is grown on the first LED stack 723. The n-type GaAs layer 7121 may be omitted.
The first substrate 721 may be, for example, a GaAs substrate. Further, the first LED stack 723 has a multi-junction LED stack structure, and includes a first-1 LED stack 723a, a tunnel junction layer 7130, and a first-2 LED stack 723 b. The first-1 LED stack 723a and the first-2 LED stack 723b are continuously connected to each other by the tunnel junction layer 7130. The first LED stack 723 of fig. 90A is identical to the inverted structure of the first LED stack 723 of fig. 89B, and a repetitive description thereof will be omitted.
The first reflective electrode 725 forms an ohmic contact with an upper surface of the first-2 LED stack 723 b. The first reflective electrode 725 may form an ohmic contact with, for example, the p-contact layer 7139 (see fig. 89B).
Referring to fig. 90B, a second LED stack 733 is grown on a second substrate 731, and a second transparent electrode 735 and a first color filter 737 are formed on the second LED stack 733. The second LED stack 733 may be composed of an AlGaInP-based semiconductor layer or an AlGaInN-based semiconductor layer, and may include an n-type semiconductor layer, a p-type semiconductor layer, and a well layer. The second substrate 731 may be a substrate (e.g., a GaAs substrate) on which an AlGaInP-based semiconductor layer is allowed to grow or a substrate (e.g., a sapphire substrate) on which a GaN-based semiconductor layer is allowed to grow. The composition ratio of Al, Ga, and In of the second LED stack 733 may be determined such that the second LED stack 733 may emit green light. On the other hand, the second transparent electrode 735 forms ohmic contact with the p-type semiconductor layer.
Referring to fig. 90C, a third LED stack 743 is grown on the third LED stack 743, and a third transparent electrode 745 and a second color filter 747 are formed on the third LED stack 743. The third LED stack 743 may be composed of a GaN-based semiconductor layer, and may include an n-type semiconductor layer, a p-type semiconductor layer, and an AlGaInN-based well layer. The third LED stack 743 is a substrate on which a GaN-based semiconductor layer is allowed to grow and is different from the first substrate 721. The composition ratio of Al, Ga, and In of the third LED stack 743 may be determined such that the third LED stack 743 may emit blue light. On the other hand, the third transparent electrode 745 forms ohmic contact with the p-type semiconductor layer.
The first and second color filters 737 and 747 are the same as the first and second color filters 737 and 747 described with reference to fig. 89, and a repetitive description thereof will be omitted.
Referring to fig. 89 and 90A, first, the first LED stack 723 is bonded to the support substrate 751 via the first bonding layer 753. The first reflective electrode 725 may be disposed to face the support substrate 751 and be bonded to the support substrate 751 through a first bonding layer 753. On the other hand, the first substrate 721 and the n-type GaAs layer 7121 may be removed from the first LED stack 723 by chemical etching. As a result, a surface of the first-1 LED stack 723a may be exposed. A rough surface may be formed on the exposed surface of the first-1 LED stack 723a by surface texturing.
Then, the second LED stack 733 is bonded to the first LED stack 723 via the second bonding layer 755. The first color filter 737 may be disposed to face the first LED stack 723 and be coupled to the first LED stack 723. On the other hand, the second substrate 731 may be removed from the second LED stack 733 by laser lift-off, chemical lift-off, or chemical etching. After removing the second substrate 731, a rough surface may be formed on the surface of the second LED stack 733 by surface texturing.
Then, the third LED stack 743 is bonded to the second LED stack 733 via the third bonding layer 757. The second color filter 747 may be disposed to face the second LED stack 733 and bonded to the second LED stack 733 by a third bonding layer 757.
The third substrate 41 may be removed from the third LED stack 743 by a laser lift-off process or a chemical lift-off process. As a result, as shown in fig. 89, a light emitting diode stack for a display in which the n-type semiconductor layer of the third LED stack 743 is exposed is provided. In addition, a rough surface may be formed on the surface of the third LED stack 743 by surface texturing.
The display device may be set up in the following way: the stack of the first, second, and third LED stacks 723, 733, and 743 on the support substrate 751 is patterned in units of pixels, and then the first, second, and third LED stacks 723, 733, and 743 are connected to each other by interconnection lines. Hereinafter, exemplary embodiments of a display apparatus will be described.
Fig. 91 is a schematic circuit diagram illustrating an operation of a display apparatus according to an exemplary embodiment of the present disclosure, and fig. 92 is a schematic plan view of the display apparatus according to an exemplary embodiment of the present disclosure.
First, referring to fig. 91 and 92, the display device according to the exemplary embodiment may be implemented to operate in a passive matrix manner.
For example, since the light emitting diode stack 700 described with reference to fig. 89 has such a structure: the first, second, and third LED stacks 723, 733, and 743 are stacked in a vertical direction, so one pixel includes three kinds of light emitting diodes R, G and B. Here, the first light emitting diode R corresponds to the first LED stack 723, the second light emitting diode G corresponds to the second LED stack 733, and the third light emitting diode B corresponds to the third LED stack 743. In addition, the first light emitting diode R has a multi-junction LED stack structure, and thus has a structure in which at least two light emitting diodes are connected in series with each other.
In fig. 91 and 92, one pixel includes a first light emitting diode R, a second light emitting diode G, and a third light emitting diode B, each of which corresponds to a sub-pixel. The anodes of the first, second, and third light emitting diodes R, G, and B are connected to a common line (e.g., a data line), and their cathodes are connected to different lines (e.g., a scan line). For example, in the first pixel, anodes of the first, second, and third light emitting diodes R, G, and B are commonly connected to the data line Vdata1, and cathodes thereof are respectively connected to the scan lines Vscan1-1, Vscan1-2, and Vscan 1-3. As a result, the light emitting diodes R, G and B in each pixel can be driven independently.
Further, each of the light emitting diodes R, G and B is driven by pulse width modulation or by changing the magnitude of current, so that the luminance of each sub-pixel can be adjusted. Further, although the first light emitting diode R emits red light having low visibility, the multi-junction LED stack structure of the first light emitting diode R may improve the light emission intensity of red light emitted therefrom.
Referring again to fig. 92, a plurality of pixels are formed by patterning the light emitting diode stack 700 described with reference to fig. 89, and each pixel is connected to the first reflective electrode 25 and the interconnection lines 771, 773, 775. As shown in fig. 91, the first reflective electrode 725 may be used as the data line Vdata, and the interconnection lines 771, 773, 775 may be used as the scan lines.
The pixels may be arranged in a matrix form in which the anode of the light emitting diode R, G, B of each pixel is commonly connected to the first reflective electrode 725, and their cathodes are connected to interconnection lines 771, 773, and 775 that are separated from each other. Here, the interconnection lines 771, 773, and 775 may be used as the scan lines Vscan.
Fig. 93 is an enlarged plan view of one pixel of the display device shown in fig. 92, fig. 94 is a schematic sectional view taken along line a-a of fig. 93, and fig. 95 is a schematic sectional view taken along line B-B of fig. 93.
Referring to fig. 92, 93, 94 and 95, in each pixel, a portion of the first reflective electrode 725, an upper surface of the first ohmic electrode 727, a portion of the second transparent electrode 735, a portion of an upper surface of the second LED stack 733, a portion of the third transparent electrode 745 and an upper surface of the third LED stack 743 are exposed to the outside.
The third LED stack 743 may have a rough surface 743a on an upper surface thereof. The rough surface 743a may be formed on the entire upper surface of the third LED stack 743, or may be formed in some regions thereof as shown in the drawing.
The lower insulating layer 761 may cover a side surface of each pixel. The lower insulating layer 761 may be formed of a light-transmitting material such as SiO 2. In this structure, the lower insulating layer 761 may cover the entire upper surface of the third LED stack 743. Optionally, the lower insulation layer 761 may include a distributed bragg reflector to reflect light traveling toward side surfaces of the first, second, and third LED stacks 723, 733, and 743. In this structure, the lower insulating layer 761 at least partially exposes the upper surface of the third LED stack 743.
The lower insulating layer 761 may include an opening 761a exposing an upper surface of the third LED stack 743, an opening 761b exposing an upper surface of the second LED stack 733, an opening 761c exposing an upper surface of the first ohmic electrode 727 (see fig. 8H), an opening 761d exposing the third transparent electrode 745, an opening 761e exposing the second transparent electrode 735, and an opening 761f exposing the first reflective electrode 725.
The interconnection lines 771, 775 may be formed near the first, second, and third LED stacks 723, 733, and 743 on the support substrate 751, and may be disposed on the lower insulating layer 761 to be insulated from the first reflective electrode 725. On the other hand, the connection portion 777a connects the third transparent electrode 745 to the first reflective electrode 725, and the connection portion 777b connects the second transparent electrode 735 to the first reflective electrode 725, so that the anodes of the first, second, and third LED stacks 723, 733, and 743 are commonly connected to the first reflective electrode 725.
The connection portion 7771a connects the upper surface of the third LED stack 743 to the interconnection line 771, and the connection portion 7775a connects the first ohmic electrode 727 to the interconnection line 775.
The upper insulating layer 781 may be disposed on the interconnection lines 771 and 773 and the lower insulating layer 761 to cover the upper surface of the third LED stack 743. The upper insulating layer 781 may have an opening 781a partially exposing the upper surface of the second LED stack 733.
The interconnection line 773 may be disposed on the upper insulating layer 781, and the connection portion 773a may connect the upper surface of the second LED stack 733 to the interconnection line 773. The connecting portion 773a may straddle the interconnect line 775 and be insulated from the interconnect line 775 by the upper insulating layer 781.
Although the electrode of each pixel is described as being connected to the data line and the scan line in this exemplary embodiment, it is understood that various embodiments are possible. Although in this exemplary embodiment, the interconnect lines 771, 775 are formed on the lower insulating layer 761 and the interconnect line 773 is formed on the upper insulating layer 781, it is to be understood that the present disclosure is not limited thereto. For example, all of the interconnect lines 771, 773, and 775 may be formed on the lower insulating layer 761 and may be covered with the upper insulating layer 781 which may have an opening configured to expose the interconnect line 773. In this structure, the connection portion 773 may connect the upper surface of the second LED stack 733 to the interconnection line 773 through the opening of the upper insulating layer 781.
Alternatively, the interconnection lines 771, 773, and 775 may be formed inside the support substrate 751, and the connection portions 771a, 773a, and 775a on the lower insulating layer 761 may connect the upper surfaces of the first, second, and third LED stacks 722, 723, and 743 to the interconnection lines 771, 773, and 775.
Fig. 96A to 96K are schematic cross-sectional views illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure. Here, a description will be given below of a method of forming the pixel of fig. 93.
First, the light emitting diode stack 700 described in fig. 89 is prepared.
Then, referring to fig. 96A, a rough surface 743a may be formed on an upper surface of the third LED stack 743. A rough surface 743a may be formed on an upper surface of the third LED stack 743 to correspond to each pixel region. The rough surface 743a can be formed by chemical etching (e.g., photo-enhanced chemical etching (PEC)).
The rough surface 743a may be partially formed in each pixel region in consideration of a region of the third LED stack 743 to be etched in a subsequent process, without being limited thereto. Alternatively, the rough surface 743a may be formed on the entire upper surface of the third LED stack 743.
Referring to fig. 96B, a peripheral region of the third LED stack 743 in each pixel is removed by etching to expose the third transparent electrode 745. As shown in the figures, the third LED stack 743 may be left to have a rectangular shape or a square shape. Here, the third LED stack 743 may have a plurality of recesses along an edge thereof.
Referring to fig. 96C, the upper surface of the second LED stack 733 is exposed by removing the third transparent electrode 745 exposed in the other region except for the portion of the third p transparent electrode 745 exposed in one recess. Accordingly, the upper surface of the second LED stack 733 is exposed around the third LED stack 743 and in other recesses except for the recess in which the third p transparent electrode 745 partially remains.
Referring to fig. 96D, the second transparent electrode 735 is exposed by removing the second LED stack 733 exposed in the other region except for a portion of the second LED stack 733 exposed in one recess.
Referring to fig. 96E, by removing the second transparent electrode 735 exposed in the other region except for a portion of the second transparent electrode 735 exposed in one recess, the first ohmic electrode 727 is exposed together with the upper surface of the first LED stack 723. Accordingly, an upper surface of the first LED stack 723 is exposed around the third LED stack 743, and an upper surface of the first ohmic electrode 727 is exposed in at least one of the recesses formed in the third LED stack 743.
Referring to fig. 96F, the first reflective electrode 725 is exposed by removing an exposed portion of the first LED stack 723 around the third LED stack 743. The first reflective electrode 725 is exposed around the third LED stack 743.
Referring to fig. 96G, a linear interconnection line is formed by patterning the first reflective electrode 725. The first bonding layer 753 may also be removed to expose the support substrate 751. The first reflective electrode 725 may connect pixels arranged in one row among the pixels arranged in a matrix to each other (see fig. 92).
Referring to fig. 96H, a lower insulating layer 761 (see fig. 94 and 95) is formed to cover the pixels. The lower insulating layer 761 covers side surfaces of the first, second, and third LED stacks 723, 733, and 743 and the first reflective electrode 725. In addition, the lower insulating layer 761 may at least partially cover an upper surface of the third LED stack 743. If the lower insulating layer 761 is a transparent layer such as a SiO2 layer, the lower insulating layer 761 may cover the entire upper surface of the third LED stack 743. Alternatively, the lower insulating layer 761 may include a distributed bragg reflector. In this structure, the lower insulating layer 761 may at least partially expose the upper surface of the third LED stack 743 to emit light to the outside.
The lower insulating layer 761 may include an opening 761a exposing the third LED stack 743, an opening 761b exposing the second LED stack 733, an opening 761c exposing the first ohmic electrode 727, an opening 761d exposing the third transparent electrode 745, an opening 761e exposing the second transparent electrode, and an opening 761f exposing the first reflective electrode 725. As shown in the drawing, an opening 761f adapted to expose the first reflective electrode 725 may be formed singly or in plurality.
Referring to fig. 96I, interconnect lines 771 and 775 and connection portions 771a, 775a, 777a, and 777b are formed. The interconnect lines 771 and 775 and the connection portions 771a, 775a, 777a, and 777b may be formed by a lift-off process. The interconnection lines 771 and 775 are insulated from the first reflective electrode 725 by the lower insulating layer 761. The connection portion 7771a electrically connects the third LED stack 743 to the interconnection line 771, and the connection portion 7775a electrically connects the first ohmic electrode 727 to the interconnection line 775. The connection portion 777a electrically connects the third transparent electrode 745 to the first reflective electrode 725, and the connection portion 777b electrically connects the second transparent electrode 735 to the first reflective electrode 725.
Referring to fig. 96J, an upper insulating layer 781 (see fig. 94 and 95) covers the interconnect lines 771 and 775 and the connection portions 771a, 775a, 777a, and 777 b. The upper insulating layer 781 may also cover the entire upper surface of the third LED stack 743. The upper insulating layer 781 has an opening 781a exposing the upper surface of the second LED stack 733. The upper insulating layer 781 may be formed of, for example, silicon oxide or silicon nitride, and may include a distributed bragg reflector. In the structure in which the upper insulating layer 781 includes the distributed bragg reflector, the upper insulating layer 781 is formed to expose at least a portion of the upper surface of the third LED stack 743 to emit light to the outside.
Referring to fig. 96K, an interconnection line 773 and a connection portion 773a are formed. The interconnect 775 and the connection 7775a may be formed by a lift-off process. The interconnection line 773 is disposed on the upper insulating layer 781 and insulated from the first reflective electrode 725 and the interconnection lines 771 and 775. The connection portion 773a electrically connects the second LED stack 733 to the interconnection line 773. The connecting portion 773a may straddle the interconnect line 775 and be insulated from the interconnect line 775 by the upper insulating layer 781.
As a result, the pixel region is completed as shown in fig. 93. Further, as shown in fig. 92, a plurality of pixels may be formed on the support substrate 751, and the plurality of pixels may be connected to each other through the first reflective electrode 725 and the interconnection lines 771, 773, and 775 to operate in a passive matrix manner.
Although a method of manufacturing a display device adapted to operate in a passive matrix manner is shown in this exemplary embodiment, it should be understood that the present disclosure is not limited thereto. That is, the display device according to the exemplary embodiment may be manufactured in various ways to operate in a passive matrix manner using the light emitting diode stack 700 shown in fig. 89.
For example, although the interconnection line 773 is illustrated as being formed on the upper insulating layer 781 in this exemplary embodiment, the interconnection line 773 may be formed on the lower insulating layer 761 together with the interconnection lines 771 and 775, and the connection portion 773a may be formed on the upper insulating layer 781 to connect the second LED stack 733 to the interconnection line 773. In addition, the interconnection lines 771, 773, and 775 may be disposed inside the support substrate 751.
Fig. 97 is a schematic circuit diagram illustrating an operation of a display apparatus according to another exemplary embodiment of the present disclosure. The above embodiments relate to a display device driven in a passive matrix manner, and the exemplary embodiments relate to a display device driven in an active matrix manner.
Referring to fig. 97, the driving circuit according to the exemplary embodiment includes at least two transistors Tr1, Tr2 and a capacitor. When a power source is connected to the select lines Vrow1 through Vrow3 and applies voltages to the data lines Vdata1 through Vdata3, voltages are applied to the corresponding light emitting diodes. Further, the corresponding capacitor is charged according to the value of Vdata1 to Vdata 3. Since the on state of the transistor Tr2 can be maintained by the charging voltage of the capacitor, even when the power supplied to the Vrow1 is cut off, the voltage of the capacitor can be maintained and can be applied to the light emitting diode R, G, B. Further, the current flowing in the light emitting diode R, G, B may be changed according to the value of Vdata1 to Vdata 3. The current can be continuously supplied by Vdd, enabling continuous light emission.
The transistors Tr1, Tr2 and the capacitor may be formed inside the support substrate 751. For example, a thin film transistor formed on a silicon substrate may be used for active matrix driving.
Here, the light emitting diodes R, G, B correspond to the first, second, and third LED stacks 723, 733, and 743, respectively, stacked in one pixel. In addition, the light emitting diode R includes a first-1 LED stack 723a, a first-2 LED stack 723b, and a tunnel junction layer 7130 interposed between the first-1 LED stack 723a and the first-2 LED stack 723 b. The anodes of the first, second, and third LED stacks 723, 733, and 743 are connected to the transistor Tr2, and their cathodes are grounded.
Although one example of a circuit for active matrix driving is shown in this exemplary embodiment, it should be understood that other types of circuits may be used. Further, although the anodes of the light emitting diodes R, G, B are connected to different transistors Tr2 and their cathodes are grounded in this exemplary embodiment, the anodes of the light emitting diodes may be connected to a current source Vdd and their cathodes may be connected to different transistors in other exemplary embodiments.
Fig. 98 is a schematic plan view of a display device according to another exemplary embodiment of the present disclosure. Here, a description will be given below of one pixel among a plurality of pixels arranged on the support substrate 7151.
Referring to fig. 98, the pixel according to the exemplary embodiment is substantially similar to the pixel described with reference to fig. 92 to 95, except that the support substrate 7151 is a thin film transistor panel including a transistor and a capacitor, and the first reflective electrode 725 is restrictively positioned in a lower region of the first LED stack 723.
The cathode of the third LED stack 743 is connected to the support substrate 7151 through the connection portion 7171 a. For example, as shown in fig. 97, the cathode of the third LED stack 743 may be grounded by being electrically connected to the support substrate 7151. The cathode of the second LED stack 733 and the cathode of the first LED stack 723 may also be grounded by being electrically connected to the support substrate 7151 via the connection portions 7173a, 7175 a.
On the other hand, the first reflective electrode 725 is connected to the transistor Tr2 (see fig. 97) located inside the support substrate 7151. The third transparent electrode 745 and the second transparent electrode 735 are also connected to the transistor Tr2 (see fig. 97) located inside the support substrate 7151 through the connection portions 7171b and 7173 b.
In this way, the first LED stack 723, the second LED stack 733, and the third LED stack 743 are connected to each other, thereby constituting a circuit for active matrix driving, as shown in fig. 97.
Although one example of the electrical connection for active matrix driving is shown in this exemplary embodiment, it is to be understood that the present disclosure is not limited thereto, and the circuit for the display device may be modified into various circuits for active matrix driving in various ways.
On the other hand, in the exemplary embodiment described with reference to fig. 89, although the first, second and third reflective electrodes 725, 735 and 745 form ohmic contacts with the p-type semiconductor layer of the first LED stack 723, the p-type semiconductor layer of the second LED stack 733 and the p-type semiconductor layer of the third LED stack 743, respectively, the n-type semiconductor layer of the first LED stack, the n-type semiconductor layer of the second LED stack and the n-type semiconductor layer of the third LED stack are not provided with separate ohmic contact layers. When the pixel has a small size of 200 μm or less, current diffusion is not difficult even if a separate ohmic contact layer is not formed in the n-type semiconductor layer. However, a transparent electrode layer may be provided on the n-type semiconductor layer of each LED stack to ensure current spreading.
Further, although it is shown that the first, second, and third LED stacks 723, 733, and 743 are sequentially combined with one another in this exemplary embodiment, it is understood that the first, second, and third LED stacks 723, 733, and 743 may be connected to one another in various orders using a wafer bonding technique, and positions of the n-type and p-type semiconductor layers may be changed.
According to an exemplary embodiment of the present disclosure, since a plurality of pixels can be formed at a wafer level using the light emitting diode stack 700 for a display, it is not necessary to separately mount light emitting diodes. Further, the light emitting diode stack according to the exemplary embodiment has a structure in which: the first, second, and third LED stacks 723, 733, and 743 are stacked in a vertical direction, thereby securing an area for a sub-pixel in a limited pixel area. Further, in the light emitting diode stack according to the exemplary embodiment, the first LED stack 723 has a multi-junction LED stack structure, thereby improving the luminance of red light without significantly changing the current density in a limited region.
Although the first LED stack is illustrated as having a multi-junction LED stack structure in the above exemplary embodiments, the second LED stack or the third LED stack may have a multi-junction LED stack structure. With the structure in which the LED structure having low visibility is formed to have the multi-junction LED stack structure, the light emitting diode stack causes the first to third LED stacks to emit light having similar luminance without adjusting the light emitting area or the current density.
Although the first, second, and third LED stacks 723, 733, and 743 are shown as being stacked on top of one another and having substantially similar light emitting areas in the above exemplary embodiments, these LED stacks need not have similar light emitting areas. Specifically, the second LED stack 733 may be disposed in some regions on the first LED stack 723, and the third LED stack 743 may be disposed in some regions on the second LED stack 733. With this structure, the first LED stack 723 having low visibility has a larger light emitting area than the second LED stack 733 and the third LED stack 743, thereby further improving luminance. In addition, at least a portion of the light generated from the first LED stack 723 may be emitted to the outside without passing through the second LED stack 733 and the third LED stack 743, and at least a portion of the light generated from the second LED stack 733 may be emitted to the outside without passing through the third LED stack 743, thereby further improving light emitting efficiency.
While certain exemplary embodiments have been described herein, it should be understood that these embodiments are provided for illustration only and should not be construed as limiting the disclosure in any way. It is to be understood that features or components of one exemplary embodiment may also be applied to other exemplary embodiments without departing from the spirit and scope of the present disclosure.

Claims (20)

1. A light emitting diode pixel for a display, the light emitting diode pixel for a display comprising:
a first LED stack;
a second LED stack disposed in some areas on the first LED stack;
a third LED stack disposed in some areas on the second LED stack; and
a reflective electrode disposed at a lower side of the first LED stack,
wherein each of the first to third LED stacks includes an n-type semiconductor layer and a p-type semiconductor layer,
all the n-type semiconductor layers of the first to third LED stacks are electrically connected to the reflective electrode, and
the first, second, and third LED stacks are independently driven.
2. The light emitting diode pixel for a display of claim 1, wherein the first, second, and third LED stacks emit light having different wavelengths, respectively.
3. The light emitting diode pixel for a display of claim 2, wherein the first, second, and third LED stacks emit red, green, and blue light, respectively.
4. The light emitting diode pixel for a display of claim 1, wherein the p-type semiconductor layer of the first LED stack, the p-type semiconductor layer of the second LED stack, and the p-type semiconductor layer of the third LED stack are disposed on the n-type semiconductor layer of the first LED stack, the n-type semiconductor layer of the second LED stack, and the n-type semiconductor layer of the third LED stack, respectively, and the reflective electrode forms an ohmic contact with the n-type semiconductor layer of the first LED stack.
5. The light emitting diode pixel for a display of claim 4, further comprising:
a first color filter interposed between the first and second LED stacks; and
a second color filter disposed between the second LED stack and the third LED stack,
wherein the first color filter transmits light generated from the first LED stack while reflecting light generated from the second LED stack, and
the second color filter transmits light generated from the second LED stack while reflecting light generated from the third LED stack.
6. The light emitting diode pixel for a display of claim 5, wherein the first color filter is adjacent to the n-type semiconductor layer of the second LED stack and the second color filter is adjacent to the n-type semiconductor layer of the third LED stack.
7. The light emitting diode pixel for a display of claim 5, further comprising:
a second bonding layer interposed between the first LED stack and the first color filter; and
a third bonding layer interposed between the second LED stack and the second color filter,
wherein the second bonding layer transmits light generated from the first LED stack, and the third bonding layer transmits light generated from the second LED stack.
8. The light emitting diode pixel for a display of claim 4, further comprising:
a first-2 ohmic electrode in contact with the p-type semiconductor layer of the first LED stack;
a second-1 ohmic electrode in contact with the n-type semiconductor layer of the second LED stack;
a second-2 ohmic electrode in contact with the p-type semiconductor layer of the second LED stack;
a third-1 ohmic electrode in contact with the n-type semiconductor layer of the third LED stack; and
a third-2 ohmic electrode in contact with the p-type semiconductor layer of the third LED stack,
wherein the first-2 ohmic electrode is in contact with the n-type semiconductor layer of the first LED stack and is located outside of some regions of the first LED stack, and the second-1 ohmic electrode and the second-2 ohmic electrode are in contact with the n-type semiconductor layer and the p-type semiconductor layer of the second LED stack, respectively, and are located outside of some regions of the second LED stack.
9. The light emitting diode pixel for a display of claim 8, wherein the third-1 ohmic electrode is in contact with and on the n-type semiconductor layer of the third LED stack and the third-2 ohmic electrode is in contact with and on the p-type semiconductor layer of the third LED stack.
10. The light emitting diode pixel for a display of claim 9, further comprising:
and connection parts electrically connecting the second-1 ohmic electrode and the third-1 ohmic electrode to the reflective electrode, respectively.
11. The light emitting diode pixel for a display of claim 1, wherein an area of a region of the first LED stack other than some regions of the first LED stack, an area of a region of the second LED stack other than some regions of the second LED stack, and an area of a region of the third LED stack are different from each other.
12. A display device comprising a plurality of pixels disposed on a support substrate, each pixel comprising:
a first LED stack;
a second LED stack disposed in some areas on the first LED stack;
a third LED stack disposed in some areas on the second LED stack; and
a reflective electrode disposed at a lower side of the first LED stack,
wherein each of the first to third LED stacks includes an n-type semiconductor layer and a p-type semiconductor layer,
all the n-type semiconductor layers of the first to third LED stacks are electrically connected to the reflective electrode, and
the first, second, and third LED stacks are independently driven.
13. The display device of claim 12, wherein the first, second, and third LED stacks each emit light having a different wavelength.
14. The display apparatus of claim 12, wherein the n-type semiconductor layer of the first LED stack, the n-type semiconductor layer of the second LED stack, and the n-type semiconductor layer of the third LED stack are electrically connected to a common line, and
the p-type semiconductor layer of the first LED stack, the p-type semiconductor layer of the second LED stack, and the p-type semiconductor layer of the third LED stack are electrically connected to different lines.
15. The display apparatus according to claim 13, wherein the p-type semiconductor layer of the first LED stack, the p-type semiconductor layer of the second LED stack, and the p-type semiconductor layer of the third LED stack are disposed on the n-type semiconductor layer of the first LED stack, the n-type semiconductor layer of the second LED stack, and the n-type semiconductor layer of the third LED stack, respectively, and the reflective electrode forms an ohmic contact with the n-type semiconductor layer of the first LED stack.
16. The display device of claim 15, wherein each pixel further comprises:
a first color filter interposed between the first and second LED stacks; and
a second color filter disposed between the second LED stack and the third LED stack,
the first color filter transmits light generated from the first LED stack while reflecting light generated from the second LED stack, and the second color filter transmits light generated from the second LED stack while reflecting light generated from the third LED stack.
17. The display device of claim 16, wherein each pixel further comprises:
a first bonding layer interposed between the support substrate and the reflective electrode;
a second bonding layer interposed between the first LED stack and the first color filter; and
and a third bonding layer interposed between the second LED stack and the second color filter.
18. The display device of claim 15, wherein each pixel further comprises:
a first-2 ohmic electrode in contact with the p-type semiconductor layer of the first LED stack;
a second-1 ohmic electrode in contact with the n-type semiconductor layer of the second LED stack;
a second-2 ohmic electrode in contact with the p-type semiconductor layer of the second LED stack;
a third-1 ohmic electrode in contact with the n-type semiconductor layer of the third LED stack; and
a third-2 ohmic electrode in contact with the p-type semiconductor layer of the third LED stack,
the first-2 ohmic electrode is in contact with the p-type semiconductor layer of the first LED stack and is located outside some regions of the first LED stack, and
the second-1 and second-2 ohmic electrodes are in contact with the n-type and p-type semiconductor layers of the second LED stack, respectively, and are located outside some regions of the second LED stack.
19. The display device of claim 18, wherein the third-1 ohmic electrode is in contact with and on the n-type semiconductor layer of the third LED stack and the third-2 ohmic electrode is in contact with and on the p-type semiconductor layer of the third LED stack.
20. The display device of claim 18, wherein each pixel further comprises: and connection parts electrically connecting the second-1 ohmic electrode and the third-1 ohmic electrode to the reflective electrode, respectively.
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US16/200,036 US20190164945A1 (en) 2017-11-27 2018-11-26 Light emitting diode for display and display apparatus having the same
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