CN110602865A - Circuit device with multiple layers of glue filling and glue filling method - Google Patents
Circuit device with multiple layers of glue filling and glue filling method Download PDFInfo
- Publication number
- CN110602865A CN110602865A CN201910522417.7A CN201910522417A CN110602865A CN 110602865 A CN110602865 A CN 110602865A CN 201910522417 A CN201910522417 A CN 201910522417A CN 110602865 A CN110602865 A CN 110602865A
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- Prior art keywords
- glue
- layer
- colloid
- height
- circuit board
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
The invention relates to a circuit device with multilayer glue filling, which comprises a base, a Printed Circuit Board (PCB), glue and a separator, wherein electronic elements with different heights are arranged on the PCB, the electronic elements are distributed on the lowest area or other areas according to different heights, a first glue layer is arranged on the PCB, the height of the first glue layer is the same as the glue sealing height of the lowest area, and the separator and the first glue layer separate other areas to form a separation cavity. The invention solves the problems that a seal is required to be arranged between the separator and the PCB and the separator occupies the space of the PCB, effectively saves the use of a large amount of colloid and saves the cost.
Description
Technical Field
The invention relates to the field of printed circuit boards, in particular to a circuit device with multiple layers of glue filling and a glue filling method thereof.
Background
At present, many circuit devices in the market can be subjected to glue filling treatment on the circuit devices in order to prevent moisture or dust or prevent external force from damaging the circuit components. The glue filling method is various, the required glue filling heights are different due to the fact that the heights of the electronic elements are different, the glue enters the inside of elements such as a plug socket or a buzzer due to the fact that the height of the glue filling is too high, the performance of the electronic elements is affected, and the waterproof and moistureproof effects of the filling and sealing cannot be achieved due to the fact that the height of the glue filling is too low. In order to meet the requirements of different glue filling heights, elements with different glue filling heights are usually arranged on different circuit board bases, elements with the same glue filling height are arranged on the same circuit board base, and the glue filling height on each base is the same. However, this method requires a plurality of bases, and the circuit board and the bases occupy more space, which is not favorable for reducing the overall size of the electric appliance. "subregion embedment of power converter" it discloses following technical scheme: a power conversion device comprising: a Printed Circuit Board (PCB) having at least one region; electronic and electrical components on the PCB, such components being operably connected to each other for converting electrical power; one or more dividers, each divider having an edge; and a potting adhesive, characterised in that each spacer is in contact with the PCB at an edge thereof such that the at least one area of the PCB is surrounded by one or more spacers to form one or more isolation areas, each isolation area defining a separation space over a different area of the PCB and being open only at the side opposite to the PCB, each such area of the PCB supporting one or more electronic or electrical components, each such separate space being at least partially filled with the potting adhesive, such that the potting adhesive completely encases all electronic or electrical components located in the area, and in a portion of the PCB not surrounded by the separator, the PCB is completely covered by the potting adhesive, wherein there is a void above the potting adhesive over at least one area of the PCB, the potting adhesive covering electronic or electrical components in the at least one area of the PCB. According to the technical scheme, the glue filling with different heights is adopted, the elements with different heights are arranged on the same base, the space occupied by the PCB is reduced, the use of glue is reduced, the separator is connected with the PCB, an independent fixing part is needed, and a certain degree of sealing is needed to be arranged between the PCB and the separator to prevent the glue in a high area from permeating into a low area from a gap between the PCB and the separator.
Disclosure of Invention
The invention provides a circuit device with multiple layers of potting adhesive, which solves the problems that in the background technology, a seal is required to be arranged between a separator and a PCB and the separator occupies the space of the PCB, and adopts the following technical scheme for solving the technical problems:
the utility model provides a circuit arrangement with multilayer encapsulating, includes base, Printed Circuit Board (PCB), colloid and divider, be equipped with the different electronic component of height on the printed circuit board, electronic component distributes on minimum district or other districts according to the difference in height, its characterized in that: and a first colloid layer is arranged on the printed circuit board, the height of the first colloid layer is the same as the glue sealing height of the lowest region, and the partition and the first colloid layer separate the other regions to form partitions.
Further, the separator is embedded in the first colloidal layer.
Further, the other region is composed of at least one region with different height and irregular shape, the separator comprises at least one irregular separation sheet, and the separator and the first colloid layer separate the three regions with different height and irregular shape
Furthermore, a clamping portion is arranged on the partition, and a clamping groove matched with the clamping portion is formed in the base.
Furthermore, a reinforcing bump is arranged on the separator, and an assembly hole matched with the bump is arranged on the printed circuit board.
Further, the separation chamber is formed by a base peripheral wall, a first colloid layer and a partition.
Further, the separation chamber is formed by a first glue layer and a partition.
After adopting above-mentioned scheme, its beneficial effect is as follows:
1. after adopting above-mentioned scheme, can install more electronic component on Printed Circuit Board (PCB), the integrated density of Printed Circuit Board (PCB) that improves makes Printed Circuit Board (PCB) compact, saves space.
2. The separator is clamped with the base and the printed circuit board, so that the separator is firmer and is convenient to disassemble and assemble.
3. The separation cavity can be formed by the base peripheral wall, the first colloid layer and the partition, or formed by the first colloid layer and the partition, so that the requirement of irregular multi-area separation can be met according to actual needs.
A potting method for a circuit device provided with a multilayer potting adhesive according to any one of claims 1 to 7, comprising the following potting steps:
step one, a layer of colloid is filled in the base to form the first colloid layer, and the height of the first colloid layer is the same as the glue sealing height of the lowest area;
and step two, after the surface of the first colloid layer is dried and the partition plate is installed, filling the partition cavity with glue until the glue sealing height of the partition cavity is met.
Further, before the first colloid surface layer is dried in the second step, a partition is placed on the first colloid surface layer, and then the partition cavity is filled with glue.
Further, the first step can be divided into:
step 1.1, a layer of colloid is filled on the base, and the height of the colloid is greater than the mounting height of the printed circuit board on the base;
step 1.2, the printed circuit board is arranged on a base, and the colloid overflows to cover a part or all of the printed circuit board in step 1.1;
and step 1.3, filling glue into the base provided with the printed circuit board to form the first glue layer, wherein the height of the first glue layer is the same as the glue sealing height of the lowest region.
After adopting above-mentioned technical scheme, its beneficial effect is as follows:
1. through the two steps of the glue filling method, the moisture-proof bottom of the printed circuit board and the waterproof protection of the electronic element can be effectively formed, meanwhile, the use of a large amount of glue is effectively saved, and the cost is saved.
2. When glue is filled into the separation cavity, if the first glue body layer is not surface-dried, the glue in the separation cavity is pressed on the first glue body layer, the glue on the first glue body layer flows, the condition that the glue in the lowest region is too much is generated, and the problem is well solved in the second step.
3. The partial filling of the partition into the first colloid layer can seal the separation chambers and can make the partition more stable.
4. The separator is partially embedded in the first adhesive layer, and the dried and hardened adhesive can seal the gap between the separator and the printed circuit board without separately sealing the gap between the separator and the printed circuit board or separately fixing the separator.
Drawings
The invention is further illustrated by the following figures and examples.
Fig. 1 is a schematic overall view of a circuit device with multiple layers of potting adhesive according to a preferred embodiment.
Fig. 2 is an exploded view of a circuit device with multiple layers of potting adhesive according to a preferred embodiment.
Fig. 3 is a cross-sectional view of a circuit device with multiple layers of potting compound in accordance with a preferred embodiment.
FIG. 4 is a schematic overall view of the second preferred embodiment.
The attached drawings are as follows:
1. a base; 2. a Printed Circuit Board (PCB); 3. a separator; 12. a peripheral wall; 13. a card slot; 21. an assembly hole; 31. a bump; 32. a clamping part; 33. a first separation sheet; 34 a second separator sheet; an IC chip; 42. a direct current socket; 43. an inductance; 44. a capacitor; 45. a transformer; 51. a lowermost region; 52. a high region; 61. a second lowermost zone; 62. a first high region; 63. a second high region; 64. a third high region; 65. a fourth high region; 66. a fifth high region; 71 high-region colloid; 72. a first colloid layer; 73. bottom colloidal layer.
Detailed Description
First embodiment
As shown in fig. 1 and 2, a circuit device provided with a multi-layer potting adhesive includes a base 1, a Printed Circuit Board (PCB)2, an adhesive, and a separator 3. The base 1 comprises a bottom plate and a peripheral wall 12, a step for arranging a Printed Circuit Board (PCB)2 is arranged on the base 1, when the Printed Circuit Board (PCB)2 is placed on the step, a gap is formed between the bottom surface of the Printed Circuit Board (PCB)2 and the bottom plate to form a lower glue sealing space, and a space formed by the other surface of the corresponding Printed Circuit Board (PCB)2 and the peripheral wall 12 of the base 1 is a glue sealing space. The base 1 is provided with a card slot 13 and a fastener for fixing a Printed Circuit Board (PCB) 2. The partition 3 is composed of a first separating sheet 33 and a second separating sheet 34, wherein one end of the first separating sheet 33 and one end of the second separating sheet 34 close to the peripheral wall 12 of the base 1 are provided with clamping parts 32, and the clamping parts 32 are clamped in the clamping grooves 12 of the base 1. The partition 3 is provided with a reinforcing bump 31, and the Printed Circuit Board (PCB)2 is provided with an assembling hole 21 matched with the bump. The Printed Circuit Board (PCB)2 is provided with an IC chip 41, a dc jack 42, a resistor assembly, an inductor 43, a capacitor 44, a transformer 45, and the like. As shown in fig. 1, the lowermost region 51 is provided with electronic components including an IC chip 41, a dc socket 42, a resistor component, and the like; the high region 52 is provided with an inductance 43, a capacitor 44, a transformer 45, and the like. The first glue layer 72, the peripheral wall 12 and the partition 3 form a high-area separation cavity, glue is filled into the separation cavity, and the glue sealing height in the separation cavity is greater than that in the lowest area.
As shown in fig. 3, a cross-sectional view of a circuit device with multiple layers of potting adhesive, it can be seen that the circuit device with multiple layers of potting adhesive comprises, from bottom to top, a base 1, a bottom adhesive layer 73, a Printed Circuit Board (PCB)2, a first adhesive layer 72, a partition 3, and a high-area adhesive layer 71. Part of the electronic assembly does not need to be covered completely, and only a part of the electronic assembly needs to be covered. It can be seen from the figure that the gap between the partition 3 and the Printed Circuit Board (PCB)2 is filled with the first glue layer 72, after the glue is hardened, the glue filled again to the high area is blocked by the partition, and the gap between the partition 3 and the Printed Circuit Board (PCB)2 is also filled and sealed by the first glue layer 72, the glue in the high area cannot flow to the lowest area 51, so that the partition glue filling is completed, and the glue sealing of the lowest area 51 is completed by the first glue layer 72.
Second embodiment
As shown in fig. 4, a circuit device with multiple layers of glue includes six glue-pouring areas, namely a second lowest area 61 and other areas composed of a first high area 62, a second high area 63, a third high area 64, a fourth high area 65 and a fifth high area 66. The second lowest zone 61 is formed by the structure of the partition 3 itself and the first glue layer, and the partitioned chambers of the first high zone 62, the second high zone 63, the third high zone 64, the fourth high zone 65 and the fifth high zone 66 are formed by the partition 3, the peripheral wall 12 and the first glue layer 72.
A glue filling method is used for the circuit device and sequentially executes the following steps:
step one, pack into a layer colloid in order to form in the base 1 first colloid layer 72, the height of first colloid layer 72 is the same with the gluey height of sealing of second least zone 61 pack into a layer colloid on the base 1, the height of colloid is greater than the mounting height of Printed Circuit Board (PCB)2 on base 1, promptly the volume of packing into the colloid will be greater than the volume of bottom colloid layer 73, and when Printed Circuit Board (PCB)2 was installed on base 1 like this, its colloid can overflow and cover part or whole Printed Circuit Board (PCB) 2. If the Printed Circuit Board (PCB)2 is installed and then filled, bubbles are easily generated at the bottom of the PCB, so that a cavity area can be formed, and the pins of the Printed Circuit Board (PCB)2 can not be completely protected. The glue loading into the bottom glue layer 73 cannot be too much or not good for mounting the Printed Circuit Board (PCB) 2. The method comprises the following steps:
step 1.1, a layer of colloid is arranged on the base 1, and the height of the colloid is greater than the installation height of the Printed Circuit Board (PCB)2 on the base 1;
step 1.2, mounting the Printed Circuit Board (PCB)2 on a base 1, wherein the colloid in the step can overflow to cover a part or all of the Printed Circuit Board (PCB) 2;
step 1.3, the base provided with the Printed Circuit Board (PCB)2 is provided with the colloid to form a first colloid layer 72, and the height of the first colloid layer 72 is the same as the glue sealing height of the second lowest area 61;
and step two, after the surface of the first colloid layer 72 is dried, the partition 3 is placed, and after the surface of the first colloid layer is dried, the separation cavity is filled with glue until the glue sealing height of the separation cavity is met. The first gel layer 72 needs to be left for a certain period of time to partially solidify naturally, and the surface begins to open up into a flexible surface, so that the gel does not flow when the circuit device is set up, which is called surface drying. Typically, the first gel layer 72 is allowed to stand for an optimal time of 3 hours before the surface layer is dried, but the skilled person can also select the curing time according to different materials. When the glue is filled into the separated cavity, if the first glue layer 72 is not dried, the glue in the separated cavity is pressed on the first glue layer 72, and the glue in the first glue layer 72 flows, so that the glue in the lowest region is excessive. The first glue layer 72 of the partition 3 is placed before drying and the partition 3 is partially embedded in the first glue layer 72 to effectively seal the different compartments and at the same time stabilize the partition 3. By adopting the glue filling method, the moisture-proof performance of the Printed Circuit Board (PCB)2 and the waterproof protection of electronic elements can be effectively formed, and meanwhile, the use of a large amount of glue is effectively saved, and the cost is saved.
The above description is only a preferred embodiment of the present invention, and therefore should not be taken as limiting the scope of the invention, which is defined by the appended claims and their equivalents.
Claims (10)
1. The utility model provides a circuit arrangement with multilayer encapsulating, includes base, Printed Circuit Board (PCB), colloid and divider, be equipped with the different electronic component of height on the printed circuit board, electronic component distributes on minimum district or other districts according to the difference in height, its characterized in that: and a first colloid layer is arranged on the printed circuit board, the height of the first colloid layer is the same as the glue sealing height of the lowest zone, and the partition and the first colloid layer separate the other zones to form a separation cavity.
2. A circuit arrangement provided with a multilayer potting compound as claimed in claim 1, wherein: the separator is embedded in the first colloidal layer.
3. A circuit arrangement provided with a multilayer potting compound as claimed in claim 1, wherein: the other zone is composed of at least one zone with different height and irregular shape, the separator comprises at least one irregular separation sheet, and the separator and the first colloid layer separate the at least one zone with different height and irregular shape.
4. A circuit arrangement provided with a multilayer potting compound as claimed in claim 1, wherein: the partition is provided with a clamping portion, and the base is provided with a clamping groove matched with the clamping portion.
5. A circuit arrangement provided with a multilayer potting compound according to claim 3, wherein: the printed circuit board is provided with a plurality of assembling holes matched with the lugs.
6. A circuit arrangement provided with a multilayer potting compound as claimed in claim 1, wherein: the separation cavity is formed by a base peripheral wall, a first colloid layer and a partition.
7. A circuit arrangement provided with a multilayer potting compound as claimed in claim 1, wherein: the compartment is formed by a first gel layer and a partition.
8. A potting method for a circuit device provided with a multilayer potting adhesive according to any one of claims 1 to 7, characterized in that: the glue pouring method comprises the following steps:
step one, a layer of colloid is filled in the base to form the first colloid layer, and the height of the first colloid layer is the same as the glue sealing height of the lowest area;
and step two, after the surface of the first colloid layer is dried and the partition is installed, filling the glue into the separation cavity until the glue sealing height of the separation cavity is met.
9. The method of claim 8, wherein: and in the second step, before the first colloid surface layer is dried, a partition is placed, and then the partition cavity is filled with glue.
10. The method of claim 8, wherein: the first step can be divided into:
step 1.1, a layer of colloid is filled on the base, and the height of the colloid is greater than the mounting height of the printed circuit board on the base;
step 1.2, the printed circuit board is arranged on a base, and the colloid overflows to cover a part or all of the printed circuit board in step 1.1;
and step 1.3, filling glue into the base provided with the printed circuit board to form the first glue layer, wherein the height of the first glue layer is the same as the glue sealing height of the lowest region.
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CN201910522417.7A CN110602865B (en) | 2019-06-17 | 2019-06-17 | Circuit device with multiple layers of glue filling and glue filling method |
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CN201910522417.7A CN110602865B (en) | 2019-06-17 | 2019-06-17 | Circuit device with multiple layers of glue filling and glue filling method |
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CN110602865B CN110602865B (en) | 2020-12-22 |
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Cited By (1)
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