CN110600415B

CN110600415B - Three-dimensional stacking alignment method

Info

Publication number: CN110600415B
Application number: CN201910924309.2A
Authority: CN
Inventors: 郁发新; 冯光建; 张兵; 王志宇; 陈华
Original assignee: Zhejiang University ZJU
Current assignee: Zhejiang University ZJU
Priority date: 2019-09-27
Filing date: 2019-09-27
Publication date: 2023-06-27
Anticipated expiration: 2039-09-27
Also published as: CN110600415A

Abstract

The invention discloses a three-dimensional stacking alignment method, which specifically comprises the following steps: 101 A pre-treatment step, 102) a preliminary alignment step, 103) a fine adjustment step, 104) a bonding step, 105) a multilayer setting step; the invention provides a three-dimensional stacking alignment method which achieves higher module alignment capability, saves cost and is convenient to operate.

Description

Three-dimensional stacking alignment method

Technical Field

The invention relates to the technical field of semiconductors, in particular to a three-dimensional stacking alignment method.

Background

The microwave millimeter wave radio frequency integrated circuit technology is the basis of modern national defense weapon equipment and Internet industry, and along with the rapid rise of Internet +' economy such as intelligent communication, intelligent home, intelligent logistics, intelligent traffic and the like, the microwave millimeter wave radio frequency integrated circuit for bearing data access and transmission functions also has huge practical demands and potential markets.

However, for high frequency microsystems, the area of the antenna array is smaller and smaller, and the distance between the antennas needs to be kept within a specific range, so that the whole module has excellent communication capability. However, for an analog device chip such as a radio frequency chip, the area cannot be reduced in multiplying power like a digital chip, so that an ultra-high frequency radio frequency micro system cannot have enough area and simultaneously place the PA/LNA, and the PA/LNA needs to be stacked.

The current industry module stacking requires extremely precise alignment equipment, has huge capital investment, and does not generally have or need to do so for some small units in the process of early experimental product development. Some research institutions also use centrifugal force or die methods to stack multiple layers of modules, but as more and more accurate modules are required for alignment, these simple methods have not been able to accommodate the product requirements.

Disclosure of Invention

The invention overcomes the defects of the prior art and provides a three-dimensional stacking alignment method.

The technical scheme of the invention is as follows:

a three-dimensional stacking alignment method specifically comprises the following steps:

101 A pretreatment step: a vent hole is arranged on the alignment base; the bottom of the vent hole is provided with a cavity which is communicated with and covers all the vent holes aligned to the upper surface of the base; the bottom of the cavity is provided with an exhaust hole which is connected with the outside; a gas flow monitoring device is arranged in the middle of the exhaust hole; the edge of the alignment base is provided with a flat plate which can stretch up and down for coarse alignment, and the movement precision of the flat plate is 1um; the flat plates are distributed around the periphery of the chip;

102 Primary alignment step): placing the chip module to be bonded with the band-pass on the alignment base, and exhausting and fixing the chip module by the alignment base to finish initial alignment;

103 Fine tuning step): withdrawing the flat plate, and arranging a ten-thousand-minute-meter alignment plate around the alignment base; fine tuning the chip module by using a meter-per-million alignment plate, wherein the accuracy of the meter-per-million alignment plate is controlled to be 0.1um; the vent hole of the chip module is communicated with the vent hole of the alignment base, and the alignment condition of the chip module is judged through the airflow monitoring device;

104 A bonding step): removing the alignment plate of the meter, aligning the base to heat, and finishing the welding of the chip module;

105 Multi-layer setting step: repeating steps 101) to 104) to stack other chip modules above the already stacked chip modules, and finally forming a stack of multi-chip modules.

Further, the alignment base is made of metal or ceramic, the surface flatness is smaller than 1um, and the surface roughness is smaller than 0.5um.

Further, the vent holes and the vent holes are round, elliptic or square, and the diameter or side length of the vent holes and the vent holes ranges from 1um to 1000 um.

Further, the number of the flat plates is between 1 and 20, and the flat plates adopt ejector pins.

Compared with the prior art, the invention has the advantages that: according to the invention, the alignment vent hole technology is manufactured on the chip module, and the alignment error of the chip is repaired by simple tools such as rough alignment and fine alignment implementation steps, ten-thousandth gauge alignment plates and the like, so that the higher module alignment capability is finally achieved, the cost is saved, and the operation is convenient.

Drawings

FIG. 1 is a schematic view of an alignment base and a flat panel of the present invention;

FIG. 2 is a top view of the alignment base of FIG. 1 in accordance with the present invention;

FIG. 3 is a schematic diagram of the chip module set of FIG. 1 according to the present invention;

FIG. 4 is a schematic illustration of the initial alignment of the present invention;

FIG. 5 is a schematic diagram of the present invention in which other chip modules are provided in FIG. 4;

FIG. 6 is a schematic diagram of a trimming step according to the present invention;

FIG. 7 is a bonding diagram of the present invention;

FIG. 8 is a schematic diagram of a multi-layer stack of the present invention;

fig. 9 is a schematic diagram of the present invention.

The marks in the figure are as follows: aligned with the base 101, the plate 102, the vent 103, the chamber 104, the vent 105, the chip module 106, and the airflow monitoring device 107.

Detailed Description

Embodiments of the present invention are described in detail below, wherein like or similar reference numerals refer to like or similar elements or elements of similar function throughout. The embodiments described below by referring to the drawings are exemplary only for explaining the present invention and not as a limitation of the present invention.

It will be understood by those skilled in the art that all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs unless defined otherwise. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Reference numerals referring to steps in the various embodiments are merely for convenience of description and do not have a substantial sequential relationship. Different steps in each specific embodiment can be combined in different sequences, so that the aim of the invention is fulfilled.

The invention is further described below with reference to the drawings and the detailed description.

Example 1:

as shown in fig. 1 to 9, a three-dimensional stacking alignment method specifically includes the following steps:

101 A pretreatment step: a vent 103 is provided on the alignment base 101. The bottom of the vent hole 103 is provided with a cavity 104, the cavity 104 is communicated with all the vent holes 103 aligned with the upper surface of the base 101, and the vent holes 103 can be round, oval, square and the like, and the diameter of the vent holes is between 1um and 1000 um. The bottom of the chamber 104 is provided with an exhaust hole 105 which is interconnected with the outside, and the exhaust hole 105 can be round or elliptical, square, etc., and the diameter of the exhaust hole is between 1um and 1000 um. The gas flow monitoring device is arranged in the middle of the gas exhaust hole 105, the number of the flat plates 102 is between 1 and 20, and the flat plates 102 can also be ejector pins with smaller width. The alignment base 101 is made of metal or ceramic, and has a surface flatness of less than 1um and a surface roughness of less than 0.5um. Setting a flat plate 102 which can stretch up and down to perform rough alignment at the edge of an alignment base 101, wherein the movement precision of the flat plate 102 is 1um; the plates 102 are distributed around the periphery of the chip.

102 Primary alignment step): the chip module 106 to be bonded with the tape 103 is manually placed above the alignment base 101, and the alignment base 101 is pumped to fix the chip module 106, thereby completing the initial alignment of the chip module 106 closely attached to the flat plate 102.

103 Fine tuning step): withdrawing the flat plate 102, and arranging a ten-thousand-minute-meter alignment plate around the alignment base; the chip module 106 is fine-tuned with the alignment plate of the ten-thousandth gauge, and the accuracy of the alignment plate of the ten-thousandth gauge is controlled at 0.1um. The vent hole 103 of the chip module 106 is communicated with the vent hole 103 of the alignment base 101, and the alignment condition of the chip module 106 is judged by the air flow monitoring device 107, namely, the alignment condition of the vent hole 103 is judged by the monitoring of the air flow monitoring device 107, so that the alignment processing requirement is adjusted.

104 A bonding step): and removing the meter alignment plate, and heating the alignment base 101 to finish the welding of the chip module 106.

105 Multi-layer setting step: repeating steps 101) to 104) stacks other chip modules 106 over the already stacked chip modules 106, eventually forming a stack of multi-chip modules 106. Other chip modules 106 are stacked above the stacked chip modules 106 in the same manner, and finally the stacked structure of the multi-layer chip modules 106 is completed.

The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the concept of the present invention, and such modifications and adaptations are intended to be comprehended within the scope of the present invention.

Claims

1. A three-dimensional stacking alignment method, characterized by: the method specifically comprises the following steps:

105 Multi-layer setting step: repeating steps 101) to 104) to stack other chip modules above the already-stacked chip modules, and finally forming a stack of multi-chip modules;

the alignment base is made of metal or ceramic, the surface flatness is less than 1um, and the surface roughness is less than 0.5um; the vent hole and the vent hole are round, elliptic or square, and the diameter or side length of the vent hole and the vent hole is in the range of 1um to 1000 um; the number of the flat plates is between 1 and 20, and the flat plates adopt ejector pins.