CN110572295A - test method for verifying SSM response rule - Google Patents
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- H—ELECTRICITY
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Abstract
The application provides a test method for verifying SSM response rules, which comprises the following steps: the test equipment sends a synchronous Ethernet signal through a first port; when the tested device receives the synchronous Ethernet signal sent by the testing device through the fourth port, the tested device sends a response synchronous Ethernet signal to the testing device through the fourth port and the fifth port according to the configured SSM response rule, and sends a response framing 2Mb/s external timing signal to the testing device through the sixth port; when the testing equipment receives a synchronous Ethernet signal sent by the tested equipment and a framing 2Mb/s external timing signal, determining whether the value of the received SSM is the same as the configured SSM value; and recording the comparison result; and when the test equipment determines that any one of the comparison results of the records is different, determining that the SSM response rule of the tested equipment is wrong, and displaying the SSM value corresponding to the record with different comparison results. The method can improve the testing efficiency and reduce human errors.
Description
Technical Field
the invention relates to the technical field of communication, in particular to a test method for verifying SSM response rules.
background
A Synchronization Status Message (SSM) is a code used by a synchronization network to indicate the quality level of a clock. Currently, ITU-T specifies that four bits, namely the Synchronization Status Message Byte (SSMB), are used for encoding.
table 1 shows the SSM codes and their usage priorities, defined by ITU-T, applicable to our country for distinguishing different clock quality level information.
TABLE 1
in a BITS device, the SSM is transmitted over a certain bit of the first time slot (TS0) of a 2Mb/s clock signal; in an SDH transport network, SSM is transported by the lower four bits of S1 bytes in the SDH section overhead; in synchronous Ethernet, SSM is transmitted via specialized slow protocol Messaging Channel (ESMC) messages. The transmitting device will decide the clock distribution and tracking path according to the SSM information it receives at different clock ports and the preset priority of the ports, and prevent the timing loop from occurring.
YD/T2551-2013 technical requirement of frequency synchronization network based on packet network has two requirements of clock source preference sequence and response to the SSM support capability of the transmission equipment.
In terms of the preferred order of the clock sources, there are two specific requirements:
(1) in the timing reference signal optimization sequence, no matter what the priority preset by a clock receiving port of the transmission equipment is, the timing signal with high SSM quality grade is preferentially selected, and the sequence is shown in table 1;
(2) and when different reference source signals have the same SSM quality grade, selecting the timing signal received at the clock port with preset high priority.
In terms of the SSM response rule, the transmission equipment is specifically specified by YD/T2551 and 2013 by 5 items:
(1) Rules for forwarding SSM quality classes in hold state
when the SEC/EEC loses the input timing reference signal and there is no other timing reference signal available, the SEC/EEC will enter the hold state and the synchronous ethernet line or STM-N line/branch and external timing output signal in all directions (except directly derived) should send SSM information at the SEC/EEC clock level.
(2) rules for forwarding SSM in non-switching state
When the SSM quality level of the timing reference signal selected by the SEC/EEC changes and no reference switching is caused, the changed SSM quality level information should be sent by the synchronous ethernet line or STM-N line/branch (except for the backward DNU) and the external timing output signal (except for the direct derivation) in all directions.
(3) Rules for forwarding SSM in switching state
when the SEC/EEC selects a new timing reference signal, the synchronous ethernet lines or STM-N lines/branches in all directions (except for the backward DNU) and the external timing output signal (except for the direct derivation) should send the SSM quality level information of the newly selected timing reference signal.
(4) Rules for sending DNUs backwards
When the SEC/EEC selects a synchronous Ethernet line or an STM-N line/branch as a timing reference signal, the corresponding reverse synchronous Ethernet line or STM-N line/branch signal should send SSM quality grade information of QL _ DNU.
when the external timing output signal is selectively derived from the STM-N line/branch and the SEC/EEC selects the external timing input signal as the timing reference signal, and the SSM quality levels of the external timing output signal and the SEC/EEC are the same, the corresponding reverse STM-N line/branch signal should send the SSM quality level information of the QL _ DNU.
(5) rules for direct derivation of external timing output signals
When the external timing output signal is selected to be led out from the synchronous Ethernet line or the STM-N line/branch circuit, the SSM quality grade information of the selected synchronous Ethernet line or STM-N line/branch circuit signal is sent; when the SSM quality level of the selected synchronous Ethernet line or STM-N line/branch signal is lower than a set threshold value or LOS/AIS/OOF (LOF) alarm occurs, the 2Mb/s interface has the function of inserting AIS information or blocking in an external timing output signal; for a 2MHz interface, it should have the function of blocking the external timing output signal.
YD/T2551-2013 technical requirement of frequency synchronization network based on packet network only provides requirements of two aspects of clock source preference sequence and response to SSM support capability of transmission equipment, does not specify a test method, and does not have other standards to specify the test method at present.
Generally, in the actual test, a tester can manually set external clocks with different priorities or SSM levels to a transmission device according to personal understanding, and check the preferred sequence of device clock sources; and then setting various changes of the SSM grade of the clock source tracked by the transmission equipment, and respectively checking the response changes of the transmission equipment at different clock output ports of the transmission equipment so as to verify the SSM response rule of the equipment. The method requires testers to contrast the requirements one by one, flexibly sets up different test environments according to the capabilities of the instruments, the equipment and the interface conditions of the instruments, tests one by one, and has no uniform test method.
The manual test method has the following disadvantages: the test is performed according to the understanding of the tester to the standard, and the test method is not uniform.
The corresponding 7 requirements are tested one by one, different testing environments need to be set up for many times, different SSM quality levels need to be traversed sometimes under each testing environment, the instrument is set for many times, the connection is complex, the setting is complicated, the time consumption is long, and errors are prone to occurring.
each test result needs a tester to manually interpret according to the data returned by the instrument and the tested device, and the tester must have rich test experience.
disclosure of Invention
In view of this, the present application provides a test method for verifying an SSM response rule, which can improve test efficiency and reduce human errors.
in order to solve the technical problem, the technical scheme of the application is realized as follows:
a test method of validating SSM response rules, the method comprising:
configuring first configuration information: sending an SSM value of the synchronous Ethernet signal, an SSM value received by the first port, an SSM value received by the second port and an SSM value received by the third port;
The performing the verification test for the SSM value of each of the transmission synchronous ethernet signals configured in the first configuration information includes:
the test equipment sends a synchronous Ethernet signal through a first port and carries an SSM value for sending the synchronous Ethernet signal;
when the tested device receives the synchronous Ethernet signal sent by the testing device through the fourth port, the tested device sends a response synchronous Ethernet signal to the testing device through the fourth port and the fifth port according to the configured SSM response rule, and sends a response framing 2Mb/s external timing signal to the testing device through the sixth port;
when the test equipment receives a synchronous Ethernet signal sent by the tested equipment through the first port, determining whether the carried SSM value is the same as the SSM value received by the configured first port; when receiving a synchronous Ethernet signal sent by the tested equipment through the second port, determining whether the carried SSM value is the same as the SSM value received by the configured second port; when a framing 2Mb/s external timing signal sent by the tested equipment is received through the third port, whether the carried SSM value is the same as the SSM value received by the configured third port is determined; and recording the comparison result;
And when the test equipment determines that any one of the comparison results of the records is different, determining that the SSM response rule of the tested equipment is wrong, and displaying the SSM value corresponding to the record with different comparison results.
according to the technical scheme, the testing environment is set up according to all the possibly related rule requirements, the testing input value and the expected output value are configured, whether the actual testing value is the same as the expected output value is compared, and whether the SSM response rule is correct is automatically verified. The scheme can realize a standard test flow, improve the test efficiency and reduce human errors.
Drawings
FIG. 1 is a test diagram illustrating a first step of validating SSM response rules in an embodiment of the present application;
FIG. 2 is a schematic flow chart of a first step of verifying SSM response rules in the embodiment of the present application;
FIG. 3 is a diagram illustrating a second step of testing SSM response rules according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a test flow of a second step of verifying SSM response rules in the embodiment of the present application;
FIG. 5 is a diagram illustrating a third step of testing SSM response rules in the embodiment of the present application;
fig. 6 is a schematic test flow chart of the third step of verifying the SSM response rule in the embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly apparent, the technical solutions of the present invention are described in detail below with reference to the accompanying drawings and examples.
The embodiment of the application provides a test method for verifying an SSM response rule, which automatically verifies whether the SSM response rule is correct or not by establishing a test environment according to all possibly related rule requirements, configuring a test input value and an expected output value, and comparing whether an actual test value is the same as the expected output value or not. The scheme can realize a standard test flow, improve the test efficiency and reduce human errors.
When the test is carried out, a test environment is firstly established, and the test environment can be specifically realized by respectively establishing three connection modes to carry out three-step sequence test by using one test device and one tested device, namely, one connection mode is tested, and then one connection mode is tested, wherein the three-step execution sequence is not limited; or simultaneously building test environments of three connection modes and executing three steps of tests in parallel.
In the embodiment of the application, one testing device and one tested device are taken as examples, that is, three steps of tests are sequentially executed.
The test equipment in the embodiment of the application can be a synchronous test instrument, a rubidium clock is required to be built in, or an external reference clock can be tracked.
the following describes the process of validating SSM response rules in three connection modes in detail with reference to the accompanying drawings.
For the first step of testing: only setting the Ethernet signal as a synchronous reference source of the tested device, and checking SSM byte forwarding information of other synchronous ports.
Referring to fig. 1, fig. 1 is a schematic diagram of a test for verifying an SSM response rule in the first step in the embodiment of the present application. The test equipment in fig. 1 is provided with 2 synchronous ethernet ports (first port and second port), and one framed 2Mb/s external timer input port (third port). The device under test is provided with two synchronous ethernet ports (fourth port and fifth port) and one framed 2Mb/s external timer output port (sixth port).
The synchronous Ethernet ports mentioned here are all logical ports, actually physical ports in transceiving pairs.
before testing, first configuration information needs to be configured, which specifically includes: sending the SSM value of the synchronous Ethernet signal, the SSM value received by the first port, the SSM value received by the second port and the SSM value received by the third port. The SSM value received by the first port, the SSM value received by the second port, and the SSM value received by the third port are expected values, that is, the SSM value that should be responded when the SSM response rule on the device under test is correct.
Referring to table 2, table 2 is related to the configuration of the first configuration information in the embodiment of the present application. The SSM value corresponding to the 1 st column is the SSM value for sending the synchronous Ethernet signal; the SSM value in column 2 is the SSM value received by the first port, the SSM value in column 3 is the SSM value received by the second port, and the SSM value in column 4 is the SSM value received by the third port.
as shown in table 2, when the SSM value of the transmitted synchronous ethernet signal is 2, the SSM value received by the first port is F, the SSM value received by the second port is 2, and the SSM value received by the third port is 2;
When the SSM value of the transmitted synchronous ethernet signal is 4, the SSM value received by the first port is F, the SSM value received by the second port is 4, and the SSM value received by the third port is 4;
When the SSM value of the transmitted synchronous ethernet signal is 8, the SSM value received by the first port is F, the SSM value received by the second port is 8, and the SSM value received by the third port is 8;
when the SSM value of the sending synchronous Ethernet signal is B, the SSM value received by the first port is F, the SSM value received by the second port is B, and the SSM value received by the third port is B;
When the SSM value of the sending synchronous Ethernet signal is F, the SSM value received by the first port is B, the SSM value received by the second port is B, and the SSM value received by the third port is B;
when the SSM value of the transmitted synchronous ethernet signal is 1, 3, 5, 6, 7, 9, A, C, D or E, the SSM value received by the first port is B, the SSM value received by the second port is B, and the SSM value received by the third port is B.
TABLE 2
the process of performing the verification test on each SSM value of the transmission synchronization ethernet signal configured in the first configuration information is the same, and the process of performing the verification test using any SSM value of the transmission synchronization ethernet signal is given below, which is specifically shown in fig. 2.
Referring to fig. 2, fig. 2 is a schematic diagram of a test flow of verifying an SSM response rule in the first step in the embodiment of the present application. The method comprises the following specific steps:
step 201, the test device sends a synchronous ethernet signal through the first port, and carries the SSM value of the synchronous ethernet signal.
Step 202, when the tested device receives the synchronous ethernet signal sent by the testing device through the fourth port, the tested device sends a responsive synchronous ethernet signal to the testing device through the fourth port and the fifth port according to the configured SSM response rule, and sends a responsive framed 2Mb/s external timing signal to the testing device through the sixth port.
step 203, when the test device receives the synchronous ethernet signal sent by the device under test through the first port, determining whether the carried SSM value is the same as the SSM value received by the configured first port; when receiving a synchronous Ethernet signal sent by the tested equipment through the second port, determining whether the carried SSM value is the same as the SSM value received by the configured second port; and when receiving the framed 2Mb/s external timing signal sent by the tested device through the third port, determining whether the carried SSM value is the same as the SSM value received by the configured third port, and recording the comparison result.
And 204, when the test equipment determines that any one of the comparison results of the records is different, determining that the SSM response rule of the tested equipment is wrong, and displaying the SSM value corresponding to the record with the different comparison result.
for the second step of testing: and only setting a framing 2Mb/s external timing signal as a synchronous reference source of the tested device, and checking SSM byte forwarding information of other synchronous ports.
referring to fig. 3, fig. 3 is a test diagram illustrating a second step of verifying SSM response rules in the embodiment of the present application. The test equipment in fig. 3 has 1 synchronous ethernet port (eighth port), and one framed 2Mb/s external timer input port (ninth port), and one framed 2Mb/s external timer output port. The device under test has a synchronous Ethernet port (eleventh port), as well as a framed 2Mb/s external timer output port (twelfth port) and a framed 2Mb/s external timer input port (tenth port).
The synchronous Ethernet ports mentioned here are all logical ports, actually physical ports in transceiving pairs.
Before testing, second configuration information needs to be configured, which specifically includes: sending an SSM value of a framing 2Mb/s external timing signal, an SSM value received by an eighth port and an SSM value received by a ninth port; the SSM value received by the eighth port and the SSM value received by the ninth port are expected values, that is, the SSM value that should be responded when the SSM response rule on the device under test is correct.
Referring to table 3, table 3 is related to the configuration of the second configuration information in the embodiment of the present application. The SSM value corresponding to the 1 st column is an SSM value sent by a framing 2Mb/s external timing signal port of the test equipment; the SSM value in column 2 is the SSM value received by the expected eighth port (the SSM value expected to be sent by the corresponding return synchronous ethernet signal), and the SSM value in column 3 is the SSM value received by the expected ninth port (the SSM value expected to be output by the device under test framed by 2Mb/s out of timing port).
TABLE 3
As shown in table 3, when the SSM value of the out-of-frame 2Mb/s timing signal is 2, the SSM value received by the eighth port is 2, and the SSM value received by the ninth port is 2;
when the SSM value of the external timing signal which is sent into the frame 2Mb/s is 4, the SSM value received by the eighth port is 4, and the SSM value received by the ninth port is 4;
when the SSM value of the external timing signal which is sent into the frame 2Mb/s is 8, the SSM value received by the eighth port is 8, and the SSM value received by the ninth port is 8;
when the SSM value of the external timing signal sent into the frame 2Mb/s is B, the SSM value received by the eighth port is B, and the SSM value received by the ninth port is B;
When the SSM value of the external timing signal sent into the frame 2Mb/s is F, the SSM value received by the eighth port is B, and the SSM value received by the ninth port is B;
when the SSM value of the transmitted framed 2Mb/s external timing signal is 1, 3, 5, 6, 7, 9, A, C, D, or E, the SSM value received by the eighth port is B and the SSM value received by the ninth port is B.
the process of performing the verification test on the SSM value of each framed 2Mb/s external timing signal configured in the second configuration information is the same, and the process of performing the verification test using any SSM value of the framed 2Mb/s external timing signal is given below, and is specifically shown in fig. 4.
referring to fig. 4, fig. 4 is a schematic diagram of a test flow of verifying the SSM response rule in the second step in the embodiment of the present application. The method comprises the following specific steps:
step 401, the test equipment sends the framed 2Mb/s external timing signal through the seventh port, and carries the SSM value of the sent framed 2Mb/s external timing signal.
Step 402, when the tested device receives the framed 2Mb/s external timing signal sent by the testing device through the tenth port, the tested device sends a synchronous Ethernet signal to the testing device through the eleventh port according to the configured SSM response rule; and sends the responsive framed 2Mb/s external timing signal to the test equipment via the twelfth port.
Step 403, when the test device receives the synchronous ethernet signal sent by the device under test through the eighth port, determining whether the carried SSM value is the same as the SSM value received by the configured eighth port; when a framing 2Mb/s external timing signal sent by the tested device is received through the ninth port, whether the carried SSM value is the same as the SSM value received by the configured ninth port is determined; and the comparison is recorded.
step 404, when the test equipment determines that any one of the comparison results of the records is different, determining that the SSM response rule of the tested equipment is wrong, and displaying the SSM value corresponding to the record with the different comparison result.
for the second step of test, the eighth port of the test equipment may use one of the first port and the second port in the first step of test, and the ninth port may use the third port in the first step of test; the eleventh port of the device under test may use one of the fourth port and the fifth port in the first step test, and the twelfth port may use the sixth port in the first step test.
for the third step of testing: the framing of the 2Mb/s external timing signal and the synchronous Ethernet signal are set as synchronous reference sources of the device under test, and the expected selected input reference is checked.
Referring to fig. 5, fig. 5 is a schematic diagram of a test for verifying SSM response rules in the third step in the embodiment of the present application. The test equipment in fig. 5 has 1 synchronous ethernet port (thirteenth port) and one framed 2Mb/s external timing outlet (fourteenth port). The device under test is provided with a synchronous ethernet port (sixteenth port) and a framed 2Mb/s external timing input port (fifteenth port).
the synchronous Ethernet ports mentioned here are all logical ports, actually physical ports in transceiving pairs.
Before testing, the third configuration information needs to be configured on the testing device, which specifically includes: sending the SSM value of the framing 2Mb/s external timing signal, sending the SSM value of the synchronous signal and the SSM value received by the thirteenth port; the SSM value received by the thirteenth port is an expected value, that is, the SSM value that should be responded when the SSM response rule on the device under test is correct.
setting a high priority corresponding to the SSM value received through the fifteenth port on the tested device; the SSM value received through the sixteenth port corresponds to a low priority.
referring to table 4, table 4 is related to the third configuration information in the embodiment of the present application. The SSM value corresponding to the 1 st column is the SSM value of the external timing signal of the frame 2 Mb/s; column 2 corresponds to the SSM value of the transmitted synchronous ethernet signal, column 3 corresponds to the SSM value received at the thirteenth port, and column 4 corresponds to the comment item in column 3.
as shown in table 4, when the SSM value of the out-of-frame 2Mb/s timing signal is 2, the priority is high, the SSM value of the synchronous ethernet signal is 2, and the priority is low, the SSM value received by the thirteenth port is 2;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is 4, the priority is high, the SSM value of the synchronous Ethernet signal is 2, and the priority is low, the SSM value received by the thirteenth port is F;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is 4, the priority is high, the SSM value of the synchronous Ethernet signal is 4, and the priority is low, the SSM value received by the thirteenth port is 4;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is 8, the priority is high, the SSM value of the synchronous Ethernet signal is 4, and the priority is low, the SSM value received by the thirteenth port is F;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is 8, the priority is high, the SSM value of the synchronous Ethernet signal is 8, and the priority is low, the SSM value received by the thirteenth port is 8;
When the SSM value of the external timing signal of 2Mb/s is B, the priority is high, the SSM value of the synchronous Ethernet signal is 8, and the priority is low, the SSM value received by the thirteenth port is F;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is B, the priority is high, the SSM value of the synchronous Ethernet signal is B, and the priority is low, the SSM value received by the thirteenth port is B;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is F, the priority is high, the SSM value of the synchronous Ethernet signal is B, and the priority is low, the SSM value received by the thirteenth port is F;
And when the SSM value of the external timing signal with the framing 2Mb/s is F, the priority is high, the SSM value of the synchronous Ethernet signal is F, and the priority is low, the SSM value received by the thirteenth port is B.
TABLE 4
The procedure of performing the verification test on the SSM value of each framed 2Mb/s external timing signal configured in the third configuration information and the SSM value of the corresponding synchronization signal is the same, and the following provides a procedure of performing the verification test using any SSM value of the framed 2Mb/s external timing signal and the SSM value of the corresponding synchronization signal, which is specifically shown in fig. 6.
referring to fig. 6, fig. 6 is a schematic diagram of a test flow of verifying an SSM response rule in the third step in the embodiment of the present application. The method comprises the following specific steps:
601, the test equipment sends a synchronous ethernet signal through a thirteenth port and carries an SSM value of the sent synchronous ethernet signal; and sending the framed 2Mb/s external timing signal through a fourteenth port and carrying the SSM value of the framed 2Mb/s external timing signal.
step 602, the tested device receives the framed 2Mb/s external timing signal sent by the testing device through the fifteenth port, and sends a synchronous ethernet signal of response to the testing device through the sixteenth port according to the configured SSM response rule when receiving the synchronous ethernet signal sent by the testing device through the sixteenth port.
step 603, when the test device receives the synchronous ethernet signal sent by the device under test through the thirteenth port, it determines whether the carried SSM value is the same as the SSM value received by the thirteenth port, and records the comparison result.
And step 604, when the test equipment determines that any one of the comparison results of the records is different, determining that the SSM response rule of the tested equipment is wrong, and displaying the SSM value corresponding to the record with the different comparison result.
for the third step of test, the thirteenth port may use any one of the first port and the second port in the first step of test; the sixteenth port may use any one of the fourth port and the fifth port in the first step test.
It can be seen that in the specific implementation of the present application, the test can be completed by having two synchronous ethernet ports and two framing 2Mb/s external timing ports for both the test device and the device under test.
In the embodiment of the present application, tests for the first step, the second step, and the third step may be performed in parallel according to an actual test environment, or may be performed sequentially, but when performing, the execution order of the first step, the second step, and the third step is not limited.
When the first configuration information, the second configuration information and the third configuration information are subjected to verification testing, and when the testing equipment determines that the recorded comparison results are the same, the SSM response rule of the tested equipment is determined to be correct. In the tests of the first step, the second step and the third step, each test result is the same as the expected value configured in the corresponding table 2, table 3 and table 4, which indicates that the SSM response rule of the tested device is correct; otherwise, determining that the SSM response rule of the tested device is wrong, and displaying the SSM value corresponding to the record with different comparison results.
And when the test equipment determines that any recorded comparison result is different, determining that the clock source preference sequence of the tested equipment is wrong when the verification test is carried out on the third configuration information. I.e. when it is determined that the SSM response rule is incorrect due to the third configuration information test, the clock source is preferably also incorrect.
When the method and the device are specifically implemented, a testing environment is manually set up, a corresponding testing program is selected on the testing equipment and runs, and the testing equipment is waited to give a testing result. Test cases were switched until all three test cases were run. The test efficiency is improved and human errors are reduced through an automatic test program; the result is automatically read, so that the test is simpler, and the method is particularly suitable for centralized comparative tests with tight time, more test equipment and unified test standards.
In summary, the present application automatically verifies whether the SSM response rule is correct by building a test environment for all possibly involved rule requirements, configuring a test input value and an expected output value, and comparing whether the actual test value is the same as the expected output value. The scheme can realize a standard test flow, improve the test efficiency and reduce human errors.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (9)
1. a test method for verifying SSM response rules of synchronization status messages is characterized in that the method comprises the following steps:
Configuring first configuration information: sending an SSM value of the synchronous Ethernet signal, an SSM value received by the first port, an SSM value received by the second port and an SSM value received by the third port;
The performing the verification test for the SSM value of each of the transmission synchronous ethernet signals configured in the first configuration information includes:
the test equipment sends a synchronous Ethernet signal through a first port and carries an SSM value for sending the synchronous Ethernet signal;
When the tested device receives the synchronous Ethernet signal sent by the testing device through the fourth port, the tested device sends a response synchronous Ethernet signal to the testing device through the fourth port and the fifth port according to the configured SSM response rule, and sends a response framing 2Mb/s external timing signal to the testing device through the sixth port;
When the test equipment receives a synchronous Ethernet signal sent by the tested equipment through the first port, determining whether the carried SSM value is the same as the SSM value received by the configured first port; when receiving a synchronous Ethernet signal sent by the tested equipment through the second port, determining whether the carried SSM value is the same as the SSM value received by the configured second port; when a framing 2Mb/s external timing signal sent by the tested equipment is received through the third port, whether the carried SSM value is the same as the SSM value received by the configured third port is determined; and recording the comparison result;
And when the test equipment determines that any one of the comparison results of the records is different, determining that the SSM response rule of the tested equipment is wrong, and displaying the SSM value corresponding to the record with different comparison results.
2. The method of claim 1,
for the first configuration information, when the SSM value of the synchronous ethernet signal is 2, the SSM value received by the first port is F, the SSM value received by the second port is 2, and the SSM value received by the third port is 2;
When the SSM value of the transmitted synchronous ethernet signal is 4, the SSM value received by the first port is F, the SSM value received by the second port is 4, and the SSM value received by the third port is 4;
when the SSM value of the transmitted synchronous ethernet signal is 8, the SSM value received by the first port is F, the SSM value received by the second port is 8, and the SSM value received by the third port is 8;
when the SSM value of the sending synchronous Ethernet signal is B, the SSM value received by the first port is F, the SSM value received by the second port is B, and the SSM value received by the third port is B;
When the SSM value of the sending synchronous Ethernet signal is F, the SSM value received by the first port is B, the SSM value received by the second port is B, and the SSM value received by the third port is B;
when the SSM value of the transmitted synchronous ethernet signal is 1, 3, 5, 6, 7, 9, A, C, D or E, the SSM value received by the first port is B, the SSM value received by the second port is B, and the SSM value received by the third port is B.
3. The method of claim 1, further comprising:
Configuring second configuration information: sending an SSM value of a framing 2Mb/s external timing signal, an SSM value received by an eighth port and an SSM value received by a ninth port;
the performing verification tests on each SSM value configured in the second configuration information and used for sending the framing 2Mb/s external timing signal comprises the following steps:
The test equipment sends a framing 2Mb/s external timing signal through the seventh port and carries an SSM value of the framing 2Mb/s external timing signal;
When the tested device receives a framed 2Mb/s external timing signal sent by the testing device through the tenth port, sending a responsive synchronous Ethernet signal to the testing device through the eleventh port according to the configured SSM response rule; sending the corresponding framed 2Mb/s external timing signal to the test equipment through the twelfth port;
When the testing equipment receives the synchronous Ethernet signal sent by the tested equipment through the eighth port, determining whether the carried SSM value is the same as the SSM value received by the configured eighth port; when a framing 2Mb/s external timing signal sent by the tested device is received through the ninth port, whether the carried SSM value is the same as the SSM value received by the configured ninth port is determined; and recording the comparison result;
And when the test equipment determines that any one of the comparison results of the records is different, determining that the SSM response rule of the tested equipment is wrong, and displaying the SSM value corresponding to the record with different comparison results.
4. the method of claim 3,
for configuring the second configuration information, when the SSM value of the external timing signal sent into the frame 2Mb/s is 2, the SSM value received by the eighth port is 2, and the SSM value received by the ninth port is 2;
when the SSM value of the external timing signal which is sent into the frame 2Mb/s is 4, the SSM value received by the eighth port is 4, and the SSM value received by the ninth port is 4;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is 8, the SSM value received by the eighth port is 8, and the SSM value received by the ninth port is 8;
When the SSM value of the external timing signal sent into the frame 2Mb/s is B, the SSM value received by the eighth port is B, and the SSM value received by the ninth port is B;
When the SSM value of the external timing signal sent into the frame 2Mb/s is F, the SSM value received by the eighth port is B, and the SSM value received by the ninth port is B;
when the SSM value of the transmitted framed 2Mb/s external timing signal is 1, 3, 5, 6, 7, 9, A, C, D, or E, the SSM value received by the eighth port is B and the SSM value received by the ninth port is B.
5. The method of claim 3, further comprising:
The test equipment configures third configuration information: sending an SSM value of a framing 2Mb/s external timing signal, sending an SSM value of a synchronous Ethernet signal and receiving an SSM value by a thirteenth port;
the tested device sets the SSM value received through the fifteenth port to correspond to the high priority; the SSM value received by the sixteenth port corresponds to a low priority;
The performing verification tests on each SSM value of the sending synchronous Ethernet signals configured in the third configuration information and the corresponding SSM value of the sending framing 2Mb/s external timing signal comprises:
the test equipment sends the synchronous Ethernet signal through the thirteenth port and carries the SSM value of the sent synchronous Ethernet signal; sending a framed 2Mb/s external timing signal through a fourteenth port, and carrying an SSM value of the framed 2Mb/s external timing signal;
the tested device receives the framed 2Mb/s external timing signal sent by the testing device through the fifteenth port, and sends a response synchronous Ethernet signal to the testing device through the sixteenth port according to the configured SSM response rule when receiving the synchronous Ethernet signal sent by the testing device through the sixteenth port;
when the testing equipment receives the synchronous Ethernet signal sent by the tested equipment through the thirteenth port, determining whether the carried SSM value is the same as the SSM value received by the configured thirteenth port; and recording the comparison result;
and when the test equipment determines that any one of the comparison results of the records is different, determining that the SSM response rule of the tested equipment is wrong, and displaying the SSM value corresponding to the record with different comparison results.
6. The method of claim 5,
for the configured third configuration information, when the SSM value of the external timing signal sent into the frame 2Mb/s is 2, the priority is high, the SSM value of the synchronous ethernet signal sent into the frame is 2, and the priority is low, the SSM value received by the thirteenth port is 2;
when the SSM value of the external timing signal which is sent into the frame 2Mb/s is 4, the priority is high, the SSM value of the synchronous Ethernet signal is 2, and the priority is low, the SSM value received by the thirteenth port is F;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is 4, the priority is high, the SSM value of the synchronous Ethernet signal is 4, and the priority is low, the SSM value received by the thirteenth port is 4;
when the SSM value of the external timing signal which is sent into the frame 2Mb/s is 8, the priority is high, the SSM value of the synchronous Ethernet signal is 4, and the priority is low, the SSM value received by the thirteenth port is F;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is 8, the priority is high, the SSM value of the synchronous Ethernet signal is 8, and the priority is low, the SSM value received by the thirteenth port is 8;
When the SSM value of the external timing signal of 2Mb/s is B, the priority is high, the SSM value of the synchronous Ethernet signal is 8, and the priority is low, the SSM value received by the thirteenth port is F;
When the SSM value of the external timing signal which is sent into the frame 2Mb/s is B, the priority is high, the SSM value of the synchronous Ethernet signal is B, and the priority is low, the SSM value received by the thirteenth port is B;
when the SSM value of the external timing signal which is sent into the frame 2Mb/s is F, the priority is high, the SSM value of the synchronous Ethernet signal is B, and the priority is low, the SSM value received by the thirteenth port is F;
and when the SSM value of the external timing signal with the framing 2Mb/s is F, the priority is high, the SSM value of the synchronous Ethernet signal is F, and the priority is low, the SSM value received by the thirteenth port is B.
7. The method of claim 5, further comprising:
when the verification test is performed on the first configuration information, the second configuration information and the third configuration information, and when the test equipment determines that the recorded comparison results are the same, it is determined that the SSM response rule of the tested equipment is correct.
8. The method of claim 7, further comprising:
And when the test equipment determines that any recorded comparison result is different, determining that the clock source preference sequence of the tested equipment is wrong when the verification test is carried out on the third configuration information.
9. the method according to any one of claims 1 to 8,
the test equipment has a rubidium clock built-in, or can track an external reference clock.
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112256512A (en) * | 2020-10-27 | 2021-01-22 | 重庆航天工业有限公司 | General verification and test system based on GLINK bus |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101150454A (en) * | 2007-07-31 | 2008-03-26 | 中兴通讯股份有限公司 | Testing method for automatic switching optical network |
CN101998617A (en) * | 2009-08-25 | 2011-03-30 | 华为技术有限公司 | Method for sending clock synchronous status information and clock synchronous domain management node |
CN102170584A (en) * | 2011-03-14 | 2011-08-31 | 华为技术有限公司 | Method, device and system for playing media between synchronic HS (HTTP (HyperText Transfer Protocol) Streaming) terminal equipment |
CN102185734A (en) * | 2011-04-18 | 2011-09-14 | 华为软件技术有限公司 | Automatic interface testing method and server |
US8868725B2 (en) * | 2009-06-12 | 2014-10-21 | Kent State University | Apparatus and methods for real-time multimedia network traffic management and control in wireless networks |
CN106330591A (en) * | 2015-06-30 | 2017-01-11 | 中国移动通信集团公司 | OAM test method and device for communication system |
-
2018
- 2018-06-06 CN CN201810583768.4A patent/CN110572295B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101150454A (en) * | 2007-07-31 | 2008-03-26 | 中兴通讯股份有限公司 | Testing method for automatic switching optical network |
US8868725B2 (en) * | 2009-06-12 | 2014-10-21 | Kent State University | Apparatus and methods for real-time multimedia network traffic management and control in wireless networks |
CN101998617A (en) * | 2009-08-25 | 2011-03-30 | 华为技术有限公司 | Method for sending clock synchronous status information and clock synchronous domain management node |
CN102170584A (en) * | 2011-03-14 | 2011-08-31 | 华为技术有限公司 | Method, device and system for playing media between synchronic HS (HTTP (HyperText Transfer Protocol) Streaming) terminal equipment |
CN102185734A (en) * | 2011-04-18 | 2011-09-14 | 华为软件技术有限公司 | Automatic interface testing method and server |
CN106330591A (en) * | 2015-06-30 | 2017-01-11 | 中国移动通信集团公司 | OAM test method and device for communication system |
Non-Patent Citations (3)
Title |
---|
LIANHONG ZHOU,: ""Synchronization Issues in SDH Networks"", 《2000 INTERNATIONAL CONFERENCE ON COMMUNICATION TECHNOLOGY》 * |
吕博,: ""分组网络同步技术的标准化进展"", 《电信网技术》 * |
王珏琼,: ""基于传送网的时间同步方案研究"", 《中国优秀硕士学位论文全文数据库-信息科技辑》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112256512A (en) * | 2020-10-27 | 2021-01-22 | 重庆航天工业有限公司 | General verification and test system based on GLINK bus |
CN112256512B (en) * | 2020-10-27 | 2024-05-07 | 重庆航天工业有限公司 | GLINK bus-based verification and test universal system |
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