CN105933086B - The method and apparatus that precision clock agreement is realized in media access control module - Google Patents
The method and apparatus that precision clock agreement is realized in media access control module Download PDFInfo
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- CN105933086B CN105933086B CN201610510846.9A CN201610510846A CN105933086B CN 105933086 B CN105933086 B CN 105933086B CN 201610510846 A CN201610510846 A CN 201610510846A CN 105933086 B CN105933086 B CN 105933086B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9084—Reactions to storage capacity overflow
- H04L49/9089—Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
- H04L49/9094—Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
- H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/15—Interconnection of switching modules
- H04L49/1515—Non-blocking multistage, e.g. Clos
- H04L49/1546—Non-blocking multistage, e.g. Clos using pipelined operation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0095—Arrangements for synchronising receiver with transmitter with mechanical means
Abstract
The present invention provides a kind of method and apparatus that precision clock agreement is realized in media access control module.Described device includes：Media access control module and time stamp control module.The media access control module includes interface conversion submodule, GMII control submodule, speed adjust submodule and the physics encoding and decoding submodule being sequentially connected between each other.Wherein, the time stamp control module is arranged between the speed adjust submodule and the physics encoding and decoding submodule, the time stamp control module is used to handle the timestamp in the media access control module, to realize precision clock agreement in the media access control module.Said apparatus can improve the timestamp precision of precision clock agreement.
Description
Technical field
The invention belongs to chip design field, and in particular to one kind is in exchanger chip design in media access control
The method and apparatus that precision clock agreement is realized in (Gigabit Media Access Control, abbreviation GMAC) module.
Background technology
At present, distributed system is widely used in network, and distributed system, generally requires a global clock,
Come the sequencing that each event occurs in determination system, and the information transmitted between coordination event.This requires each in system
Individual part has a unified clock, and can between all parts passing time information.How to be provided on network can
The Time Service leaned on has become an important research topic.
Precision clock agreement (Precision Time Protocol, abbreviation PTP) is a kind of standard ethernet terminal to be set
The standby agreement for carrying out time and Frequency Synchronization, the also referred to as agreements of IEEE 1588.PTP protocol can not change existing network knot
On the premise of structure, using the frame transmission time information of Ethernet, and the precision of time can be ensured.Because PTP protocol is realized
Simply, the advantages that network of occupancy and computing resource are lacked makes it be widely used in distributed system.
PTP protocol can use software to realize.But when realizing PTP protocol using software, due to the uneven stability of network, hand over
The influence changed planes to the caching of packet and the scheduling of operating system process so that network can not provide the very high-precision time
Service, the time precision that usual software is realized are merely able to reach Millisecond (ms).Obviously such time precision is to meet
The requirement of some high standards in exchanger chip design.How to improve above-mentioned time precision is to those skilled in the art
It is badly in need of technical problems to be solved.
The content of the invention
In view of this, the purpose of the embodiment of the present invention can realize PTP in offer one kind in media access control module
The method and apparatus of agreement, to solve to realize that PTP protocol time precision is not high in media access control module in the prior art
Technical problem.
For the device for realizing PTP protocol, the embodiment of the present invention provides one kind and realized in media access control module
The device of precision clock agreement.Described device includes：Media access control module and time stamp control module, the media interviews control
Molding block includes interface conversion submodule, GMII control submodule, speed adjust being sequentially connected between each other
Module and physics encoding and decoding submodule.Wherein, the time stamp control module is arranged at the speed adjust submodule and the thing
Between managing encoding and decoding submodule, the time stamp control module is used for the timestamp in the media access control module
Reason, to realize precision clock agreement in the media access control module.
Further, the time stamp control module in described device includes：Sending submodule and receiving submodule.It is described
Sending submodule includes multi-stage pipeline processing unit, information latch units, replaces control unit, counter, time stamp adjustment list
Member, register and CRC unit.Wherein, described information latch units latch to the processing information of input frame
It is standby.The replacement control unit is connected with described information latch units, multi-stage pipeline processing unit and timer.When described
The real-time time of the side input input system of adjustment unit is stabbed, opposite side input is connected with the register, when described
The output end of stamp adjustment unit is connected with the multi-stage pipeline processing unit.The CRC unit with it is described more
Level production line processing unit is connected to that new content frame recalculate the value of CRC.It is described to receive son
Module includes time stamp capturing unit, and the time stamp capturing unit is used for when receiving a frame and starting, current under capture to be
Unite the time.
Further, the time stamp control module in described device passes through GMII and speed adjust
Module and physics encoding and decoding submodule are connected.The GMII includes being used for data wire, the transmission for sending useful signal
The data wire of data-signal and the data wire for sending error signal, the multi-stage pipeline processing unit independently connect to the media
The data of mouth input export after being handled.
Further, the multi-stage pipeline processing unit in described device is 5 level production line processing units.
Further, register described in described device is stored with the calibration signal for carrying out timestamp calibration.It is described
Calibration signal includes flag bit and needs the time value calibrated, and the time stamp adjustment unit is according to the flag bit to described
Timestamp carries out the adjustment of corresponding time value.
For the method for realizing PTP protocol, the embodiment of the present invention provides one kind and realized in media access control module
The method of precision clock agreement, the media access control module include be sequentially connected between each other interface conversion submodule,
GMII control submodule, speed adjust submodule and physics encoding and decoding submodule, methods described include：Using time stamp
Control module is handled to realize precision clock agreement the timestamp of the media access control module, wherein the time stamp
Control module is arranged between the speed adjust submodule and the physics encoding and decoding submodule.
Further, the time stamp control module in methods described includes：Sending submodule and receiving submodule.It is described
Sending submodule includes multi-stage pipeline processing unit, information latch units, replaces control unit, counter, time stamp adjustment list
Member, register and CRC unit.Wherein, described information latch units latch to the processing information of input frame
It is standby.The replacement control unit is connected with described information latch units, multi-stage pipeline processing unit and timer.When described
The real-time time of the side input input system of adjustment unit is stabbed, opposite side input is connected with the register, when described
The output end of stamp adjustment unit is connected with the multi-stage pipeline processing unit.The CRC unit with it is described more
Level production line processing unit is connected to that new content frame recalculate the value of CRC.It is described to receive son
Module includes time stamp capturing unit, and the time stamp capturing unit is used for when receiving a frame and starting, current under capture to be
Unite the time.
Further, the multi-stage pipeline processing unit in methods described is 5 level production line processing units.
Further, the register in methods described is stored with the calibration signal for carrying out timestamp calibration.Institute
Stating calibration signal includes flag bit and needs the time value calibrated, and the time stamp adjustment unit is according to the flag bit to institute
State the adjustment that timestamp carries out corresponding time value.
Relative to prior art, the method provided by the invention that precision clock agreement is realized in media access control module
And device, the place for beating timestamp is arranged in the Gmac modules after caching all in exchanger chip, relative to adopting
The mode realized with software can greatly improve time precision.
To enable the above objects, features and advantages of the present invention to become apparent, preferred embodiment cited below particularly, and coordinate
Appended accompanying drawing, is described in detail below.
Brief description of the drawings
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below by embodiment it is required use it is attached
Figure is briefly described, it will be appreciated that the following drawings illustrate only certain embodiments of the present invention, therefore be not construed as pair
Restriction, for those of ordinary skill in the art, on the premise of not paying creative work, can also be attached according to these
Figure obtains other related accompanying drawings.
Fig. 1 is the designed holder composition of media access control module provided in an embodiment of the present invention.
Fig. 2 is setting for the device provided in an embodiment of the present invention that precision clock agreement is realized in media access control module
Count Organization Chart.
Fig. 3 is the ethernet frame format for encapsulating PTP messages.
Fig. 4 is the designed holder composition of time stamp control module provided in an embodiment of the present invention.
Main element symbol description
| Realize the device of precision clock agreement | 10 |
| Media access control module | 100 |
| Interface conversion submodule | 110 |
| GMII control submodule | 120 |
| Speed adjust submodule | 130 |
| Physics encoding and decoding submodule | 140 |
| Time stamp control module | 200 |
| Sending submodule | 210 |
| Multi-stage pipeline processing unit | 211 |
| Information latch units | 212 |
| Replace control unit | 213 |
| Counter | 214 |
| CRC unit | 215 |
| Time stamp adjustment unit | 216 |
| Register | 217 |
| Receiving submodule | 220 |
| Time stamp capturing unit | 221 |
Embodiment
Below in conjunction with accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Ground describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.Generally exist
The component of the embodiment of the present invention described and illustrated in accompanying drawing can be configured to arrange and design with a variety of herein.Cause
This, the detailed description of the embodiments of the invention to providing in the accompanying drawings is not intended to limit claimed invention below
, but it is merely representative of the selected embodiment of the present invention.Based on embodiments of the invention, those skilled in the art are not making
The every other embodiment obtained on the premise of creative work, belongs to the scope of protection of the invention.
Fig. 1 is refer to, Fig. 1 is the designed holder composition of media access control module 100 provided in an embodiment of the present invention.It is described
Media access control module 100 includes：Interface conversion submodule 110, GMII control submodule 120, speed adjust
Submodule 130 and physics encoding and decoding submodule 140.The interface conversion submodule 110, GMII control submodule
120th, speed adjust submodule 130 and physics encoding and decoding submodule 140 are electrically connected with successively.The interface conversion submodule 110
Major function be into line interface bit width conversion, and by asynchronous input into/output from cache (First Input First output,
Abbreviation FIFO) carry out cross clock domain processing.The GMII control submodule 120 is used to network message being packaged into
Frame format as defined in IEEE802.3 agreements and network message is solved from frame format.The speed adjust submodule 130 is used to make
Adjustment (such as 10M/100M/1000M) between carrying out different rates with asynchronous FIFO.The physics encoding and decoding submodule 140 is used
In progress physics encoding and decoding.
Understood according to being described above, the interface conversion submodule 110 is with speed adjust submodule 130 containing asynchronous defeated
Enter output caching.Therefore in order to ensure the precision of timestamp, the time-write interval operation of stamp is placed on the speed adjust submodule
After 130.Specifically, refer to Fig. 2, for realize the device 10 of precision clock agreement include media access control module 100 and
Time stamp control module 200, specifically, time stamp control module 200 are arranged at the speed adjust submodule of media access control module 100
Between block 130 and physics encoding and decoding submodule 140, the time stamp control module 200 is used to carry out timestamp processing.
In this embodiment, timestamp (TimeStamp) domain is the time stab information of 80 bits.In order that PTP messages can be
Transmitted in Ethernet, it must be encapsulated in the frame format of Ethernet, refer to Fig. 3.During in order to stamping real-time in PTP frames
Between stamp, it is necessary to which it is to be understood that position of the TimeStamp domains in frame, this work parse in packet processing engine.
Fig. 4 is refer to, Fig. 4 is the specific design functional block diagram of the time stamp control module 200.The time stamp controls mould
Block 200 includes：Sending submodule 210 and receiving submodule 220.
The sending submodule 210 includes：Multi-stage pipeline processing unit 211, information latch units 212, replace control
Unit 213, counter 214, CRC unit 215, time stamp adjustment unit 216 and register 217.Wherein, it is described
Information latch units 212 to the processing information of input frame latch standby.The replacement control unit 213 is locked with described information
Memory cell 212, multi-stage pipeline processing unit 211 and counter 214 connect.The side input of the time stamp adjustment unit 216
The real-time time of input system is held, the opposite side input of the time stamp adjustment unit 216 is connected with the register 217, institute
The output end for stating time stamp adjustment unit 216 is connected with the multi-stage pipeline processing unit 211.The CRC list
Member 215 with the multi-stage pipeline processing unit 211 is connected to that new content frame is carried out to recalculate Cyclic Redundancy Code school
The value tested.
The receiving submodule 220 includes time stamp capturing unit 221, for when receiving a frame and starting, capture to be worked as
Preceding system time.And the system time is used to packet processing engine block below.
In the present embodiment, the time stamp control module 200 can be saved using multi-stage pipeline (Pipeline) design
Data processing time with meet the time-write interval stamp and the value of CRC of reruning required for time.In the present embodiment
In, the multi-stage pipeline processing unit can be 5 level production line processing units, using 5 level production lines to frame data at
Reason.
The time stamp control module 200 is compiled by GMII and the speed adjust submodule 130 and physics and solved
Numeral module 140 is connected, and the GMII includes being used for data wire, the transmission data letter for sending useful signal (txEn)
Number (txd [7:0] data wire and the data wire of transmission error signal (txEr), the multi-stage pipeline processing unit 211) is right
The data of the GMII input export after being handled.
Described information latch units 212 are to the processing information of the input frame of input, such as msg [7:0] ({ tsEn, offset
[6:0] }), carry out latching standby.Wherein, msg [7:0] information needed for compiled frame is included in：TsEn represents that the frame is for 1
PTP messages are, it is necessary to carry out playing timestamp operation；offset[6:0] represent the position in timestamp (TimeStamp) domain in frame
Skew.Start the counter 214 at the beginning of frame, when the value of the counter 214 is equal to offset [6:When 0], and
And tsEn be 1 when, carry out beat timestamp operation, the bit wide of timestamp is 80 bits, therefore the operation for beating timestamp will continue 10
The individual clock cycle.
Real-time clock (the ts [79 of one system of input is needed in the time stamp control module 200:0]) it is used as and beats the time
The fiducial time of stamp.Operation due to beating timestamp is placed on before physics encoding and decoding submodule 140, is not that real network goes out
Mouthful, but the delay of 200 real network egress of time stamp control module is fixed in the design, therefore add one group of calibration letter
Number carry out the calibration of timestamp.The calibration signal is stored in the register 217, and the calibration signal includes flag bit
(tsAddSign) and the time value (tsAddData [15 that is calibrated is needed:0]), make the time stamp adjustment unit 216 can root
The adjustment of corresponding time value is carried out to the timestamp according to the flag bit.Specifically, when tsAddSign be 1 when, to it is described when
Between stamp increase tsAddData [15:0] time value；When tsAddSign is 0, tsAddData is reduced to the timestamp
[15:0] time value.
The CRC unit 215 is after the printing that the deadline stabs, according to the interior unit weight of new frame
It is new to calculate the value of CRC (Cyclic Redundancy Check, abbreviation CRC), and it is written into the verification domain of frame
(in Frame Check Sequence, abbreviation FCS).
The major function of the sending submodule 210 of time stamp control module 200 is exactly the value according to offset, passes through counter
214 find the position for needing to beat timestamp, and the timestamp of 80 bits is got to the position specified.Change due to playing timestamp operation
The content of original frame is become, it is therefore desirable to recalculate CRC value.
The major function of the receiving submodule 220 of time stamp control module 200 is at the beginning of the frame received, records frame
In the time of Web portal, used to packet processing engine module below.
At the same time, the present embodiment also provides a kind of method that precision clock agreement is realized using arrangement described above.
Methods described is the speed adjust submodule 130 and physics encoding and decoding submodule in media access control module 100
Between 140, a time stamp control module 200 is added to carry out the processing of the timestamp of PTP protocol.
Specifically, the input of media access control module 100 is gmii interface signal (txEn, txd [7:0], txEr), will
The frame of input is handled into multi-stage pipeline, and output interface is similarly gmii interface (txEnTs, txdTs [7:0],
TxErTs, wherein the multi-stage pipeline is 5 grades of stream treatments.
By the processing information msg [7 of input frame:0] carry out latching standby, msg [7 at the beginning of frame:0] two are included in
Individual information：TsEn and offset [6:0].TsEn represents that the frame is that PTP messages operate, it is necessary to carry out dozen timestamp for 1；offset
[6:0] skew of the position in TimeStamp domains in frame is represented.
Start a counter 214 at the beginning of frame, when the value of counter 214 is equal to offset [6:When 0], and
When tsEn is 1, carry out playing timestamp operation, the bit wide of timestamp is 80 bits, therefore the operation for beating timestamp will continue 10
Clock cycle.
ts[79:0] be system real-time time, the operation due to beating timestamp be placed on physics encoding and decoding submodule 140 it
Before, it is not real network egress, but the delay of time stamp control module 200 to real network egress is fixed in the design
, therefore add one group of signal (tsAddSign and tsAddData [15:0]) calibration of timestamp is carried out, wherein
TsAddSign is flag bit, and 1 represents to add, and 0 represents to subtract；tsAddData[15:0] time value increasedd or decreased for needs.
After completing to play timestamp operation, CRC value is recalculated according to the content of new frame, and write the FCS domains of frame.
At the beginning of the reception of time stamp control module 200 direction receives a frame, current system time is recorded, to below
Packet processing engine module use.
In summary, the method that precision clock agreement is realized in media access control module 100 that the present embodiment provides
And device.Carry out beating the operation of timestamp on Gmac network interfaces, ensure that the precision of PTP protocol timestamp, while use flowing water
Line designs, and will not introduce the shake of timestamp.There is one section of fixation to real network egress in view of the operation for beating timestamp
Delay, therefore one group of register 217 is added to carry out the calibration of timestamp.The present invention is only carried out at timestamp to PTP messages
Reason, it is without any processing to other messages of network, therefore ensure that the correctness of Gmac module original functions.
The foregoing is only a specific embodiment of the invention, but the protection of the present invention is not limited thereto, any to be familiar with
Those skilled in the art the invention discloses technology in, change or replacement can be readily occurred in, should all be covered in this hair
Within bright protection.Therefore, protection of the invention described should be defined by the protection of claim.
Claims (8)
- A kind of 1. device that precision clock agreement is realized in media access control module, it is characterised in that including：Media interviews Control module and time stamp control module, the media access control module include the interface conversion submodule being sequentially connected between each other Block, GMII control submodule, speed adjust submodule and physics encoding and decoding submodule, wherein, the time stamp control Module is arranged between the speed adjust submodule and the physics encoding and decoding submodule, the time stamp control module be used for pair Timestamp in the media access control module is handled, to realize precision clock in the media access control module Agreement；The time stamp control module includes：Sending submodule and receiving submodule；The sending submodule include multi-stage pipeline processing unit, information latch units, replace control unit, counter, when Adjustment unit, register and CRC unit are stabbed, wherein, processing information of the described information latch units to input frame Carry out latching standby, the replacement control unit and described information latch units, multi-stage pipeline processing unit and timer company Connect, real-time time, the opposite side input of the side input input system of the time stamp adjustment unit connect with the register Connect, the output end of the time stamp adjustment unit is connected with the multi-stage pipeline processing unit, the CRC list First value for being connected to new content frame recalculate CRC with the multi-stage pipeline processing unit；The receiving submodule includes time stamp capturing unit, and the time stamp capturing unit is used for when receiving a frame and starting, Capture current system time.
- 2. device as claimed in claim 1, it is characterised in that the time stamp control module by GMII with it is described Speed adjust submodule and physics encoding and decoding submodule are connected, and the GMII includes being used for the number for sending useful signal According to line, send the data wire of data-signal and send the data wire of error signal, the multi-stage pipeline processing unit is to described The data of GMII input export after being handled.
- 3. the device as described in any one in claim 1~2, it is characterised in that：The multi-stage pipeline processing unit is 5 Level production line processing unit.
- 4. device as claimed in claim 1, it is characterised in that the processing information of the input frame includes：Precision clock agreement Skew of the position in label and timestamp domain in frame.
- 5. device as claimed in claim 1, it is characterised in that the register is stored with the school for carrying out timestamp calibration Calibration signal, the calibration signal include flag bit and need the time value calibrated, and the time stamp adjustment unit is according to Flag bit carries out the adjustment of corresponding time value to the timestamp.
- A kind of 6. method that precision clock agreement is realized in media access control module, it is characterised in that the media interviews Control module include be sequentially connected between each other interface conversion submodule, GMII control submodule, speed adjust Submodule and physics encoding and decoding submodule, methods described include：Time stamp control module is used to handle to realize precision clock agreement the timestamp of the media access control module, Wherein described time stamp control module is arranged between the speed adjust submodule and the physics encoding and decoding submodule；The time stamp control module includes：Sending submodule and receiving submodule；The sending submodule include multi-stage pipeline processing unit, information latch units, replace control unit, counter, when Adjustment unit, register and CRC unit are stabbed, wherein, processing information of the described information latch units to input frame Carry out latching standby, the replacement control unit and described information latch units, multi-stage pipeline processing unit and timer company Connect, the real-time time of the side input input system of the time stamp adjustment unit, opposite side input connects with the register Connect, the output end for stating time stamp adjustment unit is connected with the multi-stage pipeline processing unit, the CRC Unit with the multi-stage pipeline processing unit is connected to that new content frame is carried out to recalculate CRC Value；The receiving submodule includes time stamp capturing unit, and the time stamp capturing unit is used for when receiving a frame and starting, Capture current system time.
- 7. method as claimed in claim 6, it is characterised in that：The multi-stage pipeline processing unit is 5 level production line processing units.
- 8. method as claimed in claim 6, it is characterised in that：The register is stored with the calibration signal for carrying out timestamp calibration, and the calibration signal includes flag bit and needs The time value calibrated, the time stamp adjustment unit carry out the tune of corresponding time value according to the flag bit to the timestamp It is whole.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011082609A1 (en) * | 2010-01-05 | 2011-07-14 | Huawei Technologies Co., Ltd. | Network timing distribution and synchronization using virtual network delays |
| CN102132530A (en) * | 2008-08-22 | 2011-07-20 | 马维尔国际贸易有限公司 | Method and apparatus for integrating precise time protocol and media access control security in network elements |
| CN102299788A (en) * | 2011-09-21 | 2011-12-28 | 烽火通信科技股份有限公司 | Method and device for controlling automatic transmission of IEEE1558 (Institute of Electrical and Electronic Engineers 1558) protocol message |
| CN104012025A (en) * | 2011-11-07 | 2014-08-27 | 维特赛半导体公司 | Physical layer processing of timestamps and MAC security |
-
2016
- 2016-07-01 CN CN201610510846.9A patent/CN105933086B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102132530A (en) * | 2008-08-22 | 2011-07-20 | 马维尔国际贸易有限公司 | Method and apparatus for integrating precise time protocol and media access control security in network elements |
| WO2011082609A1 (en) * | 2010-01-05 | 2011-07-14 | Huawei Technologies Co., Ltd. | Network timing distribution and synchronization using virtual network delays |
| CN102299788A (en) * | 2011-09-21 | 2011-12-28 | 烽火通信科技股份有限公司 | Method and device for controlling automatic transmission of IEEE1558 (Institute of Electrical and Electronic Engineers 1558) protocol message |
| CN104012025A (en) * | 2011-11-07 | 2014-08-27 | 维特赛半导体公司 | Physical layer processing of timestamps and MAC security |
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