CN105933086A - Method and device for realizing precise clock protocol in media access control module - Google Patents
Method and device for realizing precise clock protocol in media access control module Download PDFInfo
- Publication number
- CN105933086A CN105933086A CN201610510846.9A CN201610510846A CN105933086A CN 105933086 A CN105933086 A CN 105933086A CN 201610510846 A CN201610510846 A CN 201610510846A CN 105933086 A CN105933086 A CN 105933086A
- Authority
- CN
- China
- Prior art keywords
- submodule
- control module
- time stamp
- unit
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9084—Reactions to storage capacity overflow
- H04L49/9089—Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
- H04L49/9094—Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
- H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/15—Interconnection of switching modules
- H04L49/1515—Non-blocking multistage, e.g. Clos
- H04L49/1546—Non-blocking multistage, e.g. Clos using pipelined operation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0095—Arrangements for synchronising receiver with transmitter with mechanical means
Abstract
The invention provides a method and device for realizing a precise clock protocol in a media access control module. The device comprises the media access control module and a time stamp control module. The media access control module comprises an interface conversion sub-module, a media stand-alone interface control sub-module, a speed adjustment sub-module and a physical coding/decoding sub-module which are mutually and successively connected. The time stamp control module is arranged between the speed adjustment sub-module and the physical coding/decoding sub-module. The time stamp control module is used for processing time stamps in the media access control module, so that the precise clock protocol is realized in the media access control module. According to the device, the time stamp precision of the precise clock protocol can be improved.
Description
Technical field
The invention belongs to chip design field, be specifically related to a kind of in exchanger chip designs
In media interviews control (Gigabit Media Access Control is called for short GMAC) module in fact
The method and apparatus of existing precision clock agreement.
Background technology
At present, distributed system is widely used in network, and distributed system, often need
Want an overall clock, determine the sequencing that in system, each event occurs, and association
The information of transmission between tune event.This just require all parts in system have one unified time
Clock, and can between all parts passing time information.How to provide on network can
The Time Service leaned on has become as an important research topic.
Precision clock agreement (Precision Time Protocol is called for short PTP) is a kind of right
Standard ethernet terminal unit carries out the agreement of time and Frequency Synchronization, also referred to as IEEE
1588 agreements.PTP protocol can on the premise of not changing existing network infrastructure, utilize with
The frame transmission temporal information netted very much, and ensure that the precision of time.Owing to PTP assists
View realizes simple, and the network taken makes it be widely used in distribution with calculating the advantages such as resource is few
In formula system.
PTP protocol can use software to realize.But when using software to realize PTP protocol, by
In the uneven stability of network, switch is to the caching of packet and the tune of operating system process
The impact of degree so that network is not provided that the most high-precision Time Service, usual software realizes
Time precision be merely able to reach Millisecond (ms).Obvious such time precision is cannot
Meet some high-level requirements in exchanger chip design.How to improve essence of above-mentioned time
Degree is the anxious technical issues that need to address to those skilled in the art.
Summary of the invention
In view of this, the purpose of the embodiment of the present invention is to provide the one can be in media interviews control
The method and apparatus realizing PTP protocol in molding block, to solve to visit at media in prior art
Ask and control module realizes the technical problem that PTP protocol time precision is the highest.
For the device realizing PTP protocol, the embodiment of the present invention provides a kind of and visits at media
Ask the device realizing precision clock agreement in control module.Described device includes: media interviews
Control module and time stamp control module, described media interviews control module includes depending on each other
The interface conversion submodule of secondary connection, GMII control submodule, speed adjusts son
Module and physics encoding and decoding submodule.Wherein, described time stamp control module is arranged at described speed
Rate adjusts between submodule and described physics encoding and decoding submodule, and described time stamp control module is used
In the timestamp in described media interviews control module is processed, to visit at described media
Ask and control module realizes precision clock agreement.
Further, the described time stamp control module in described device includes: send submodule
And reception submodule.Described transmission submodule includes that multi-stage pipeline processing unit, information are locked
Memory cell, replace control unit, enumerator, time stamp adjustment unit, depositor and circulate superfluous
Redundancy checksum unit.Wherein, the process information of incoming frame is entered by described information latch units
Row latches standby.Described replacement control unit and described information latch units, multi-stage pipeline
Processing unit and timer connect.The side input input system of described time stamp adjustment unit
Real-time time, opposite side input is connected with described depositor, described time stamp adjustment unit
Outfan be connected with described multi-stage pipeline processing unit.Described CRC list
First and described multi-stage pipeline processing unit is connected to again count new content frame
Calculate the value of CRC.Described reception submodule includes time stamp capturing unit, described
Time stamp capturing unit is for when receiving a frame and starting, during current under capture system
Between.
Further, the described time stamp control module in described device passes through GMII
Adjust submodule with described speed and physics encoding and decoding submodule is connected.Described media independently connect
Mouth includes the data wire for sending useful signal, the data wire sending data signal and transmission
The data wire of rub-out signal, described multi-stage pipeline processing unit is to described GMII
The data of input export after processing.
Further, the described multistage waterline processing unit in described device is 5 level production lines
Processing unit.
Further, depositor storage described in described device has for carrying out timestamp calibration
Calibration signal.Described calibration signal includes that flag bit and needs carry out the time value calibrated,
Described time stamp adjustment unit carries out corresponding time value according to described flag bit to described timestamp
Adjustment.
For the method realizing PTP protocol, the embodiment of the present invention provides a kind of and visits at media
Ask the method realizing precision clock agreement in control module, described media interviews control module bag
Include interface conversion submodule, the GMII control submodule being sequentially connected with each other
Block, speed adjust submodule and physics encoding and decoding submodule, and described method includes: during employing
The timestamp of described media interviews control module is processed to realize essence by stamp control module
Really clock protocols, wherein said time stamp control module be arranged on described speed adjust submodule with
Between described physics encoding and decoding submodule.
Further, the described time stamp control module in described method includes: send submodule
And reception submodule.Described transmission submodule includes that multi-stage pipeline processing unit, information are locked
Memory cell, replace control unit, enumerator, time stamp adjustment unit, depositor and circulate superfluous
Redundancy checksum unit.Wherein, the process information of incoming frame is entered by described information latch units
Row latches standby.Described replacement control unit and described information latch units, multi-stage pipeline
Processing unit and timer connect.The side input input system of described time stamp adjustment unit
Real-time time, opposite side input is connected with described depositor, described time stamp adjustment unit
Outfan be connected with described multi-stage pipeline processing unit.Described CRC list
First and described multi-stage pipeline processing unit is connected to again count new content frame
Calculate the value of CRC.Described reception submodule includes time stamp capturing unit, described
Time stamp capturing unit is for when receiving a frame and starting, during current under capture system
Between.
Further, the described multistage waterline processing unit in described method is 5 level production lines
Processing unit.
Further, the described depositor storage in described method has for carrying out timestamp school
Accurate calibration signal.Described calibration signal includes that flag bit and needs carry out the time calibrated
Value, described time stamp adjustment unit carries out the corresponding time according to described flag bit to described timestamp
The adjustment of value.
Relative to prior art, what the present invention provided realizes essence in media interviews control module
Really the method and apparatus of clock protocols, is arranged on the place beating timestamp in exchanger chip
In Gmac module after all of caching, permissible relative to the mode using software to realize
Greatly improve time precision.
For making the above-mentioned purpose of the present invention, feature and advantage to become apparent, cited below particularly
Preferred embodiment, and coordinate appended accompanying drawing, it is described in detail below.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme of the embodiment of the present invention, below will be to embodiment
The accompanying drawing used required in is briefly described, it will be appreciated that the following drawings only illustrates
Certain embodiments of the present invention, be therefore not construed as to restriction, for this area
From the point of view of those of ordinary skill, on the premise of not paying creative work, it is also possible to according to this
A little accompanying drawings obtain other relevant accompanying drawings.
The designed holder composition of the media interviews control module that Fig. 1 provides for the embodiment of the present invention.
Fig. 2 for the embodiment of the present invention provide when realizing accurate in media interviews control module
The designed holder composition of the device of clock agreement.
Fig. 3 is the ethernet frame format encapsulating PTP message.
The designed holder composition of the time stamp control module that Fig. 4 provides for the embodiment of the present invention.
Main element symbol description
| Realize the device of precision clock agreement | 10 |
| Media interviews control module | 100 |
| Interface conversion submodule | 110 |
| GMII controls submodule | 120 |
| Speed adjusts submodule | 130 |
| Physics encoding and decoding submodule | 140 |
| Time stamp control module | 200 |
| Send submodule | 210 |
| Multi-stage pipeline processing unit | 211 |
| Information latch units | 212 |
| Replace control unit | 213 |
| Enumerator | 214 |
| CRC unit | 215 |
| Time stamp adjustment unit | 216 |
| Depositor | 217 |
| Receive submodule | 220 |
| Time stamp capturing unit | 221 |
Detailed description of the invention
Below in conjunction with accompanying drawing in the embodiment of the present invention, to the technical scheme in the embodiment of the present invention
It is clearly and completely described, it is clear that described embodiment is only a present invention part
Embodiment rather than whole embodiments.Generally herein described in accompanying drawing and illustrate this
The assembly of bright embodiment can be arranged with various different configurations and design.Therefore, the most right
The detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit claimed
The present invention, but be merely representative of the selected embodiment of the present invention.Enforcement based on the present invention
Example, those skilled in the art obtained on the premise of not making creative work all its
His embodiment, broadly falls into the scope of protection of the invention.
Refer to Fig. 1, Fig. 1 is the media interviews control module 100 that the embodiment of the present invention provides
Designed holder composition.Described media interviews control module 100 includes: interface conversion submodule
110, GMII controls submodule 120, speed adjusts submodule 130 and physics is compiled
Decoding sub-module 140.Described interface conversion submodule 110, GMII control son
Module 120, speed adjust submodule 130 and physics encoding and decoding submodule 140 is the most electrical
Connect.The major function of described interface conversion submodule 110 is by interface bit width conversion,
And entered by asynchronous input into/output from cache (First Input First output is called for short FIFO)
Row cross clock domain processes.Described GMII controls submodule 120 for by network report
Literary composition is packaged into frame format that IEEE802.3 agreement specifies and solves network report from frame format
Literary composition.Described speed adjusts submodule 130 and is used for using asynchronous FIFO to carry out between different rates
Adjustment (such as, 10M/100M/1000M).Described physics encoding and decoding submodule 140
For carrying out physics encoding and decoding.
Understanding according to being described above, described interface conversion submodule 110 adjusts submodule with speed
Block 130 all contains asynchronous input into/output from cache.Therefore to ensure the precision of timestamp, beat
After the operation of print timestamp is placed on described speed adjustment submodule 130.Specifically, please
With reference to Fig. 2, include media interviews control module for realizing the device 10 of precision clock agreement
100 and time stamp control module 200, specifically, time stamp control module 200 is arranged at media
The speed of access control module 100 adjusts submodule 130 and physics encoding and decoding submodule 140
Between, described time stamp control module 200 is used for carrying out timestamp process.
In this embodiment, timestamp (TimeStamp) territory is the time stab information of 80 bits.For
Enabling the PTP message transmit in ethernet networks, it must be encapsulated in the frame format of Ethernet
In, refer to Fig. 3.In order to be able to PTP frame is stamped real-time time stamp, need it is to be understood that
Position in frame, the TimeStamp territory, this work resolves in packet processing engine.
Refer to the specific design function mould that Fig. 4, Fig. 4 are described time stamp control modules 200
Block figure.Described time stamp control module 200 includes: sends submodule 210 and receives submodule
220。
Described transmission submodule 210 includes: multi-stage pipeline processing unit 211, information are locked
Memory cell 212, replacement control unit 213, enumerator 214, CRC unit
215, time stamp adjustment unit 216 and depositor 217.Wherein, described information latch units
The process information of 212 pairs of incoming frames latches standby.Described replacement control unit 213 with
Described information latch units 212, multi-stage pipeline processing unit 211 and enumerator 214 are even
Connect.The real-time time of the side input input system of described time stamp adjustment unit 216, institute
The opposite side input stating time stamp adjustment unit 216 is connected with described depositor 217, described
The outfan of time stamp adjustment unit 216 is connected with described multi-stage pipeline processing unit 211.
Described CRC unit 215 is connected with described multi-stage pipeline processing unit 211
For new content frame being recalculated the value of CRC.
Described reception submodule 220 includes time stamp capturing unit 221, for receiving one
When individual frame starts, capture current system time.And give bag below by described system time
Process engine block uses.
In the present embodiment, described time stamp control module 200 uses multi-stage pipeline
(Pipeline) design, can save data processing time to meet time-write interval stamp and to rerun
Time required for the value of CRC.In the present embodiment, described multistage waterline
Processing unit can be 5 level production line processing units, uses 5 level production lines to enter frame data
Row processes.
Described time stamp control module 200 adjusts submodule by GMII with described speed
Block 130 and physics encoding and decoding submodule 140 are connected, described GMII include for
Send the data wire of useful signal (txEn), send the data wire of data signal (txd [7:0])
And the data wire of transmission rub-out signal (txEr), described multi-stage pipeline processing unit 211 is to institute
State GMII input data process after export.
The described information latch units 212 process information to the incoming frame of input, as
Msg [7:0] ({ tsEn, offset [6:0] }), carries out latching standby.Wherein, bag in msg [7:0]
Information needed for having included compiled frame: tsEn be this frame of 1 expression be PTP message, need to carry out
Play timestamp operation；The position in offset [6:0] express time stamp (TimeStamp) territory is at frame
In skew.Described enumerator 214 is started at first, when described enumerator 214 at frame
Value equal to offset [6:0] time, and when tsEn is 1, carry out beating timestamp operation, time
Between stamp bit wide be 80 bits, the operation therefore beating timestamp to continue 10 clock cycle.
In described time stamp control module 200, need to input the real-time clock of a system
(ts [79:0]) is as the fiducial time beating timestamp.It is placed on thing owing to playing the operation of timestamp
Before reason encoding and decoding submodule 140, it is not real network egress, but time stamp controls mould
The time delay of the network egress that block 200 is real is fixing in the design, therefore adds one group
Calibration signal carries out the calibration of timestamp.Described calibration signal is stored in described depositor
In 217, described calibration signal includes what flag bit (tsAddSign) and needs carried out calibrating
Time value (tsAddData [15:0]), makes the described time stamp adjustment unit 216 can be according to described
Flag bit carries out the adjustment of corresponding time value to described timestamp.Specifically, tsAddSign is worked as
When being 1, described timestamp is increased the time value of tsAddData [15:0]；Work as tsAddSign
When being 0, described timestamp is reduced the time value of tsAddData [15:0].
Described CRC unit 215 after the printing that the deadline stabs, root
According to the content of new frame recalculate cyclic redundancy check (CRC) (Cyclic Redundancy Check,
Be called for short CRC) value, and be written into frame verification territory (Frame Check Sequence,
It is called for short in FCS).
The major function sending submodule 210 of time stamp control module 200 is exactly according to offset
Value, found the position needing to beat timestamp by enumerator 214, and by 80 bits
Timestamp gets to the position specified.Owing to beating the content of the original frame of timestamp operation change,
It is thus desirable to recalculate the value of CRC.
The major function receiving submodule 220 of time stamp control module 200 is at the frame received
At first, record frame, in the time of Web portal, gives packet processing engine module below
Use.
Meanwhile, the present embodiment also provides for a kind of employing arrangement described above realization accurately
The method of clock protocols.
Described method be media interviews control module 100 speed adjust submodule 130 and
Between physics encoding and decoding submodule 140, add a time stamp control module 200 and carry out
The timestamp of PTP protocol processes.
Specifically, the input of media interviews control module 100 be gmii interface signal (txEn,
Txd [7:0], txEr), the frame of input is entered multi-stage pipeline and processes, output interface
It is similarly gmii interface (txEnTs, txdTs [7:0], txErTs, wherein said multilevel flow
Waterline is 5 grades of stream treatment.
Process information msg [7:0] of incoming frame is carried out latching standby at first at frame,
Msg [7:0] comprises two information: tsEn and offset [6:0].TsEn is that this frame of 1 expression is
PTP message, needs to carry out playing timestamp operation；Offset [6:0] represents TimeStamp territory
Position skew in frame.
An enumerator 214 is started at first, when the value of enumerator 214 is equal at frame
During offset [6:0], and when tsEn is 1, carry out beating timestamp operation, the position of timestamp
A width of 80 bits, the operation therefore beating timestamp to continue 10 clock cycle.
Ts [79:0] is the real-time time of system, is placed on physics volume solution owing to playing the operation of timestamp
Before numeral module 140, it is not real network egress, but time stamp control module 200
Time delay to real network egress is fixing in the design, therefore adds one group of signal
(tsAddSign and tsAddData [15:0]) carries out the calibration of timestamp, wherein
TsAddSign is flag bit, and 1 expression adds, and 0 expression subtracts；TsAddData [15:0] is for needing
The time value being increased or decreased.
After completing to play timestamp operation, recalculate CRC's according to the content of new frame
Value, and write the FCS territory of frame.
When time stamp control module 200 receives the beginning that direction receives a frame, record current
System time, use to packet processing engine module below.
In sum, what the present embodiment provided realizes essence in media interviews control module 100
The really method and device of clock protocols.Gmac network interface carries out beating the operation of timestamp,
Ensure that the precision of PTP protocol timestamp, use the pipeline design simultaneously, when will not introduce
Between stamp shake.One section is also had admittedly to real network egress in view of the operation beating timestamp
Determine time delay, therefore add one group of depositor 217 to carry out the calibration of timestamp.The present invention
Only PTP message is carried out timestamp process, other message of network is left intact,
Thereby ensure that the correctness of Gmac module original function.
The above, the only detailed description of the invention of the present invention, but the protection of the present invention not office
Being limited to this, any those familiar with the art, can in the technology that the invention discloses
Readily occur in change or replace, all should contain within the protection of the present invention.Therefore, the present invention
Protection should described be as the criterion with the protection of claim.
Claims (10)
1. realizing a device for precision clock agreement in media interviews control module, it is special
Levy and be, including: media interviews control module and time stamp control module, described media interviews
Control module includes interface conversion submodule, the GMII being sequentially connected with each other
Control submodule, speed adjusts submodule and physics encoding and decoding submodule, wherein, time described
Stamp control module is arranged at described speed and adjusts submodule and described physics encoding and decoding submodule
Between, described time stamp control module is for the timestamp in described media interviews control module
Process, to realize precision clock agreement in described media interviews control module.
2. device as claimed in claim 1, it is characterised in that described time stamp control module
Including: send submodule and receive submodule；
Described transmission submodule includes multi-stage pipeline processing unit, information latch units, replaces
Change control unit, enumerator, time stamp adjustment unit, depositor and CRC list
Unit, wherein, the process information of incoming frame is latched standby by described information latch units,
Described replacement control unit and described information latch units, multi-stage pipeline processing unit and meter
Time device connect, the real-time time of the side input input system of described time stamp adjustment unit,
Opposite side input is connected with described depositor, the outfan of described time stamp adjustment unit and institute
Stating multi-stage pipeline processing unit to connect, described CRC unit is multistage with described
Pipeline processes unit is connected to new content frame is recalculated Cyclic Redundancy Code
The value of verification；
Described reception submodule includes time stamp capturing unit, and described time stamp capturing unit is used for
Receive a frame when starting, capture current system time.
3. device as claimed in claim 2, it is characterised in that described time stamp control module
Submodule and physics encoding and decoding submodule phase is adjusted with described speed by GMII
Even, described GMII includes the data wire for sending useful signal, sends data
The data wire of signal and the data wire of transmission rub-out signal, described multi-stage pipeline processing unit
The data inputting described GMII export after processing.
4. the device as described in any one in claim 2～3, it is characterised in that: described
Multistage waterline processing unit is 5 level production line processing units.
5. device as claimed in claim 2, it is characterised in that the process of described incoming frame
Information includes: the skew in frame of the position in precision clock protocol label and timestamp territory.
6. device as claimed in claim 2, it is characterised in that described depositor storage has
For carrying out the calibration signal of timestamp calibration, described calibration signal includes flag bit and needs
Carry out the time value calibrated, described time stamp adjustment unit according to described flag bit to the described time
Stamp carries out the adjustment of corresponding time value.
7. the method realizing precision clock agreement in media interviews control module, it is special
Levying and be, described media interviews control module includes the interface conversion being sequentially connected with each other
Submodule, GMII control submodule, speed adjusts submodule and physics encoding and decoding
Submodule, described method includes:
Use at the time stamp control module timestamp to described media interviews control module
Reason is to realize precision clock agreement, and wherein said time stamp control module is arranged on described speed and adjusts
Between whole submodule and described physics encoding and decoding submodule.
8. method as claimed in claim 7, it is characterised in that
Described time stamp control module includes: sends submodule and receives submodule；
Described transmission submodule includes multi-stage pipeline processing unit, information latch units, replaces
Change control unit, enumerator, time stamp adjustment unit, depositor and CRC list
Unit, wherein, the process information of incoming frame is latched standby by described information latch units,
Described replacement control unit and described information latch units, multi-stage pipeline processing unit and meter
Time device connect, the real-time time of the side input input system of described time stamp adjustment unit,
Opposite side input is connected with described depositor, described in state the outfan of time stamp adjustment unit with
Described multi-stage pipeline processing unit connects, and described CRC unit is with described many
Level production line processing unit is connected to new content frame is recalculated cyclic redundancy
The value of code check；
Described reception submodule includes time stamp capturing unit, and described time stamp capturing unit is used for
Receive a frame when starting, capture current system time.
9. method as claimed in claim 8, it is characterised in that:
Described multistage waterline processing unit is 5 level production line processing units.
10. method as claimed in claim 8, it is characterised in that:
Described depositor storage has the calibration signal for carrying out timestamp calibration, described calibration
Signal includes flag bit and needs carry out the time value calibrated, described time stamp adjustment unit according to
Described flag bit carries out the adjustment of corresponding time value to described timestamp.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610510846.9A CN105933086B (en) | 2016-07-01 | 2016-07-01 | The method and apparatus that precision clock agreement is realized in media access control module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610510846.9A CN105933086B (en) | 2016-07-01 | 2016-07-01 | The method and apparatus that precision clock agreement is realized in media access control module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105933086A true CN105933086A (en) | 2016-09-07 |
| CN105933086B CN105933086B (en) | 2018-01-09 |
Family
ID=56829857
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610510846.9A Active CN105933086B (en) | 2016-07-01 | 2016-07-01 | The method and apparatus that precision clock agreement is realized in media access control module |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105933086B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106911545A (en) * | 2017-01-23 | 2017-06-30 | 北京东土军悦科技有限公司 | A kind of method and device that ST_BUS data are transmitted by Ethernet |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011082609A1 (en) * | 2010-01-05 | 2011-07-14 | Huawei Technologies Co., Ltd. | Network timing distribution and synchronization using virtual network delays |
| CN102132530A (en) * | 2008-08-22 | 2011-07-20 | 马维尔国际贸易有限公司 | Method and apparatus for integrating precise time protocol and media access control security in network elements |
| CN102299788A (en) * | 2011-09-21 | 2011-12-28 | 烽火通信科技股份有限公司 | Method and device for controlling automatic transmission of IEEE1558 (Institute of Electrical and Electronic Engineers 1558) protocol message |
| CN104012025A (en) * | 2011-11-07 | 2014-08-27 | 维特赛半导体公司 | Physical layer processing of timestamps and MAC security |
-
2016
- 2016-07-01 CN CN201610510846.9A patent/CN105933086B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102132530A (en) * | 2008-08-22 | 2011-07-20 | 马维尔国际贸易有限公司 | Method and apparatus for integrating precise time protocol and media access control security in network elements |
| WO2011082609A1 (en) * | 2010-01-05 | 2011-07-14 | Huawei Technologies Co., Ltd. | Network timing distribution and synchronization using virtual network delays |
| CN102299788A (en) * | 2011-09-21 | 2011-12-28 | 烽火通信科技股份有限公司 | Method and device for controlling automatic transmission of IEEE1558 (Institute of Electrical and Electronic Engineers 1558) protocol message |
| CN104012025A (en) * | 2011-11-07 | 2014-08-27 | 维特赛半导体公司 | Physical layer processing of timestamps and MAC security |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106911545A (en) * | 2017-01-23 | 2017-06-30 | 北京东土军悦科技有限公司 | A kind of method and device that ST_BUS data are transmitted by Ethernet |
| CN106911545B (en) * | 2017-01-23 | 2020-04-24 | 北京东土军悦科技有限公司 | Method and device for transmitting ST _ BUS data through Ethernet |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105933086B (en) | 2018-01-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101267210B (en) | Data decoding and coding and receiving/transmission method and device | |
| US20220303035A1 (en) | Method and apparatus for sending and receiving clock synchronization packet | |
| CN102413018B (en) | FPGA (field programmable gate array) based software-hardware coordinated network test system and method | |
| CN106850466A (en) | The retransmission method and device of packet in a kind of time-triggered network | |
| KR101290643B1 (en) | Method and system for bearing time synchronization protocol in optical transport network | |
| WO2020063593A1 (en) | Time delay symmetry measurement method, apparatus and system | |
| CN101193060A (en) | Method for reliable E1 transmission based on forward error correction mechanism in packet network | |
| GB2461966A (en) | Frame loss measurement system which communicates frame count information using OAM frames and corrects counters according to frame transmission order | |
| CN103401741B (en) | Integrated circuit and data processing method | |
| WO2015131626A1 (en) | Time synchronization method and apparatus for network devices and time synchronization server | |
| JP2014042237A (en) | Hardware circuit, credit-based traffic shaper, apparatus, and hardware-implemented method | |
| US11121811B2 (en) | Data encapsulation and transmission methods, device, and computer storage medium | |
| CN105933086A (en) | Method and device for realizing precise clock protocol in media access control module | |
| CN205050133U (en) | Embedded time system that unites in system | |
| CN109194512A (en) | Looped network intelligent communications device and its configuration method | |
| CN106856422B (en) | Timestamp processing method and device for time message in optical transmission network | |
| US20110026654A1 (en) | Network device of high-precision synchronization type, network system, and frame transfer method | |
| CN101771617B (en) | Method and system for following point-to-point bandwidth, remote terminal equipment and home terminal equipment | |
| EP4131843A1 (en) | Service processing method and apparatus | |
| CN102457431B (en) | Cell transmission method and device | |
| CN101977186B (en) | Device for realizing synchronous transport module level-1 (STM-1) multipath Ethernet over E1 conversion | |
| ES2437761T3 (en) | Method for processing digital signals for the transmission / reception of a stream of digital signals on a plurality of channels | |
| WO2018076672A1 (en) | Method and apparatus for accessing optical transmission network service and computer storage medium | |
| EP4161088A1 (en) | Methods, apparatuses and computer readable medium for managing a synchronization status message through an omci management channel in a passive optical network | |
| CN116489113B (en) | Port expanding method and system of switch chip and switch |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 412200, Liling City, Hunan Province ceramic science and Technology Industrial Park B District Applicant after: Hunan Hengmao tech Limited by Share Ltd Address before: 412200, Liling City, Hunan Province ceramic science and Technology Industrial Park B District Applicant before: Liling Hengmao Electronics Technology Co., Ltd. |
|
| COR | Change of bibliographic data | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |