CN110568341A - System for automatically testing welding state of IO (input/output) interface function of PCBA (printed circuit board assembly) mainboard - Google Patents

System for automatically testing welding state of IO (input/output) interface function of PCBA (printed circuit board assembly) mainboard Download PDF

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Publication number
CN110568341A
CN110568341A CN201910814408.5A CN201910814408A CN110568341A CN 110568341 A CN110568341 A CN 110568341A CN 201910814408 A CN201910814408 A CN 201910814408A CN 110568341 A CN110568341 A CN 110568341A
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CN
China
Prior art keywords
pcba
capacitor
test
mcu
interface
Prior art date
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Pending
Application number
CN201910814408.5A
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Chinese (zh)
Inventor
文波波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen 3g Electronics Co Ltd
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Shenzhen 3g Electronics Co Ltd
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Priority to CN201910814408.5A priority Critical patent/CN110568341A/en
Publication of CN110568341A publication Critical patent/CN110568341A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • G01R31/2808Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • G01R31/2812Checking for open circuits or shorts, e.g. solder bridges; Testing conductivity, resistivity or impedance

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

the invention discloses a system for automatically testing the welding state of the IO interface function of a PCBA mainboard, which comprises a computer testing system, the PCBA mainboard and a testing auxiliary board, wherein the testing auxiliary board is connected with the PCBA mainboard through a thimble on a clamp, an MCU is arranged on the testing auxiliary board, an IO port of the MCU is connected with the interface of the PCBA mainboard through the clamp, the PCBA mainboard is communicated with the MCU through an I2C interface, and a USB interface of the PCBA mainboard is connected with a testing computer.

Description

System for automatically testing welding state of IO (input/output) interface function of PCBA (printed circuit board assembly) mainboard
Technical Field
The invention relates to the technical field of PCB manufacturing, in particular to a system for automatically testing the welding state of the IO interface function of a PCBA mainboard.
Background
With the rapid development of IT technology, many products or modules (PCBA) have some external interfaces in the production process of SMT factories, and in the conventional SMT test, corresponding interface accessories, such as a key interface connection key board and a camera interface connection camera, are connected through a fixture according to the functions of the interfaces, and the operation is cumbersome and a large amount of labor is consumed to operate keys and a camera function to test whether a motherboard patch is good or not in the test process.
Disclosure of Invention
The invention aims to provide a system for automatically testing the welding state of the IO interface function of a PCBA mainboard, so as to solve the problems in the background technology.
In order to realize the purpose, the invention provides the following technical scheme: the utility model provides an automatic test PCBA mainboard IO interface function welded state's system, includes computer test system, PCBA mainboard and test subplate, the test subplate passes through thimble and PCBA mainboard connection on the anchor clamps, is equipped with an MCU on the test subplate, and MCU's IO mouth and the interface of PCBA mainboard pass through anchor clamps and connect, and the PCBA mainboard passes through I2C interface and MCU communication, and the USB interface and the test computer of PCBA mainboard are connected.
As a further scheme of the invention: after the PCBA mainboard is started, the computer sends an instruction to the PCBA mainboard through the test system to enter a test mode, the PCBA mainboard is communicated with the MCU through the I2C interface, the MCU is controlled to read the preset state of the IO to be tested, and whether the network of the IO port of the PCBA mainboard has the cold solder joint and the continuous tin on the PCBA or not is judged by comparing the preset different states of the IO to be tested with the read state of the MCU.
As a still further scheme of the invention: and the test result is uploaded to a test computer through a USB interface of the PCBA mainboard, and the test result is output.
As a still further scheme of the invention: the test subplate comprises an MCU main controller J5, a capacitor C28, a capacitor C34, a capacitor C12 and a capacitor C36, the capacitor C12 is connected to a pin 1 of the MCU main controller J5, the capacitor C36 is connected to a pin 16 of the MCU main controller J5, a capacitor C12 is connected to a pin 1 of the MCU main controller J5, one end of the capacitor C28 is connected with one end of the capacitor C34 and a power supply V _ CAN, the other end of the capacitor C28 is grounded, and the other end of the capacitor C34 is grounded.
As a still further scheme of the invention: the capacitor C28, the capacitor C34, the capacitor C12 and the capacitor C36 are all patch capacitors.
As a still further scheme of the invention: the PCBA mainboard must be capable of being set to GPIO through programs and outputting logic level 1 or 0.
As a still further scheme of the invention: the test subplate also comprises a TVS tube V3, one end of the TVS tube V3 is connected with a power supply V _ CAN, and the other end of the TVS tube V3 is grounded for preventing ESD electrostatic damage.
Compared with the prior art, the invention has the beneficial effects that: the invention can detect whether the interface has the condition of insufficient solder and short circuit, increases the production test efficiency, has simple structure and low cost, is easy to be introduced into production, can improve the production efficiency and save the production cost.
Drawings
Fig. 1 is an overall block diagram of the present invention.
Fig. 2 is a circuit schematic of the present invention.
Fig. 3 is a circuit diagram of an interface of the PCBA under test.
FIG. 4 is a circuit diagram of a second interface of the PCBA under test.
FIG. 5 is a three-circuit diagram of an interface of the PCBA to be tested.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1: referring to fig. 1-5, to achieve the above object, the present invention provides the following technical solutions:
The utility model provides an automatic test PCBA mainboard IO interface function welded state's system, includes computer test system, PCBA mainboard and test subplate, the test subplate passes through thimble and PCBA mainboard connection on the anchor clamps, is equipped with an MCU on the test subplate, and MCU's IO mouth and the interface of PCBA mainboard pass through anchor clamps and connect, and the PCBA mainboard passes through I2C interface and MCU communication, and the USB interface and the test computer of PCBA mainboard are connected. After the PCBA mainboard is started, the computer sends an instruction to the PCBA mainboard through the test system to enter a test mode, the PCBA mainboard passes through the I2C interface and MCU communication, and control MCU reads the preset state of IO to be tested, through presetting various different states of IO to be tested, whether the network of the IO port of the PCBA mainboard exists rosin joint and continuous tin on the PCBA is judged by comparing the state read by MCU, and the test result is uploaded to the test computer through the USB interface of the PCBA, and the test result is output.
Embodiment 2, on the basis of embodiment 1, as shown in fig. 3, these are the respective interface diagrams of the PCBA to be tested. Each interface of the PCBA to be tested must be able to be programmed to GPIO, and to output a logic level 1 or 0. For example, the interface signals SPI _ CAM _ SCK and CAM _ CLK in fig. 2 are respectively output logic level signals 1 and 0 after the PCBA enters the test mode and is set to GPIO after the power-on test is started. The two signals are correspondingly transmitted to the interfaces S00, S01 of the test sub-board through the connection of the ejector pins on the test fixture. The MCU reads signals of the two interfaces and feeds the signals back to the PCBA end through the I2C interface. If the two interfaces have no bad conditions of cold joint and continuous tin, the signal fed back to the PCBA end by the MCU is unchanged, and is also 1 and 0. And the PCBA end compares the signals fed back by the MCU, judges the two signals to be normal if the signals are the same and are not changed, and uploads the result to the test computer through a self USB interface.
Under the bad condition of the cold joint, the MCU reads the signals of the two interfaces to be default levels 1, 1. The signal fed back to the PCBA end by the MCU is also 1, 1. The PCBA end compares signals fed back by the MCU, if changes are found, the two interfaces are judged to be abnormal, and then results are uploaded to a test computer through the USB interface of the PCBA end.
Under the bad condition of welding short circuit, the MCU reads the signals of the two interfaces to be the level 0,0 after short circuit. The signal fed back to the PCBA end by the MCU is also 0, 0. The PCBA end compares signals fed back by the MCU, if changes are found, the two interfaces are judged to be abnormal, and then results are uploaded to a test computer through the USB interface of the PCBA end.
Also, this principle applies to other test interfaces.
Thus, the system completes the automatic test function through the test judgment of automatically sending the reading signal.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims (7)

1. The utility model provides an automatic test PCBA mainboard IO interface function welded state's system, includes computer test system, PCBA mainboard and test subplate, its characterized in that, the test subplate passes through thimble and PCBA mainboard connection on the anchor clamps, is equipped with an MCU on the test subplate, and MCU's IO mouth and the interface of PCBA mainboard pass through anchor clamps and connect, and the PCBA mainboard passes through I2C interface and MCU communication, and the USB interface and the test computer of PCBA mainboard are connected.
2. The system of claim 1, wherein after the PCBA motherboard is powered on, the computer sends an instruction to the PCBA motherboard via the test system to enter a test mode, the PCBA motherboard communicates with the MCU via the I2C interface, and controls the MCU to read a preset status of the IO to be tested, and determines whether the network of the IO port of the PCBA motherboard has insufficient solder and continuous solder on the PCBA by comparing the preset different statuses of the IO to be tested with the read status of the MCU.
3. The system for automatically testing the welding state of the IO interface function of the PCBA mainboard as recited in claim 2, wherein the test result is uploaded to a test computer through a USB interface of the PCBA mainboard, and the test result is output.
4. The system for automatically testing the welding state of the IO interface function of the PCBA main board as claimed in claim 1, wherein the test sub-board comprises an MCU main controller J5, a capacitor C28, a capacitor C34, a capacitor C12 and a capacitor C36, the capacitor C12 is connected to a pin 1 of the MCU main controller J5, the capacitor C36 is connected to a pin 16 of the MCU main controller J5, the capacitor C12 is connected to a pin 1 of the MCU main controller J5, one end of the capacitor C28 is connected to one end of the capacitor C34 and a power supply V _ CAN, the other end of the capacitor C28 is grounded, and the other end of the capacitor C34 is grounded.
5. The system for automatically testing the welding state of the IO interface function of the PCBA mainboard of claim 4, wherein the capacitor C28, the capacitor C34, the capacitor C12 and the capacitor C36 are all patch capacitors.
6. A system for automatically testing the welding status of IO interface functions of a PCBA mainboard as recited in any one of claims 1-5, wherein the PCBA mainboard must be programmed to both GPIO and output logic level 1 or 0.
7. The system of claim 4, wherein the test sub-board further comprises a TVS transistor V3, one end of the TVS transistor V3 is connected to a power supply V _ CAN, and the other end of the TVS transistor V3 is grounded for preventing ESD damage.
CN201910814408.5A 2019-08-30 2019-08-30 System for automatically testing welding state of IO (input/output) interface function of PCBA (printed circuit board assembly) mainboard Pending CN110568341A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111044879A (en) * 2019-12-20 2020-04-21 苏州浪潮智能科技有限公司 Method and system for quickly positioning fault position of physical interface of main board

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101865976A (en) * 2009-04-14 2010-10-20 鸿富锦精密工业(深圳)有限公司 Boundary scanning test system and test method
CN101980036A (en) * 2010-10-22 2011-02-23 福建鑫诺通讯技术有限公司 FPGA-based JTAG test method
CN202794426U (en) * 2012-09-24 2013-03-13 惠州市德赛西威汽车电子有限公司 Tin connection testing device of plug connector pin
CN103176094A (en) * 2011-12-22 2013-06-26 希姆通信息技术(上海)有限公司 Method for testing PIN of LCD (Liquid Crystal Display) interface of module
CN104198911A (en) * 2014-06-24 2014-12-10 航天科工深圳(集团)有限公司 Test method and circuit for chip pin of DTU (Date Transfer Unit)
CN104865469A (en) * 2015-05-21 2015-08-26 中国科学院空间应用工程与技术中心 FPGA device test system based on ATE and method thereof
CN105891657A (en) * 2016-04-25 2016-08-24 万高(杭州)科技有限公司 Method and apparatus for detecting chip bonding conditions of printed circuit board
CN106405313A (en) * 2016-11-24 2017-02-15 上海移远通信技术股份有限公司 Pseudo soldering test device and method for chip
CN108957290A (en) * 2018-06-27 2018-12-07 四川斐讯信息技术有限公司 A kind of SCM Based chip method for detecting short circuit and system
US20190056445A1 (en) * 2017-08-17 2019-02-21 The United States Of America As Represented By The Secretary Of The Navy Dut continuity test with only digital io structures apparatus and methods associated thereof

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101865976A (en) * 2009-04-14 2010-10-20 鸿富锦精密工业(深圳)有限公司 Boundary scanning test system and test method
CN101980036A (en) * 2010-10-22 2011-02-23 福建鑫诺通讯技术有限公司 FPGA-based JTAG test method
CN103176094A (en) * 2011-12-22 2013-06-26 希姆通信息技术(上海)有限公司 Method for testing PIN of LCD (Liquid Crystal Display) interface of module
CN202794426U (en) * 2012-09-24 2013-03-13 惠州市德赛西威汽车电子有限公司 Tin connection testing device of plug connector pin
CN104198911A (en) * 2014-06-24 2014-12-10 航天科工深圳(集团)有限公司 Test method and circuit for chip pin of DTU (Date Transfer Unit)
CN104865469A (en) * 2015-05-21 2015-08-26 中国科学院空间应用工程与技术中心 FPGA device test system based on ATE and method thereof
CN105891657A (en) * 2016-04-25 2016-08-24 万高(杭州)科技有限公司 Method and apparatus for detecting chip bonding conditions of printed circuit board
CN106405313A (en) * 2016-11-24 2017-02-15 上海移远通信技术股份有限公司 Pseudo soldering test device and method for chip
US20190056445A1 (en) * 2017-08-17 2019-02-21 The United States Of America As Represented By The Secretary Of The Navy Dut continuity test with only digital io structures apparatus and methods associated thereof
CN108957290A (en) * 2018-06-27 2018-12-07 四川斐讯信息技术有限公司 A kind of SCM Based chip method for detecting short circuit and system

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
王雷 等: "《单片机系统设计基础》", 31 May 2012, 北京航空航天大学出版社 *
纪宗南: "《单片机外围器件实用手册—输入通道器件分册》", 30 June 2005, 北京航空航天大学出版社 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111044879A (en) * 2019-12-20 2020-04-21 苏州浪潮智能科技有限公司 Method and system for quickly positioning fault position of physical interface of main board

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Application publication date: 20191213