CN110535444A - Biasing circuit and burst trans-impedance amplifier for the trans-impedance amplifier that happens suddenly - Google Patents
Biasing circuit and burst trans-impedance amplifier for the trans-impedance amplifier that happens suddenly Download PDFInfo
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- CN110535444A CN110535444A CN201810520525.6A CN201810520525A CN110535444A CN 110535444 A CN110535444 A CN 110535444A CN 201810520525 A CN201810520525 A CN 201810520525A CN 110535444 A CN110535444 A CN 110535444A
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
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Abstract
This application discloses a kind of biasing circuits for the trans-impedance amplifier that happens suddenly, comprising: operational amplifier, triode, MOS transistor, resistance and other devices.Wherein, the inverting input terminal of operational amplifier and the first port of resistance are connected with the collector of triode, the non-inverting input terminal of operational amplifier is connected with the drain electrode of MOS transistor, the output port of operational amplifier is connected with the grid of MOS transistor, and the source electrode of MOS transistor is connected with the second port of resistance.Operational amplifier, MOS transistor and resistance form negative feedback network, the MOS transistor grid voltage of burst trans-impedance amplifier can be made to be biased in correct current potential, so that the MOS transistor is in weak on state, solve the problems such as signal noise is excessive or signal distortion of burst trans-impedance amplifier output.
Description
Technical field
This application involves electronic technology field more particularly to a kind of biasing circuits and burst for the trans-impedance amplifier that happens suddenly
Trans-impedance amplifier.
Background technique
Fiber to the home (Fiber To The Home, FTTH) is current optimal broadband access method, passive optical network
(Passive Optical Network, PON) is the technology for realizing FTTX most attraction.PON network is by optical network unit
(Optical Network Unit, ONU), optical line terminal (optical line terminal, OLT) and optical splitter
Deng composition, the end OLT receives the bursty data that different ONU ends are sent, and the receiving portion response time needs as short as possible to improve net
Network utilization efficiency (provides preamble in gigabit passive optical network (Gigabit-Capable PON, GPON) agreement G984.2
Time is 44bit), trans-impedance amplifier is responsible for receiving end photoelectric conversion and amplified signal, so the response of the trans-impedance amplifier of OLT
Time is as short as possible to meet protocol requirement.It is active to be used to happen suddenly in trans-impedance amplifier across resistance to expand and input dynamic model
It encloses, the difficult point for the trans-impedance amplifier that happens suddenly is to shorten the active response time across resistance.Fig. 1 describes existing a kind of applied to prominent
The active across resistance circuit of trans-impedance amplifier is sent out, the MOS transistor grid voltage in figure is fixed biasing, in this way can be to avoid active
Across resistance response time problem.If but the grid voltage of MOS transistor is not biased in correct current potential, it may appear that burst across
The problems such as signal noise is excessive or signal distortion of impedance amplifier output.
Summary of the invention
The embodiment of the present application provides a kind of biasing circuit for the trans-impedance amplifier that happens suddenly, and can make the trans-impedance amplifier that happens suddenly
MOS transistor grid voltage be biased in correct current potential so that the MOS transistor is in weak on state, solve prominent
Send out the problems such as signal noise is excessive or signal distortion of trans-impedance amplifier output.
In a first aspect, the embodiment of the present application provides a kind of biasing circuit for the trans-impedance amplifier that happens suddenly, comprising: operation is put
Big device, the first current feedback circuit, the second current feedback circuit, third current feedback circuit, triode Q1, MOS transistor M1 and resistance
R1;
Wherein, the output port of first current feedback circuit is connected with the collector of the triode Q1, and described three
The base stage of pole pipe Q1 is connected with collector, the emitter ground connection of the triode Q1;
The output port of second current feedback circuit is connected with the non-inverting input terminal of the operational amplifier;
The collection of the inverting input terminal of the operational amplifier and the first port of the resistance R1 with the triode Q1
Electrode is connected, and the non-inverting input terminal of the operational amplifier is connected with the drain electrode of the MOS transistor M1;The operation is put
The output port of big device is connected with the grid of the MOS transistor M1;
The second port of the source electrode of the MOS transistor M1 and the resistance R1 with the third current feedback circuit just
Pole is connected;The cathode of the third current feedback circuit is grounded.
In a kind of feasible embodiment, first current feedback circuit is constant-current source or resistance.
In a kind of feasible embodiment, second current feedback circuit and the third current feedback circuit are constant current
Source.
In a kind of feasible embodiment, when the operational amplifier works, the voltage and reverse phase of non-inverting input terminal are defeated
The voltage for entering end is equal.
Second aspect, the embodiment of the present application provide a kind of burst trans-impedance amplifier, including resistance Rc, resistance R0, resistance R1,
First triode Q1, the second triode Q2, third transistor Q3, MOS transistor M0, MOS transistor M1, the first electric current occur
Device, the second current feedback circuit, third current feedback circuit, the 4th current feedback circuit and operational amplifier;
Wherein, the output port of first current feedback circuit is connected with the collector of the third transistor Q3, institute
The base stage for stating third transistor Q3 is connected with collector, the emitter ground connection of the third transistor Q3;Second electric current
The output port of generator is connected with the non-inverting input terminal of the operational amplifier;
The collection of the inverting input terminal of the operational amplifier and the first port of the resistance R1 with third transistor Q3
Electrode is connected, and the non-inverting input terminal of the operational amplifier is connected with the drain electrode of the MOS transistor M1;The operation is put
The output port of big device is connected with the grid of the MOS transistor M1;
The second port of the source electrode of the MOS transistor M1 and the resistance R1 with the third current feedback circuit just
Pole is connected;The cathode of the third current feedback circuit is grounded;
The first port of the resistance Rc connects DC voltage source VCC, the collection of second port and the first triode Q1
Electrode, the emitter ground connection of the triode Q1;
The collector of the second triode Q2 connects the DC voltage source VCC, base stage and the second of the resistance Rc
Port is connected, and the emitter of the second triode Q2 is connected with the anode of the 4th current feedback circuit, and the described 4th
The cathode of current feedback circuit is grounded;
The grid of the MOS transistor M0 is connected with the output port of the biasing circuit, the MOS transistor M0's
Drain electrode and source electrode are connected with the first port of the resistance R0 and second port respectively;
The first port of the resistance R0 is connected with the base stage of above-mentioned first triode Q1, the second end of above-mentioned resistance R0
Mouth is connected with the anode of the 4th current feedback circuit.
In a kind of feasible embodiment, the size of the dimensional parameters of the MOS transistor M1 and the MOS transistor M0
Parameter is consistent;The dimensional parameters of the resistance R0 are consistent with the dimensional parameters of the resistance R1;The ruler of the first triode Q1
Very little parameter is consistent with the dimensional parameters of the third transistor Q3.
In a kind of feasible embodiment, first current feedback circuit is constant-current source or resistance.
In a kind of feasible embodiment, second current feedback circuit, third current feedback circuit and the 4th electric current occur
Device is constant-current source.
The third aspect, the embodiment of the present application also provide a kind of optical line terminal, including biased electrical as described in relation to the first aspect
Burst trans-impedance amplifier described in road or second aspect.
As can be seen that in embodiments herein, the biasing circuit for the trans-impedance amplifier that happens suddenly include: operational amplifier,
First current feedback circuit, the second current feedback circuit, third current feedback circuit, triode Q1, MOS transistor M1 and resistance R1;Its
In, the output port of the first current feedback circuit is connected with the collector of triode Q1, the base stage of triode Q1 and its collector
It is connected, the emitter ground connection of triode Q1;The output port of second current feedback circuit and the non-inverting input terminal of operational amplifier
It is connected;The inverting input terminal of operational amplifier and the first port of resistance R1 are connected with the collector of triode Q1, fortune
The non-inverting input terminal for calculating amplifier is connected with the drain electrode of MOS transistor M1;The output port and MOS transistor of operational amplifier
The grid of M1 is connected;The second port of the source electrode of MOS transistor M1 and resistance R1 with the positive phase of third current feedback circuit
Connection;The cathode of third current feedback circuit is grounded.Operational amplifier, MOS transistor M1 and resistance R1 form negative feedback network, energy
The MOS transistor grid voltage of burst trans-impedance amplifier is enough set to be biased in correct current potential, so that the MOS transistor is in weak
On state solves the problems such as signal noise is excessive or signal distortion of burst trans-impedance amplifier output.
These aspects or other aspects of the application can more straightforward in the following description.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of structural schematic diagram of traditional trans-impedance amplifier;
Fig. 2 is a kind of structural schematic diagram of trans-impedance amplifier that happens suddenly provided by the embodiments of the present application;
Fig. 3 is a kind of structural schematic diagram of the biasing circuit for the trans-impedance amplifier that happens suddenly provided by the embodiments of the present application;
Fig. 4 is the structural schematic diagram of another burst trans-impedance amplifier provided by the embodiments of the present application.
Specific embodiment
It is described in detail separately below.
Referring to Fig. 1, Fig. 1 is a kind of structural schematic diagram of traditional trans-impedance amplifier.As shown in Figure 1, the tradition is amplified across resistance
Device include: resistance Rc, resistance R0, the first triode Q1, the second triode Q2, MOS transistor M0, automatic gain control circuit and
Current feedback circuit.
Wherein, the first port of above-mentioned resistance Rc meets DC voltage source VCC, second port and above-mentioned first triode Q1
Collector, triode Q1 emitter ground connection.
Wherein, the collector of above-mentioned second triode Q2 meets above-mentioned DC voltage source VCC, and base stage is with above-mentioned resistance Rc's
Second port is connected, and the emitter of above-mentioned second triode Q2 is connected with the anode of above-mentioned current feedback circuit, the electric current
The cathode of generator is grounded.
The output port of above-mentioned automatic gain control circuit is connected with the grid of above-mentioned MOS transistor M0, for MOS crystalline substance
The grid of body pipe M0 provides bias voltage.The drain electrode of MOS transistor M0 and the source electrode first port with above-mentioned resistance R0 respectively
It is connected with second port.
The first port of above-mentioned resistance R0 is connected with the base stage of above-mentioned first triode Q1, the second port of resistance R0
It is connected with the anode of above-mentioned current feedback circuit.
The course of work of the trans-impedance amplifier are as follows: above-mentioned automatic gain control circuit controls the M0 of above-mentioned MOS transistor, should
MOS transistor M0 composition in parallel with above-mentioned resistance R0 is active across resistance Rf.When the signal of trans-impedance amplifier input is small signal,
The output voltage Vg of above-mentioned automatic gain control circuit is smaller, and above-mentioned MOS transistor M0 grid voltage is smaller, which, which is in, closes
State, it is active at this time across resistance Rf=R0;When the signal of trans-impedance amplifier input is that big signal inputs, above-mentioned automatic gain control
The output voltage Vg of circuit processed becomes larger, then the grid voltage of above-mentioned MOS transistor M0 is larger, and the M0 is in the conductive state, at this time
It is above-mentioned active across resistance Rf=R0 | | Rm0, the Rm0 are the equivalent resistance of above-mentioned MOS transistor M0.
In order to keep automatic gain control circuit to stablize, the response time of the automatic gain control circuit is longer, is not suitable for
In burst trans-impedance amplifier application.
In order to solve in Fig. 1 traditional trans-impedance amplifier when big signal inputs, the response time of automatic gain control circuit
Longer problem, referring to fig. 2, Fig. 2 provide a kind of structural schematic diagram of trans-impedance amplifier that happens suddenly for the embodiment of the present application.Such as figure
Shown in 2, which includes: resistance Rc, resistance R0, the first triode Q1, the second triode Q2, MOS transistor
M0, constant pressure source and current feedback circuit.
Wherein, the first port of above-mentioned resistance Rc meets DC voltage source VCC, second port and above-mentioned first triode Q1
Collector, triode Q1 emitter ground connection.
Wherein, the collector of above-mentioned second triode Q2 meets above-mentioned DC voltage source VCC, and base stage is with above-mentioned resistance Rc's
Second port is connected, and the emitter of above-mentioned second triode Q2 is connected with the anode of above-mentioned current feedback circuit, electric current hair
The cathode ground connection of raw device.
The grid of above-mentioned MOS transistor M0 is connected with the anode of above-mentioned constant pressure source, the cathode ground connection of the constant pressure source, the perseverance
Potential source provides bias voltage for the grid of MOS transistor M0.The drain electrode of MOS transistor M0 and source electrode respectively with above-mentioned resistance
The first port of R0 is connected with second port.
The first port of above-mentioned resistance R0 is connected with the base stage of above-mentioned first triode Q1, the second port of resistance R0
It is connected with the anode of above-mentioned current feedback circuit.
Compared with traditional trans-impedance amplifier shown in FIG. 1, the main distinction of burst trans-impedance amplifier shown in Fig. 2 is,
The grid of MOS transistor is controlled by constant pressure source in Fig. 2, rather than is controlled by automatic gain control circuit, avoids to work as in this way
The response time longer problem of automatic gain control circuit circuit when big signal input, happen suddenly the meeting of trans-impedance amplifier output response
Input signal is followed in real time.When the signal of above-mentioned burst trans-impedance amplifier input is small signal, above-mentioned MOS transistor M0 is in
Weak on state, it is active at this time across resistance Rf ≈ R0;When the signal of above-mentioned burst trans-impedance amplifier input is big signal, Vo current potential
It reduces, above-mentioned MOS transistor M0 is changed from weak on state on state;The signal of above-mentioned MOS transistor M0 input is bigger
When, M0 on state is stronger.
When inputting small signal in order to ensure above-mentioned burst trans-impedance amplifier, above-mentioned MOS transistor M0 is in weak on state,
It just needs to provide suitable bias voltage for above-mentioned MOS transistor M0 grid, i.e., above-mentioned voltage Vg.Voltage Vg should be able to be followed
The variation of the parameters such as technique, supply voltage, temperature and change, just can ensure that when above-mentioned burst trans-impedance amplifier inputs small signal
When, above-mentioned MOS transistor M0 is in weak on state.
Referring to Fig. 3, Fig. 3 is a kind of structure of the biasing circuit for the trans-impedance amplifier that happens suddenly provided by the embodiments of the present application
Schematic diagram.The output voltage (i.e. above-mentioned Vg) of the biasing circuit can follow the variation of the parameters such as technique, supply voltage, temperature and
Variation, the grid for the MOS transistor M0 in Fig. 2 provide bias voltage, so that when above-mentioned burst trans-impedance amplifier inputs small letter
Number when, above-mentioned MOS transistor M0 is in weak on state.
As shown in figure 3, the biasing circuit includes: operational amplifier, the first current feedback circuit, the second current feedback circuit,
Three current feedback circuits, triode Q1, MOS transistor M1 and resistance R1.
Wherein, the output port of above-mentioned first current feedback circuit is connected with the collector of above-mentioned triode Q1, three pole
The emitter of pipe Q1 is grounded, and base stage is connected with its collector, and collector and the voltage of base stage are VCM.
The inverting input terminal of above-mentioned operational amplifier is connected with the collector of above-mentioned triode Q1, the operational amplifier
Non-inverting input terminal is connected with the output port of above-mentioned second current feedback circuit;The output port of above-mentioned operational amplifier with it is above-mentioned
The grid of MOS transistor M1 is connected, and the voltage of the operational amplifier output terminal mouth is Vg.
The drain electrode of above-mentioned MOS transistor M1 is connected with the non-inverting input terminal of above-mentioned operational amplifier, MOS transistor M1
Source electrode and the second port of above-mentioned resistance R1 be connected with the anode of above-mentioned third current feedback circuit, the of above-mentioned resistance R1
Single port is connected with the collector of above-mentioned triode Q1;The cathode of above-mentioned third current feedback circuit is grounded.
Wherein, above-mentioned resistance R1, MOS transistor M1 and operational amplifier constitute negative feedback network, to guarantee MOS transistor
M1 is in weak on state.
Wherein, above-mentioned resistance R1 and above-mentioned MOS transistor M1 constitutes active across resistance Rf.
Wherein, the dimensional parameters of above-mentioned triode Q1 it is consistent with the dimensional parameters of the first triode Q1 in above-mentioned Fig. 2 or
Proportional, above-mentioned MOS transistor M1 dimensional parameters it is consistent with the dimensional parameters of MOS transistor M0 in above-mentioned Fig. 2 or at than
Example, the dimensional parameters and the dimensional parameters of resistance R0 in above-mentioned Fig. 2 of above-mentioned resistance R1 are identical or proportional.
It should be noted that the dimensional parameters of triode include: characteristic frequency, operating voltage/electric current, Current amplifier
Multiple, collector emitter breakdown reverse voltage, maximum allowable dissipated power and packing forms.
The dimensional parameters of MOS transistor include: transistor types (N-type or p-type), cut-in voltage, direct current input resistance, leakage
Source breakdown voltage, gate breakdown voltage, low-frequency transconductance, conducting resistance, interelectrode capacity and low-frequency noise coefficient.
The dimensional parameters of resistance include: operating voltage/electric current, resistance value and breakdown voltage.
After above-mentioned operational amplifier the operation is stable, the voltage of non-inverting input terminal and the power supply of inverting input terminal are equal.
Since the drain electrode of above-mentioned MOS transistor M1 is connected with the non-inverting input terminal of above-mentioned operational amplifier, the first port of resistance R1
It is connected with the inverting input terminal of above-mentioned operational amplification circuit, and the inverting input terminal of the operational amplifier and above-mentioned triode pipe
The collector of Q1 be connected, it is possible to the first port of the drain electrode and above-mentioned resistance R1 of regarding above-mentioned MOS transistor M1 as is equal
It is connected with the collector of above-mentioned triode Q1.Again since the base stage of above-mentioned triode Q1 is connected with collector, therefore can see
It is connected with the base stage of above-mentioned triode Q1 at the drain electrode of above-mentioned MOS transistor M1 and the first port of above-mentioned resistance R1.And
The source electrode of above-mentioned MOS transistor M1 is connected with the second port of above-mentioned resistance R1.
And the first port of the drain electrode of MOS transistor M0 and resistance R0 are connected with the base stage of the first triode Q1 in Fig. 2,
And the source electrode of above-mentioned MOS transistor M0 is connected with the second port of above-mentioned resistance R0.MOS transistor M0 in above-mentioned Fig. 2 and
The dimensional parameters of first triode Q1 it is consistent with the dimensional parameters of MOS transistor M1 and triode Q1 in above-mentioned Fig. 3 or
Proportional, the dimensional parameters of the resistance R0 in above-mentioned Fig. 2 and the dimensional parameters of the resistance R1 in Fig. 3 are consistent or proportional, because
This can be seen that when working properly, and the working condition of MOS transistor M0 and resistance R0 in Fig. 2 are respectively and in above-mentioned Fig. 3
MOS transistor M1 is consistent with the working condition of resistance R1.The VBE and above-mentioned Fig. 3 tri- of the first triode Q1 in above-mentioned Fig. 2 at this time
The VBE of pole pipe Q1 is equal, voltage of the VBE between transistor base and emitter.
Therefore, it can be seen that it is active active identical across resistance in Fig. 2 across hindering in Fig. 3, therefore biased electrical shown in Fig. 3
Bias voltage of the voltage Vg of road output as the grid of the MOS transistor M0 in burst trans-impedance amplifier shown in above-mentioned Fig. 2,
When so that burst trans-impedance amplifier shown in Fig. 2 inputting small signal, MOS transistor M0 is in weak on state.
In other words, the MOS transistor M1 in above-mentioned biasing circuit shown in Fig. 3 and resistance R1 is used to match shown in Fig. 2
MOS transistor M0 and resistance R0, and above-mentioned operational amplifier, resistance R1 and MOS transistor M1 constitute negative feedback network, guarantee
MOS transistor M1 works in weak on state;Due to active active identical across resistance in Fig. 2 across hindering in Fig. 3, therefore use Fig. 3
Shown in the voltage Vg of biasing circuit output bias the grid of MOS transistor M0 shown in Fig. 2, it is ensured that it is shown in Fig. 2 prominent
When sending out the trans-impedance amplifier small signal of input, MOS transistor M0 is in weak on state.
In a kind of feasible embodiment, above-mentioned first current feedback circuit is constant-current source or resistance.
When above-mentioned first current feedback circuit is resistance, the output port of first current feedback circuit is the second of the resistance
Port, the first port of the resistance meet DC voltage source VCC.Since the voltage of the triode Q1 collector in Fig. 3 is VCM, then
The voltage at resistance both ends is VCC-VCM.
In a kind of feasible embodiment, above-mentioned second current feedback circuit and third current feedback circuit are constant-current source.
As can be seen that in embodiments herein, the biasing circuit for the trans-impedance amplifier that happens suddenly include: operational amplifier,
First current feedback circuit, the second current feedback circuit, third current feedback circuit, triode Q1, MOS transistor M1 and resistance R1;Its
In, the output port of the first current feedback circuit is connected with the collector of triode Q1, base stage and the collector phase of triode Q1
Connection, the emitter ground connection of triode Q1;The non-inverting input terminal phase of the output port of second current feedback circuit and operational amplifier
Connection;The inverting input terminal of operational amplifier and the first port of resistance R1 are connected with the collector of triode Q1, operation
The non-inverting input terminal of amplifier is connected with the drain electrode of MOS transistor M1;The output port and MOS transistor M1 of operational amplifier
Grid be connected;The source electrode of MOS transistor M1 and the second port of resistance R1 are connected with the anode of third current feedback circuit
It connects;The cathode of third current feedback circuit is grounded.Operational amplifier, MOS transistor M1 and resistance R1 form negative feedback network, can
So that the MOS transistor grid voltage of burst trans-impedance amplifier is biased in correct current potential, is led so that the MOS transistor is in weak
Logical state solves the problems such as signal noise is excessive or signal distortion of burst trans-impedance amplifier output.
Referring to fig. 4, Fig. 4 is the structural schematic diagram of another burst trans-impedance amplifier provided by the embodiments of the present application.Such as Fig. 4
Shown, which includes: resistance Rc, resistance R0, resistance R1, the first triode Q1, the second triode Q2, third
Triode Q3, MOS transistor M0, MOS transistor M1, the first current feedback circuit, the second current feedback circuit, third electric current occur
Device, the 4th current feedback circuit and operational amplifier;
Wherein, the output port of first current feedback circuit is connected with the collector of the third transistor Q3, institute
The base stage for stating third transistor Q3 is connected with collector, the emitter ground connection of the third transistor Q3;Second electric current
The output port of generator is connected with the non-inverting input terminal of the operational amplifier;
The collection of the inverting input terminal of the operational amplifier and the first port of the resistance R1 with third transistor Q3
Electrode is connected, and the non-inverting input terminal of the operational amplifier is connected with the drain electrode of the MOS transistor M1;The operation is put
The output port of big device is connected with the grid of the MOS transistor M1;
The second port of the source electrode of the MOS transistor M1 and the resistance R1 with the third current feedback circuit just
Pole is connected;The cathode of the third current feedback circuit is grounded;
The first port of the resistance Rc connects DC voltage source VCC, the collection of second port and the first triode Q1
Electrode, the emitter ground connection of the triode Q1;
The collector of the second triode Q2 connects the DC voltage source VCC, base stage and the second of the resistance Rc
Port is connected, and the emitter of the second triode Q2 is connected with the anode of the 4th current feedback circuit, and the described 4th
The cathode of current feedback circuit is grounded;
The grid of the MOS transistor M0 is connected with the output port of the biasing circuit, the MOS transistor M0's
Drain electrode and source electrode are connected with the first port of the resistance R0 and second port respectively;
The first port of the resistance R0 is connected with the base stage of above-mentioned first triode Q1, the second end of above-mentioned resistance R0
Mouth is connected with the anode of the 4th current feedback circuit.
Wherein, the dimensional parameters of the MOS transistor M1 it is consistent with the dimensional parameters of the MOS transistor M0 or at than
Example;The dimensional parameters of the resistance R0 and the dimensional parameters of the resistance R1 are consistent or proportional;The first triode Q1
Dimensional parameters and the dimensional parameters of the third transistor Q3 it is consistent or proportional.
In a kind of feasible embodiment, first current feedback circuit is constant-current source or resistance.
When above-mentioned first current feedback circuit is resistance, the output port of first current feedback circuit is the second of the resistance
Port, the first port of the resistance meet DC voltage source VCC.Since the voltage of the third transistor Q3 collector in Fig. 4 is
VCM, then the voltage at resistance both ends is VCC-VCM.
In a kind of feasible embodiment, second current feedback circuit, third current feedback circuit and the 4th electric current occur
Device is constant-current source.
It should be noted that the specific descriptions of burst trans-impedance amplifier shown in Fig. 4 can be found in above-mentioned Fig. 2 and Fig. 3
Associated description, no longer describe herein.
The embodiment of the present application also provides a kind of optical line terminal, which includes biasing circuit as shown in Figure 3
And/or burst trans-impedance amplifier as shown in Figure 4.
The embodiment of the present application is described in detail above, specific case used herein to the principle of the application and
Embodiment is expounded, the description of the example is only used to help understand the method for the present application and its core ideas;
At the same time, for those skilled in the art can in specific embodiments and applications according to the thought of the application
There is change place, to sum up above-mentioned, the contents of this specification should not be construed as limiting the present application.
Claims (9)
1. a kind of biasing circuit for the trans-impedance amplifier that happens suddenly characterized by comprising operational amplifier, the first electric current hair
Raw device, the second current feedback circuit, third current feedback circuit, triode Q1, MOS transistor M1 and resistance R1;
Wherein, the output port of first current feedback circuit is connected with the collector of the triode Q1, the triode
The base stage of Q1 is connected with its collector, the emitter ground connection of the triode Q1;
The output port of second current feedback circuit is connected with the non-inverting input terminal of the operational amplifier;
The collector of the inverting input terminal of the operational amplifier and the first port of the resistance R1 with the triode Q1
It is connected, the non-inverting input terminal of the operational amplifier is connected with the drain electrode of the MOS transistor M1;The operational amplifier
Output port be connected with the grid of the MOS transistor M1;
Positive phase of the second port of the source electrode of the MOS transistor M1 and the resistance R1 with the third current feedback circuit
Connection;The cathode of the third current feedback circuit is grounded.
2. biasing circuit according to claim 1, which is characterized in that first current feedback circuit is constant-current source or electricity
Resistance.
3. biasing circuit according to claim 1, which is characterized in that second current feedback circuit and the third electric current
Generator is constant-current source.
4. biasing circuit according to claim 1-3, which is characterized in that when the operational amplifier works,
The voltage of non-inverting input terminal and the voltage of inverting input terminal are equal.
5. a kind of burst trans-impedance amplifier, which is characterized in that including resistance Rc, resistance R0, resistance R1, the first triode Q1,
Two triode Q2, third transistor Q3, MOS transistor M0, MOS transistor M1, the first current feedback circuit, the second electric current occur
Device, third current feedback circuit, the 4th current feedback circuit and operational amplifier;
Wherein, the output port of first current feedback circuit is connected with the collector of the third transistor Q3, and described
The base stage of three triode Q3 is connected with collector, the emitter ground connection of the third transistor Q3;Second electric current occurs
The output port of device is connected with the non-inverting input terminal of the operational amplifier;
The collector of the inverting input terminal of the operational amplifier and the first port of the resistance R1 with third transistor Q3
It is connected, the non-inverting input terminal of the operational amplifier is connected with the drain electrode of the MOS transistor M1;The operational amplifier
Output port be connected with the grid of the MOS transistor M1;
Positive phase of the second port of the source electrode of the MOS transistor M1 and the resistance R1 with the third current feedback circuit
Connection;The cathode of the third current feedback circuit is grounded;
The first port of the resistance Rc meets DC voltage source VCC, the collector of second port and the first triode Q1,
The emitter of the triode Q1 is grounded;
The collector of the second triode Q2 connects the DC voltage source VCC, the second port of base stage and the resistance Rc
It is connected, the emitter of the second triode Q2 is connected with the anode of the 4th current feedback circuit, the 4th electric current
The cathode of generator is grounded;
The grid of the MOS transistor M0 is connected with the output port of the biasing circuit, the drain electrode of the MOS transistor M0
It is connected respectively with the first port of the resistance R0 and second port with source electrode;
The first port of the resistance R0 is connected with the base stage of above-mentioned first triode Q1, the second port of above-mentioned resistance R0 with
The anode of 4th current feedback circuit is connected.
6. burst trans-impedance amplifier according to claim 5, which is characterized in that
The dimensional parameters of the MOS transistor M1 and the dimensional parameters of the MOS transistor M0 are consistent or proportional;The resistance
The dimensional parameters of R0 and the dimensional parameters of the resistance R1 are consistent or proportional;The dimensional parameters of the first triode Q1 and institute
The dimensional parameters for stating third transistor Q3 are consistent or proportional.
7. burst trans-impedance amplifier according to claim 5, which is characterized in that first current feedback circuit is constant-current source
Or resistance.
8. burst trans-impedance amplifier according to claim 5, which is characterized in that second current feedback circuit, described
Three current feedback circuits and the 4th current feedback circuit are constant-current source.
9. a kind of optical line terminal, which is characterized in that the optical line terminal includes according to any one of claims 1-4 inclined
Circuits or such as described in any item burst trans-impedance amplifiers of claim 5-8.
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