CN110534417A - Silicon-based semiconductor and compound semiconductor Manufacturing resource method and Manufacturing resource device - Google Patents
Silicon-based semiconductor and compound semiconductor Manufacturing resource method and Manufacturing resource device Download PDFInfo
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- CN110534417A CN110534417A CN201910683606.2A CN201910683606A CN110534417A CN 110534417 A CN110534417 A CN 110534417A CN 201910683606 A CN201910683606 A CN 201910683606A CN 110534417 A CN110534417 A CN 110534417A
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- compound semiconductor
- silicon
- aluminum oxide
- semiconductor
- dielectric layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
Abstract
The present invention relates to field of semiconductor manufacture, and in particular to a kind of silicon-based semiconductor and compound semiconductor Manufacturing resource method and Manufacturing resource device, including the following steps: deposits aluminum oxide dielectric layer on the surface of silicon-based semiconductor；It is spare in the surface deposited aluminum layer of the aluminum oxide dielectric layer；Aluminum oxide dielectric layer is deposited on the surface of compound semiconductor；O +ion implanted is carried out to the compound semiconductor for being deposited with aluminum oxide dielectric layer, it is spare；Above-mentioned spare silicon-based semiconductor is bonded together with compound semiconductor.The present invention realize silicon-based semiconductor with compound semiconductor is good is bonded, avoid influence of the metal layer existing for metal bonding to semiconductor material, bonding efficiency and device quality be greatly improved.
Description
Technical field
The present invention relates to field of semiconductor materials, and in particular to a kind of silicon-based semiconductor and compound semiconductor Manufacturing resource
Method and Manufacturing resource device.
Background technique
Modern integrated circuits based on silicon base CMOS technology are being integrated with the continuous diminution of the characteristic size of cmos device
It is constantly progressive in terms of degree, power consumption and device property.On the other hand, compound semiconductor device and integrated circuit are in ultrahigh speed electricity
The fields such as road, microwave circuit, Terahertz circuit, integrated optoelectronic circuit obtain tremendous development.Due to silicon-based semiconductor CMOS chip
It is difficult to produce in same fab with compound semiconductor semiconductor chip, cannot achieve process compatible, but if by the two
Parts selection existing for combination and then breakthrough IC design field is limited, and various different materials devices cannot mix collection
At problem, will realize the significantly promotion of IC design, performance.
In conclusion a kind of Manufacturing resource method for providing realization compound semiconductor materials on silicon-based semiconductor is mesh
Preceding urgent problem to be solved.
Summary of the invention
The first object of the present invention is to provide a kind of silicon-based semiconductor and compound semiconductor Manufacturing resource method, the party
Method prepares aluminum oxide/constructed of aluminium on silicon-based semiconductor, and the three of a kind of interior oxygen-carrying ion are prepared on compound semiconductor
Al 2 O layer, and by the method for bonding, it is acted on using the counterdiffusion of aluminium ion and oxonium ion, realizes silicon-based semiconductor and change
Close the good bonding of object semiconductor.
The second object of the present invention is to provide a kind of Manufacturing resource device, and the device quality is high, performance greatly promotes.
In order to achieve the goal above, the present invention provides following technical schemes:
A kind of silicon-based semiconductor and compound semiconductor Manufacturing resource method, which comprises the following steps:
Aluminum oxide dielectric layer is deposited on the surface of silicon-based semiconductor；
It is spare in the surface deposited aluminum layer of the aluminum oxide dielectric layer；
Aluminum oxide dielectric layer is deposited on the surface of compound semiconductor；
O +ion implanted is carried out to the compound semiconductor for being deposited with aluminum oxide dielectric layer, it is spare；
Above-mentioned spare silicon-based semiconductor is bonded together with compound semiconductor.
This method can achieve following technical effect:
Aluminum oxide/constructed of aluminium is prepared on silicon-based semiconductor, prepared on compound semiconductor in one kind it is oxygen-containing from
The aluminum oxide layer of son, and by the method for bonding, it is acted on using the counterdiffusion of aluminium ion and oxonium ion, realizes that silicon substrate is partly led
Body with compound semiconductor is good is bonded, avoid influence of the metal layer existing for metal bonding to semiconductor material, greatly
Improve bonding efficiency and device quality.
In addition, according to the present invention above-mentioned silicon-based semiconductor and compound semiconductor Manufacturing resource method can also have it is as follows
Additional technical characteristic:
Preferably, the aluminum oxide thickness of dielectric layers on silicon-based semiconductor surface is 30-300 nanometers.
Preferably, the aluminum oxide thickness of dielectric layers on compound semiconductor surface is 30-300 nanometers.
Preferably, aluminium layer with a thickness of 3-30 nanometers.
Preferably, it is 3-30 nanometers that depth is injected in ion implanting step.
Preferably, the condition of bonding steps is vacuum, and temperature is 250-500 degree, and bonding time is 12-15 hours.
Preferably, compound semiconductor is indium phosphide or GaAs.
To sum up, compared with prior art, invention achieves following technical effects:
(1) bonding efficiency is high:
(2) Manufacturing resource device defects are few, quality is high；
(3) device more tends to be thinned；
(4) process is simple, is able to achieve automatic operation.
Detailed description of the invention
By reading the following detailed description of the preferred embodiment, various other advantages and benefits are common for this field
Technical staff will become clear.The drawings are only for the purpose of illustrating a preferred embodiment, and is not considered as to the present invention
Limitation.And throughout the drawings, the same reference numbers will be used to refer to the same parts.
Fig. 1 is the preparation method flow chart that the embodiment of the present invention 1 provides.
Specific embodiment
Embodiment of the present invention is described in detail below in conjunction with embodiment, but those skilled in the art will
Understand, the following example is merely to illustrate the present invention, and is not construed as limiting the scope of the invention.It is not specified in embodiment specific
Condition person carries out according to conventional conditions or manufacturer's recommended conditions.Reagents or instruments used without specified manufacturer is
The conventional products that can be obtained by commercially available purchase.
Embodiment 1
As shown in Figure 1, carrying out Manufacturing resource to a certain silicon-based semiconductor, compound semiconductor phosphatization indium sheet, specifically include
Following steps:
Step 1 deposits aluminum oxide dielectric layer on the surface of silicon-based semiconductor, and aluminum oxide thickness of dielectric layers is 30
Nanometer；
Step 2, in the surface deposited aluminum layer of the aluminum oxide dielectric layer, aluminium layer with a thickness of 3 nanometers, it is spare；
Step 3 deposits aluminum oxide dielectric layer on the surface of compound semiconductor, and aluminum oxide thickness of dielectric layers is
30 nanometers；
Step 4 carries out O +ion implanted to the compound semiconductor for being deposited with aluminum oxide dielectric layer, and injection depth is
It is 3 nanometers, spare；
Above-mentioned spare silicon-based semiconductor and compound semiconductor are bonded together by step 5, wherein the condition of bonding
For vacuum, temperature is 250 degree, and bonding time is 12 hours.
It should be noted that after step 1 or simultaneously, the present embodiment can also be directly in the table of compound semiconductor
Face deposits aluminum oxide dielectric layer, then the deposited aluminum layer on the aluminum oxide dielectric layer of silicon-based semiconductor again, the present invention
Therefore it is not limited, those skilled in the art can according to need flexible choice.
Embodiment 2
Manufacturing resource is carried out to a certain silicon-based semiconductor, gaas compound semiconductor piece, specifically includes the following steps:
Step 1 deposits aluminum oxide dielectric layer on the surface of silicon-based semiconductor, and aluminum oxide thickness of dielectric layers is
150 nanometers；
Step 2, in the surface deposited aluminum layer of the aluminum oxide dielectric layer, aluminium layer with a thickness of 15 nanometers, it is spare；
Step 3 deposits aluminum oxide dielectric layer on the surface of compound semiconductor, and aluminum oxide thickness of dielectric layers is
150 nanometers；
Step 4 carries out O +ion implanted to the compound semiconductor for being deposited with aluminum oxide dielectric layer, and injection depth is
It is 15 nanometers, spare；
Above-mentioned spare silicon-based semiconductor and compound semiconductor are bonded together by step 5, wherein the condition of bonding
For vacuum, temperature is 400 degree, and bonding time is 14 hours.
Embodiment 3
Manufacturing resource is carried out to a certain silicon-based semiconductor, gaas compound semiconductor piece, specifically includes the following steps:
Step 1 deposits aluminum oxide dielectric layer on the surface of silicon-based semiconductor, and aluminum oxide thickness of dielectric layers is
300 nanometers；
Step 2, in the surface deposited aluminum layer of the aluminum oxide dielectric layer, aluminium layer with a thickness of 3 nanometers, it is spare；
Step 3 deposits aluminum oxide dielectric layer on the surface of compound semiconductor, and aluminum oxide thickness of dielectric layers is
300 nanometers；
Step 4 carries out O +ion implanted to the compound semiconductor for being deposited with aluminum oxide dielectric layer, and injection depth is
It is 30 nanometers, spare；
Above-mentioned spare silicon-based semiconductor and compound semiconductor are bonded together by step 5, wherein the condition of bonding
For vacuum, temperature is 500 degree, and bonding time is 15 hours.
Through detecting, Manufacturing resource device made from above embodiments all shows preferably quality, and performance greatly promotes.
The foregoing is only a preferred embodiment of the present invention, but scope of protection of the present invention is not limited thereto,
In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by anyone skilled in the art,
It should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with the protection model of the claim
Subject to enclosing.
Claims (8)
1. a kind of silicon-based semiconductor and compound semiconductor Manufacturing resource method, which comprises the following steps:
Aluminum oxide dielectric layer is deposited on the surface of silicon-based semiconductor；
It is spare in the surface deposited aluminum layer of the aluminum oxide dielectric layer；
Aluminum oxide dielectric layer is deposited on the surface of compound semiconductor；
O +ion implanted is carried out to the compound semiconductor for being deposited with aluminum oxide dielectric layer, it is spare；
Above-mentioned spare silicon-based semiconductor is bonded together with compound semiconductor.
2. the method according to claim 1, wherein the aluminum oxide medium on the silicon-based semiconductor surface
Layer is with a thickness of 30-300 nanometers.
3. the method according to claim 1, wherein the aluminum oxide on the compound semiconductor surface is situated between
Matter layer is with a thickness of 30-300 nanometers.
4. the method according to claim 1, wherein the aluminium layer with a thickness of 3-30 nanometers.
5. being received the method according to claim 1, wherein injecting depth in the ion implanting step for 3-30
Rice.
6. the method according to claim 1, wherein the condition of the bonding steps is vacuum, temperature 250-
500 degree, bonding time is 12-15 hours.
7. the method according to claim 1, wherein the compound semiconductor is indium phosphide or GaAs.
8. a kind of Manufacturing resource device, which is characterized in that be made using the described in any item methods of claim 1-7.
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| CN110534417B CN110534417B (en) | 2021-12-21 |
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