CN110504232A - Quad flat non-leaded chip package and the method that can be cut - Google Patents
Quad flat non-leaded chip package and the method that can be cut Download PDFInfo
- Publication number
- CN110504232A CN110504232A CN201810470121.0A CN201810470121A CN110504232A CN 110504232 A CN110504232 A CN 110504232A CN 201810470121 A CN201810470121 A CN 201810470121A CN 110504232 A CN110504232 A CN 110504232A
- Authority
- CN
- China
- Prior art keywords
- pad
- cleavable
- cut
- integrated circuit
- circuit die
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 15
- 238000005538 encapsulation Methods 0.000 claims abstract description 46
- 238000004806 packaging method and process Methods 0.000 claims abstract description 39
- 241000218202 Coptis Species 0.000 claims abstract description 32
- 235000002991 Coptis groenlandica Nutrition 0.000 claims abstract description 32
- 239000013078 crystal Substances 0.000 claims description 3
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 238000009434 installation Methods 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 150000001875 compounds Chemical class 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 230000005611 electricity Effects 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 238000012856 packing Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 210000003205 muscle Anatomy 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229920006336 epoxy molding compound Polymers 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
The present invention relates to quad flat non-leaded chip package and the method that can be cut, encapsulation includes integrated circuit die, lead frame, pad, gold thread and packaging body.Pad includes the not cleavable pad and cleavable pad being electrically connected.Not cleavable pad is electrically connected integrated circuit die by gold thread.Cleavable pad is extended from not cleavable pad to packaging body outside direction.Invention increases pads along the size of extending direction, pad is set to be cut, ic chip package is cut into required contour structures suitable for user, promotes the suitability of QFN and terminal by the customization demand to the ic chip package with sensor for meeting user.QFN, which encapsulates big plate, simplifies manufacture craft, more reduces cost, is readily transported packaging, and user's custom cut of being more convenient for obtains expected QFN.
Description
Technical field
The present invention relates to IC chips, more particularly to the encapsulation and its implementation of IC chip.
Background technique
Prior art abbreviation QFN includes integrated without pin quad flat package Quad Flat Non-lead package
Circuit die, for the lead frame of integrated circuit die to be fixedly mounted, around the pad of integrated circuit die setting, being used for will
The gold thread that integrated circuit die is electrically connected with pad, and the encapsulation of encapsulation integrated circuit die, lead frame, pad and gold thread
Body.Pad is laid generally along rectangle sideline.Prior art QFN has the characteristics that small in size, the lead frame and pad of use
Conducive to package cooling, lead frame hygroscopicity is low and at low cost, makes to encapsulate that applicable situation is more, production cost is low and the production cycle
It is short.But prior art QFN, due to being designed using no pin, pad is small in size and is directly used as the conductive contact of encapsulation, makes to seal
Dress cannot be cut, and wish the demand that the contour structures of the ic chip package with sensor can be customized with user
It contradicts, keeps prior art QFN and terminal adaptation poor.
Summary of the invention
The technical problem to be solved in the present invention is that proposing the nothing that can be cut in place of avoiding the deficiencies in the prior art
Lead quad flat package QFN, and the method for enabling leadless quad flat encapsulation QFN to be cut, by pad
The suitability of QFN is improved and promoted, user's customized demand is met.
The present invention solves the technical problem can realize by using following technical scheme:
It designs, manufacture a kind of quad flat non-leaded chip package that can be cut, including an at least integrated circuit die, lead frame
Frame, at least a pad for being electrically connected the gold thread of integrated circuit die and pad, and the encapsulation integrated circuit die, draw
The packaging body of wire frame, pad and gold thread.The integrated circuit die is fixedly mounted on the lead frames.The pad is around collection
It is arranged at circuit die, including the not cleavable pad being electrically connected and cleavable pad.Not cleavable pad is by gold
Line is electrically connected integrated circuit die.Cleavable pad is extended from not cleavable pad to packaging body outside direction.Packed body envelope
The pad of dress at least one can be packaged the conductive contact of outer electrical component electrical contact.
Specifically, the position of the pad setting makes cleavable pad be not connected with the end of not cleavable pad along rectangle
Encapsulation boundary setting.
From the angle for realizing cutting, the minimum cut boundary of encapsulation is the minimum that not cleavable pad can be made not cut
Annular.Specifically, not cleavable pad and cleavable pad tie point are arranged along the laying boundary that rectangle sideline surrounds, envelope
The minimum cut boundary of dress is exactly the laying boundary that rectangle sideline surrounds.Alternatively, not cleavable pad is connect with cleavable pad
Point is arranged along the laying boundary that rectangle sideline surrounds, and the minimum cut boundary of encapsulation is that all not cleavable pads are trapped among it
In and at least with neither cleavable pad edge be inscribed circumference line boundary.
To obtain cleavable region, the extending direction that cleavable pad extends to outside packaging body can be cut with encapsulation
The angle of cut direction be greater than 0 degree and less than 180 degree.Further, the extension side that cleavable pad extends to outside packaging body
Not less than 45 degree and it is not more than 135 degree to the angle for the cut direction that can be cut with encapsulation.Preferably, cleavable pad to
The extending direction extended outside packaging body is vertical with the cut direction that encapsulation can be cut.
As the conductive contact implementation of pad, the conductive contact of pad includes the first conductive contact, the second conductive touching
At least one of point, third conductive contact and the 4th conductive contact.First conductive contact is cut along what encapsulation can be cut
Cut the conductive electric shock that not cleavable pad at least one end is arranged in direction.Second conductive contact is along cleavable pad to encapsulation
The conductive contact of the cleavable pad end is arranged in the extending direction extended outside body.Third conductive contact is after cutting can
Cut the conductive contact that the end of pad is formed.4th conductive contact is that cleavable pad is cut off completely and in not cleavable weldering
The conductive contact that disk is formed.
Specifically, the lead frame includes the inner frame of central column, the outer framework of central column, and at least one connection
Muscle.Inner frame is enclosed in outer framework, and inner frame and outer framework are fixed together by dowel.The integrated circuit die is solid
Dingan County is on inner frame.The cleavable pad of the pad is fixedly mounted on outer framework.
Further, the integrated circuit die is fixedly mounted on inner frame by crystal grain bonding film.
Specifically, the integrated circuit die includes IC wafer and integrated-circuit die.
Specifically, the packaging body is epoxy resin injected molded compound.
The present invention solves the technical problem can realize again by using following technical scheme:
It designs, manufacture a kind of big plate of quad flat non-leaded chip package that can be cut, including be tiled and be packaged into plate entirety
At least two quad flat non-leaded chip packages.The quad flat non-leaded chip package includes an at least integrated circuit die, lead
Frame, at least a pad, for being electrically connected the gold thread of integrated circuit die and pad, and the encapsulation integrated circuit die,
The packaging body of lead frame, pad and gold thread.The integrated circuit die is fixedly mounted on the lead frames.The pad surrounds
Integrated circuit die setting, including the not cleavable pad being electrically connected and cleavable pad.Not cleavable pad by
Gold thread is electrically connected integrated circuit die.Cleavable pad is extended from not cleavable pad to packaging body outside direction.Packed body
The pad of encapsulation at least one can be packaged the conductive contact of outer electrical component electrical contact.
The present invention, which solves the technical problem, to be realized by using following technical scheme:
It is proposed a kind of method for enabling quad flat non-leaded chip package to be cut, the encapsulation includes that an at least integrated circuit is naked
Piece is capable of fixing the lead frame of installation integrated circuit die, an at least pad, for being electrically connected integrated circuit die and pad
Gold thread, and the encapsulation integrated circuit die, lead frame, pad and gold thread packaging body.The method is, for pad
Cleavable pad and not cleavable pad are set;Pad is arranged around integrated circuit die, not cleavable pad is by gold thread
It is electrically connected integrated circuit die;Cleavable pad is extended from not cleavable pad to packaging body outside direction;Weldering after making encapsulation
Disk at least one can be packaged the conductive contact of outer electrical component electrical contact.
Compared with the existing technology compared with the skill of " quad flat non-leaded chip package and the method that can be cut " of the invention
Art effect is:
Cleavable pad is added along to the extending direction outside packaging body, increases size of the pad along extending direction, makes to weld
Disk can be cut, and not meet user to the collection with sensor because influencing the conductive contact structures without pin by cutting
At the customization demand of circuit chip package, ic chip package is cut into required contour structures suitable for user,
Promote the suitability of QFN and terminal;The big plate of quad flat non-leaded chip package simplifies manufacture craft, more reduces cost, is convenient for
Transportation and packing, user's custom cut of being more convenient for obtain expected QFN.
Detailed description of the invention
Fig. 1 is the positive throwing of " quad flat non-leaded chip package and the method that can be cut " preferred embodiment of the invention
Shadow schematic front view;
Fig. 2 is the marked direction the A-A schematic cross-sectional view of Fig. 1;
Fig. 3 is the orthographic projection schematic front view of the big plate 8 of quad flat non-leaded chip package QFN made of the preferred embodiment.
Specific embodiment
It is described in further detail below in conjunction with preferred embodiment shown in attached drawing.
The present invention proposes a kind of quad flat non-leaded chip package QFN 7 that can be cut, as depicted in figs. 1 and 2, including
An at least integrated circuit die 4, lead frame 2, at least a pad 1, for being electrically connected the gold of integrated circuit die 4 and pad 1
Line 3, and encapsulate the packaging body 5 of the integrated circuit die 4, lead frame 2, pad 1 and gold thread 3.The integrated circuit is naked
Piece 4 includes IC wafer Wafer and integrated-circuit die Die.The integrated circuit die 4 is fixedly mounted on lead frame
On 2.The pad 1 is arranged around integrated circuit die 4, including the not cleavable pad 12 being electrically connected and cleavable weldering
Disk 11.Not cleavable pad 12 is electrically connected integrated circuit die 4 by gold thread 3.Cleavable pad 11 is by not cleavable pad 12
Extend to 5 outside direction of packaging body.The pad 1 at least one that packed body 5 encapsulates can be in electrical contact by the electrical component outside QFN
Conductive contact.
Cleavable pad 11 extends to 5 outside direction of packaging body, increases pad 1 along the size of extending direction, makes pad 1
It can be cut.Since gold thread 3 is connected electrically on not cleavable pad 12, cutting cleavable pad 11 in any case all will not shadow
Ring conductive contact structures of the QFN without pin.Present invention accomplishes user's determining to the ic chip package with sensor
Ic chip package is cut into required contour structures suitable for user by inhibition and generation demand, and promotion QFN is adapted to terminal
Property.IC chip with sensor such as fingerprint recognition chip, pressure sense die, photoelectric sensing chip etc..
To make encapsulation have rectangular cross section or flat quadrangular shape, the preferred embodiment of the present invention, the pad 1 is set
The end that the position set makes cleavable pad 11 be not connected with not cleavable pad 12 is arranged along the encapsulation boundary C5 of rectangle.Also
Be cleavable pad 11 end along rectangle sideline encapsulation boundary C5 be arranged, the laying without cleavable pad 12 can not
Circumscribed.The preferred embodiment of the present invention, in terms of cross section, not cleavable pad 12 is also to surround integrated circuit along a rectangle sideline
Bare die 2 is arranged.
Since pad 1 is arranged around integrated circuit die 4, the cut coverage of QFN of the present invention is exactly not cleavable pad 12
Outside.To which the minimum cut boundary of QFN of the present invention encapsulation is the minimum ring that not cleavable pad 12 can be made not cut
Shape.The concrete shape on minimum cut boundary is determined by cut surface.
The preferred embodiment of the present invention with the four sides cylindricality cut surface with rectangle sideline cross section, and has circumference
The cylindrical surface of shape cross section or elliptic cylinder cut surface with oval week linear cross section illustrate the minimum cut side of QFN
Boundary.The preferred embodiment of the present invention, as shown in Figure 1, not cleavable pad 12 is with cleavable 11 tie point of pad along rectangle sideline
The laying boundary C1 setting surrounded, if used using the four sides cylindricality with rectangle sideline cross section as cut surface, the present invention
The minimum cut boundary of QFN is exactly the laying boundary C1 that rectangle sideline surrounds.If using the circle with the linear cross section of circumference
When cylinder or elliptic cylinder with oval week linear cross section are as cut surface, the minimum cut boundary of QFN of the present invention is
All not cleavable pads 12 are trapped among to the circumference line boundary C2 wherein and being at least inscribed with neither cleavable 12 edge of pad.
Its edge is inscribed in the not cleavable pad more than 12 of circumference line boundary C2, it is meant that the range of circumference line boundary C2 is smaller.
The cut direction that the extending direction e and QFN that the cleavable pad 11 of the present invention extends to outside packaging body 5 can be cut
The angle β of s is greater than 0 degree and is less than 180 degree, that is, extending direction e and cut direction s should not be conllinear or not parallel.
As the practical plan of establishment, extending direction e and QFN that the cleavable pad 11 of the present invention extends to outside packaging body 5
The angle β for the cut direction s that can be cut is not less than 45 degree and is not more than 135 degree.
As the more common plan of establishment, the preferred embodiment of the present invention, as shown in Fig. 2, cleavable pad 11 is to packaging body 5
The extending direction e of outer extension is vertical with the cut direction s that QFN can be cut, so that QFN be made to have biggish cleavable model
It encloses.
The preferred embodiment of the present invention, as depicted in figs. 1 and 2, cleavable pad 11 and not cleavable pad 12 are all in the form of a column,
Cleavable pad 11 and the respective one end of cleavable pad 12 is not electrically connected.
The conductive contact of usual pad 1 should be exposed at outside packaging body 5 and can be in electrical contact by the electrical component outside QFN,
There are many its implementations.QFN of the present invention just allows the conductive contact of pad 1 at more than one due to that can be cut.This
The conductive contact of invention pad 1 includes in the first conductive contact, the second conductive contact, third conductive contact and the 4th conductive contact
At least one.As shown in Fig. 2, the first conductive contact 121 is that the cut direction s setting that can be cut along QFN can not cut
Cut the conductive electric shock of at least one end of pad 12.As shown in Fig. 2, the second conductive contact 111 is along cleavable pad 11 to encapsulation
The conductive contact 111 of cleavable 11 end of pad is arranged in the extending direction e extended outside body 5.Third conductive contact is to cut
The conductive contact formed after cutting in the end of cleavable pad 11.4th conductive contact be cleavable pad cut off completely and
The conductive contact that not cleavable pad is formed.First conductive contact 121 and the second conductive contact 111 can be encapsulated in QFN to be completed
It is just formed afterwards, and third conductive contact and the 4th conductive contact should be formed after QFN is cut.
The preferred embodiment of the present invention, as shown in Figure 1, the lead frame 2 includes the inner frame 21 of central column, central column
Outer framework 22, and an at least dowel 23.Inner frame 21 is enclosed in outer framework 22, and inner frame 21 and outer framework 22 are by even
Muscle 23 is connect to be fixed together.The integrated circuit die 4 is fixedly mounted on inner frame 21.The cleavable pad of the pad 1
11 are fixedly mounted on outer framework 22.Outer framework 22 is that the preceding pad 1 of laying of encapsulation provides the structural support.The present invention is preferably implemented
Example, outer framework 22 is the tetragonous annulated column for the annular cross section that there is rectangle sideline to surround, the quadrangular that 22 inner face of outer framework surrounds
The cross section in face is the outer boundary C4 that rectangle sideline surrounds.When using the four sides cylindricality with rectangle sideline cross section as cut surface
When, outer boundary C4 can be set on maximum cutting side boundary.When with the cylindrical surface with the linear cross section of circumference or with ellipse
It, can linear or oval week be linear by the circumference for being inscribed within outer boundary C4 when the elliptic cylinder of circular cross-section is as cut surface
Boundary C3 is set as maximum cutting round edge circle.
The preferred embodiment of the present invention, as shown in Fig. 2, crystal grain bonding film of the integrated circuit die 4 by abbreviation DAF
Die Attach Film 6 is fixedly mounted on inner frame 21.
The preferred embodiment of the present invention, as depicted in figs. 1 and 2, the packaging body 5 are the epoxy resin injection moldingizations of abbreviation EMC
Close object Epoxy Molding Compound.
The quad flat non-leaded chip package QFN 7 that can be cut based on above scheme of the present invention, as shown in figure 3, this
Invention also proposes a kind of big plate 8 of quad flat non-leaded chip package QFN that can be cut, including is tiled and is packaged into plate entirety
At least two quad flat non-leaded chip package QFN 7.Tiling encapsulation, which refers to, is based on same datum level, mutual phase boundray phase for QFN 7
Tile the encapsulating structure laid and formed adjacently.As depicted in figs. 1 and 2, QFN 7 includes an at least integrated circuit die 4, lead
Frame 2, at least a pad 1, for being electrically connected the gold thread 3 of integrated circuit die 4 and pad 1, and the encapsulation integrated circuit
Bare die 4, lead frame 2, pad 1 and gold thread 3 packaging body 5.The integrated circuit die 4 is fixedly mounted on lead frame 2.
The pad 1 is arranged around integrated circuit die 4, including the not cleavable pad 12 being electrically connected and cleavable pad
11.Not cleavable pad 12 is electrically connected integrated circuit die 4 by gold thread 3.Cleavable pad 11 from not cleavable pad 12 to
5 outside direction of packaging body extends.What the pad 1 at least one that packed body 5 encapsulates can be in electrical contact by the electrical component outside QFN
Conductive contact.Although each QFN 7 for constituting the big plate 8 of QFN has respective packaging body 5, the packaging body 5 of substantial each QFN 7
All connect into an entirety.From realizing in technique, each lead frame 2 should be laid by the structure being pre-designed, be fixed respectively
Integrated circuit die is installed, pad 1 is arranged around the integrated circuit die 4 of respectively place QFN 7 and completes being electrically connected for gold thread 3
It connects, finally as unit of the big plate 8 of QFN, by the packaging technology of packaging body 5 disposably to the integrated circuit die of all QFN 7
4, lead frame 2, pad 1 and gold thread 3 carry out overall package and the big plate 8 of QFN are made.
Prior art QFN is manufactured using the IC chip of QFN into monolithic due to not cleavable, with being provided with core
The pallet packing of the fixed slot position of piece, the pallet are also referred to as Tray disk.And QFN of the present invention can be cut, and Fig. 3 can be made into
The shown big plate 8 of QFN for being easier to packed and transported.Since once encapsulation can form multiple QFN 7 to the big plate 8 of QFN, technique realizes phase
The prior art is easier, cost is lower.The preferred embodiment of the present invention, as shown in figure 3, QFN 7 is laid by array structure,
The big plate 8 of QFN shown in Fig. 3 is laid 12 QFN 7 by the array of 3 column, 4 row, is cut as needed to the big plate of QFN 8 by user
And the monolithic integrated circuit chip for meeting user's customized demand is obtained, packing cost not only is saved compared with the prior art, is additionally favorable for
Meet the customization demand of user.The above-mentioned specific implementation for QFN 7 is suitable for constituting the QFN7 of the big plate 8 of QFN, this
Place repeats no more.
Based on above-mentioned encapsulating structure, the present invention also proposes a kind of quad flat non-leaded chip package QFN to be enable to be cut
Method, the QFN 7 include an at least integrated circuit die 4, are capable of fixing the lead frame 2 of installation integrated circuit die 4, until
A few pad 1 for being electrically connected the gold thread 3 of integrated circuit die 4 and pad 1, and the encapsulation integrated circuit die 4, draws
The packaging body 5 of wire frame 2, pad 1 and gold thread 3.The method for enabling QFN to be cut is that cleavable weldering is arranged for pad 1
Disk 11 and not cleavable pad 12.Pad 1 is arranged around integrated circuit die 4, not cleavable pad 12 is electrically connected by gold thread 3
Connect integrated circuit die 4.Cleavable pad 11 is extended from not cleavable pad 12 to 5 outside direction of packaging body, by cleavable
The cleavable region of the acquisition of pad 11 QFN.Enable encapsulation after pad 1 at least one by QFN outside electrical component electrical contact
Conductive contact.
Claims (15)
1. the quad flat non-leaded chip package that one kind can be cut, it is described it is characterized by:
Including an at least integrated circuit die, lead frame, at least a pad, for being electrically connected integrated circuit die and pad
Gold thread, and encapsulate the packaging body of the integrated circuit die, lead frame, pad and gold thread;
The integrated circuit die is fixedly mounted on the lead frames;
The pad is arranged around integrated circuit die, including the not cleavable pad being electrically connected and cleavable pad;
Not cleavable pad is electrically connected integrated circuit die by gold thread;Cleavable pad is from not cleavable pad to packaging body outside side
To extension;
The pad at least one of packed body encapsulation can be packaged the conductive contact of outer electrical component electrical contact.
2. the quad flat non-leaded chip package according to claim 1 that can be cut, it is characterised in that:
The position of the pad setting makes cleavable pad be not connected with the end of not cleavable pad along the encapsulation boundary of rectangle
Setting.
3. the quad flat non-leaded chip package according to claim 1 or 2 that can be cut, it is characterised in that:
The minimum cut boundary of encapsulation is the minimum annular that not cleavable pad can be made not cut.
4. the quad flat non-leaded chip package according to claim 3 that can be cut, it is characterised in that:
Not cleavable pad and cleavable pad tie point are arranged along the laying boundary that rectangle sideline surrounds, and the minimum of encapsulation is cut
Cut edge circle is exactly the laying boundary that the rectangle sideline surrounds.
5. the quad flat non-leaded chip package according to claim 3 that can be cut, it is characterised in that:
Not cleavable pad and cleavable pad tie point are arranged along the laying boundary that rectangle sideline surrounds, and the minimum of encapsulation is cut
Cut edge circle is that all not cleavable pads are trapped among to the circumference side wherein and being at least inscribed with neither cleavable pad edge
Boundary.
6. the quad flat non-leaded chip package according to claim 1 or 2 that can be cut, it is characterised in that:
The angle for the cut direction that the extending direction and encapsulation that cleavable pad extends to outside packaging body can be cut is greater than 0 degree
And it is less than 180 degree.
7. the quad flat non-leaded chip package according to claim 6 that can be cut, it is characterised in that:
The angle for the cut direction that the extending direction that cleavable pad extends to outside packaging body can be cut with encapsulation is not less than
45 degree and be not more than 135 degree.
8. the quad flat non-leaded chip package according to claim 7 that can be cut, it is characterised in that:
The extending direction that cleavable pad extends to outside packaging body is vertical with the cut direction that encapsulation can be cut.
9. the quad flat non-leaded chip package according to claim 1 or 2 that can be cut, it is characterised in that:
The conductive contact of pad includes in the first conductive contact, the second conductive contact, third conductive contact and the 4th conductive contact
At least one;
First conductive contact is that leading for not cleavable pad at least one end is arranged in the cut direction that can be cut along encapsulation
Electricity electric shock;
Second conductive contact is arranged to the extending direction extended outside packaging body at the cleavable pad end along cleavable pad
The conductive contact in portion;
Third conductive contact is the conductive contact formed after cutting in the end of cleavable pad;
4th conductive contact is that cleavable pad is cut off completely and in the conductive contact of not cleavable pad formation.
10. the quad flat non-leaded chip package according to claim 1 or 2 that can be cut, it is characterised in that:
The lead frame includes the inner frame of central column, the outer framework of central column, and an at least dowel;
Inner frame is enclosed in outer framework, and inner frame and outer framework are fixed together by dowel;
The integrated circuit die is fixedly mounted on inner frame;
The cleavable pad of the pad is fixedly mounted on outer framework.
11. the quad flat non-leaded chip package according to claim 10 that can be cut, it is characterised in that:
The integrated circuit die is fixedly mounted on inner frame by crystal grain bonding film.
12. the quad flat non-leaded chip package according to claim 1 or 2 that can be cut, it is characterised in that:
The integrated circuit die includes IC wafer and integrated-circuit die.
13. the quad flat non-leaded chip package according to claim 1 or 2 that can be cut, it is characterised in that:
The packaging body is epoxy resin injected molded compound.
14. the big plate of the quad flat non-leaded chip package that one kind can be cut, it is characterised in that:
At least two quad flat non-leaded chip packages of plate entirety are packaged into including being tiled;
The quad flat non-leaded chip package includes an at least integrated circuit die, lead frame, at least a pad, for being electrically connected
Connect the gold thread of integrated circuit die and pad, and the encapsulation of the encapsulation integrated circuit die, lead frame, pad and gold thread
Body;
The integrated circuit die is fixedly mounted on the lead frames;
The pad is arranged around integrated circuit die, including the not cleavable pad being electrically connected and cleavable pad;
Not cleavable pad is electrically connected integrated circuit die by gold thread;Cleavable pad is from not cleavable pad to packaging body outside side
To extension;
The pad at least one of packed body encapsulation can be packaged the conductive contact of outer electrical component electrical contact.
15. a kind of method for enabling quad flat non-leaded chip package to be cut, it is characterised in that:
It is described encapsulation include an at least integrated circuit die, be capable of fixing installation integrated circuit die lead frame, at least one
Pad, for being electrically connected the gold thread of integrated circuit die and pad, and the encapsulation integrated circuit die, lead frame, weldering
The packaging body of disk and gold thread;
The method is,
For pad, cleavable pad and not cleavable pad are set;
Pad is arranged around integrated circuit die, not cleavable pad is electrically connected integrated circuit die by gold thread;It is cleavable
Pad is extended from not cleavable pad to packaging body outside direction;
Pad at least one after enabling encapsulation is packaged the conductive contact of outer electrical component electrical contact.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810470121.0A CN110504232A (en) | 2018-05-16 | 2018-05-16 | Quad flat non-leaded chip package and the method that can be cut |
TW108116277A TW201947723A (en) | 2018-05-16 | 2019-05-10 | Quad flat non-lead package and method for enabling it to be cut which can meet the user's customized requirement for the integrated circuit chip package with sensors and improve the adaptability of QFN and terminal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810470121.0A CN110504232A (en) | 2018-05-16 | 2018-05-16 | Quad flat non-leaded chip package and the method that can be cut |
Publications (1)
Publication Number | Publication Date |
---|---|
CN110504232A true CN110504232A (en) | 2019-11-26 |
Family
ID=68583881
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810470121.0A Pending CN110504232A (en) | 2018-05-16 | 2018-05-16 | Quad flat non-leaded chip package and the method that can be cut |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN110504232A (en) |
TW (1) | TW201947723A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112272442A (en) * | 2020-09-16 | 2021-01-26 | 华为技术有限公司 | Heat dissipation lead structure and related device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6674154B2 (en) * | 2001-03-01 | 2004-01-06 | Matsushita Electric Industrial Co., Ltd. | Lead frame with multiple rows of external terminals |
CN1577828A (en) * | 2003-07-02 | 2005-02-09 | 株式会社瑞萨科技 | Semiconductor device and lead frame |
CN105556663A (en) * | 2014-12-23 | 2016-05-04 | 英特尔公司 | Integrated packaging design with leads for overlapped package product |
CN106373932A (en) * | 2015-07-24 | 2017-02-01 | 万国半导体股份有限公司 | Packaging device and manufacturing method |
-
2018
- 2018-05-16 CN CN201810470121.0A patent/CN110504232A/en active Pending
-
2019
- 2019-05-10 TW TW108116277A patent/TW201947723A/en unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6674154B2 (en) * | 2001-03-01 | 2004-01-06 | Matsushita Electric Industrial Co., Ltd. | Lead frame with multiple rows of external terminals |
CN1577828A (en) * | 2003-07-02 | 2005-02-09 | 株式会社瑞萨科技 | Semiconductor device and lead frame |
CN105556663A (en) * | 2014-12-23 | 2016-05-04 | 英特尔公司 | Integrated packaging design with leads for overlapped package product |
CN106373932A (en) * | 2015-07-24 | 2017-02-01 | 万国半导体股份有限公司 | Packaging device and manufacturing method |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112272442A (en) * | 2020-09-16 | 2021-01-26 | 华为技术有限公司 | Heat dissipation lead structure and related device |
Also Published As
Publication number | Publication date |
---|---|
TW201947723A (en) | 2019-12-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6646339B1 (en) | Thin and heat radiant semiconductor package and method for manufacturing | |
KR100214463B1 (en) | Lead frame of clip type and method manufacture of the package | |
CN101740536B (en) | Semiconductor package | |
US7687892B2 (en) | Quad flat package | |
US8125063B2 (en) | COL package having small chip hidden between leads | |
CN109390310B (en) | Patterned lead frame | |
US6427976B1 (en) | Lead-frame-based chip-scale package and method of manufacturing the same | |
US6703691B2 (en) | Quad flat non-leaded semiconductor package and method of fabricating the same | |
US8008132B2 (en) | Etched surface mount islands in a leadframe package | |
US6838752B2 (en) | Semiconductor package with recessed leadframe and a recessed leadframe | |
CN110504232A (en) | Quad flat non-leaded chip package and the method that can be cut | |
CN105097749A (en) | Combined QFN and QFP semiconductor package | |
US6462422B2 (en) | Intercrossedly-stacked dual-chip semiconductor package | |
US20130147029A1 (en) | Ultra-small chip package and method for manufacturing the same | |
CN207938654U (en) | A kind of leadless packages light-source structure | |
CN104167403B (en) | Lead frame for multi-pin encapsulation | |
US6784019B2 (en) | Intercrossedly-stacked dual-chip semiconductor package and method of fabricating the same | |
US6818968B1 (en) | Integrated circuit package and process for forming the same | |
CN208674105U (en) | Lead frame and the packaging body for using the lead frame | |
CN102891090A (en) | Semiconductor device and packaging method thereof | |
TW200642095A (en) | Lead-frame type semiconductor package and lead frame thereof | |
CN205376512U (en) | Outer pin packaging structure of lead frame and cubic flat nothing | |
CN212750875U (en) | Semiconductor radiating fin device | |
CN103130173B (en) | For MEMS chip encapsulation without little island lead frame, array of leadframes and encapsulating structure | |
KR100239685B1 (en) | Semiconductor package structure and its manufacturing method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |