CN110460259B - Ten-switch staggered clamping three-phase photovoltaic inverter topological structure - Google Patents

Ten-switch staggered clamping three-phase photovoltaic inverter topological structure Download PDF

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CN110460259B
CN110460259B CN201910675344.5A CN201910675344A CN110460259B CN 110460259 B CN110460259 B CN 110460259B CN 201910675344 A CN201910675344 A CN 201910675344A CN 110460259 B CN110460259 B CN 110460259B
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bridge arm
switch tube
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switch
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CN110460259A (en
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马海啸
陈泽峰
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Nanjing University of Posts and Telecommunications
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Nanjing University of Posts and Telecommunications
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/126—Arrangements for reducing harmonics from ac input or output using passive filters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/123—Suppression of common mode voltage or current
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/56—Power conversion systems, e.g. maximum power point trackers

Abstract

The invention discloses a main circuit topology of a ten-switch staggered clamping three-phase photovoltaic inverter. The topology is characterized in that a positive bus switch and a negative bus switch are added on the basis of the traditional three-phase bridge inverter, so that the photovoltaic cell panel and the output side of the inverter are disconnected in a follow current stage; secondly, 3 clamping capacitors are introduced into the direct current input side of the inverter, so that the input voltage is divided into four potential points of 0, 1/3, 2/3 and 1; finally, two clamping switches are added at potential points 1/3 and 2/3 in a staggered mode, so that the common-mode voltage can be clamped at 1/3 or 2/3 of the output voltage of the photovoltaic cell panel when the inverter continues current, the amplitude of the common-mode voltage is reduced, the frequency of the common-mode voltage is three times of the frequency of a triangular carrier frequency, and loop impedance is improved, thereby inhibiting the common-mode leakage current of the photovoltaic inverter and ensuring the safety of personnel and equipment during use.

Description

Ten-switch staggered clamping three-phase photovoltaic inverter topological structure
Technical Field
The invention relates to a main circuit topology of a three-phase photovoltaic inverter, in particular to a main circuit topology of a ten-switch staggered clamping three-phase photovoltaic inverter, which is suitable for photovoltaic power generation occasions with higher requirements on conversion efficiency and personal equipment safety and belongs to the field of power electronic direct current-alternating current conversion.
Background
The photovoltaic inverter is high in conversion efficiency, low in cost and high in safety performance, can bear the influence of large output voltage fluctuation of a photovoltaic cell, and also meets the requirement of high output electric energy quality. Photovoltaic inverters are generally classified into isolated and non-isolated types. The isolated photovoltaic inverter realizes the electrical isolation between the cell panel and the power grid, inhibits leakage current, ensures the personal and equipment safety in use, but has the problems of large volume, high cost, low efficiency and the like. And no transformer exists in the non-isolated photovoltaic inverter, so that the defect of an isolated transformer is avoided, and the isolated photovoltaic inverter is widely applied to a photovoltaic power generation system. However, due to the electrical connection between the input and the output caused by the removal of the transformer and the existence of the capacitance of the panel to ground, the photovoltaic inverter generates common mode leakage current when in operation. The existence of leakage current can lead to the increase of the harmonic content of output current and increase electromagnetic interference, thereby reducing the quality of electric energy, causing the distortion of a power grid and causing power loss, and the leakage current can also cause influence on personal and equipment safety. In order to ensure safety in use, the leakage current must be suppressed within a prescribed range.
Disclosure of Invention
In order to inhibit common-mode leakage current and ensure the safety of human bodies and equipment, the invention provides a main circuit topology of a ten-switch staggered clamping three-phase photovoltaic inverter, which improves the common-mode characteristic of the inverter, can effectively inhibit the common-mode leakage current, reduces the common-mode leakage current and has better engineering application value.
The technical solution of the invention is as follows:
the ten-switch staggered clamping three-phase photovoltaic inverter topology comprises a solar battery, a traditional three-phase bridge inverter circuit, a three-phase output filter circuit and a three-phase load. It is characterized by also comprising: positive and negative bus switches and a staggered clamp circuit. The traditional three-phase bridge inverter circuit comprises an A-phase upper bridge arm switch tube (S)1) Phase A lower bridge arm switch tube (S)4) B phase upper bridge arm switch tube (S)3) B phase lower bridge arm switch tube (S)6) C phase upper bridge arm switch tube (S)5) And C phase lower bridge arm switch tube (S)2) (ii) a The three-phase output filter circuit comprises an A-phase filter inductor (L)fa) B phase filter inductor (L)fb) C phase filter inductor (L)fc) Phase A filter capacitor (C)fa) Phase B filter capacitor (C)fb) And a C-phase filter capacitor (C)fc) (ii) a The three-phase load comprises an A-phase load (R)a) Phase B load (R)b) And C phase load (R)c) (ii) a The three-phase follow current circuit comprises a three-phase load (R)a、Rb、Rc) Three-phase filter inductor (L)fa、Lfb、Lfc) And a phase A first follow current switch tube (S)1) And a phase A second follow current switch tube (S)4) B phase first follow current switch tube (S)3) B phase second follow current switch tube (S)6) C-phase first follow current switch tube (S)5) And C phase second follow current switch tube (S)2) (ii) a The interleaved clamp circuit includes a first DC capacitor (C)dc1) A second DC capacitor (C)dc2) And a third DC capacitor (C)dc3) Upper clamping switch tube (S)9) And a lower clamp switch tube (S)10) (ii) a Wherein the solar panel outputs a voltage (U)PV) Respectively positive electrode ofAnd a first input DC capacitor (C)dc1) Positive electrode and seventh switching tube (S)7) Is connected with the drain electrode of the seventh switching tube (S)7) Respectively with the lower clamping switch tube (S)10) Drain electrode of (1) and A phase upper arm switching tube (S)1) B phase upper bridge arm switch tube (S)3) C phase upper bridge arm switch tube (S)5) The drain electrodes of the two electrodes are connected; output voltage (U) of solar cell panelPV) Respectively with a third input DC capacitor (C)dc3) Negative electrode of (2) and eighth switching tube (S)8) Is connected to a point Q, an eighth switching tube (S)8) Respectively with the upper clamping switch tube (S)9) Source electrode of (1) and A phase lower arm switching tube (S)4) B phase lower bridge arm switch tube (S)6) C phase lower bridge arm switch tube (S)2) The source electrodes of the two-way transistor are connected; a phase upper bridge arm switch tube (S)1) Source electrode of (1) and A phase lower bridge arm switch tube (S)4) Drain electrode of (1), A phase filter inductor (L)fa) One end of each of which is connected to the point A; b phase upper bridge arm switch tube (S)3) Source electrode of (1) and B phase lower bridge arm switch tube (S)6) Drain electrode of (1), B phase filter inductor (L)fb) One end of each of which is connected to the point B; c phase upper bridge arm switch tube (S)5) Source electrode of (1) and C phase lower bridge arm switch tube (S)2) Drain electrode, C phase filter inductor (L)fc) Are respectively connected to the point C; upper clamping switch tube (S)9) And a first input capacitance (C)dc1) Negative pole of (1), second input capacitance (C)dc2) The positive electrodes of the two electrodes are connected; lower clamping switch tube (S)10) And a second input capacitance (C)dc2) Negative pole of (2), third input capacitance (C)dc3) The positive electrodes of the two electrodes are connected; a phase filter inductor (L)fa) The other end of the first phase filter capacitor (C) is connected with the A phase filter capacitor (C)fa) Positive electrode and A phase load (R)a) Is connected with one end of the B-phase filter inductor (L)fb) The other end of the first capacitor and the B-phase filter capacitor (C)fb) Positive electrode and B phase load (R)b) Is connected to one end of a C-phase filter inductor (L)fc) And the other end of the filter capacitor (C) is connected with a phase C filter capacitor (C)fc) Positive electrode of (2) and C-phase load (R)c) One end of the two ends are connected; a phase filter capacitor (C)fa) Negative pole of (2) and B phase filter capacitor (C)fb) Negative pole, C phase filter capacitor (C)fc) Negative electrode of (1), phase A negativeCarrier (R)a) The other end of (2), B-phase load (R)b) The other end of (C), a C-phase load (R)c) The other ends of which are respectively connected to the points N.
As the ten-switch staggered clamping three-phase photovoltaic inverter topology, when the inverter uses the SPWM control strategy, the common-mode voltage amplitude of the inverter is 1/3 or 2/3 of the output voltage amplitude of the photovoltaic cell panel. In the whole inversion period of the inverter, the common-mode voltage of the inverter can be calculated according to the following formula:
ucm＝(uAQ+uBQ+uCQ)/3
wherein u isAQIs the potential difference between the A point and the Q point, uBQIs the potential difference between B point and Q point, uCQIs the potential difference between the point C and the point Q.
Further, the inverter switch state is defined as [ M1,M2,M3,M4,M5]。M1Representing the switching state of the switching tube of the A-phase bridge arm, M11 represents that the switching tube of the upper bridge arm of the A phase is conducted and the switching tube of the lower bridge arm is turned off, and M1When the phase A is equal to 0, the switching tube of the upper bridge arm is switched off, and the switching tube of the lower bridge arm is switched on; m2Representing the switching state of the B-phase bridge arm switching tube, M21 represents that the switching tube of the upper bridge arm of the B phase is conducted and the switching tube of the lower bridge arm is turned off, and M2When the phase B is equal to 0, the upper bridge arm switching tube is switched off, and the lower bridge arm switching tube is switched on; m3Representing the switching state of the C-phase bridge arm switching tube, M31 represents that the C-phase upper bridge arm switching tube is conducted and the lower bridge arm switching tube is turned off, and M3When the phase is equal to 0, the switching tube of the upper bridge arm of the C phase is turned off, and the switching tube of the lower bridge arm is turned on; m4Indicating the switching state of the upper and lower bus-bar switch tubes, M41 means that both the upper and lower bus switches are on, M40 means that the upper bus switch and the lower bus switch are both off; m5Indicating the switching state of the upper and lower clamping switch tubes of the clamping circuit, M51 represents that the upper clamping switch tube is conducted and the lower clamping switch tube is turned off, and M5When the upper clamping switch tube is turned off, the lower clamping switch tube is turned on, M is equal to 05And Z represents that the upper and lower clamping switch tubes are all turned off.
Further, the 6 non-freewheeling switching modes of the inverter are [1,0,0,1, Z ], [1,1,0,1, Z ], [0,1,1,1, Z ], [0,0,1,1, Z ] and [1,0,1,1, Z ], respectively, and the 2 freewheeling switching modes are [1,1,1,0,0] and [0,0,0,0,1, 1, Z ], respectively.
Compared with the prior art, the invention adopting the technical scheme has the following technical advantages: a ten-switch staggered clamping three-phase photovoltaic inverter is additionally provided with a staggered clamping circuit, so that the common-mode voltage of the inverter is clamped to 1/3 and 2/3 of the output voltage of a photovoltaic cell panel in the freewheeling stage; meanwhile, the frequency of the common-mode voltage is three times of the frequency of the triangular carrier frequency, so that the impedance of a common-mode loop is improved, the common-mode characteristic of the inverter is improved, and the common-mode leakage current is effectively restrained.
Drawings
Fig. 1 is a main circuit topology of the present invention.
Figure 2 is a diagram of the mode of operation of the present invention,
wherein, fig. 2(a) is a working principle diagram of the inverter in mode 1;
fig. 2(b) is a schematic diagram of the operation of the inverter in mode 2;
fig. 2(c) is a schematic diagram of the operation of the inverter in mode 3;
FIG. 2(d) is a schematic diagram of the operation of the inverter in mode 4;
fig. 2(e) is a schematic diagram of the operation of the inverter in mode 5;
FIG. 2(f) is a schematic diagram of the operation of the inverter in mode 6;
FIG. 2(g) is a schematic diagram of the operation of the inverter in mode 7;
fig. 2(h) is a schematic diagram of the operation of the inverter in mode 8; .
FIG. 3 is a diagram of the common mode voltage of the present invention.
FIG. 4 is a timing diagram of driving signals according to the present invention.
Detailed Description
The technical scheme of the invention is further explained in detail by combining the attached drawings:
the technical solution of the present invention is to provide a ten-switch interleaved clamping three-phase photovoltaic inverter topology, the structure of which is shown in fig. 1 and includesThe solar energy battery, traditional three-phase bridge type inverter circuit, three-phase output filter circuit and three-phase load. It is characterized by also comprising: positive and negative bus switches and a staggered clamp circuit. The traditional three-phase bridge inverter circuit comprises an A-phase upper bridge arm switch tube (S)1) Phase A lower bridge arm switch tube (S)4) B phase upper bridge arm switch tube (S)3) B phase lower bridge arm switch tube (S)6) C phase upper bridge arm switch tube (S)5) And C phase lower bridge arm switch tube (S)2) (ii) a The three-phase output filter circuit comprises an A-phase filter inductor (L)fa) B phase filter inductor (L)fb) C phase filter inductor (L)fc) Phase A filter capacitor (C)fa) Phase B filter capacitor (C)fb) And a C-phase filter capacitor (C)fc) (ii) a The three-phase load comprises an A-phase load (R)a) Phase B load (R)b) And C phase load (R)c) (ii) a The three-phase follow current circuit comprises a three-phase load (R)a、Rb、Rc) Three-phase filter inductor (L)fa、Lfb、Lfc) And a phase A first follow current switch tube (S)1) And a phase A second follow current switch tube (S)4) B phase first follow current switch tube (S)3) B phase second follow current switch tube (S)6) C-phase first follow current switch tube (S)5) And C phase second follow current switch tube (S)2) (ii) a The interleaved clamp circuit includes a first DC capacitor (C)dc1) A second DC capacitor (C)dc2) And a third DC capacitor (C)dc3) Upper clamping switch tube (S)9) And a lower clamp switch tube (S)10) (ii) a Wherein the solar panel outputs a voltage (U)PV) Respectively with the first input DC capacitor (C)dc1) Positive electrode and seventh switching tube (S)7) Is connected with the drain electrode of the seventh switching tube (S)7) Respectively with the lower clamping switch tube (S)10) Drain electrode of (1) and A phase upper arm switching tube (S)1) B phase upper bridge arm switch tube (S)3) C phase upper bridge arm switch tube (S)5) The drain electrodes of the two electrodes are connected; output voltage (U) of solar cell panelPV) Respectively with a third input DC capacitor (C)dc3) Negative electrode of (2) and eighth switching tube (S)8) Is connected to a point Q, an eighth switching tube (S)8) Respectively with the upper clamping switch tube (S)9) Source electrode of (1) and A phase lower arm switching tube (S)4) B phase lower bridge arm switch tube (S)6) C phase lower bridge arm switch tube (S)2) The source electrodes of the two-way transistor are connected; a phase upper bridge arm switch tube (S)1) Source electrode of (1) and A phase lower bridge arm switch tube (S)4) Drain electrode of (1), A phase filter inductor (L)fa) One end of each of which is connected to the point A; b phase upper bridge arm switch tube (S)3) Source electrode of (1) and B phase lower bridge arm switch tube (S)6) Drain electrode of (1), B phase filter inductor (L)fb) One end of each of which is connected to the point B; c phase upper bridge arm switch tube (S)5) Source electrode of (1) and C phase lower bridge arm switch tube (S)2) Drain electrode, C phase filter inductor (L)fc) Are respectively connected to the point C; upper clamping switch tube (S)9) And a first input capacitance (C)dc1) Negative pole of (1), second input capacitance (C)dc2) The positive electrodes of the two electrodes are connected; lower clamping switch tube (S)10) And a second input capacitance (C)dc2) Negative pole of (2), third input capacitance (C)dc3) The positive electrodes of the two electrodes are connected; a phase filter inductor (L)fa) The other end of the first phase filter capacitor (C) is connected with the A phase filter capacitor (C)fa) Positive electrode and A phase load (R)a) Is connected with one end of the B-phase filter inductor (L)fb) The other end of the first capacitor and the B-phase filter capacitor (C)fb) Positive electrode and B phase load (R)b) Is connected to one end of a C-phase filter inductor (L)fc) And the other end of the filter capacitor (C) is connected with a phase C filter capacitor (C)fc) Positive electrode of (2) and C-phase load (R)c) One end of the two ends are connected; a phase filter capacitor (C)fa) Negative pole of (2) and B phase filter capacitor (C)fb) Negative pole, C phase filter capacitor (C)fc) Negative electrode of (2), A phase load (R)a) The other end of (2), B-phase load (R)b) The other end of (C), a C-phase load (R)c) The other ends of which are respectively connected to the points N.
The ten-switch staggered clamping three-phase photovoltaic inverter provided by the invention can be divided into eight working modes according to the switching states of the three upper bridge arm switching tubes. Defining the inverter switch state as [ M1,M2,M3,M4,M5]。M1Representing the switching state of the switching tube of the A-phase bridge arm, M11 represents that the switching tube of the upper bridge arm of the A phase is conducted and the switching tube of the lower bridge arm is turned off, and M10 represents phase AThe upper bridge arm switching tube is switched off and the lower bridge arm switching tube is switched on; m2Representing the switching state of the B-phase bridge arm switching tube, M21 represents that the switching tube of the upper bridge arm of the B phase is conducted and the switching tube of the lower bridge arm is turned off, and M2When the phase B is equal to 0, the upper bridge arm switching tube is switched off, and the lower bridge arm switching tube is switched on; m3Representing the switching state of the C-phase bridge arm switching tube, M31 represents that the C-phase upper bridge arm switching tube is conducted and the lower bridge arm switching tube is turned off, and M3When the phase is equal to 0, the switching tube of the upper bridge arm of the C phase is turned off, and the switching tube of the lower bridge arm is turned on; m4Indicating the switching state of the upper and lower bus-bar switch tubes, M41 means that both the upper and lower bus switches are on, M40 means that the upper bus switch and the lower bus switch are both off; m5Indicating the switching state of the upper and lower clamping switch tubes of the clamping circuit, M51 represents that the upper clamping switch tube is conducted and the lower clamping switch tube is turned off, and M5When the upper clamping switch tube is turned off, the lower clamping switch tube is turned on, M is equal to 05And Z represents that the upper and lower clamping switch tubes are all turned off.
Therefore, the 6 non-freewheeling switching modes of the inverter are [1,0,0,1, Z ], [1,1,0,1, Z ], [0,1,1,1, Z ], [0,0,1,1, Z ] and [1,0,1,1, Z ], respectively, and the 2 freewheeling switching modes are [1,1,1,0,0] and [0,0,0,0,1, 1] respectively. Each mode is as shown in fig. 2, and the working principle of the inverter in each mode is briefly analyzed as follows:
mode 1:
as shown in FIG. 2(a), the inverter is operated at [1,0,0,1, Z ]]On-off state, switching tube S1、S6、S2And S7、S8The gate-source voltage of (1) is high level, S1、S6、S2And S7、S8In a conducting state; switch tube S3、S4、S5And S9、S10The gate-source voltage is low, S3、S4、S5And S9、S10In an off state. The current flows from the positive pole of the power supply and flows through S7—S1—LfaA phase load-midpoint N-B phase load and C phase load-Lfb、Lfc—S2、S6Finally, through S8And flowing back to the negative pole of the power supply.At this time uAQ＝UPV，uBQ＝uCQ0, so common mode voltage
ucm＝(uAQ+uBQ+uCQ)/3＝UPV/3。
Mode 2:
as shown in fig. 2(b), the inverter is operated at [1,1,0,1, Z ]]On-off state, switching tube S1、S3、S2And S7、S8The gate-source voltage of (1) is high level, S1、S3、S2And S7、S8In a conducting state; switch tube S4、S5、S6And S9、S10The gate-source voltage of (1) is low level, S4、S5、S6And S9、S10In an off state. The current flows from the positive pole of the power supply and flows through S7—S1、S3—Lfa、Lfbphase-A load, phase-B load-midpoint N-C load-Lfc—S2Finally, through S8And flowing back to the negative pole of the power supply. At this time uAQ＝uBQ＝UPV，uCQ0, so the common mode voltage ucm＝(uAQ+uBQ+uCQ)/3＝2UPV/3。
Modality 3:
as shown in fig. 2(c), the inverter is operated at [0,1,0,1, Z]On-off state, switching tube S4、S3、S2And S7、S8The gate-source voltage of (1) is high level, S4、S3、S2And S7、S8In a conducting state; switch tube S1、S5、S6And S9、S10The gate-source voltage of (1) is low level, S1、S5、S6And S9、S10In an off state. The current flows from the positive pole of the power supply and flows through S7—S3—Lfb-B phase load-midpoint N-A phase load, C phase load-Lfa、Lfc—S4、S2Finally, through S8And flowing back to the negative pole of the power supply. At this time uBQ＝UPV，uAQ＝uCQ0, so the common mode voltage ucm＝(uAQ+uBQ+uCQ)/3＝UPV/3。
Modality 4:
as shown in FIG. 2(d), the inverter is operated at [0,1,1,1, Z]On-off state, switching tube S4、S3、S5And S7、S8The gate-source voltage of (1) is high level, S4、S3、S5And S7、S8In a conducting state; switch tube S1、S2、S6And S9、S10The gate-source voltage of (1) is low level, S1、S2、S6And S9、S10In an off state. The current flows from the positive pole of the power supply and flows through S7—S3、S5—Lfb、Lfc-B phase load, C phase load-midpoint N-A phase load-Lfa—S4Finally, through S8And flowing back to the negative pole of the power supply. At this time uBQ＝uCQ＝UPV，uAQ0, so the common mode voltage ucm＝(uAQ+uBQ+uCQ)/3＝2UPV/3。
Mode 5:
as shown in fig. 2(e), the inverter is operated at [0,0,1,1, Z]On-off state, switching tube S4、S6、S5And S7、S8The gate-source voltage of (1) is high level, S4、S6、S5And S7、S8In a conducting state; switch tube S1、S2、S3And S9、S10The gate-source voltage of (1) is low level, S1、S2、S3And S9、S10In an off state. The current flows from the positive pole of the power supply and flows through S7—S5—Lfc-C phase load-midpoint N-A phase load, B phase load-Lfa、Lfb—S4、S6Finally, through S8And flowing back to the negative pole of the power supply. At this time uAQ＝uBQ＝0，uCQ＝UPVTherefore, common mode electricityPress ucm＝(uAQ+uBQ+uCQ)/3＝UPV/3。
Modality 6:
as shown in fig. 2(f), the inverter is operated at [1,0,1,1, Z]On-off state, switching tube S1、S6、S5And S7、S8The gate-source voltage of (1) is high level, S1、S6、S5And S7、S8In a conducting state; switch tube S2、S3、S4And S9、S10The gate-source voltage of (1) is low level, S2、S3、S4And S9、S10In an off state. The current flows from the positive pole of the power supply and flows through S7—S1、S5—Lfa、Lfcphase-A load, phase-C load-midpoint N-phase-B load-Lfb—S6Finally, through S8And flowing back to the negative pole of the power supply. At this time uAQ＝uCQ＝UPV，uBQ0, so the common mode voltage ucm＝(uAQ+uBQ+uCQ)/3＝2UPV/3。
Modality 7:
as shown in FIG. 2(g), the inverter is operated at [1,1,1, 0]]A switch state. Once switch tube S1、S3And S5The gate-source voltage of the switch tube S is high level at the same time1、S3、S5In the on state, then S7、S8And S9Off, S10And the circuit enters a follow current stage after being conducted. The former state of the mode is generally that two of three switching tubes of an upper bridge arm are conducted. Here, the modality 2 enters the modality 7 for example, and the other cases are similar. At this time, the current in the freewheeling inductor will form a freewheeling loop along the conducting switch tube of each phase, and the switch tube S is clamped by the DC side10Will be clamped to UPVA/3; taking phase A as an example, inductor LfaWill follow Lfa—Ra—N—Rc—Lfc—C—S5—S1—A—LfaFollow the sequential path of (a). In the same way, othersThe two phases also follow similar paths. At this time, the dot potential of each phase is UPV/3. I.e. uAQ＝uBQ＝uCQ＝UPV/3, so the common mode voltage u of mode 7cm＝(uAQ+uBQ+uCQ)/3＝UPV/3. Modality 8:
as shown in FIG. 2(h), the inverter is operated at [0,0,0,0,1]]A switch state. Once switch tube S4、S6And S2The gate-source voltage of the switch tube S is high level at the same time4、S6、S2In the on state, then S7、S8And S10Off, S9And the circuit enters a follow current stage after being conducted. The former state of the mode is generally that two of three switching tubes of a lower bridge arm are conducted. Here, the modality 1 enters the modality 8 for example, and the other cases are similar. At this time, the current in the freewheeling inductor will form a freewheeling loop along the conducting switch tube of each phase, and the DC side clamp switch tube S9Will be clamped to 2UPVA/3; taking phase B as an example, inductor LfbWill follow Lfb—B—S6—S4—A—Lfa—Ra—N—Rb—LfbFollow the sequential path of (a). Similarly, the other two phases follow similar paths. At this time, the dot potential of each phase was 2UPV/3. I.e. uAQ＝uBQ＝uCQ＝2UPV/3, so the common mode voltage u of mode 8cm＝(uAQ+uBQ+uCQ)/3＝2UPV/3。
From the above analysis, the inverter common mode voltage waveform is shown in fig. 3. The common mode voltage change range is from 0-U of the traditional three-phase bridge inverterPVReduced to UPV/3～2UPVThe amplitude of the common-mode voltage is reduced; in addition, the common-mode voltage change frequency is changed to be three times of the triangular carrier frequency, and the common-mode loop impedance is increased, so that the common-mode leakage current is restrained, the electromagnetic interference of a system is reduced, the power quality is improved, unnecessary power loss is reduced, and the safety of people and equipment in use is ensured.
FIG. 4 shows the present inventionA timing diagram of driving signals in a control scheme, wherein waveforms from top to bottom are: a-phase upper bridge arm switch tube S1Voltage waveform u between grid and sourcegs1(ii) a A-phase lower bridge arm switch tube S4Voltage waveform u between grid and sourcegs4(ii) a B-phase upper bridge arm switch tube S3Voltage waveform u between grid and sourcegs3(ii) a B-phase lower bridge arm switch tube S6Voltage waveform u between grid and sourcegs6(ii) a C-phase upper bridge arm switch tube S5Voltage waveform u between grid and sourcegs5(ii) a C-phase lower bridge arm switch tube S2Voltage waveform u between grid and sourcegs2(ii) a Positive bus switch S7Voltage waveform u between grid and sourcegs7(ii) a Negative bus switch S8Voltage waveform u between grid and sourcegs8(ii) a Lower clamping switch tube S10Voltage waveform u between grid and sourcegs10(ii) a Upper clamping switch tube S9Voltage waveform u between grid and sourcegs9。
In conclusion, the method can effectively improve the problem of common-mode leakage current of the three-phase non-isolated photovoltaic inverter, provides a method for inhibiting the leakage current of the non-isolated three-phase photovoltaic inverter, and has a certain engineering application value.
The above description is only for the purpose of illustrating the embodiments of the present invention and should not be taken as limiting the scope of the present invention, and any equivalent changes and modifications made by those skilled in the art without departing from the spirit and principle of the present invention should fall within the protection scope of the present invention.

Claims (4)

1. The utility model provides a ten crisscross clamp three-phase photovoltaic inverter topologies of switch, includes solar cell, traditional three-phase bridge type inverter circuit, three-phase output filter circuit and three-phase load, its characterized in that: the system also comprises a positive bus switch, a negative bus switch and a staggered clamping circuit; wherein, the traditional three-phase bridge inverter circuit comprises an A-phase upper bridge arm switch tube (S)1) Phase A lower bridge arm switch tube (S)4) B phase upper bridge arm switch tube (S)3) B phase lower bridge arm switch tube (S)6) C phase upper bridge arm switch tube (S)5) And C phase lower bridge arm switch tube (S)2) (ii) a The three phasesThe output filter circuit comprises an A-phase filter inductor (L)fa) B phase filter inductor (L)fb) C phase filter inductor (L)fc) Phase A filter capacitor (C)fa) Phase B filter capacitor (C)fb) And a C-phase filter capacitor (C)fc) (ii) a The three-phase load comprises an A-phase load (R)a) Phase B load (R)b) And C phase load (R)c) (ii) a The three-phase follow current circuit comprises a three-phase load (R)a、Rb、Rc) Three-phase filter inductor (L)fa、Lfb、Lfc) And a phase A first follow current switch tube (S)1) And a phase A second follow current switch tube (S)4) B phase first follow current switch tube (S)3) B phase second follow current switch tube (S)6) C-phase first follow current switch tube (S)5) And C phase second follow current switch tube (S)2) (ii) a The interleaved clamp circuit includes a first DC capacitor (C)dc1) A second DC capacitor (C)dc2) And a third DC capacitor (C)dc3) Upper clamping switch tube (S)9) And a lower clamp switch tube (S)10) (ii) a Output voltage (U) of solar cell panelPV) Respectively with the first input DC capacitor (C)dc1) Positive electrode and seventh switching tube (S)7) Is connected with the drain electrode of the seventh switching tube (S)7) Respectively with the lower clamping switch tube (S)10) Drain electrode of (1) and A phase upper arm switching tube (S)1) B phase upper bridge arm switch tube (S)3) C phase upper bridge arm switch tube (S)5) The drain electrodes of the two electrodes are connected; output voltage (U) of solar cell panelPV) Respectively with a third input DC capacitor (C)dc3) Negative electrode of (2) and eighth switching tube (S)8) Is connected to a point Q, an eighth switching tube (S)8) Respectively with the upper clamping switch tube (S)9) Source electrode of (1) and A phase lower arm switching tube (S)4) B phase lower bridge arm switch tube (S)6) C phase lower bridge arm switch tube (S)2) The source electrodes of the two-way transistor are connected; a phase upper bridge arm switch tube (S)1) Source electrode of (1) and A phase lower bridge arm switch tube (S)4) Drain electrode of (1), A phase filter inductor (L)fa) One end of each of which is connected to the point A; b phase upper bridge arm switch tube (S)3) Source electrode of (1) and B phase lower bridge arm switch tube (S)6) Drain electrode of (1), B phase filter inductor (L)fb) One end of each of which is connected to the point B; c phase upper bridge arm switch tube (S)5) Source electrode of (1) and C phase lower bridge arm switch tube (S)2) Drain electrode, C phase filter inductor (L)fc) Are respectively connected to the point C; upper clamping switch tube (S)9) And a first input capacitance (C)dc1) Negative pole of (1), second input capacitance (C)dc2) The positive electrodes of the two electrodes are connected; lower clamping switch tube (S)10) And a second input capacitance (C)dc2) Negative pole of (2), third input capacitance (C)dc3) The positive electrodes of the two electrodes are connected; a phase filter inductor (L)fa) The other end of the first phase filter capacitor (C) is connected with the A phase filter capacitor (C)fa) Positive electrode and A phase load (R)a) Is connected with one end of the B-phase filter inductor (L)fb) The other end of the first capacitor and the B-phase filter capacitor (C)fb) Positive electrode and B phase load (R)b) Is connected to one end of a C-phase filter inductor (L)fc) And the other end of the filter capacitor (C) is connected with a phase C filter capacitor (C)fc) Positive electrode of (2) and C-phase load (R)c) One end of the two ends are connected; a phase filter capacitor (C)fa) Negative pole of (2) and B phase filter capacitor (C)fb) Negative pole, C phase filter capacitor (C)fc) Negative electrode of (2), A phase load (R)a) The other end of (2), B-phase load (R)b) The other end of (C), a C-phase load (R)c) The other ends of which are respectively connected to the points N.
2. The ten-switch interleaved clamped three-phase photovoltaic inverter topology of claim 1, wherein: when the inverter uses the SPWM control strategy, its common-mode voltage ucmIs a square wave, the upper peak value of the square wave is 2UPV(ii)/3, lower peak is UPV/3, wherein UPVIs the output voltage of the photovoltaic cell panel, the common mode voltage ucmIs three times the triangular carrier frequency;
the expression for the common mode voltage is:
ucm＝(uAQ+uBQ+uCQ)/3
wherein u isAQIs the potential difference between the A point and the Q point, uBQIs the potential difference between B point and Q point, uCQIs the potential difference between the point C and the point Q.
3. The ten-switch interleaved clamped three-phase photovoltaic inverter topology of claim 1, wherein: defining the inverter switch state as [ M1,M2,M3,M4,M5]；M1Representing the switching state of the switching tube of the A-phase bridge arm, M11 represents that the switching tube of the upper bridge arm of the A phase is conducted and the switching tube of the lower bridge arm is turned off, and M1When the phase A is equal to 0, the switching tube of the upper bridge arm is switched off, and the switching tube of the lower bridge arm is switched on; m2Representing the switching state of the B-phase bridge arm switching tube, M21 represents that the switching tube of the upper bridge arm of the B phase is conducted and the switching tube of the lower bridge arm is turned off, and M2When the phase B is equal to 0, the upper bridge arm switching tube is switched off, and the lower bridge arm switching tube is switched on; m3Representing the switching state of the C-phase bridge arm switching tube, M31 represents that the C-phase upper bridge arm switching tube is conducted and the lower bridge arm switching tube is turned off, and M3When the phase is equal to 0, the switching tube of the upper bridge arm of the C phase is turned off, and the switching tube of the lower bridge arm is turned on; m4Indicating the switching state of the upper and lower bus-bar switch tubes, M41 means that both the upper and lower bus switches are on, M40 means that the upper bus switch and the lower bus switch are both off; m5Indicating the switching state of the upper and lower clamping switch tubes of the clamping circuit, M51 represents that the upper clamping switch tube is conducted and the lower clamping switch tube is turned off, and M5When the upper clamping switch tube is turned off, the lower clamping switch tube is turned on, M is equal to 05And Z represents that the upper and lower clamping switch tubes are all turned off.
4. The ten-switch interleaved clamped three-phase photovoltaic inverter topology of claim 3, wherein: the 6 non-freewheeling switching modes of the inverter are [1,0,0,1, Z ], [1,1,0,1, Z ], [0,1,1,1, Z ], [0,0,1,1, Z ] and [1,0,1,1, Z ], and the 2 freewheeling switching modes are [1,1,1,0,0] and [0,0,0,0,1 ].
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